src/add-ons/accelerants/intel_extreme/accelerant.h

   1 /*
   2  * Copyright 2006-2008, Haiku, Inc. All Rights Reserved.
   3  * Distributed under the terms of the MIT License.
   4  *
   5  * Authors:
   6  *              Axel Dörfler, axeld@pinc-software.de
   7  */
   8 #ifndef INTEL_EXTREME_ACCELERANT_H
   9 #define INTEL_EXTREME_ACCELERANT_H
  10
  11
  12 #include "intel_extreme.h"
  13
  14 #include <edid.h>
  15 #include <video_overlay.h>
  16
  17 #include "Ports.h"
  18 #include "Pipes.h"
  19
  20
  21 struct overlay {
  22         overlay_buffer  buffer;
  23         addr_t                  buffer_base;
  24         uint32                  buffer_offset;
  25         addr_t                  state_base;
  26         uint32                  state_offset;
  27 };
  28
  29 struct overlay_frame {
  30         int16                   h_start;
  31         int16                   v_start;
  32         uint16                  width;
  33         uint16                  height;
  34 };
  35
  36 struct accelerant_info {
  37         uint8*                  registers;
  38         area_id                 regs_area;
  39
  40         intel_shared_info* shared_info;
  41         area_id                 shared_info_area;
  42
  43         display_mode    current_mode;   // pretty much a hack until per-display modes
  44
  45         display_mode*   mode_list;              // cloned list of standard display modes
  46         area_id                 mode_list_area;
  47
  48         struct overlay_registers* overlay_registers;
  49         overlay*                current_overlay;
  50         overlay_view    last_overlay_view;
  51         overlay_frame   last_overlay_frame;
  52         uint32                  last_horizontal_overlay_scale;
  53         uint32                  last_vertical_overlay_scale;
  54         uint32                  overlay_position_buffer_offset;
  55
  56         uint32                  port_count;
  57         Port*                   ports[MAX_PORTS];
  58
  59         uint32                  pipe_count;
  60         Pipe*                   pipes[MAX_PIPES];
  61
  62         edid1_info              edid_info;
  63         bool                    has_edid;
  64
  65         // limited 3D support for overlay on i965
  66         addr_t                  context_base;
  67         uint32                  context_offset;
  68         bool                    context_set;
  69
  70         int                             device;
  71         uint8                   head_mode;
  72         bool                    is_clone;
  73 };
  74
  75
  76 #define HEAD_MODE_A_ANALOG              0x0001
  77 #define HEAD_MODE_B_DIGITAL             0x0002
  78 #define HEAD_MODE_CLONE                 0x0003
  79 #define HEAD_MODE_LVDS_PANEL    0x0008
  80 #define HEAD_MODE_TESTING               0x1000
  81 #define HEAD_MODE_STIPPI                0x2000
  82
  83 extern accelerant_info* gInfo;
  84
  85 // register access
  86
  87 inline uint32
  88 read32(uint32 encodedRegister)
  89 {
  90         return *(volatile uint32*)(gInfo->registers
  91                 + gInfo->shared_info->register_blocks[REGISTER_BLOCK(encodedRegister)]
  92                 + REGISTER_REGISTER(encodedRegister));
  93 }
  94
  95 inline void
  96 write32(uint32 encodedRegister, uint32 value)
  97 {
  98         *(volatile uint32*)(gInfo->registers
  99                 + gInfo->shared_info->register_blocks[REGISTER_BLOCK(encodedRegister)]
 100                 + REGISTER_REGISTER(encodedRegister)) = value;
 101 }
 102
 103 void dump_registers(void);
 104
 105 // dpms.cpp
 106 extern void enable_display_plane(bool enable);
 107 extern void set_display_power_mode(uint32 mode);
 108
 109 // engine.cpp
 110 extern void uninit_ring_buffer(ring_buffer &ringBuffer);
 111 extern void setup_ring_buffer(ring_buffer &ringBuffer, const char* name);
 112
 113 // modes.cpp
 114 extern void wait_for_vblank(void);
 115 extern void set_frame_buffer_base(void);
 116 extern status_t create_mode_list(void);
 117
 118 // memory.cpp
 119 extern void intel_free_memory(addr_t base);
 120 extern status_t intel_allocate_memory(size_t size, uint32 flags, addr_t &base);
 121
 122 #endif  /* INTEL_EXTREME_ACCELERANT_H */