2 * Copyright 2006, Ingo Weinhold <bonefish@cs.tu-berlin.de>.
3 * All rights reserved. Distributed under the terms of the MIT License.
6 #ifndef PCI_BUS_MANAGER_M68K_IO_H
7 #define PCI_BUS_MANAGER_M68K_IO_H
9 #include <SupportDefs.h>
11 #define IOBARRIER() asm volatile("nop") /* nop flushes the instruction pipeline */
12 /*XXX: sync cache/pmmu?*/
15 m68k_out8(vuint8
*address
, uint8 value
)
23 m68k_out16(vuint16
*address
, uint16 value
)
29 #if _XXX_HAS_REVERSE_IO
31 m68k_out16_reverse(vuint16
*address
, uint16 value
)
33 asm volatile("sthbrx %1, 0, %0" : : "r"(address
), "r"(value
));
40 m68k_out32(vuint32
*address
, uint32 value
)
47 #if _XXX_HAS_REVERSE_IO
49 m68k_out32_reverse(vuint32
*address
, uint32 value
)
51 asm volatile("stwbrx %1, 0, %0" : : "r"(address
), "r"(value
));
57 m68k_in8(const vuint8
*address
)
59 uint8 value
= *address
;
66 m68k_in16(const vuint16
*address
)
68 uint16 value
= *address
;
74 #if _XXX_HAS_REVERSE_IO
76 m68k_in16_reverse(const vuint16
*address
)
79 asm volatile("lhbrx %0, 0, %1" : "=r"(value
) : "r"(address
));
87 m68k_in32(const vuint32
*address
)
89 uint32 value
= *address
;
95 #if _XXX_HAS_REVERSE_IO
97 m68k_in32_reverse(const vuint32
*address
)
100 asm volatile("lwbrx %0, 0, %1" : "=r"(value
) : "r"(address
));
106 #endif // PCI_BUS_MANAGER_M68K_IO_H