2 * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@bluezbox.com>
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 compatible = "arm,armv7-timer";
34 clock-frequency = <19200000>;
35 interrupts = <0 1 3 2>;
36 interrupt-parent = <&local_intc>;
40 compatible = "simple-bus";
43 reg = <0x3f000000 0x01000000>;
44 ranges = <0 0x3f000000 0x01000000>,
45 <0x40000000 0x40000000 0x00001000>;
47 local_intc: local_intc {
48 compatible = "brcm,bcm2836-l1-intc";
49 reg = <0x40000000 0x100>;
51 #interrupt-cells = <1>;
52 interrupt-parent = <&local_intc>;
55 intc: interrupt-controller {
56 compatible = "broadcom,bcm2835-armctrl-ic",
57 "broadcom,bcm2708-armctrl-ic";
59 interrupt-parent = <&local_intc>;
63 #interrupt-cells = <1>;
79 * 2: TIMER2 18: VC_DMA2
80 * 3: TIMER3 19: VC_DMA3
88 * 11: TRANSPOSER 27: DMA11
89 * 12: MULTICORESYNC0 28: DMA12
90 * 13: MULTICORESYNC1 29: AUX
91 * 14: MULTICORESYNC2 30: ARM
92 * 15: MULTICORESYNC3 31: VPUDMA
97 * 1: VIDEOSCALER 17: GPIO0
103 * 7: CAM1 23: VC_I2SPCM
104 * 8: HDMI0 24: VC_SDIO
105 * 9: HDMI1 25: VC_UART
106 * 10: PIXELVALVE1 26: SLIMBUS
107 * 11: I2CSPISLV 27: VEC
110 * 14: PWA1 30: VC_ARASANSDIO
111 * 15: CPR 31: AVSPMON
116 compatible = "broadcom,bcm2835-wdt",
117 "broadcom,bcm2708-wdt";
118 reg = <0x10001c 0x0c>; /* 0x1c, 0x20, 0x24 */
122 compatible = "broadcom,bcm2835-gpio",
123 "broadcom,bcm2708-gpio";
124 reg = <0x200000 0xb0>;
126 /* Unusual arrangement of interrupts
127 * (determined by testing)
128 * 17: Bank 0 (GPIOs 0-31)
129 * 19: Bank 1 (GPIOs 32-53)
131 * 20: All banks (GPIOs 0-53)
133 interrupts = <57 59 58 60>;
134 interrupt-parent = <&intc>;
139 interrupt-controller;
140 #interrupt-cells = <2>;
142 pinctrl-names = "default";
143 pinctrl-0 = <&pins_reserved>;
145 /* Pins that can short 3.3V to GND in output mode: 46
146 * Pins used by VideoCore: 48-53
148 broadcom,read-only = <46>, <48>, <49>, <50>,
152 pins_bsc0_a: bsc0_a {
153 broadcom,pins = <0>, <1>;
156 pins_bsc0_b: bsc0_b {
157 broadcom,pins = <28>, <29>;
160 pins_bsc0_c: bsc0_c {
161 broadcom,pins = <44>, <45>;
165 pins_bsc1_a: bsc1_a {
166 broadcom,pins = <2>, <3>;
169 pins_bsc1_b: bsc1_b {
170 broadcom,pins = <44>, <45>;
174 pins_gpclk0_a: gpclk0_a {
178 pins_gpclk0_b: gpclk0_b {
179 broadcom,pins = <20>;
182 pins_gpclk0_c: gpclk0_c {
183 broadcom,pins = <32>;
186 pins_gpclk0_d: gpclk0_d {
187 broadcom,pins = <34>;
191 pins_gpclk1_a: gpclk1_a {
195 pins_gpclk1_b: gpclk1_b {
196 broadcom,pins = <21>;
199 pins_gpclk1_c: gpclk1_c {
200 broadcom,pins = <42>;
203 pins_gpclk1_d: gpclk1_d {
204 broadcom,pins = <44>;
208 pins_gpclk2_a: gpclk2_a {
212 pins_gpclk2_b: gpclk2_b {
213 broadcom,pins = <43>;
217 pins_spi0_a: spi0_a {
218 broadcom,pins = <7>, <8>, <9>, <10>, <11>;
221 pins_spi0_b: spi0_b {
222 broadcom,pins = <35>, <36>, <37>, <38>, <39>;
226 pins_pwm0_a: pwm0_a {
227 broadcom,pins = <12>;
230 pins_pwm0_b: pwm0_b {
231 broadcom,pins = <18>;
234 pins_pwm0_c: pwm0_c {
235 broadcom,pins = <40>;
238 pins_pwm1_a: pwm1_a {
239 broadcom,pins = <13>;
242 pins_pwm1_b: pwm1_b {
243 broadcom,pins = <19>;
246 pins_pwm1_c: pwm1_c {
247 broadcom,pins = <41>;
250 pins_pwm1_d: pwm1_d {
251 broadcom,pins = <45>;
255 pins_uart0_a: uart0_a {
256 broadcom,pins = <14>, <15>;
259 pins_uart0_b: uart0_b {
260 broadcom,pins = <32>, <33>;
263 pins_uart0_c: uart0_c {
264 broadcom,pins = <36>, <37>;
267 pins_uart0_fc_a: uart0_fc_a {
268 broadcom,pins = <16>, <17>;
271 pins_uart0_fc_b: uart0_fc_b {
272 broadcom,pins = <30>, <31>;
275 pins_uart0_fc_c: uart0_fc_c {
276 broadcom,pins = <39>, <38>;
281 broadcom,pins = <18>, <19>, <20>, <21>;
285 broadcom,pins = <28>, <29>, <30>, <31>;
288 /* Secondary Address Bus */
289 pins_sm_addr_a: sm_addr_a {
290 broadcom,pins = <5>, <4>, <3>, <2>, <1>, <0>;
293 pins_sm_addr_b: sm_addr_b {
294 broadcom,pins = <33>, <32>, <31>, <30>, <29>,
298 pins_sm_ctl_a: sm_ctl_a {
299 broadcom,pins = <6>, <7>;
302 pins_sm_ctl_b: sm_ctl_b {
303 broadcom,pins = <34>, <35>;
306 pins_sm_data_8bit_a: sm_data_8bit_a {
307 broadcom,pins = <8>, <9>, <10>, <11>, <12>,
311 pins_sm_data_8bit_b: sm_data_8bit_b {
312 broadcom,pins = <36>, <37>, <38>, <39>, <40>,
316 pins_sm_data_16bit: sm_data_16bit {
317 broadcom,pins = <16>, <17>, <18>, <19>, <20>,
321 pins_sm_data_18bit: sm_data_18bit {
322 broadcom,pins = <24>, <25>;
327 broadcom,pins = <18>, <19>;
332 broadcom,pins = <18>, <19>, <20>, <21>;
337 broadcom,pins = <16>, <17>, <18>, <19>, <20>,
342 pins_uart1_a: uart1_a {
343 broadcom,pins = <14>, <15>;
346 pins_uart1_b: uart1_b {
347 broadcom,pins = <32>, <33>;
350 pins_uart1_c: uart1_c {
351 broadcom,pins = <40>, <41>;
354 pins_uart1_fc_a: uart1_fc_a {
355 broadcom,pins = <16>, <17>;
358 pins_uart1_fc_b: uart1_fc_b {
359 broadcom,pins = <30>, <31>;
362 pins_uart1_fc_c: uart1_fc_c {
363 broadcom,pins = <43>, <42>;
368 broadcom,pins = <40>, <41>, <42>, <43>, <44>,
373 pins_arm_jtag_trst: arm_jtag_trst {
374 broadcom,pins = <22>;
377 pins_arm_jtag_a: arm_jtag_a {
378 broadcom,pins = <4>, <5>, <6>, <12>, <13>;
381 pins_arm_jtag_b: arm_jtag_b {
382 broadcom,pins = <23>, <24>, <25>, <26>, <27>;
386 pins_reserved: reserved {
387 broadcom,pins = <48>, <49>, <50>, <51>, <52>,
393 compatible = "broadcom,bcm2835-rng",
394 "broadcom,bcm2708-rng";
395 reg = <0x104000 0x20>;
397 interrupt-parent = <&intc>;
401 #address-cells = <1>;
403 compatible = "broadcom,bcm2835-bsc",
404 "broadcom,bcm2708-bsc";
405 reg = <0x205000 0x20>;
407 interrupt-parent = <&intc>;
411 #address-cells = <1>;
413 compatible = "broadcom,bcm2835-bsc",
414 "broadcom,bcm2708-bsc";
415 reg = <0x804000 0x20>;
417 interrupt-parent = <&intc>;
421 compatible = "broadcom,bcm2835-spi",
422 "broadcom,bcm2708-spi";
423 reg = <0x204000 0x20>;
425 interrupt-parent = <&intc>;
429 compatible = "broadcom,bcm2835-dma",
430 "broadcom,bcm2708-dma";
431 reg = <0x7000 0x1000>, <0xE05000 0x1000>;
432 interrupts = <24 25 26 27 28 29 30 31 32 33 34 35 36>;
433 interrupt-parent = <&intc>;
435 broadcom,channels = <0>; /* Set by VideoCore */
439 compatible = "broadcom,bcm2835-mbox",
440 "broadcom,bcm2708-mbox";
443 interrupt-parent = <&intc>;
457 compatible = "broadcom,bcm2835-sdhci",
458 "broadcom,bcm2708-sdhci";
459 reg = <0x300000 0x100>;
461 interrupt-parent = <&intc>;
463 clock-frequency = <250000000>; /* Set by VideoCore */
467 compatible = "broadcom,bcm2835-uart",
468 "broadcom,bcm2708-uart", "arm,pl011",
470 reg = <0x201000 0x1000>;
472 interrupt-parent = <&intc>;
474 clock-frequency = <48000000>; /* Set by VideoCore */
479 compatible = "broadcom,bcm2835-vchiq";
482 interrupt-parent = <&intc>;
483 cache-line-size = <32>;
487 compatible = "broadcom,bcm2835-usb",
488 "broadcom,bcm2708-usb",
489 "synopsys,designware-hs-otg2";
490 reg = <0x980000 0x20000>;
492 interrupt-parent = <&intc>;
493 #address-cells = <1>;