src/data/dts/arch/arm/rpi2.dts

   1 /*
   2  * Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@bluezbox.com>
   3  *
   4  * Redistribution and use in source and binary forms, with or without
   5  * modification, are permitted provided that the following conditions
   6  * are met:
   7  * 1. Redistributions of source code must retain the above copyright
   8  *    notice, this list of conditions and the following disclaimer.
   9  * 2. Redistributions in binary form must reproduce the above copyright
  10  *    notice, this list of conditions and the following disclaimer in the
  11  *    documentation and/or other materials provided with the distribution.
  12  *
  13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  23  * SUCH DAMAGE.
  24  *
  25  * $FreeBSD$
  26  */
  27 /dts-v1/;
  28
  29 /include/ "bcm2836.dtsi"
  30
  31 / {
  32         model = "Raspberry Pi 2 Model B";
  33         compatible = "brcm,bcm2709";
  34
  35         memreserve = <0x08000000 0x08000000>;   /* Set by VideoCore */
  36
  37         cpus {
  38                 #address-cells = <1>;
  39                 #size-cells = <0>;
  40                 cpu@0 {
  41                         compatible = "arm,cortex-a7";
  42                         device_type = "cpu";
  43                         reg = <0xf00>;                  /* CPU ID=0xf00 */
  44                         clock-frequency = <800000000>;  /* 800MHz */
  45                 };
  46                 cpu@1 {
  47                         compatible = "arm,cortex-a7";
  48                         device_type = "cpu";
  49                         reg = <0xf01>;                  /* CPU ID=0xf01 */
  50                         clock-frequency = <800000000>;  /* 800MHz */
  51                 };
  52                 cpu@2 {
  53                         compatible = "arm,cortex-a7";
  54                         device_type = "cpu";
  55                         reg = <0xf02>;                  /* CPU ID=0xf02 */
  56                         clock-frequency = <800000000>;  /* 800MHz */
  57                 };
  58                 cpu@3 {
  59                         compatible = "arm,cortex-a7";
  60                         device_type = "cpu";
  61                         reg = <0xf03>;                  /* CPU ID=0xf03 */
  62                         clock-frequency = <800000000>;  /* 800MHz */
  63                 };
  64         };
  65
  66         memory {
  67                 device_type = "memory";
  68                 reg = <0 0x8000000>; /* 128MB, Set by VideoCore */
  69
  70         };
  71
  72         system {
  73                 revision = <0>;                 /* Set by VideoCore */
  74                 serial = <0 0>;                 /* Set by VideoCore */
  75         };
  76
  77         axi {
  78                 gpio: gpio {
  79                         /* BSC0 */
  80                         pins_bsc0_a: bsc0_a {
  81                                 broadcom,function = "ALT0";
  82                         };
  83
  84                         pins_bsc0_b: bsc0_b {
  85                                 broadcom,function = "ALT0";
  86                         };
  87
  88                         pins_bsc0_c: bsc0_c {
  89                                 broadcom,function = "ALT1";
  90                         };
  91
  92                         /* BSC1 */
  93                         pins_bsc1_a: bsc1_a {
  94                                 broadcom,function = "ALT0";
  95                         };
  96
  97                         pins_bsc1_b: bsc1_b {
  98                                 broadcom,function = "ALT2";
  99                         };
 100
 101                         /* GPCLK0 */
 102                         pins_gpclk0_a: gpclk0_a {
 103                                 broadcom,function = "ALT0";
 104                         };
 105
 106                         pins_gpclk0_b: gpclk0_b {
 107                                 broadcom,function = "ALT5";
 108                         };
 109
 110                         pins_gpclk0_c: gpclk0_c {
 111                                 broadcom,function = "ALT0";
 112                         };
 113
 114                         pins_gpclk0_d: gpclk0_d {
 115                                 broadcom,function = "ALT0";
 116                         };
 117
 118                         /* GPCLK1 */
 119                         pins_gpclk1_a: gpclk1_a {
 120                                 broadcom,function = "ALT0";
 121                         };
 122
 123                         pins_gpclk1_b: gpclk1_b {
 124                                 broadcom,function = "ALT5";
 125                         };
 126
 127                         pins_gpclk1_c: gpclk1_c {
 128                                 broadcom,function = "ALT0";
 129                         };
 130
 131                         pins_gpclk1_d: gpclk1_d {
 132                                 broadcom,function = "ALT0";
 133                         };
 134
 135                         /* GPCLK2 */
 136                         pins_gpclk2_a: gpclk2_a {
 137                                 broadcom,function = "ALT0";
 138                         };
 139
 140                         pins_gpclk2_b: gpclk2_b {
 141                                 broadcom,function = "ALT0";
 142                         };
 143
 144                         /* SPI0 */
 145                         pins_spi0_a: spi0_a {
 146                                 broadcom,function = "ALT0";
 147                         };
 148
 149                         pins_spi0_b: spi0_b {
 150                                 broadcom,function = "ALT0";
 151                         };
 152
 153                         /* PWM */
 154                         pins_pwm0_a: pwm0_a {
 155                                 broadcom,function = "ALT0";
 156                         };
 157
 158                         pins_pwm0_b: pwm0_b {
 159                                 broadcom,function = "ALT5";
 160                         };
 161
 162                         pins_pwm0_c: pwm0_c {
 163                                 broadcom,function = "ALT0";
 164                         };
 165
 166                         pins_pwm1_a: pwm1_a {
 167                                 broadcom,function = "ALT0";
 168                         };
 169
 170                         pins_pwm1_b: pwm1_b {
 171                                 broadcom,function = "ALT5";
 172                         };
 173
 174                         pins_pwm1_c: pwm1_c {
 175                                 broadcom,function = "ALT0";
 176                         };
 177
 178                         pins_pwm1_d: pwm1_d {
 179                                 broadcom,function = "ALT0";
 180                         };
 181
 182                         /* UART0 */
 183                         pins_uart0_a: uart0_a {
 184                                 broadcom,function = "ALT0";
 185                         };
 186
 187                         pins_uart0_b: uart0_b {
 188                                 broadcom,function = "ALT3";
 189                         };
 190
 191                         pins_uart0_c: uart0_c {
 192                                 broadcom,function = "ALT2";
 193                         };
 194
 195                         pins_uart0_fc_a: uart0_fc_a {
 196                                 broadcom,function = "ALT3";
 197                         };
 198
 199                         pins_uart0_fc_b: uart0_fc_b {
 200                                 broadcom,function = "ALT3";
 201                         };
 202
 203                         pins_uart0_fc_c: uart0_fc_c {
 204                                 broadcom,function = "ALT2";
 205                         };
 206
 207                         /* PCM */
 208                         pins_pcm_a: pcm_a {
 209                                 broadcom,function = "ALT0";
 210                         };
 211
 212                         pins_pcm_b: pcm_b {
 213                                 broadcom,function = "ALT2";
 214                         };
 215
 216                         /* Secondary Address Bus */
 217                         pins_sm_addr_a: sm_addr_a {
 218                                 broadcom,function = "ALT1";
 219                         };
 220
 221                         pins_sm_addr_b: sm_addr_b {
 222                                 broadcom,function = "ALT1";
 223                         };
 224
 225                         pins_sm_ctl_a: sm_ctl_a {
 226                                 broadcom,function = "ALT1";
 227                         };
 228
 229                         pins_sm_ctl_b: sm_ctl_b {
 230                                 broadcom,function = "ALT1";
 231                         };
 232
 233                         pins_sm_data_8bit_a: sm_data_8bit_a {
 234                                 broadcom,function = "ALT1";
 235                         };
 236
 237                         pins_sm_data_8bit_b: sm_data_8bit_b {
 238                                 broadcom,function = "ALT1";
 239                         };
 240
 241                         pins_sm_data_16bit: sm_data_16bit {
 242                                 broadcom,function = "ALT1";
 243                         };
 244
 245                         pins_sm_data_18bit: sm_data_18bit {
 246                                 broadcom,function = "ALT1";
 247                         };
 248
 249                         /* BSCSL */
 250                         pins_bscsl: bscsl {
 251                                 broadcom,function = "ALT3";
 252                         };
 253
 254                         /* SPISL */
 255                         pins_spisl: spisl {
 256                                 broadcom,function = "ALT3";
 257                         };
 258
 259                         /* SPI1 */
 260                         pins_spi1: spi1 {
 261                                 broadcom,function = "ALT4";
 262                         };
 263
 264                         /* UART1 */
 265                         pins_uart1_a: uart1_a {
 266                                 broadcom,function = "ALT5";
 267                         };
 268
 269                         pins_uart1_b: uart1_b {
 270                                 broadcom,function = "ALT5";
 271                         };
 272
 273                         pins_uart1_c: uart1_c {
 274                                 broadcom,function = "ALT5";
 275                         };
 276
 277                         pins_uart1_fc_a: uart1_fc_a {
 278                                 broadcom,function = "ALT5";
 279                         };
 280
 281                         pins_uart1_fc_b: uart1_fc_b {
 282                                 broadcom,function = "ALT5";
 283                         };
 284
 285                         pins_uart1_fc_c: uart1_fc_c {
 286                                 broadcom,function = "ALT5";
 287                         };
 288
 289                         /* SPI2 */
 290                         pins_spi2: spi2 {
 291                                 broadcom,function = "ALT4";
 292                         };
 293
 294                         /* ARM JTAG */
 295                         pins_arm_jtag_trst: arm_jtag_trst {
 296                                 broadcom,function = "ALT4";
 297                         };
 298
 299                         pins_arm_jtag_a: arm_jtag_a {
 300                                 broadcom,function = "ALT5";
 301                         };
 302
 303                         pins_arm_jtag_b: arm_jtag_b {
 304                                 broadcom,function = "ALT4";
 305                         };
 306
 307                         /* Reserved */
 308                         pins_reserved: reserved {
 309                                 broadcom,function = "ALT3";
 310                         };
 311                 };
 312                 usb {
 313                         hub {
 314                                 compatible = "usb,hub", "usb,device";
 315                                 reg = <0x00000001>;
 316                                 #address-cells = <1>;
 317                                 #size-cells = <0>;
 318                                 ethernet {
 319                                         compatible = "net,ethernet",
 320                                                      "usb,device";
 321                                         reg = <0x00000001>;
 322                                         mac-address = [00 00 00 00 00 00];
 323                                 };
 324                         };
 325
 326                 };
 327         };
 328
 329         display {
 330                 compatible = "broadcom,bcm2835-fb", "broadcom,bcm2708-fb";
 331
 332                 broadcom,vc-mailbox = <&vc_mbox>;
 333                 broadcom,vc-channel = <1>;
 334
 335                 broadcom,width = <0>;           /* Set by VideoCore */
 336                 broadcom,height = <0>;          /* Set by VideoCore */
 337                 broadcom,depth = <0>;           /* Set by VideoCore */
 338         };
 339
 340         leds {
 341                 compatible = "gpio-leds";
 342
 343                 pwr {
 344                         label = "pwr";
 345                         gpios = <&gpio 35 0>;
 346                 };
 347
 348                 act {
 349                         label = "act";
 350                         gpios = <&gpio 47 0>;
 351                 };
 352         };
 353
 354         power: regulator {
 355                 compatible = "broadcom,bcm2835-power-mgr",
 356                              "broadcom,bcm2708-power-mgr",
 357                              "simple-bus";
 358                 #address-cells = <1>;
 359                 #size-cells = <0>;
 360
 361                 broadcom,vc-mailbox = <&vc_mbox>;
 362                 broadcom,vc-channel = <0>;
 363
 364                 regulator-name = "VideoCore";
 365                 regulator-min-microvolt = <5000000>;
 366                 regulator-max-microvolt = <5000000>;
 367                 regulator-always-on = <1>;
 368
 369                 sd_card_power: regulator@0 {
 370                         compatible = "broadcom,bcm2835-power-dev",
 371                                      "broadcom,bcm2708-power-dev";
 372                         reg = <0>;
 373
 374                         vin-supply = <&power>;
 375                         regulator-name = "SD Card";
 376                         regulator-min-microvolt = <3300000>;
 377                         regulator-max-microvolt = <3300000>;
 378                 };
 379
 380                 /* This is for the controller itself, not the root port */
 381                 usb_hcd_power: regulator@3 {
 382                         compatible = "broadcom,bcm2835-power-dev",
 383                                      "broadcom,bcm2708-power-dev";
 384                         reg = <3>;
 385
 386                         vin-supply = <&power>;
 387                         regulator-name = "USB HCD";
 388                         regulator-min-microvolt = <5000000>;
 389                         regulator-max-microvolt = <5000000>;
 390                 };
 391         };
 392
 393         aliases {
 394                 uart0 = &uart0;
 395         };
 396
 397         chosen {
 398                 bootargs = "";                  /* Set by VideoCore */
 399                 stdin = "uart0";
 400                 stdout = "uart0";
 401         };
 402
 403         __overrides__ {
 404                 cache_line_size  = <&vchiq>, "cache-line-size:0";
 405         };
 406 };