src/data/dts/arch/arm/sun7i-a20.dtsi

   1 /*-
   2  * Copyright (c) 2014 Ganbold Tsagaankhuu <ganbold@freebsd.org>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD$
  27  */
  28
  29 / {
  30         compatible = "allwinner,sun7i-a20";
  31         #address-cells = <1>;
  32         #size-cells = <1>;
  33
  34         interrupt-parent = <&GIC>;
  35
  36         aliases {
  37                 soc = &SOC;
  38         };
  39
  40         SOC: a20 {
  41                 #address-cells = <1>;
  42                 #size-cells = <1>;
  43                 compatible = "simple-bus";
  44                 ranges;
  45                 bus-frequency = <0>;
  46
  47                 GIC: interrupt-controller@01c81000 {
  48                         compatible = "arm,gic";
  49                         reg =   <0x01c81000 0x1000>,    /* Distributor Registers */
  50                                 <0x01c82000 0x0100>;    /* CPU Interface Registers */
  51                         interrupt-controller;
  52                         #interrupt-cells = <1>;
  53                 };
  54
  55                 sramc@01c00000 {
  56                         compatible = "allwinner,sun4i-sramc";
  57                         #address-cells = <1>;
  58                         #size-cells = <1>;
  59                         reg = < 0x01c00000 0x1000 >;
  60                 };
  61
  62                 cpu-cfg@01c25c00 {
  63                         compatible = "allwinner,sun7i-cpu-cfg";
  64                         #address-cells = <1>;
  65                         #size-cells = <1>;
  66                         reg = < 0x01c25c00 0x400 >;
  67                 };
  68
  69                 ccm@01c20000 {
  70                         compatible = "allwinner,sun4i-ccm";
  71                         #address-cells = <1>;
  72                         #size-cells = <1>;
  73                         reg = < 0x01c20000 0x400 >;
  74                 };
  75
  76                 timer@01c20c00 {
  77                         compatible = "allwinner,sun7i-timer";
  78                         reg = <0x01c20c00 0x90>;
  79                         interrupts = < 22 >;
  80                         interrupt-parent = <&GIC>;
  81                         clock-frequency = < 24000000 >;
  82                 };
  83
  84                 watchdog@01c20c90 {
  85                         compatible = "allwinner,sun4i-wdt";
  86                         reg = <0x01c20c90 0x10>;
  87                 };
  88
  89                 GPIO: gpio@01c20800 {
  90                         #gpio-cells = <3>;
  91                         compatible = "allwinner,sun4i-gpio";
  92                         gpio-controller;
  93                         reg =<  0x01c20800 0x400 >;
  94                         interrupts = < 28 >;
  95                         interrupt-parent = <&GIC>;
  96                 };
  97
  98                 usb1: usb@01c14000 {
  99                         compatible = "allwinner,usb-ehci", "usb-ehci";
 100                         reg = <0x01c14000 0x1000>;
 101                         interrupts = < 39 >;
 102                         interrupt-parent = <&GIC>;
 103                 };
 104
 105                 usb2: usb@01c1c000 {
 106                         compatible = "allwinner,usb-ehci", "usb-ehci";
 107                         reg = <0x01c1c000 0x1000>;
 108                         interrupts = < 40 >;
 109                         interrupt-parent = <&GIC>;
 110                 };
 111
 112                 sata@01c18000 {
 113                         compatible = "allwinner,sun4i-a10-ahci";
 114                         reg = <0x01c18000 0x1000>;
 115                         interrupts = <56>;
 116                         interrupt-parent = <&GIC>;
 117                 };
 118
 119                 UART0: serial@01c28000 {
 120                         compatible = "ns16550";
 121                         reg = <0x01c28000 0x400>;
 122                         reg-shift = <2>;
 123                         interrupts = <1>;
 124                         interrupt-parent = <&GIC>;
 125                         current-speed = <115200>;
 126                         clock-frequency = < 24000000 >;
 127                         busy-detect = <1>;
 128                         broken-txfifo = <1>;
 129                 };
 130
 131                 emac@01c0b000 {
 132                         compatible = "allwinner,sun4i-emac";
 133                         reg = <0x01c0b000 0x1000>;
 134                         interrupts = <55>;
 135                         interrupt-parent = <&GIC>;
 136                 };
 137         };
 138 };
 139