src/system/kernel/arch/x86/paging/64bit/paging.h

   1 /*
   2  * Copyright 2012, Alex Smith, alex@alex-smith.me.uk.
   3  * Distributed under the terms of the MIT License.
   4  */
   5 #ifndef KERNEL_ARCH_X86_PAGING_64BIT_PAGING_H
   6 #define KERNEL_ARCH_X86_PAGING_64BIT_PAGING_H
   7
   8
   9 #include <OS.h>
  10
  11
  12 // PML4 entry bits.
  13 #define X86_64_PML4E_PRESENT                    (1LL << 0)
  14 #define X86_64_PML4E_WRITABLE                   (1LL << 1)
  15 #define X86_64_PML4E_USER                               (1LL << 2)
  16 #define X86_64_PML4E_WRITE_THROUGH              (1LL << 3)
  17 #define X86_64_PML4E_CACHING_DISABLED   (1LL << 4)
  18 #define X86_64_PML4E_ACCESSED                   (1LL << 5)
  19 #define X86_64_PML4E_NOT_EXECUTABLE             (1LL << 63)
  20 #define X86_64_PML4E_ADDRESS_MASK               0x000ffffffffff000L
  21
  22 // PDPT entry bits.
  23 #define X86_64_PDPTE_PRESENT                    (1LL << 0)
  24 #define X86_64_PDPTE_WRITABLE                   (1LL << 1)
  25 #define X86_64_PDPTE_USER                               (1LL << 2)
  26 #define X86_64_PDPTE_WRITE_THROUGH              (1LL << 3)
  27 #define X86_64_PDPTE_CACHING_DISABLED   (1LL << 4)
  28 #define X86_64_PDPTE_ACCESSED                   (1LL << 5)
  29 #define X86_64_PDPTE_DIRTY                              (1LL << 6)
  30 #define X86_64_PDPTE_LARGE_PAGE                 (1LL << 7)
  31 #define X86_64_PDPTE_GLOBAL                             (1LL << 8)
  32 #define X86_64_PDPTE_PAT                                (1LL << 12)
  33 #define X86_64_PDPTE_NOT_EXECUTABLE             (1LL << 63)
  34 #define X86_64_PDPTE_ADDRESS_MASK               0x000ffffffffff000L
  35
  36 // Page directory entry bits.
  37 #define X86_64_PDE_PRESENT                              (1LL << 0)
  38 #define X86_64_PDE_WRITABLE                             (1LL << 1)
  39 #define X86_64_PDE_USER                                 (1LL << 2)
  40 #define X86_64_PDE_WRITE_THROUGH                (1LL << 3)
  41 #define X86_64_PDE_CACHING_DISABLED             (1LL << 4)
  42 #define X86_64_PDE_ACCESSED                             (1LL << 5)
  43 #define X86_64_PDE_DIRTY                                (1LL << 6)
  44 #define X86_64_PDE_LARGE_PAGE                   (1LL << 7)
  45 #define X86_64_PDE_GLOBAL                               (1LL << 8)
  46 #define X86_64_PDE_PAT                                  (1LL << 12)
  47 #define X86_64_PDE_NOT_EXECUTABLE               (1LL << 63)
  48 #define X86_64_PDE_ADDRESS_MASK                 0x000ffffffffff000L
  49
  50 // Page table entry bits.
  51 #define X86_64_PTE_PRESENT                              (1LL << 0)
  52 #define X86_64_PTE_WRITABLE                             (1LL << 1)
  53 #define X86_64_PTE_USER                                 (1LL << 2)
  54 #define X86_64_PTE_WRITE_THROUGH                (1LL << 3)
  55 #define X86_64_PTE_CACHING_DISABLED             (1LL << 4)
  56 #define X86_64_PTE_ACCESSED                             (1LL << 5)
  57 #define X86_64_PTE_DIRTY                                (1LL << 6)
  58 #define X86_64_PTE_PAT                                  (1LL << 7)
  59 #define X86_64_PTE_GLOBAL                               (1LL << 8)
  60 #define X86_64_PTE_NOT_EXECUTABLE               (1LL << 63)
  61 #define X86_64_PTE_ADDRESS_MASK                 0x000ffffffffff000L
  62 #define X86_64_PTE_PROTECTION_MASK              (X86_64_PTE_NOT_EXECUTABLE      \
  63                                                                                         | X86_64_PTE_WRITABLE   \
  64                                                                                         | X86_64_PTE_USER)
  65 #define X86_64_PTE_MEMORY_TYPE_MASK             (X86_64_PTE_WRITE_THROUGH \
  66                                                                                         | X86_64_PTE_CACHING_DISABLED)
  67
  68
  69 static const size_t k64BitPageTableRange = 0x200000L;
  70 static const size_t k64BitPageDirectoryRange = 0x40000000L;
  71 static const size_t k64BitPDPTRange = 0x8000000000L;
  72
  73 static const size_t k64BitTableEntryCount = 512;
  74
  75
  76 #define VADDR_TO_PML4E(va)      (((va) & 0x0000fffffffff000L) / k64BitPDPTRange)
  77 #define VADDR_TO_PDPTE(va)      (((va) % k64BitPDPTRange) / k64BitPageDirectoryRange)
  78 #define VADDR_TO_PDE(va)        (((va) % k64BitPageDirectoryRange) / k64BitPageTableRange)
  79 #define VADDR_TO_PTE(va)        (((va) % k64BitPageTableRange) / B_PAGE_SIZE)
  80
  81
  82 #endif  // KERNEL_ARCH_X86_PAGING_64BIT_PAGING_H