2 * Driver for NEC VR4100 series General-purpose I/O Unit.
4 * Copyright (C) 2002 MontaVista Software Inc.
5 * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
6 * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/platform_device.h>
23 #include <linux/errno.h>
25 #include <linux/init.h>
26 #include <linux/irq.h>
27 #include <linux/interrupt.h>
28 #include <linux/kernel.h>
29 #include <linux/module.h>
30 #include <linux/spinlock.h>
31 #include <linux/types.h>
35 #include <asm/vr41xx/giu.h>
36 #include <asm/vr41xx/irq.h>
37 #include <asm/vr41xx/vr41xx.h>
39 MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
40 MODULE_DESCRIPTION("NEC VR4100 series General-purpose I/O Unit driver");
41 MODULE_LICENSE("GPL");
43 static int major
; /* default is dynamic major device number */
44 module_param(major
, int, 0);
45 MODULE_PARM_DESC(major
, "Major device number");
47 #define GIU_TYPE1_START 0x0b000100UL
48 #define GIU_TYPE1_SIZE 0x20UL
50 #define GIU_TYPE2_START 0x0f000140UL
51 #define GIU_TYPE2_SIZE 0x20UL
53 #define GIU_TYPE3_START 0x0f000140UL
54 #define GIU_TYPE3_SIZE 0x28UL
56 #define GIU_PULLUPDOWN_START 0x0b0002e0UL
57 #define GIU_PULLUPDOWN_SIZE 0x04UL
59 #define GIUIOSELL 0x00
60 #define GIUIOSELH 0x02
63 #define GIUINTSTATL 0x08
64 #define GIUINTSTATH 0x0a
65 #define GIUINTENL 0x0c
66 #define GIUINTENH 0x0e
67 #define GIUINTTYPL 0x10
68 #define GIUINTTYPH 0x12
69 #define GIUINTALSELL 0x14
70 #define GIUINTALSELH 0x16
71 #define GIUINTHTSELL 0x18
72 #define GIUINTHTSELH 0x1a
73 #define GIUPODATL 0x1c
74 #define GIUPODATEN 0x1c
75 #define GIUPODATH 0x1e
79 #define GIUFEDGEINHL 0x20
80 #define GIUFEDGEINHH 0x22
81 #define GIUREDGEINHL 0x24
82 #define GIUREDGEINHH 0x26
84 #define GIUUSEUPDN 0x1e0
85 #define GIUTERMUPDN 0x1e2
87 #define GPIO_HAS_PULLUPDOWN_IO 0x0001
88 #define GPIO_HAS_OUTPUT_ENABLE 0x0002
89 #define GPIO_HAS_INTERRUPT_EDGE_SELECT 0x0100
91 static spinlock_t giu_lock
;
92 static struct resource
*giu_resource1
;
93 static struct resource
*giu_resource2
;
94 static unsigned long giu_flags
;
95 static unsigned int giu_nr_pins
;
97 static void __iomem
*giu_base
;
99 #define giu_read(offset) readw(giu_base + (offset))
100 #define giu_write(offset, value) writew((value), giu_base + (offset))
102 #define GPIO_PIN_OF_IRQ(irq) ((irq) - GIU_IRQ_BASE)
103 #define GIUINT_HIGH_OFFSET 16
104 #define GIUINT_HIGH_MAX 32
106 static inline uint16_t giu_set(uint16_t offset
, uint16_t set
)
110 data
= giu_read(offset
);
112 giu_write(offset
, data
);
117 static inline uint16_t giu_clear(uint16_t offset
, uint16_t clear
)
121 data
= giu_read(offset
);
123 giu_write(offset
, data
);
128 static unsigned int startup_giuint_low_irq(unsigned int irq
)
132 pin
= GPIO_PIN_OF_IRQ(irq
);
133 giu_write(GIUINTSTATL
, 1 << pin
);
134 giu_set(GIUINTENL
, 1 << pin
);
139 static void shutdown_giuint_low_irq(unsigned int irq
)
141 giu_clear(GIUINTENL
, 1 << GPIO_PIN_OF_IRQ(irq
));
144 static void enable_giuint_low_irq(unsigned int irq
)
146 giu_set(GIUINTENL
, 1 << GPIO_PIN_OF_IRQ(irq
));
149 #define disable_giuint_low_irq shutdown_giuint_low_irq
151 static void ack_giuint_low_irq(unsigned int irq
)
155 pin
= GPIO_PIN_OF_IRQ(irq
);
156 giu_clear(GIUINTENL
, 1 << pin
);
157 giu_write(GIUINTSTATL
, 1 << pin
);
160 static void end_giuint_low_irq(unsigned int irq
)
162 if (!(irq_desc
[irq
].status
& (IRQ_DISABLED
| IRQ_INPROGRESS
)))
163 giu_set(GIUINTENL
, 1 << GPIO_PIN_OF_IRQ(irq
));
166 static struct hw_interrupt_type giuint_low_irq_type
= {
167 .typename
= "GIUINTL",
168 .startup
= startup_giuint_low_irq
,
169 .shutdown
= shutdown_giuint_low_irq
,
170 .enable
= enable_giuint_low_irq
,
171 .disable
= disable_giuint_low_irq
,
172 .ack
= ack_giuint_low_irq
,
173 .end
= end_giuint_low_irq
,
176 static unsigned int startup_giuint_high_irq(unsigned int irq
)
180 pin
= GPIO_PIN_OF_IRQ(irq
) - GIUINT_HIGH_OFFSET
;
181 giu_write(GIUINTSTATH
, 1 << pin
);
182 giu_set(GIUINTENH
, 1 << pin
);
187 static void shutdown_giuint_high_irq(unsigned int irq
)
189 giu_clear(GIUINTENH
, 1 << (GPIO_PIN_OF_IRQ(irq
) - GIUINT_HIGH_OFFSET
));
192 static void enable_giuint_high_irq(unsigned int irq
)
194 giu_set(GIUINTENH
, 1 << (GPIO_PIN_OF_IRQ(irq
) - GIUINT_HIGH_OFFSET
));
197 #define disable_giuint_high_irq shutdown_giuint_high_irq
199 static void ack_giuint_high_irq(unsigned int irq
)
203 pin
= GPIO_PIN_OF_IRQ(irq
) - GIUINT_HIGH_OFFSET
;
204 giu_clear(GIUINTENH
, 1 << pin
);
205 giu_write(GIUINTSTATH
, 1 << pin
);
208 static void end_giuint_high_irq(unsigned int irq
)
210 if (!(irq_desc
[irq
].status
& (IRQ_DISABLED
| IRQ_INPROGRESS
)))
211 giu_set(GIUINTENH
, 1 << (GPIO_PIN_OF_IRQ(irq
) - GIUINT_HIGH_OFFSET
));
214 static struct hw_interrupt_type giuint_high_irq_type
= {
215 .typename
= "GIUINTH",
216 .startup
= startup_giuint_high_irq
,
217 .shutdown
= shutdown_giuint_high_irq
,
218 .enable
= enable_giuint_high_irq
,
219 .disable
= disable_giuint_high_irq
,
220 .ack
= ack_giuint_high_irq
,
221 .end
= end_giuint_high_irq
,
224 static int giu_get_irq(unsigned int irq
, struct pt_regs
*regs
)
226 uint16_t pendl
, pendh
, maskl
, maskh
;
229 pendl
= giu_read(GIUINTSTATL
);
230 pendh
= giu_read(GIUINTSTATH
);
231 maskl
= giu_read(GIUINTENL
);
232 maskh
= giu_read(GIUINTENH
);
238 for (i
= 0; i
< 16; i
++) {
239 if (maskl
& (1 << i
))
243 for (i
= 0; i
< 16; i
++) {
244 if (maskh
& (1 << i
))
245 return GIU_IRQ(i
+ GIUINT_HIGH_OFFSET
);
249 printk(KERN_ERR
"spurious GIU interrupt: %04x(%04x),%04x(%04x)\n",
250 maskl
, pendl
, maskh
, pendh
);
252 atomic_inc(&irq_err_count
);
257 void vr41xx_set_irq_trigger(unsigned int pin
, irq_trigger_t trigger
, irq_signal_t signal
)
261 if (pin
< GIUINT_HIGH_OFFSET
) {
263 if (trigger
!= IRQ_TRIGGER_LEVEL
) {
264 giu_set(GIUINTTYPL
, mask
);
265 if (signal
== IRQ_SIGNAL_HOLD
)
266 giu_set(GIUINTHTSELL
, mask
);
268 giu_clear(GIUINTHTSELL
, mask
);
269 if (current_cpu_data
.cputype
== CPU_VR4133
) {
271 case IRQ_TRIGGER_EDGE_FALLING
:
272 giu_set(GIUFEDGEINHL
, mask
);
273 giu_clear(GIUREDGEINHL
, mask
);
275 case IRQ_TRIGGER_EDGE_RISING
:
276 giu_clear(GIUFEDGEINHL
, mask
);
277 giu_set(GIUREDGEINHL
, mask
);
280 giu_set(GIUFEDGEINHL
, mask
);
281 giu_set(GIUREDGEINHL
, mask
);
286 giu_clear(GIUINTTYPL
, mask
);
287 giu_clear(GIUINTHTSELL
, mask
);
289 giu_write(GIUINTSTATL
, mask
);
290 } else if (pin
< GIUINT_HIGH_MAX
) {
291 mask
= 1 << (pin
- GIUINT_HIGH_OFFSET
);
292 if (trigger
!= IRQ_TRIGGER_LEVEL
) {
293 giu_set(GIUINTTYPH
, mask
);
294 if (signal
== IRQ_SIGNAL_HOLD
)
295 giu_set(GIUINTHTSELH
, mask
);
297 giu_clear(GIUINTHTSELH
, mask
);
298 if (current_cpu_data
.cputype
== CPU_VR4133
) {
300 case IRQ_TRIGGER_EDGE_FALLING
:
301 giu_set(GIUFEDGEINHH
, mask
);
302 giu_clear(GIUREDGEINHH
, mask
);
304 case IRQ_TRIGGER_EDGE_RISING
:
305 giu_clear(GIUFEDGEINHH
, mask
);
306 giu_set(GIUREDGEINHH
, mask
);
309 giu_set(GIUFEDGEINHH
, mask
);
310 giu_set(GIUREDGEINHH
, mask
);
315 giu_clear(GIUINTTYPH
, mask
);
316 giu_clear(GIUINTHTSELH
, mask
);
318 giu_write(GIUINTSTATH
, mask
);
322 EXPORT_SYMBOL_GPL(vr41xx_set_irq_trigger
);
324 void vr41xx_set_irq_level(unsigned int pin
, irq_level_t level
)
328 if (pin
< GIUINT_HIGH_OFFSET
) {
330 if (level
== IRQ_LEVEL_HIGH
)
331 giu_set(GIUINTALSELL
, mask
);
333 giu_clear(GIUINTALSELL
, mask
);
334 giu_write(GIUINTSTATL
, mask
);
335 } else if (pin
< GIUINT_HIGH_MAX
) {
336 mask
= 1 << (pin
- GIUINT_HIGH_OFFSET
);
337 if (level
== IRQ_LEVEL_HIGH
)
338 giu_set(GIUINTALSELH
, mask
);
340 giu_clear(GIUINTALSELH
, mask
);
341 giu_write(GIUINTSTATH
, mask
);
345 EXPORT_SYMBOL_GPL(vr41xx_set_irq_level
);
347 gpio_data_t
vr41xx_gpio_get_pin(unsigned int pin
)
351 if (pin
>= giu_nr_pins
)
352 return GPIO_DATA_INVAL
;
355 reg
= giu_read(GIUPIODL
);
356 mask
= (uint16_t)1 << pin
;
357 } else if (pin
< 32) {
358 reg
= giu_read(GIUPIODH
);
359 mask
= (uint16_t)1 << (pin
- 16);
360 } else if (pin
< 48) {
361 reg
= giu_read(GIUPODATL
);
362 mask
= (uint16_t)1 << (pin
- 32);
364 reg
= giu_read(GIUPODATH
);
365 mask
= (uint16_t)1 << (pin
- 48);
369 return GPIO_DATA_HIGH
;
371 return GPIO_DATA_LOW
;
374 EXPORT_SYMBOL_GPL(vr41xx_gpio_get_pin
);
376 int vr41xx_gpio_set_pin(unsigned int pin
, gpio_data_t data
)
378 uint16_t offset
, mask
, reg
;
381 if (pin
>= giu_nr_pins
)
386 mask
= (uint16_t)1 << pin
;
387 } else if (pin
< 32) {
389 mask
= (uint16_t)1 << (pin
- 16);
390 } else if (pin
< 48) {
392 mask
= (uint16_t)1 << (pin
- 32);
395 mask
= (uint16_t)1 << (pin
- 48);
398 spin_lock_irqsave(&giu_lock
, flags
);
400 reg
= giu_read(offset
);
401 if (data
== GPIO_DATA_HIGH
)
405 giu_write(offset
, reg
);
407 spin_unlock_irqrestore(&giu_lock
, flags
);
412 EXPORT_SYMBOL_GPL(vr41xx_gpio_set_pin
);
414 int vr41xx_gpio_set_direction(unsigned int pin
, gpio_direction_t dir
)
416 uint16_t offset
, mask
, reg
;
419 if (pin
>= giu_nr_pins
)
424 mask
= (uint16_t)1 << pin
;
425 } else if (pin
< 32) {
427 mask
= (uint16_t)1 << (pin
- 16);
429 if (giu_flags
& GPIO_HAS_OUTPUT_ENABLE
) {
431 mask
= (uint16_t)1 << (pin
- 32);
448 spin_lock_irqsave(&giu_lock
, flags
);
450 reg
= giu_read(offset
);
451 if (dir
== GPIO_OUTPUT
)
455 giu_write(offset
, reg
);
457 spin_unlock_irqrestore(&giu_lock
, flags
);
462 EXPORT_SYMBOL_GPL(vr41xx_gpio_set_direction
);
464 int vr41xx_gpio_pullupdown(unsigned int pin
, gpio_pull_t pull
)
469 if ((giu_flags
& GPIO_HAS_PULLUPDOWN_IO
) != GPIO_HAS_PULLUPDOWN_IO
)
475 mask
= (uint16_t)1 << pin
;
477 spin_lock_irqsave(&giu_lock
, flags
);
479 if (pull
== GPIO_PULL_UP
|| pull
== GPIO_PULL_DOWN
) {
480 reg
= giu_read(GIUTERMUPDN
);
481 if (pull
== GPIO_PULL_UP
)
485 giu_write(GIUTERMUPDN
, reg
);
487 reg
= giu_read(GIUUSEUPDN
);
489 giu_write(GIUUSEUPDN
, reg
);
491 reg
= giu_read(GIUUSEUPDN
);
493 giu_write(GIUUSEUPDN
, reg
);
496 spin_unlock_irqrestore(&giu_lock
, flags
);
501 EXPORT_SYMBOL_GPL(vr41xx_gpio_pullupdown
);
503 static ssize_t
gpio_read(struct file
*file
, char __user
*buf
, size_t len
,
509 pin
= iminor(file
->f_dentry
->d_inode
);
510 if (pin
>= giu_nr_pins
)
513 if (vr41xx_gpio_get_pin(pin
) == GPIO_DATA_HIGH
)
519 if (put_user(value
, buf
))
525 static ssize_t
gpio_write(struct file
*file
, const char __user
*data
,
526 size_t len
, loff_t
*ppos
)
533 pin
= iminor(file
->f_dentry
->d_inode
);
534 if (pin
>= giu_nr_pins
)
537 for (i
= 0; i
< len
; i
++) {
538 if (get_user(c
, data
+ i
))
543 retval
= vr41xx_gpio_set_pin(pin
, GPIO_DATA_LOW
);
546 retval
= vr41xx_gpio_set_pin(pin
, GPIO_DATA_HIGH
);
549 printk(KERN_INFO
"GPIO%d: pull down\n", pin
);
550 retval
= vr41xx_gpio_pullupdown(pin
, GPIO_PULL_DOWN
);
553 printk(KERN_INFO
"GPIO%d: pull up/down disable\n", pin
);
554 retval
= vr41xx_gpio_pullupdown(pin
, GPIO_PULL_DISABLE
);
557 printk(KERN_INFO
"GPIO%d: input\n", pin
);
558 retval
= vr41xx_gpio_set_direction(pin
, GPIO_INPUT
);
561 printk(KERN_INFO
"GPIO%d: output\n", pin
);
562 retval
= vr41xx_gpio_set_direction(pin
, GPIO_OUTPUT
);
565 printk(KERN_INFO
"GPIO%d: output disable\n", pin
);
566 retval
= vr41xx_gpio_set_direction(pin
, GPIO_OUTPUT_DISABLE
);
569 printk(KERN_INFO
"GPIO%d: pull up\n", pin
);
570 retval
= vr41xx_gpio_pullupdown(pin
, GPIO_PULL_UP
);
573 printk(KERN_INFO
"GPIO%d: pull up/down disable\n", pin
);
574 retval
= vr41xx_gpio_pullupdown(pin
, GPIO_PULL_DISABLE
);
587 static int gpio_open(struct inode
*inode
, struct file
*file
)
592 if (pin
>= giu_nr_pins
)
595 return nonseekable_open(inode
, file
);
598 static int gpio_release(struct inode
*inode
, struct file
*file
)
603 if (pin
>= giu_nr_pins
)
609 static const struct file_operations gpio_fops
= {
610 .owner
= THIS_MODULE
,
614 .release
= gpio_release
,
617 static int __devinit
giu_probe(struct platform_device
*dev
)
619 unsigned long start
, size
, flags
= 0;
620 unsigned int nr_pins
= 0;
621 struct resource
*res1
, *res2
= NULL
;
625 switch (current_cpu_data
.cputype
) {
628 start
= GIU_TYPE1_START
;
629 size
= GIU_TYPE1_SIZE
;
630 flags
= GPIO_HAS_PULLUPDOWN_IO
;
635 start
= GIU_TYPE2_START
;
636 size
= GIU_TYPE2_SIZE
;
640 start
= GIU_TYPE3_START
;
641 size
= GIU_TYPE3_SIZE
;
642 flags
= GPIO_HAS_INTERRUPT_EDGE_SELECT
;
649 res1
= request_mem_region(start
, size
, "GIU");
653 base
= ioremap(start
, size
);
655 release_resource(res1
);
659 if (flags
& GPIO_HAS_PULLUPDOWN_IO
) {
660 res2
= request_mem_region(GIU_PULLUPDOWN_START
, GIU_PULLUPDOWN_SIZE
, "GIU");
663 release_resource(res1
);
668 retval
= register_chrdev(major
, "GIU", &gpio_fops
);
671 release_resource(res1
);
672 release_resource(res2
);
678 printk(KERN_INFO
"GIU: major number %d\n", major
);
681 spin_lock_init(&giu_lock
);
683 giu_resource1
= res1
;
684 giu_resource2
= res2
;
686 giu_nr_pins
= nr_pins
;
688 giu_write(GIUINTENL
, 0);
689 giu_write(GIUINTENH
, 0);
691 for (i
= GIU_IRQ_BASE
; i
<= GIU_IRQ_LAST
; i
++) {
692 if (i
< GIU_IRQ(GIUINT_HIGH_OFFSET
))
693 irq_desc
[i
].chip
= &giuint_low_irq_type
;
695 irq_desc
[i
].chip
= &giuint_high_irq_type
;
698 return cascade_irq(GIUINT_IRQ
, giu_get_irq
);
701 static int __devexit
giu_remove(struct platform_device
*dev
)
705 release_resource(giu_resource1
);
706 if (giu_flags
& GPIO_HAS_PULLUPDOWN_IO
)
707 release_resource(giu_resource2
);
712 static struct platform_device
*giu_platform_device
;
714 static struct platform_driver giu_device_driver
= {
716 .remove
= __devexit_p(giu_remove
),
719 .owner
= THIS_MODULE
,
723 static int __init
vr41xx_giu_init(void)
727 giu_platform_device
= platform_device_alloc("GIU", -1);
728 if (!giu_platform_device
)
731 retval
= platform_device_add(giu_platform_device
);
733 platform_device_put(giu_platform_device
);
737 retval
= platform_driver_register(&giu_device_driver
);
739 platform_device_unregister(giu_platform_device
);
744 static void __exit
vr41xx_giu_exit(void)
746 platform_driver_unregister(&giu_device_driver
);
748 platform_device_unregister(giu_platform_device
);
751 module_init(vr41xx_giu_init
);
752 module_exit(vr41xx_giu_exit
);