include/asm-ia64/pci.h

   1 #ifndef _ASM_IA64_PCI_H
   2 #define _ASM_IA64_PCI_H
   3
   4 #include <linux/mm.h>
   5 #include <linux/slab.h>
   6 #include <linux/spinlock.h>
   7 #include <linux/string.h>
   8 #include <linux/types.h>
   9
  10 #include <asm/io.h>
  11 #include <asm/scatterlist.h>
  12
  13 /*
  14  * Can be used to override the logic in pci_scan_bus for skipping already-configured bus
  15  * numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the
  16  * loader.
  17  */
  18 #define pcibios_assign_all_busses()     0
  19 #define pcibios_scan_all_fns(a, b)      0
  20
  21 #define PCIBIOS_MIN_IO          0x1000
  22 #define PCIBIOS_MIN_MEM         0x10000000
  23
  24 void pcibios_config_init(void);
  25
  26 struct pci_dev;
  27
  28 /*
  29  * PCI_DMA_BUS_IS_PHYS should be set to 1 if there is _necessarily_ a direct
  30  * correspondence between device bus addresses and CPU physical addresses.
  31  * Platforms with a hardware I/O MMU _must_ turn this off to suppress the
  32  * bounce buffer handling code in the block and network device layers.
  33  * Platforms with separate bus address spaces _must_ turn this off and provide
  34  * a device DMA mapping implementation that takes care of the necessary
  35  * address translation.
  36  *
  37  * For now, the ia64 platforms which may have separate/multiple bus address
  38  * spaces all have I/O MMUs which support the merging of physically
  39  * discontiguous buffers, so we can use that as the sole factor to determine
  40  * the setting of PCI_DMA_BUS_IS_PHYS.
  41  */
  42 extern unsigned long ia64_max_iommu_merge_mask;
  43 #define PCI_DMA_BUS_IS_PHYS     (ia64_max_iommu_merge_mask == ~0UL)
  44
  45 static inline void
  46 pcibios_set_master (struct pci_dev *dev)
  47 {
  48         /* No special bus mastering setup handling */
  49 }
  50
  51 static inline void
  52 pcibios_penalize_isa_irq (int irq, int active)
  53 {
  54         /* We don't do dynamic PCI IRQ allocation */
  55 }
  56
  57 #include <asm-generic/pci-dma-compat.h>
  58
  59 /* pci_unmap_{single,page} is not a nop, thus... */
  60 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \
  61         dma_addr_t ADDR_NAME;
  62 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \
  63         __u32 LEN_NAME;
  64 #define pci_unmap_addr(PTR, ADDR_NAME)                  \
  65         ((PTR)->ADDR_NAME)
  66 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \
  67         (((PTR)->ADDR_NAME) = (VAL))
  68 #define pci_unmap_len(PTR, LEN_NAME)                    \
  69         ((PTR)->LEN_NAME)
  70 #define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \
  71         (((PTR)->LEN_NAME) = (VAL))
  72
  73 /* The ia64 platform always supports 64-bit addressing. */
  74 #define pci_dac_dma_supported(pci_dev, mask)            (1)
  75 #define pci_dac_page_to_dma(dev,pg,off,dir)             ((dma_addr_t) page_to_bus(pg) + (off))
  76 #define pci_dac_dma_to_page(dev,dma_addr)               (virt_to_page(bus_to_virt(dma_addr)))
  77 #define pci_dac_dma_to_offset(dev,dma_addr)             offset_in_page(dma_addr)
  78 #define pci_dac_dma_sync_single_for_cpu(dev,dma_addr,len,dir)   do { } while (0)
  79 #define pci_dac_dma_sync_single_for_device(dev,dma_addr,len,dir)        do { mb(); } while (0)
  80
  81 #define sg_dma_len(sg)          ((sg)->dma_length)
  82 #define sg_dma_address(sg)      ((sg)->dma_address)
  83
  84 #ifdef CONFIG_PCI
  85 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
  86                                         enum pci_dma_burst_strategy *strat,
  87                                         unsigned long *strategy_parameter)
  88 {
  89         unsigned long cacheline_size;
  90         u8 byte;
  91
  92         pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
  93         if (byte == 0)
  94                 cacheline_size = 1024;
  95         else
  96                 cacheline_size = (int) byte * 4;
  97
  98         *strat = PCI_DMA_BURST_MULTIPLE;
  99         *strategy_parameter = cacheline_size;
 100 }
 101 #endif
 102
 103 #define HAVE_PCI_MMAP
 104 extern int pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma,
 105                                 enum pci_mmap_state mmap_state, int write_combine);
 106 #define HAVE_PCI_LEGACY
 107 extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
 108                                       struct vm_area_struct *vma);
 109 extern ssize_t pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off,
 110                                   size_t count);
 111 extern ssize_t pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off,
 112                                    size_t count);
 113 extern int pci_mmap_legacy_mem(struct kobject *kobj,
 114                                struct bin_attribute *attr,
 115                                struct vm_area_struct *vma);
 116
 117 #define pci_get_legacy_mem platform_pci_get_legacy_mem
 118 #define pci_legacy_read platform_pci_legacy_read
 119 #define pci_legacy_write platform_pci_legacy_write
 120
 121 struct pci_window {
 122         struct resource resource;
 123         u64 offset;
 124 };
 125
 126 struct pci_controller {
 127         void *acpi_handle;
 128         void *iommu;
 129         int segment;
 130         int node;               /* nearest node with memory or -1 for global allocation */
 131
 132         unsigned int windows;
 133         struct pci_window *window;
 134
 135         void *platform_data;
 136 };
 137
 138 #define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata)
 139 #define pci_domain_nr(busdev)    (PCI_CONTROLLER(busdev)->segment)
 140
 141 extern struct pci_ops pci_root_ops;
 142
 143 static inline int pci_proc_domain(struct pci_bus *bus)
 144 {
 145         return (pci_domain_nr(bus) != 0);
 146 }
 147
 148 static inline void pcibios_add_platform_entries(struct pci_dev *dev)
 149 {
 150 }
 151
 152 extern void pcibios_resource_to_bus(struct pci_dev *dev,
 153                 struct pci_bus_region *region, struct resource *res);
 154
 155 extern void pcibios_bus_to_resource(struct pci_dev *dev,
 156                 struct resource *res, struct pci_bus_region *region);
 157
 158 static inline struct resource *
 159 pcibios_select_root(struct pci_dev *pdev, struct resource *res)
 160 {
 161         struct resource *root = NULL;
 162
 163         if (res->flags & IORESOURCE_IO)
 164                 root = &ioport_resource;
 165         if (res->flags & IORESOURCE_MEM)
 166                 root = &iomem_resource;
 167
 168         return root;
 169 }
 170
 171 #define pcibios_scan_all_fns(a, b)      0
 172
 173 #endif /* _ASM_IA64_PCI_H */