arch/arm/mach-pxa/pm.c

   1 /*
   2  * PXA250/210 Power Management Routines
   3  *
   4  * Original code for the SA11x0:
   5  * Copyright (c) 2001 Cliff Brake <cbrake@accelent.com>
   6  *
   7  * Modified for the PXA250 by Nicolas Pitre:
   8  * Copyright (c) 2002 Monta Vista Software, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License.
  12  */
  13 #include <linux/init.h>
  14 #include <linux/module.h>
  15 #include <linux/suspend.h>
  16 #include <linux/errno.h>
  17 #include <linux/time.h>
  18
  19 #include <asm/hardware.h>
  20 #include <asm/memory.h>
  21 #include <asm/system.h>
  22 #include <asm/arch/pm.h>
  23 #include <asm/arch/pxa-regs.h>
  24 #include <asm/arch/pxa-pm_ll.h>
  25 #include <asm/arch/lubbock.h>
  26 #include <asm/mach/time.h>
  27
  28
  29 /*
  30  * Debug macros
  31  */
  32 #undef DEBUG
  33
  34 #define SAVE(x)         sleep_save[SLEEP_SAVE_##x] = x
  35 #define RESTORE(x)      x = sleep_save[SLEEP_SAVE_##x]
  36
  37 #define RESTORE_GPLEVEL(n) do { \
  38         GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \
  39         GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \
  40 } while (0)
  41
  42 /*
  43  * List of global PXA peripheral registers to preserve.
  44  * More ones like CP and general purpose register values are preserved
  45  * with the stack pointer in sleep.S.
  46  */
  47 enum {  SLEEP_SAVE_START = 0,
  48
  49         SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2, SLEEP_SAVE_GPLR3,
  50         SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2, SLEEP_SAVE_GPDR3,
  51         SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2, SLEEP_SAVE_GRER3,
  52         SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2, SLEEP_SAVE_GFER3,
  53         SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
  54
  55         SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
  56         SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
  57         SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
  58         SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U,
  59
  60         SLEEP_SAVE_PSTR,
  61
  62         SLEEP_SAVE_ICMR,
  63         SLEEP_SAVE_CKEN,
  64
  65 #ifdef CONFIG_PXA27x
  66         SLEEP_SAVE_MDREFR,
  67         SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER,
  68         SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
  69 #endif
  70
  71         SLEEP_SAVE_CKSUM,
  72
  73         SLEEP_SAVE_SIZE
  74 };
  75
  76
  77 static struct pxa_ll_pm_ops *ll_ops;
  78
  79 int pxa_pm_enter(suspend_state_t state)
  80 {
  81         unsigned long sleep_save[SLEEP_SAVE_SIZE];
  82         unsigned long checksum = 0;
  83         struct timespec delta, rtc;
  84         int i;
  85         extern void pxa_cpu_pm_enter(suspend_state_t state);
  86         extern void pxa_cpu_resume(void);
  87
  88 #ifdef CONFIG_IWMMXT
  89         /* force any iWMMXt context to ram **/
  90         iwmmxt_task_disable(NULL);
  91 #endif
  92
  93         /* preserve current time */
  94         rtc.tv_sec = RCNR;
  95         rtc.tv_nsec = 0;
  96         save_time_delta(&delta, &rtc);
  97
  98         SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2);
  99         SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2);
 100         SAVE(GRER0); SAVE(GRER1); SAVE(GRER2);
 101         SAVE(GFER0); SAVE(GFER1); SAVE(GFER2);
 102         SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2);
 103
 104         SAVE(GAFR0_L); SAVE(GAFR0_U);
 105         SAVE(GAFR1_L); SAVE(GAFR1_U);
 106         SAVE(GAFR2_L); SAVE(GAFR2_U);
 107
 108 #ifdef CONFIG_PXA27x
 109         SAVE(MDREFR);
 110         SAVE(GPLR3); SAVE(GPDR3); SAVE(GRER3); SAVE(GFER3); SAVE(PGSR3);
 111         SAVE(GAFR3_L); SAVE(GAFR3_U);
 112         SAVE(PWER); SAVE(PCFR); SAVE(PRER);
 113         SAVE(PFER); SAVE(PKWR);
 114 #endif
 115
 116         SAVE(ICMR);
 117         ICMR = 0;
 118
 119         SAVE(CKEN);
 120         SAVE(PSTR);
 121
 122         /* Note: wake up source are set up in each machine specific files */
 123
 124         /* clear GPIO transition detect  bits */
 125         GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
 126 #ifdef CONFIG_PXA27x
 127         GEDR3 = GEDR3;
 128 #endif
 129
 130         /* Clear sleep reset status */
 131         RCSR = RCSR_SMR;
 132
 133         /* Set resume return address */
 134         PSPR = virt_to_phys(pxa_cpu_resume);
 135
 136         /* If we have special sus/res logic, use it */
 137         if(ll_ops && ll_ops->suspend) {
 138                 extern void pxa_cpu_resume(void);
 139                 ll_ops->suspend(virt_to_phys(pxa_cpu_resume));
 140         }
 141
 142         /* before sleeping, calculate and save a checksum */
 143         for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
 144                 checksum += sleep_save[i];
 145         sleep_save[SLEEP_SAVE_CKSUM] = checksum;
 146
 147         /* *** go zzz *** */
 148         pxa_cpu_pm_enter(state);
 149
 150         cpu_init();
 151
 152         /* after sleeping, validate the checksum */
 153         checksum = 0;
 154         for (i = 0; i < SLEEP_SAVE_SIZE - 1; i++)
 155                 checksum += sleep_save[i];
 156
 157         if(ll_ops && ll_ops->resume)
 158                 ll_ops->resume();
 159
 160         /* if invalid, display message and wait for a hardware reset */
 161         if (checksum != sleep_save[SLEEP_SAVE_CKSUM]) {
 162 #ifdef CONFIG_ARCH_LUBBOCK
 163                 LUB_HEXLED = 0xbadbadc5;
 164 #endif
 165                 while (1)
 166                         pxa_cpu_pm_enter(state);
 167         }
 168
 169         /* ensure not to come back here if it wasn't intended */
 170         PSPR = 0;
 171
 172         /* restore registers */
 173         RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1); RESTORE_GPLEVEL(2);
 174         RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2);
 175         RESTORE(GAFR0_L); RESTORE(GAFR0_U);
 176         RESTORE(GAFR1_L); RESTORE(GAFR1_U);
 177         RESTORE(GAFR2_L); RESTORE(GAFR2_U);
 178         RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2);
 179         RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2);
 180         RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
 181
 182 #ifdef CONFIG_PXA27x
 183         RESTORE(MDREFR);
 184         RESTORE_GPLEVEL(3); RESTORE(GPDR3);
 185         RESTORE(GAFR3_L); RESTORE(GAFR3_U);
 186         RESTORE(GRER3); RESTORE(GFER3); RESTORE(PGSR3);
 187         RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER);
 188         RESTORE(PFER); RESTORE(PKWR);
 189 #endif
 190
 191         PSSR = PSSR_RDH | PSSR_PH;
 192
 193         RESTORE(CKEN);
 194
 195         ICLR = 0;
 196         ICCR = 1;
 197         RESTORE(ICMR);
 198
 199         RESTORE(PSTR);
 200
 201         /* restore current time */
 202         rtc.tv_sec = RCNR;
 203         restore_time_delta(&delta, &rtc);
 204
 205 #ifdef DEBUG
 206         printk(KERN_DEBUG "*** made it back from resume\n");
 207 #endif
 208
 209         return 0;
 210 }
 211
 212 EXPORT_SYMBOL_GPL(pxa_pm_enter);
 213
 214 struct pxa_ll_pm_ops *pxa_pm_set_ll_ops(struct pxa_ll_pm_ops *new_ops) {
 215         struct pxa_ll_pm_ops *old_ops = ll_ops;
 216         ll_ops = new_ops;
 217         return old_ops;
 218 }
 219 EXPORT_SYMBOL(pxa_pm_set_ll_ops);
 220
 221 unsigned long sleep_phys_sp(void *sp)
 222 {
 223         return virt_to_phys(sp);
 224 }
 225
 226 /*
 227  * Called after processes are frozen, but before we shut down devices.
 228  */
 229 int pxa_pm_prepare(suspend_state_t state)
 230 {
 231         extern int pxa_cpu_pm_prepare(suspend_state_t state);
 232
 233         return pxa_cpu_pm_prepare(state);
 234 }
 235
 236 EXPORT_SYMBOL_GPL(pxa_pm_prepare);
 237
 238 /*
 239  * Called after devices are re-setup, but before processes are thawed.
 240  */
 241 int pxa_pm_finish(suspend_state_t state)
 242 {
 243         return 0;
 244 }
 245
 246 EXPORT_SYMBOL_GPL(pxa_pm_finish);
 247
 248 /*
 249  * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk.
 250  */
 251 struct pm_ops pxa_pm_ops = {
 252         .pm_disk_mode   = PM_DISK_FIRMWARE,
 253         .prepare        = pxa_pm_prepare,
 254         .enter          = pxa_pm_enter,
 255         .finish         = pxa_pm_finish,
 256 };
 257 EXPORT_SYMBOL(pxa_pm_ops);
 258
 259 static int __init pxa_pm_init(void)
 260 {
 261         pm_set_ops(&pxa_pm_ops);
 262         return 0;
 263 }
 264
 265 device_initcall(pxa_pm_init);