arch/arm/mach-at91rm9200/at91rm9200.c

   1 /*
   2  * arch/arm/mach-at91rm9200/at91rm9200.c
   3  *
   4  *  Copyright (C) 2005 SAN People
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12
  13 #include <linux/module.h>
  14
  15 #include <asm/mach/arch.h>
  16 #include <asm/mach/map.h>
  17
  18 #include <asm/hardware.h>
  19 #include "generic.h"
  20 #include "clock.h"
  21
  22 static struct map_desc at91rm9200_io_desc[] __initdata = {
  23         {
  24                 .virtual        = AT91_VA_BASE_SYS,
  25                 .pfn            = __phys_to_pfn(AT91_BASE_SYS),
  26                 .length         = SZ_4K,
  27                 .type           = MT_DEVICE,
  28         }, {
  29                 .virtual        = AT91_VA_BASE_SPI,
  30                 .pfn            = __phys_to_pfn(AT91RM9200_BASE_SPI),
  31                 .length         = SZ_16K,
  32                 .type           = MT_DEVICE,
  33         }, {
  34                 .virtual        = AT91_VA_BASE_EMAC,
  35                 .pfn            = __phys_to_pfn(AT91RM9200_BASE_EMAC),
  36                 .length         = SZ_16K,
  37                 .type           = MT_DEVICE,
  38         }, {
  39                 .virtual        = AT91_VA_BASE_TWI,
  40                 .pfn            = __phys_to_pfn(AT91RM9200_BASE_TWI),
  41                 .length         = SZ_16K,
  42                 .type           = MT_DEVICE,
  43         }, {
  44                 .virtual        = AT91_VA_BASE_MCI,
  45                 .pfn            = __phys_to_pfn(AT91RM9200_BASE_MCI),
  46                 .length         = SZ_16K,
  47                 .type           = MT_DEVICE,
  48         }, {
  49                 .virtual        = AT91_VA_BASE_UDP,
  50                 .pfn            = __phys_to_pfn(AT91RM9200_BASE_UDP),
  51                 .length         = SZ_16K,
  52                 .type           = MT_DEVICE,
  53         }, {
  54                 .virtual        = AT91_SRAM_VIRT_BASE,
  55                 .pfn            = __phys_to_pfn(AT91RM9200_SRAM_BASE),
  56                 .length         = AT91RM9200_SRAM_SIZE,
  57                 .type           = MT_DEVICE,
  58         },
  59 };
  60
  61 /* --------------------------------------------------------------------
  62  *  Clocks
  63  * -------------------------------------------------------------------- */
  64
  65 /*
  66  * The peripheral clocks.
  67  */
  68 static struct clk udc_clk = {
  69         .name           = "udc_clk",
  70         .pmc_mask       = 1 << AT91RM9200_ID_UDP,
  71         .type           = CLK_TYPE_PERIPHERAL,
  72 };
  73 static struct clk ohci_clk = {
  74         .name           = "ohci_clk",
  75         .pmc_mask       = 1 << AT91RM9200_ID_UHP,
  76         .type           = CLK_TYPE_PERIPHERAL,
  77 };
  78 static struct clk ether_clk = {
  79         .name           = "ether_clk",
  80         .pmc_mask       = 1 << AT91RM9200_ID_EMAC,
  81         .type           = CLK_TYPE_PERIPHERAL,
  82 };
  83 static struct clk mmc_clk = {
  84         .name           = "mci_clk",
  85         .pmc_mask       = 1 << AT91RM9200_ID_MCI,
  86         .type           = CLK_TYPE_PERIPHERAL,
  87 };
  88 static struct clk twi_clk = {
  89         .name           = "twi_clk",
  90         .pmc_mask       = 1 << AT91RM9200_ID_TWI,
  91         .type           = CLK_TYPE_PERIPHERAL,
  92 };
  93 static struct clk usart0_clk = {
  94         .name           = "usart0_clk",
  95         .pmc_mask       = 1 << AT91RM9200_ID_US0,
  96         .type           = CLK_TYPE_PERIPHERAL,
  97 };
  98 static struct clk usart1_clk = {
  99         .name           = "usart1_clk",
 100         .pmc_mask       = 1 << AT91RM9200_ID_US1,
 101         .type           = CLK_TYPE_PERIPHERAL,
 102 };
 103 static struct clk usart2_clk = {
 104         .name           = "usart2_clk",
 105         .pmc_mask       = 1 << AT91RM9200_ID_US2,
 106         .type           = CLK_TYPE_PERIPHERAL,
 107 };
 108 static struct clk usart3_clk = {
 109         .name           = "usart3_clk",
 110         .pmc_mask       = 1 << AT91RM9200_ID_US3,
 111         .type           = CLK_TYPE_PERIPHERAL,
 112 };
 113 static struct clk spi_clk = {
 114         .name           = "spi_clk",
 115         .pmc_mask       = 1 << AT91RM9200_ID_SPI,
 116         .type           = CLK_TYPE_PERIPHERAL,
 117 };
 118 static struct clk pioA_clk = {
 119         .name           = "pioA_clk",
 120         .pmc_mask       = 1 << AT91RM9200_ID_PIOA,
 121         .type           = CLK_TYPE_PERIPHERAL,
 122 };
 123 static struct clk pioB_clk = {
 124         .name           = "pioB_clk",
 125         .pmc_mask       = 1 << AT91RM9200_ID_PIOB,
 126         .type           = CLK_TYPE_PERIPHERAL,
 127 };
 128 static struct clk pioC_clk = {
 129         .name           = "pioC_clk",
 130         .pmc_mask       = 1 << AT91RM9200_ID_PIOC,
 131         .type           = CLK_TYPE_PERIPHERAL,
 132 };
 133 static struct clk pioD_clk = {
 134         .name           = "pioD_clk",
 135         .pmc_mask       = 1 << AT91RM9200_ID_PIOD,
 136         .type           = CLK_TYPE_PERIPHERAL,
 137 };
 138
 139 static struct clk *periph_clocks[] __initdata = {
 140         &pioA_clk,
 141         &pioB_clk,
 142         &pioC_clk,
 143         &pioD_clk,
 144         &usart0_clk,
 145         &usart1_clk,
 146         &usart2_clk,
 147         &usart3_clk,
 148         &mmc_clk,
 149         &udc_clk,
 150         &twi_clk,
 151         &spi_clk,
 152         // ssc 0 .. ssc2
 153         // tc0 .. tc5
 154         &ohci_clk,
 155         &ether_clk,
 156         // irq0 .. irq6
 157 };
 158
 159 /*
 160  * The four programmable clocks.
 161  * You must configure pin multiplexing to bring these signals out.
 162  */
 163 static struct clk pck0 = {
 164         .name           = "pck0",
 165         .pmc_mask       = AT91_PMC_PCK0,
 166         .type           = CLK_TYPE_PROGRAMMABLE,
 167         .id             = 0,
 168 };
 169 static struct clk pck1 = {
 170         .name           = "pck1",
 171         .pmc_mask       = AT91_PMC_PCK1,
 172         .type           = CLK_TYPE_PROGRAMMABLE,
 173         .id             = 1,
 174 };
 175 static struct clk pck2 = {
 176         .name           = "pck2",
 177         .pmc_mask       = AT91_PMC_PCK2,
 178         .type           = CLK_TYPE_PROGRAMMABLE,
 179         .id             = 2,
 180 };
 181 static struct clk pck3 = {
 182         .name           = "pck3",
 183         .pmc_mask       = AT91_PMC_PCK3,
 184         .type           = CLK_TYPE_PROGRAMMABLE,
 185         .id             = 3,
 186 };
 187
 188 static void __init at91rm9200_register_clocks(void)
 189 {
 190         int i;
 191
 192         for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
 193                 clk_register(periph_clocks[i]);
 194
 195         clk_register(&pck0);
 196         clk_register(&pck1);
 197         clk_register(&pck2);
 198         clk_register(&pck3);
 199 }
 200
 201 /* --------------------------------------------------------------------
 202  *  GPIO
 203  * -------------------------------------------------------------------- */
 204
 205 static struct at91_gpio_bank at91rm9200_gpio[] = {
 206         {
 207                 .id             = AT91RM9200_ID_PIOA,
 208                 .offset         = AT91_PIOA,
 209                 .clock          = &pioA_clk,
 210         }, {
 211                 .id             = AT91RM9200_ID_PIOB,
 212                 .offset         = AT91_PIOB,
 213                 .clock          = &pioB_clk,
 214         }, {
 215                 .id             = AT91RM9200_ID_PIOC,
 216                 .offset         = AT91_PIOC,
 217                 .clock          = &pioC_clk,
 218         }, {
 219                 .id             = AT91RM9200_ID_PIOD,
 220                 .offset         = AT91_PIOD,
 221                 .clock          = &pioD_clk,
 222         }
 223 };
 224
 225 /* --------------------------------------------------------------------
 226  *  AT91RM9200 processor initialization
 227  * -------------------------------------------------------------------- */
 228 void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks)
 229 {
 230         /* Map peripherals */
 231         iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc));
 232
 233         /* Init clock subsystem */
 234         at91_clock_init(main_clock);
 235
 236         /* Register the processor-specific clocks */
 237         at91rm9200_register_clocks();
 238
 239         /* Initialize GPIO subsystem */
 240         at91_gpio_init(at91rm9200_gpio, banks);
 241 }
 242
 243
 244 /* --------------------------------------------------------------------
 245  *  Interrupt initialization
 246  * -------------------------------------------------------------------- */
 247
 248 /*
 249  * The default interrupt priority levels (0 = lowest, 7 = highest).
 250  */
 251 static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
 252         7,      /* Advanced Interrupt Controller (FIQ) */
 253         7,      /* System Peripherals */
 254         0,      /* Parallel IO Controller A */
 255         0,      /* Parallel IO Controller B */
 256         0,      /* Parallel IO Controller C */
 257         0,      /* Parallel IO Controller D */
 258         6,      /* USART 0 */
 259         6,      /* USART 1 */
 260         6,      /* USART 2 */
 261         6,      /* USART 3 */
 262         0,      /* Multimedia Card Interface */
 263         4,      /* USB Device Port */
 264         0,      /* Two-Wire Interface */
 265         6,      /* Serial Peripheral Interface */
 266         5,      /* Serial Synchronous Controller 0 */
 267         5,      /* Serial Synchronous Controller 1 */
 268         5,      /* Serial Synchronous Controller 2 */
 269         0,      /* Timer Counter 0 */
 270         0,      /* Timer Counter 1 */
 271         0,      /* Timer Counter 2 */
 272         0,      /* Timer Counter 3 */
 273         0,      /* Timer Counter 4 */
 274         0,      /* Timer Counter 5 */
 275         3,      /* USB Host port */
 276         3,      /* Ethernet MAC */
 277         0,      /* Advanced Interrupt Controller (IRQ0) */
 278         0,      /* Advanced Interrupt Controller (IRQ1) */
 279         0,      /* Advanced Interrupt Controller (IRQ2) */
 280         0,      /* Advanced Interrupt Controller (IRQ3) */
 281         0,      /* Advanced Interrupt Controller (IRQ4) */
 282         0,      /* Advanced Interrupt Controller (IRQ5) */
 283         0       /* Advanced Interrupt Controller (IRQ6) */
 284 };
 285
 286 void __init at91rm9200_init_interrupts(unsigned int priority[NR_AIC_IRQS])
 287 {
 288         if (!priority)
 289                 priority = at91rm9200_default_irq_priority;
 290
 291         /* Initialize the AIC interrupt controller */
 292         at91_aic_init(priority);
 293
 294         /* Enable GPIO interrupts */
 295         at91_gpio_irq_setup();
 296 }