arch/arm/mach-omap1/time.c

   1 /*
   2  * linux/arch/arm/mach-omap1/time.c
   3  *
   4  * OMAP Timers
   5  *
   6  * Copyright (C) 2004 Nokia Corporation
   7  * Partial timer rewrite and additional dynamic tick timer support by
   8  * Tony Lindgen <tony@atomide.com> and
   9  * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
  10  *
  11  * MPU timer code based on the older MPU timer code for OMAP
  12  * Copyright (C) 2000 RidgeRun, Inc.
  13  * Author: Greg Lonnon <glonnon@ridgerun.com>
  14  *
  15  * This program is free software; you can redistribute it and/or modify it
  16  * under the terms of the GNU General Public License as published by the
  17  * Free Software Foundation; either version 2 of the License, or (at your
  18  * option) any later version.
  19  *
  20  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  21  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  22  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  23  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  26  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  27  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30  *
  31  * You should have received a copy of the  GNU General Public License along
  32  * with this program; if not, write  to the Free Software Foundation, Inc.,
  33  * 675 Mass Ave, Cambridge, MA 02139, USA.
  34  */
  35
  36 #include <linux/kernel.h>
  37 #include <linux/init.h>
  38 #include <linux/delay.h>
  39 #include <linux/interrupt.h>
  40 #include <linux/sched.h>
  41 #include <linux/spinlock.h>
  42
  43 #include <asm/system.h>
  44 #include <asm/hardware.h>
  45 #include <asm/io.h>
  46 #include <asm/leds.h>
  47 #include <asm/irq.h>
  48 #include <asm/mach/irq.h>
  49 #include <asm/mach/time.h>
  50
  51 struct sys_timer omap_timer;
  52
  53 /*
  54  * ---------------------------------------------------------------------------
  55  * MPU timer
  56  * ---------------------------------------------------------------------------
  57  */
  58 #define OMAP_MPU_TIMER_BASE             OMAP_MPU_TIMER1_BASE
  59 #define OMAP_MPU_TIMER_OFFSET           0x100
  60
  61 /* cycles to nsec conversions taken from arch/i386/kernel/timers/timer_tsc.c,
  62  * converted to use kHz by Kevin Hilman */
  63 /* convert from cycles(64bits) => nanoseconds (64bits)
  64  *  basic equation:
  65  *              ns = cycles / (freq / ns_per_sec)
  66  *              ns = cycles * (ns_per_sec / freq)
  67  *              ns = cycles * (10^9 / (cpu_khz * 10^3))
  68  *              ns = cycles * (10^6 / cpu_khz)
  69  *
  70  *      Then we use scaling math (suggested by george at mvista.com) to get:
  71  *              ns = cycles * (10^6 * SC / cpu_khz / SC
  72  *              ns = cycles * cyc2ns_scale / SC
  73  *
  74  *      And since SC is a constant power of two, we can convert the div
  75  *  into a shift.
  76  *                      -johnstul at us.ibm.com "math is hard, lets go shopping!"
  77  */
  78 static unsigned long cyc2ns_scale;
  79 #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
  80
  81 static inline void set_cyc2ns_scale(unsigned long cpu_khz)
  82 {
  83         cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
  84 }
  85
  86 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
  87 {
  88         return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR;
  89 }
  90
  91 /*
  92  * MPU_TICKS_PER_SEC must be an even number, otherwise machinecycles_to_usecs
  93  * will break. On P2, the timer count rate is 6.5 MHz after programming PTV
  94  * with 0. This divides the 13MHz input by 2, and is undocumented.
  95  */
  96 #if defined(CONFIG_MACH_OMAP_PERSEUS2) || defined(CONFIG_MACH_OMAP_FSAMPLE)
  97 /* REVISIT: This ifdef construct should be replaced by a query to clock
  98  * framework to see if timer base frequency is 12.0, 13.0 or 19.2 MHz.
  99  */
 100 #define MPU_TICKS_PER_SEC               (13000000 / 2)
 101 #else
 102 #define MPU_TICKS_PER_SEC               (12000000 / 2)
 103 #endif
 104
 105 #define MPU_TIMER_TICK_PERIOD           ((MPU_TICKS_PER_SEC / HZ) - 1)
 106
 107 typedef struct {
 108         u32 cntl;                       /* CNTL_TIMER, R/W */
 109         u32 load_tim;                   /* LOAD_TIM,   W */
 110         u32 read_tim;                   /* READ_TIM,   R */
 111 } omap_mpu_timer_regs_t;
 112
 113 #define omap_mpu_timer_base(n)                                          \
 114 ((volatile omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE +      \
 115                                  (n)*OMAP_MPU_TIMER_OFFSET))
 116
 117 static inline unsigned long omap_mpu_timer_read(int nr)
 118 {
 119         volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
 120         return timer->read_tim;
 121 }
 122
 123 static inline void omap_mpu_timer_start(int nr, unsigned long load_val)
 124 {
 125         volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
 126
 127         timer->cntl = MPU_TIMER_CLOCK_ENABLE;
 128         udelay(1);
 129         timer->load_tim = load_val;
 130         udelay(1);
 131         timer->cntl = (MPU_TIMER_CLOCK_ENABLE | MPU_TIMER_AR | MPU_TIMER_ST);
 132 }
 133
 134 unsigned long omap_mpu_timer_ticks_to_usecs(unsigned long nr_ticks)
 135 {
 136         unsigned long long nsec;
 137
 138         nsec = cycles_2_ns((unsigned long long)nr_ticks);
 139         return (unsigned long)nsec / 1000;
 140 }
 141
 142 /*
 143  * Last processed system timer interrupt
 144  */
 145 static unsigned long omap_mpu_timer_last = 0;
 146
 147 /*
 148  * Returns elapsed usecs since last system timer interrupt
 149  */
 150 static unsigned long omap_mpu_timer_gettimeoffset(void)
 151 {
 152         unsigned long now = 0 - omap_mpu_timer_read(0);
 153         unsigned long elapsed = now - omap_mpu_timer_last;
 154
 155         return omap_mpu_timer_ticks_to_usecs(elapsed);
 156 }
 157
 158 /*
 159  * Elapsed time between interrupts is calculated using timer0.
 160  * Latency during the interrupt is calculated using timer1.
 161  * Both timer0 and timer1 are counting at 6MHz (P2 6.5MHz).
 162  */
 163 static irqreturn_t omap_mpu_timer_interrupt(int irq, void *dev_id)
 164 {
 165         unsigned long now, latency;
 166
 167         write_seqlock(&xtime_lock);
 168         now = 0 - omap_mpu_timer_read(0);
 169         latency = MPU_TICKS_PER_SEC / HZ - omap_mpu_timer_read(1);
 170         omap_mpu_timer_last = now - latency;
 171         timer_tick();
 172         write_sequnlock(&xtime_lock);
 173
 174         return IRQ_HANDLED;
 175 }
 176
 177 static struct irqaction omap_mpu_timer_irq = {
 178         .name           = "mpu timer",
 179         .flags          = IRQF_DISABLED | IRQF_TIMER,
 180         .handler        = omap_mpu_timer_interrupt,
 181 };
 182
 183 static unsigned long omap_mpu_timer1_overflows;
 184 static irqreturn_t omap_mpu_timer1_interrupt(int irq, void *dev_id)
 185 {
 186         omap_mpu_timer1_overflows++;
 187         return IRQ_HANDLED;
 188 }
 189
 190 static struct irqaction omap_mpu_timer1_irq = {
 191         .name           = "mpu timer1 overflow",
 192         .flags          = IRQF_DISABLED,
 193         .handler        = omap_mpu_timer1_interrupt,
 194 };
 195
 196 static __init void omap_init_mpu_timer(void)
 197 {
 198         set_cyc2ns_scale(MPU_TICKS_PER_SEC / 1000);
 199         omap_timer.offset = omap_mpu_timer_gettimeoffset;
 200         setup_irq(INT_TIMER1, &omap_mpu_timer1_irq);
 201         setup_irq(INT_TIMER2, &omap_mpu_timer_irq);
 202         omap_mpu_timer_start(0, 0xffffffff);
 203         omap_mpu_timer_start(1, MPU_TIMER_TICK_PERIOD);
 204 }
 205
 206 /*
 207  * Scheduler clock - returns current time in nanosec units.
 208  */
 209 unsigned long long sched_clock(void)
 210 {
 211         unsigned long ticks = 0 - omap_mpu_timer_read(0);
 212         unsigned long long ticks64;
 213
 214         ticks64 = omap_mpu_timer1_overflows;
 215         ticks64 <<= 32;
 216         ticks64 |= ticks;
 217
 218         return cycles_2_ns(ticks64);
 219 }
 220
 221 /*
 222  * ---------------------------------------------------------------------------
 223  * Timer initialization
 224  * ---------------------------------------------------------------------------
 225  */
 226 static void __init omap_timer_init(void)
 227 {
 228         omap_init_mpu_timer();
 229 }
 230
 231 struct sys_timer omap_timer = {
 232         .init           = omap_timer_init,
 233         .offset         = NULL,         /* Initialized later */
 234 };