arch/arm/mach-pxa/himalaya/tsc2200.h

   1 /*
   2  * see http://focus.ti.com/docs/prod/folders/print/tsc2200.html
   3  * it's a texas instruments TSC 2200 A-D converter with interrupts
   4  * and keypad interrupts and everything.
   5  */
   6
   7 #define TSC2200_REG_READ (1<<15) // read register
   8 #define TSC2200_PAGEMASK (0xf<<11) // page of device's memory to be addressed
   9                                   // see table II
  10 #define TSC2200_PAGE(x) ((x<<11) & TSC2200_PAGEMASK)
  11
  12 #define TSC2200_REG_ADDRMASK (0x1f<<5) // memory address mask
  13 #define TSC2200_REG_ADDR(x) ((x<<5) & TSC2200_REG_ADDRMASK)
  14
  15 #define TSC2200_DATAREG_PAGEADDR (0) // datareg page address
  16 #define TSC2200_CTRLREG_PAGEADDR (1) // control reg page address
  17
  18 #define TSC2200_DATAREG(x) (TSC2200_PAGE(TSC2200_DATAREG_PAGEADDR) | TSC2200_REG_ADDR(x))
  19
  20 // these are data registers, in page 0, so they are addressed
  21 // using e.g. TSC2200_REG_ADDR(TSC2200_DATAREG_PAGEADDR)
  22
  23 #define TSC2200_DATAREG_X TSC2200_DATAREG(0)
  24 #define TSC2200_DATAREG_Y TSC2200_DATAREG(1)
  25 #define TSC2200_DATAREG_Z1 TSC2200_DATAREG(2)
  26 #define TSC2200_DATAREG_Z2 TSC2200_DATAREG(3)
  27 #define TSC2200_DATAREG_KPDATA TSC2200_DATAREG(4)
  28 #define TSC2200_DATAREG_BAT1 TSC2200_DATAREG(5)
  29 #define TSC2200_DATAREG_BAT2 TSC2200_DATAREG(6)
  30 #define TSC2200_DATAREG_AUX1 TSC2200_DATAREG(7)
  31 #define TSC2200_DATAREG_AUX2 TSC2200_DATAREG(8)
  32 #define TSC2200_DATAREG_TEMP1 TSC2200_DATAREG(9)
  33 #define TSC2200_DATAREG_TEMP2 TSC2200_DATAREG(0xa)
  34 #define TSC2200_DATAREG_DAC TSC2200_DATAREG(0xb)
  35 #define TSC2200_DATAREG_ZERO TSC2200_DATAREG(0x10)
  36
  37 // these are control registers, in page 1, address using
  38 // using e.g. TSC2200_REG_ADDR(TSC2200_CTRLREG_PAGEADDR)
  39
  40 #define TSC2200_CTRLREG(x) (TSC2200_PAGE(TSC2200_CTRLREG_PAGEADDR) | TSC2200_REG_ADDR(x))
  41
  42 #define TSC2200_CTRLREG_ADC TSC2200_CTRLREG(0)
  43 #define TSC2200_CTRLREG_KEY TSC2200_CTRLREG(1)
  44 #define TSC2200_CTRLREG_DAACTL TSC2200_CTRLREG(2)
  45 #define TSC2200_CTRLREG_REF TSC2200_CTRLREG(3)
  46 #define TSC2200_CTRLREG_RESET TSC2200_CTRLREG(4)
  47 #define TSC2200_CTRLREG_CONFIG TSC2200_CTRLREG(5)
  48 #define TSC2200_CTRLREG_KPMASK TSC2200_CTRLREG(0x10)
  49
  50 // these are relevant for when you access page1's adc register
  51 #define TSC2200_CTRLREG_ADC_PSM_TSC2200 (1<<15) // pen status mode on ctrlreg adc
  52 #define TSC2200_CTRLREG_ADC_STS (1<<14) // stop continuous scanning.
  53 #define TSC2200_CTRLREG_ADC_AD3 (1<<13) //
  54 #define TSC2200_CTRLREG_ADC_AD2 (1<<12) //
  55 #define TSC2200_CTRLREG_ADC_AD1 (1<<11) //
  56 #define TSC2200_CTRLREG_ADC_AD0 (1<<10) //
  57 #define TSC2200_CTRLREG_ADC_RES(x) ((x<<8) & TSC2200_CTRLREG_ADC_RES_MASK )
  58 #define TSC2200_CTRLREG_ADC_RES_MASK (0x3<<8)
  59 #define TSC2200_CTRLREG_ADC_RES_12BITP (0) // 12-bit ADC resolution (default)
  60 #define TSC2200_CTRLREG_ADC_RES_8BIT (1) // 8-bit ADC resolution
  61 #define TSC2200_CTRLREG_ADC_RES_10BIT (2) // 10-bit ADC resolution
  62 #define TSC2200_CTRLREG_ADC_RES_12BIT (3) // 12-bit ADC resolution
  63
  64 #define TSC2200_CTRLREG_ADC_AVG(x) ((x<<6) & TSC2200_CTRLREG_ADC_AVG_MASK )
  65 #define TSC2200_CTRLREG_ADC_AVG_MASK (0x3<<6)
  66 #define TSC2200_CTRLREG_ADC_NOAVG (0) //  a-d does no averaging
  67 #define TSC2200_CTRLREG_ADC_4AVG (1) //  a-d does averaging of 4 samples
  68 #define TSC2200_CTRLREG_ADC_8AVG (2) //  a-d does averaging of 8 samples
  69 #define TSC2200_CTRLREG_ADC_16AVG (3) //  a-d does averaging of 16 samples
  70
  71 #define TSC2200_CTRLREG_ADC_CL(x) ((x<<4) & TSC2200_CTRLREG_ADC_CL_MASK )
  72 #define TSC2200_CTRLREG_ADC_CL_MASK (0x3<<4)
  73 #define TSC2200_CTRLREG_ADC_CL_8MHZ_8BIT (0)
  74 #define TSC2200_CTRLREG_ADC_CL_4MHZ_10BIT (1)
  75 #define TSC2200_CTRLREG_ADC_CL_2MHZ_12BIT (2)
  76 #define TSC2200_CTRLREG_ADC_CL_1MHZ_12BIT (3)
  77 #define TSC2200_CTRLREG_ADC_CL0 (1<< 4) //
  78
  79 #define TSC2200_CTRLREG_ADC_PV(x) ((x<<1) & TSC2200_CTRLREG_ADC_PV_MASK )
  80 #define TSC2200_CTRLREG_ADC_PV_MASK (0x7<<1)
  81 #define TSC2200_CTRLREG_ADC_PV_100mS (0x7) // 100ms panel voltage stabilisation
  82 // ....
  83 #define TSC2200_CTRLREG_ADC_PV_5mS (0x4) // 5ms panel voltage stabilisation
  84 #define TSC2200_CTRLREG_ADC_PV_1mS (0x3) // 1ms panel voltage stabilisation
  85 #define TSC2200_CTRLREG_ADC_PV_500uS (0x2) // 500us panel voltage stabilisation
  86 #define TSC2200_CTRLREG_ADC_PV_100uS (0x1) // 100us panel voltage stabilisation
  87 #define TSC2200_CTRLREG_ADC_PV_0S (0x0) // zero seconds stabilisation
  88
  89 #define TSC2200_CTRLREG_ADC_x (1<< 0) // don't care
  90
  91 #define TSC2200_CTRLREG_CONFIG_DAV (1<<6)
  92
  93 #define TSC2200_CTRLREG_KEY_STC (1<<15) // keypad status
  94 #define TSC2200_CTRLREG_KEY_SCS (1<<14) // keypad scan status
  95
  96 // #include "nssp_tsc2200.h"
  97
  98 /*
  99  * public interface.
 100  *
 101  * the tsc2200 driver is timer-interrupt-driven and pen-irq driven.
 102  *
 103  * it only needs to know how to read and write to the NSSP, via
 104  * the send_cmd and recv_cmd functions in the nssp_tsc2200_struct.
 105  *
 106  */
 107
 108 #if 0
 109 int tsc2200_open(struct nssp_tsc2200_struct *tsc);
 110 void tsc2200_close(struct nssp_tsc2200_struct *tsc);
 111 int tsc2200_setup(struct nssp_tsc2200_struct *tsc);
 112 int tsc2200_stop(struct nssp_tsc2200_struct *tsc);
 113 #endif
 114
 115 extern struct device_driver tsc2200_device_driver;
 116 extern struct semaphore tsc2200_sem;
 117 void tsc2200_reset(void);
 118 int  tsc2200_dev  (void);