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1 /*
2 * linux/arch/arm/mach-sa1100/assabet.c
4 * Author: Nicolas Pitre
6 * This file contains all Assabet-specific tweaks.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/errno.h>
16 #include <linux/ioport.h>
17 #include <linux/serial_core.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/partitions.h>
20 #include <linux/delay.h>
21 #include <linux/mm.h>
23 #include <asm/hardware.h>
24 #include <asm/mach-types.h>
25 #include <asm/irq.h>
26 #include <asm/setup.h>
27 #include <asm/page.h>
28 #include <asm/pgtable-hwdef.h>
29 #include <asm/pgtable.h>
30 #include <asm/tlbflush.h>
32 #include <asm/mach/arch.h>
33 #include <asm/mach/flash.h>
34 #include <asm/mach/irda.h>
35 #include <asm/mach/map.h>
36 #include <asm/mach/serial_sa1100.h>
37 #include <asm/arch/assabet.h>
38 #include <asm/arch/mcp.h>
40 #include "generic.h"
42 #define ASSABET_BCR_DB1110 \
43 (ASSABET_BCR_SPK_OFF | ASSABET_BCR_QMUTE | \
44 ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
45 ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
46 ASSABET_BCR_IRDA_MD0)
48 #define ASSABET_BCR_DB1111 \
49 (ASSABET_BCR_SPK_OFF | ASSABET_BCR_QMUTE | \
50 ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
51 ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
52 ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
53 ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST)
55 unsigned long SCR_value = ASSABET_SCR_INIT;
56 EXPORT_SYMBOL(SCR_value);
58 static unsigned long BCR_value = ASSABET_BCR_DB1110;
60 void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
62 unsigned long flags;
64 local_irq_save(flags);
65 BCR_value = (BCR_value & ~mask) | val;
66 ASSABET_BCR = BCR_value;
67 local_irq_restore(flags);
70 EXPORT_SYMBOL(ASSABET_BCR_frob);
72 static void assabet_backlight_power(int on)
74 #if 0
75 #ifndef ASSABET_PAL_VIDEO
76 if (on)
77 ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
78 else
79 #endif
80 ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
81 #endif
85 * Turn on/off the backlight. When turning the backlight on,
86 * we wait 500us after turning it on so we don't cause the
87 * supplies to droop when we enable the LCD controller (and
88 * cause a hard reset.)
90 static void assabet_lcd_power(int on)
92 #ifndef ASSABET_PAL_VIDEO
93 if (on) {
94 ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
95 udelay(500);
96 } else
97 #endif
98 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
103 * Assabet flash support code.
106 #ifdef ASSABET_REV_4
108 * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
110 static struct mtd_partition assabet_partitions[] = {
112 .name = "bootloader",
113 .size = 0x00020000,
114 .offset = 0,
115 .mask_flags = MTD_WRITEABLE,
116 }, {
117 .name = "bootloader params",
118 .size = 0x00020000,
119 .offset = MTDPART_OFS_APPEND,
120 .mask_flags = MTD_WRITEABLE,
121 }, {
122 .name = "jffs",
123 .size = MTDPART_SIZ_FULL,
124 .offset = MTDPART_OFS_APPEND,
127 #else
129 * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
131 static struct mtd_partition assabet_partitions[] = {
133 .name = "bootloader",
134 .size = 0x00040000,
135 .offset = 0,
136 .mask_flags = MTD_WRITEABLE,
137 }, {
138 .name = "bootloader params",
139 .size = 0x00040000,
140 .offset = MTDPART_OFS_APPEND,
141 .mask_flags = MTD_WRITEABLE,
142 }, {
143 .name = "jffs",
144 .size = MTDPART_SIZ_FULL,
145 .offset = MTDPART_OFS_APPEND,
148 #endif
150 static struct flash_platform_data assabet_flash_data = {
151 .map_name = "cfi_probe",
152 .parts = assabet_partitions,
153 .nr_parts = ARRAY_SIZE(assabet_partitions),
156 static struct resource assabet_flash_resources[] = {
158 .start = SA1100_CS0_PHYS,
159 .end = SA1100_CS0_PHYS + SZ_32M - 1,
160 .flags = IORESOURCE_MEM,
161 }, {
162 .start = SA1100_CS1_PHYS,
163 .end = SA1100_CS1_PHYS + SZ_32M - 1,
164 .flags = IORESOURCE_MEM,
170 * Assabet IrDA support code.
173 static int assabet_irda_set_power(struct device *dev, unsigned int state)
175 static unsigned int bcr_state[4] = {
176 ASSABET_BCR_IRDA_MD0,
177 ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
178 ASSABET_BCR_IRDA_MD1,
182 if (state < 4) {
183 state = bcr_state[state];
184 ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1|
185 ASSABET_BCR_IRDA_MD0));
186 ASSABET_BCR_set(state);
188 return 0;
191 static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
193 if (speed < 4000000)
194 ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
195 else
196 ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
199 static struct irda_platform_data assabet_irda_data = {
200 .set_power = assabet_irda_set_power,
201 .set_speed = assabet_irda_set_speed,
204 static struct mcp_plat_data assabet_mcp_data = {
205 .mccr0 = MCCR0_ADM,
206 .sclk_rate = 11981000,
209 static void __init assabet_init(void)
212 * Ensure that the power supply is in "high power" mode.
214 GPDR |= GPIO_GPIO16;
215 GPSR = GPIO_GPIO16;
218 * Ensure that these pins are set as outputs and are driving
219 * logic 0. This ensures that we won't inadvertently toggle
220 * the WS latch in the CPLD, and we don't float causing
221 * excessive power drain. --rmk
223 GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
224 GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
227 * Set up registers for sleep mode.
229 PWER = PWER_GPIO0;
230 PGSR = 0;
231 PCFR = 0;
232 PSDR = 0;
233 PPDR |= PPC_TXD3 | PPC_TXD1;
234 PPSR |= PPC_TXD3 | PPC_TXD1;
236 set_irq_type(IRQ_GPIO0, IRQT_FALLING);
237 enable_irq_wake(IRQ_GPIO0);
239 sa1100fb_lcd_power = assabet_lcd_power;
240 sa1100fb_backlight_power = assabet_backlight_power;
242 if (machine_has_neponset()) {
244 * Angel sets this, but other bootloaders may not.
246 * This must precede any driver calls to BCR_set()
247 * or BCR_clear().
249 ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
251 #ifndef CONFIG_ASSABET_NEPONSET
252 printk( "Warning: Neponset detected but full support "
253 "hasn't been configured in the kernel\n" );
254 #endif
257 sa11x0_set_flash_data(&assabet_flash_data, assabet_flash_resources,
258 ARRAY_SIZE(assabet_flash_resources));
259 sa11x0_set_irda_data(&assabet_irda_data);
260 sa11x0_set_mcp_data(&assabet_mcp_data);
264 * On Assabet, we must probe for the Neponset board _before_
265 * paging_init() has occurred to actually determine the amount
266 * of RAM available. To do so, we map the appropriate IO section
267 * in the page table here in order to access GPIO registers.
269 static void __init map_sa1100_gpio_regs( void )
271 unsigned long phys = __PREG(GPLR) & PMD_MASK;
272 unsigned long virt = io_p2v(phys);
273 int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
274 pmd_t *pmd;
276 pmd = pmd_offset(pgd_offset_k(virt), virt);
277 *pmd = __pmd(phys | prot);
278 flush_pmd_entry(pmd);
282 * Read System Configuration "Register"
283 * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
284 * User's Guide", section 4.4.1)
286 * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
287 * to set up the serial port for decompression status messages. We
288 * repeat it here because the kernel may not be loaded as a zImage, and
289 * also because it's a hassle to communicate the SCR value to the kernel
290 * from the decompressor.
292 * Note that IRQs are guaranteed to be disabled.
294 static void __init get_assabet_scr(void)
296 unsigned long scr, i;
298 GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
299 GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
300 GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
301 for(i = 100; i--; ) /* Read GPIO 9:2 */
302 scr = GPLR;
303 GPDR |= 0x3fc; /* restore correct pin direction */
304 scr &= 0x3fc; /* save as system configuration byte. */
305 SCR_value = scr;
308 static void __init
309 fixup_assabet(struct machine_desc *desc, struct tag *tags,
310 char **cmdline, struct meminfo *mi)
312 /* This must be done before any call to machine_has_neponset() */
313 map_sa1100_gpio_regs();
314 get_assabet_scr();
316 if (machine_has_neponset()) {
317 printk("Neponset expansion board detected\n");
318 } else {
319 strcpy(*cmdline, "console=ttySA0,38400n8 cpufreq=221200 "
320 "rw root=/dev/mtdblock3 load_ramdisk=1 prompt_ramdisk=0 "
321 "noinitrd mem=32M");
326 static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
328 if (port->mapbase == _Ser1UTCR0) {
329 if (state)
330 ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
331 ASSABET_BCR_COM_RTS |
332 ASSABET_BCR_COM_DTR);
333 else
334 ASSABET_BCR_set(ASSABET_BCR_RS232EN |
335 ASSABET_BCR_COM_RTS |
336 ASSABET_BCR_COM_DTR);
341 * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
342 * and UART3 (radio module). We only handle them for UART1 here.
344 static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
346 if (port->mapbase == _Ser1UTCR0) {
347 u_int set = 0, clear = 0;
349 if (mctrl & TIOCM_RTS)
350 clear |= ASSABET_BCR_COM_RTS;
351 else
352 set |= ASSABET_BCR_COM_RTS;
354 if (mctrl & TIOCM_DTR)
355 clear |= ASSABET_BCR_COM_DTR;
356 else
357 set |= ASSABET_BCR_COM_DTR;
359 ASSABET_BCR_clear(clear);
360 ASSABET_BCR_set(set);
364 static u_int assabet_get_mctrl(struct uart_port *port)
366 u_int ret = 0;
367 u_int bsr = ASSABET_BSR;
369 /* need 2 reads to read current value */
370 bsr = ASSABET_BSR;
372 if (port->mapbase == _Ser1UTCR0) {
373 if (bsr & ASSABET_BSR_COM_DCD)
374 ret |= TIOCM_CD;
375 if (bsr & ASSABET_BSR_COM_CTS)
376 ret |= TIOCM_CTS;
377 if (bsr & ASSABET_BSR_COM_DSR)
378 ret |= TIOCM_DSR;
379 } else if (port->mapbase == _Ser3UTCR0) {
380 if (bsr & ASSABET_BSR_RAD_DCD)
381 ret |= TIOCM_CD;
382 if (bsr & ASSABET_BSR_RAD_CTS)
383 ret |= TIOCM_CTS;
384 if (bsr & ASSABET_BSR_RAD_DSR)
385 ret |= TIOCM_DSR;
386 if (bsr & ASSABET_BSR_RAD_RI)
387 ret |= TIOCM_RI;
388 } else {
389 ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
392 return ret;
395 static struct sa1100_port_fns assabet_port_fns __initdata = {
396 .set_mctrl = assabet_set_mctrl,
397 .get_mctrl = assabet_get_mctrl,
398 .pm = assabet_uart_pm,
401 static struct map_desc assabet_io_desc[] __initdata = {
402 { /* Board Control Register */
403 .virtual = 0xf1000000,
404 .pfn = __phys_to_pfn(0x12000000),
405 .length = 0x00100000,
406 .type = MT_DEVICE
407 }, { /* MQ200 */
408 .virtual = 0xf2800000,
409 .pfn = __phys_to_pfn(0x4b800000),
410 .length = 0x00800000,
411 .type = MT_DEVICE
415 static void __init assabet_map_io(void)
417 sa1100_map_io();
418 iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
421 * Set SUS bit in SDCR0 so serial port 1 functions.
422 * Its called GPCLKR0 in my SA1110 manual.
424 Ser1SDCR0 |= SDCR0_SUS;
426 if (machine_has_neponset()) {
427 #ifdef CONFIG_ASSABET_NEPONSET
428 extern void neponset_map_io(void);
431 * We map Neponset registers even if it isn't present since
432 * many drivers will try to probe their stuff (and fail).
433 * This is still more friendly than a kernel paging request
434 * crash.
436 neponset_map_io();
437 #endif
438 } else {
439 sa1100_register_uart_fns(&assabet_port_fns);
443 * When Neponset is attached, the first UART should be
444 * UART3. That's what Angel is doing and many documents
445 * are stating this.
447 * We do the Neponset mapping even if Neponset support
448 * isn't compiled in so the user will still get something on
449 * the expected physical serial port.
451 * We no longer do this; not all boot loaders support it,
452 * and UART3 appears to be somewhat unreliable with blob.
454 sa1100_register_uart(0, 1);
455 sa1100_register_uart(2, 3);
459 MACHINE_START(ASSABET, "Intel-Assabet")
460 .phys_io = 0x80000000,
461 .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
462 .boot_params = 0xc0000100,
463 .fixup = fixup_assabet,
464 .map_io = assabet_map_io,
465 .init_irq = sa1100_init_irq,
466 .timer = &sa1100_timer,
467 .init_machine = assabet_init,
468 MACHINE_END