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[hh.org.git] / arch / arm / mach-sa1100 / clock.c
blobb1e8fd766c1ac6f2e3a26a7017e3d21317e74891
1 /*
2 * linux/arch/arm/mach-sa1100/clock.c
3 */
4 #include <linux/module.h>
5 #include <linux/kernel.h>
6 #include <linux/list.h>
7 #include <linux/errno.h>
8 #include <linux/err.h>
9 #include <linux/string.h>
10 #include <linux/clk.h>
11 #include <linux/spinlock.h>
13 #include <asm/hardware.h>
14 #include <asm/semaphore.h>
16 struct clk {
17 struct list_head node;
18 unsigned long rate;
19 struct module *owner;
20 const char *name;
21 unsigned int enabled;
22 void (*enable)(void);
23 void (*disable)(void);
26 static LIST_HEAD(clocks);
27 static DECLARE_MUTEX(clocks_sem);
28 static DEFINE_SPINLOCK(clocks_lock);
30 struct clk *clk_get(struct device *dev, const char *id)
32 struct clk *p, *clk = ERR_PTR(-ENOENT);
34 down(&clocks_sem);
35 list_for_each_entry(p, &clocks, node) {
36 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
37 clk = p;
38 break;
41 up(&clocks_sem);
43 return clk;
45 EXPORT_SYMBOL(clk_get);
47 void clk_put(struct clk *clk)
49 module_put(clk->owner);
51 EXPORT_SYMBOL(clk_put);
53 int clk_enable(struct clk *clk)
55 unsigned long flags;
57 spin_lock_irqsave(&clocks_lock, flags);
58 if (clk->enabled++ == 0)
59 clk->enable();
60 spin_unlock_irqrestore(&clocks_lock, flags);
61 return 0;
63 EXPORT_SYMBOL(clk_enable);
65 void clk_disable(struct clk *clk)
67 unsigned long flags;
69 WARN_ON(clk->enabled == 0);
71 spin_lock_irqsave(&clocks_lock, flags);
72 if (--clk->enabled == 0)
73 clk->disable();
74 spin_unlock_irqrestore(&clocks_lock, flags);
76 EXPORT_SYMBOL(clk_disable);
78 unsigned long clk_get_rate(struct clk *clk)
80 return clk->rate;
82 EXPORT_SYMBOL(clk_get_rate);
85 static void clk_gpio27_enable(void)
88 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
89 * (SA-1110 Developer's Manual, section 9.1.2.1)
91 GAFR |= GPIO_32_768kHz;
92 GPDR |= GPIO_32_768kHz;
93 TUCR = TUCR_3_6864MHz;
96 static void clk_gpio27_disable(void)
98 TUCR = 0;
99 GPDR &= ~GPIO_32_768kHz;
100 GAFR &= ~GPIO_32_768kHz;
103 static struct clk clk_gpio27 = {
104 .name = "GPIO27_CLK",
105 .rate = 3686400,
106 .enable = clk_gpio27_enable,
107 .disable = clk_gpio27_disable,
110 int clk_register(struct clk *clk)
112 down(&clocks_sem);
113 list_add(&clk->node, &clocks);
114 up(&clocks_sem);
115 return 0;
117 EXPORT_SYMBOL(clk_register);
119 void clk_unregister(struct clk *clk)
121 down(&clocks_sem);
122 list_del(&clk->node);
123 up(&clocks_sem);
125 EXPORT_SYMBOL(clk_unregister);
127 static int __init clk_init(void)
129 clk_register(&clk_gpio27);
130 return 0;
132 arch_initcall(clk_init);