sync hh.org
[hh.org.git] / arch / cris / arch-v32 / drivers / i2c.c
blob95f00188c6283fdaede4a43e518656da3c668b07
1 /*!***************************************************************************
2 *!
3 *! FILE NAME : i2c.c
4 *!
5 *! DESCRIPTION: implements an interface for IIC/I2C, both directly from other
6 *! kernel modules (i2c_writereg/readreg) and from userspace using
7 *! ioctl()'s
8 *!
9 *! Nov 30 1998 Torbjorn Eliasson Initial version.
10 *! Bjorn Wesen Elinux kernel version.
11 *! Jan 14 2000 Johan Adolfsson Fixed PB shadow register stuff -
12 *! don't use PB_I2C if DS1302 uses same bits,
13 *! use PB.
14 *| June 23 2003 Pieter Grimmerink Added 'i2c_sendnack'. i2c_readreg now
15 *| generates nack on last received byte,
16 *| instead of ack.
17 *| i2c_getack changed data level while clock
18 *| was high, causing DS75 to see a stop condition
20 *! ---------------------------------------------------------------------------
22 *! (C) Copyright 1999-2002 Axis Communications AB, LUND, SWEDEN
24 *!***************************************************************************/
25 /* $Id: i2c.c,v 1.2 2005/05/09 15:29:49 starvik Exp $ */
26 /****************** INCLUDE FILES SECTION ***********************************/
28 #include <linux/module.h>
29 #include <linux/sched.h>
30 #include <linux/slab.h>
31 #include <linux/errno.h>
32 #include <linux/kernel.h>
33 #include <linux/fs.h>
34 #include <linux/string.h>
35 #include <linux/init.h>
37 #include <asm/etraxi2c.h>
39 #include <asm/system.h>
40 #include <asm/io.h>
41 #include <asm/delay.h>
43 #include "i2c.h"
45 /****************** I2C DEFINITION SECTION *************************/
47 #define D(x)
49 #define I2C_MAJOR 123 /* LOCAL/EXPERIMENTAL */
50 static const char i2c_name[] = "i2c";
52 #define CLOCK_LOW_TIME 8
53 #define CLOCK_HIGH_TIME 8
54 #define START_CONDITION_HOLD_TIME 8
55 #define STOP_CONDITION_HOLD_TIME 8
56 #define ENABLE_OUTPUT 0x01
57 #define ENABLE_INPUT 0x00
58 #define I2C_CLOCK_HIGH 1
59 #define I2C_CLOCK_LOW 0
60 #define I2C_DATA_HIGH 1
61 #define I2C_DATA_LOW 0
63 #define i2c_enable()
64 #define i2c_disable()
66 /* enable or disable output-enable, to select output or input on the i2c bus */
68 #define i2c_dir_out() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_out)
69 #define i2c_dir_in() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_in)
71 /* control the i2c clock and data signals */
73 #define i2c_clk(x) crisv32_io_set(&cris_i2c_clk, x)
74 #define i2c_data(x) crisv32_io_set(&cris_i2c_data, x)
76 /* read a bit from the i2c interface */
78 #define i2c_getbit() crisv32_io_rd(&cris_i2c_data)
80 #define i2c_delay(usecs) udelay(usecs)
82 /****************** VARIABLE SECTION ************************************/
84 static struct crisv32_iopin cris_i2c_clk;
85 static struct crisv32_iopin cris_i2c_data;
87 /****************** FUNCTION DEFINITION SECTION *************************/
90 /* generate i2c start condition */
92 void
93 i2c_start(void)
96 * SCL=1 SDA=1
98 i2c_dir_out();
99 i2c_delay(CLOCK_HIGH_TIME/6);
100 i2c_data(I2C_DATA_HIGH);
101 i2c_clk(I2C_CLOCK_HIGH);
102 i2c_delay(CLOCK_HIGH_TIME);
104 * SCL=1 SDA=0
106 i2c_data(I2C_DATA_LOW);
107 i2c_delay(START_CONDITION_HOLD_TIME);
109 * SCL=0 SDA=0
111 i2c_clk(I2C_CLOCK_LOW);
112 i2c_delay(CLOCK_LOW_TIME);
115 /* generate i2c stop condition */
117 void
118 i2c_stop(void)
120 i2c_dir_out();
123 * SCL=0 SDA=0
125 i2c_clk(I2C_CLOCK_LOW);
126 i2c_data(I2C_DATA_LOW);
127 i2c_delay(CLOCK_LOW_TIME*2);
129 * SCL=1 SDA=0
131 i2c_clk(I2C_CLOCK_HIGH);
132 i2c_delay(CLOCK_HIGH_TIME*2);
134 * SCL=1 SDA=1
136 i2c_data(I2C_DATA_HIGH);
137 i2c_delay(STOP_CONDITION_HOLD_TIME);
139 i2c_dir_in();
142 /* write a byte to the i2c interface */
144 void
145 i2c_outbyte(unsigned char x)
147 int i;
149 i2c_dir_out();
151 for (i = 0; i < 8; i++) {
152 if (x & 0x80) {
153 i2c_data(I2C_DATA_HIGH);
154 } else {
155 i2c_data(I2C_DATA_LOW);
158 i2c_delay(CLOCK_LOW_TIME/2);
159 i2c_clk(I2C_CLOCK_HIGH);
160 i2c_delay(CLOCK_HIGH_TIME);
161 i2c_clk(I2C_CLOCK_LOW);
162 i2c_delay(CLOCK_LOW_TIME/2);
163 x <<= 1;
165 i2c_data(I2C_DATA_LOW);
166 i2c_delay(CLOCK_LOW_TIME/2);
169 * enable input
171 i2c_dir_in();
174 /* read a byte from the i2c interface */
176 unsigned char
177 i2c_inbyte(void)
179 unsigned char aBitByte = 0;
180 int i;
182 /* Switch off I2C to get bit */
183 i2c_disable();
184 i2c_dir_in();
185 i2c_delay(CLOCK_HIGH_TIME/2);
187 /* Get bit */
188 aBitByte |= i2c_getbit();
190 /* Enable I2C */
191 i2c_enable();
192 i2c_delay(CLOCK_LOW_TIME/2);
194 for (i = 1; i < 8; i++) {
195 aBitByte <<= 1;
196 /* Clock pulse */
197 i2c_clk(I2C_CLOCK_HIGH);
198 i2c_delay(CLOCK_HIGH_TIME);
199 i2c_clk(I2C_CLOCK_LOW);
200 i2c_delay(CLOCK_LOW_TIME);
202 /* Switch off I2C to get bit */
203 i2c_disable();
204 i2c_dir_in();
205 i2c_delay(CLOCK_HIGH_TIME/2);
207 /* Get bit */
208 aBitByte |= i2c_getbit();
210 /* Enable I2C */
211 i2c_enable();
212 i2c_delay(CLOCK_LOW_TIME/2);
214 i2c_clk(I2C_CLOCK_HIGH);
215 i2c_delay(CLOCK_HIGH_TIME);
218 * we leave the clock low, getbyte is usually followed
219 * by sendack/nack, they assume the clock to be low
221 i2c_clk(I2C_CLOCK_LOW);
222 return aBitByte;
225 /*#---------------------------------------------------------------------------
227 *# FUNCTION NAME: i2c_getack
229 *# DESCRIPTION : checks if ack was received from ic2
231 *#--------------------------------------------------------------------------*/
234 i2c_getack(void)
236 int ack = 1;
238 * enable output
240 i2c_dir_out();
242 * Release data bus by setting
243 * data high
245 i2c_data(I2C_DATA_HIGH);
247 * enable input
249 i2c_dir_in();
250 i2c_delay(CLOCK_HIGH_TIME/4);
252 * generate ACK clock pulse
254 i2c_clk(I2C_CLOCK_HIGH);
256 * Use PORT PB instead of I2C
257 * for input. (I2C not working)
259 i2c_clk(1);
260 i2c_data(1);
262 * switch off I2C
264 i2c_data(1);
265 i2c_disable();
266 i2c_dir_in();
268 * now wait for ack
270 i2c_delay(CLOCK_HIGH_TIME/2);
272 * check for ack
274 if(i2c_getbit())
275 ack = 0;
276 i2c_delay(CLOCK_HIGH_TIME/2);
277 if(!ack){
278 if(!i2c_getbit()) /* receiver pulld SDA low */
279 ack = 1;
280 i2c_delay(CLOCK_HIGH_TIME/2);
284 * our clock is high now, make sure data is low
285 * before we enable our output. If we keep data high
286 * and enable output, we would generate a stop condition.
288 i2c_data(I2C_DATA_LOW);
291 * end clock pulse
293 i2c_enable();
294 i2c_dir_out();
295 i2c_clk(I2C_CLOCK_LOW);
296 i2c_delay(CLOCK_HIGH_TIME/4);
298 * enable output
300 i2c_dir_out();
302 * remove ACK clock pulse
304 i2c_data(I2C_DATA_HIGH);
305 i2c_delay(CLOCK_LOW_TIME/2);
306 return ack;
309 /*#---------------------------------------------------------------------------
311 *# FUNCTION NAME: I2C::sendAck
313 *# DESCRIPTION : Send ACK on received data
315 *#--------------------------------------------------------------------------*/
316 void
317 i2c_sendack(void)
320 * enable output
322 i2c_delay(CLOCK_LOW_TIME);
323 i2c_dir_out();
325 * set ack pulse high
327 i2c_data(I2C_DATA_LOW);
329 * generate clock pulse
331 i2c_delay(CLOCK_HIGH_TIME/6);
332 i2c_clk(I2C_CLOCK_HIGH);
333 i2c_delay(CLOCK_HIGH_TIME);
334 i2c_clk(I2C_CLOCK_LOW);
335 i2c_delay(CLOCK_LOW_TIME/6);
337 * reset data out
339 i2c_data(I2C_DATA_HIGH);
340 i2c_delay(CLOCK_LOW_TIME);
342 i2c_dir_in();
345 /*#---------------------------------------------------------------------------
347 *# FUNCTION NAME: i2c_sendnack
349 *# DESCRIPTION : Sends NACK on received data
351 *#--------------------------------------------------------------------------*/
352 void
353 i2c_sendnack(void)
356 * enable output
358 i2c_delay(CLOCK_LOW_TIME);
359 i2c_dir_out();
361 * set data high
363 i2c_data(I2C_DATA_HIGH);
365 * generate clock pulse
367 i2c_delay(CLOCK_HIGH_TIME/6);
368 i2c_clk(I2C_CLOCK_HIGH);
369 i2c_delay(CLOCK_HIGH_TIME);
370 i2c_clk(I2C_CLOCK_LOW);
371 i2c_delay(CLOCK_LOW_TIME);
373 i2c_dir_in();
376 /*#---------------------------------------------------------------------------
378 *# FUNCTION NAME: i2c_writereg
380 *# DESCRIPTION : Writes a value to an I2C device
382 *#--------------------------------------------------------------------------*/
384 i2c_writereg(unsigned char theSlave, unsigned char theReg,
385 unsigned char theValue)
387 int error, cntr = 3;
388 unsigned long flags;
390 do {
391 error = 0;
393 * we don't like to be interrupted
395 local_irq_save(flags);
397 i2c_start();
399 * send slave address
401 i2c_outbyte((theSlave & 0xfe));
403 * wait for ack
405 if(!i2c_getack())
406 error = 1;
408 * now select register
410 i2c_dir_out();
411 i2c_outbyte(theReg);
413 * now it's time to wait for ack
415 if(!i2c_getack())
416 error |= 2;
418 * send register register data
420 i2c_outbyte(theValue);
422 * now it's time to wait for ack
424 if(!i2c_getack())
425 error |= 4;
427 * end byte stream
429 i2c_stop();
431 * enable interrupt again
433 local_irq_restore(flags);
435 } while(error && cntr--);
437 i2c_delay(CLOCK_LOW_TIME);
439 return -error;
442 /*#---------------------------------------------------------------------------
444 *# FUNCTION NAME: i2c_readreg
446 *# DESCRIPTION : Reads a value from the decoder registers.
448 *#--------------------------------------------------------------------------*/
449 unsigned char
450 i2c_readreg(unsigned char theSlave, unsigned char theReg)
452 unsigned char b = 0;
453 int error, cntr = 3;
454 unsigned long flags;
456 do {
457 error = 0;
459 * we don't like to be interrupted
461 local_irq_save(flags);
463 * generate start condition
465 i2c_start();
468 * send slave address
470 i2c_outbyte((theSlave & 0xfe));
472 * wait for ack
474 if(!i2c_getack())
475 error = 1;
477 * now select register
479 i2c_dir_out();
480 i2c_outbyte(theReg);
482 * now it's time to wait for ack
484 if(!i2c_getack())
485 error = 1;
487 * repeat start condition
489 i2c_delay(CLOCK_LOW_TIME);
490 i2c_start();
492 * send slave address
494 i2c_outbyte(theSlave | 0x01);
496 * wait for ack
498 if(!i2c_getack())
499 error = 1;
501 * fetch register
503 b = i2c_inbyte();
505 * last received byte needs to be nacked
506 * instead of acked
508 i2c_sendnack();
510 * end sequence
512 i2c_stop();
514 * enable interrupt again
516 local_irq_restore(flags);
518 } while(error && cntr--);
520 return b;
523 static int
524 i2c_open(struct inode *inode, struct file *filp)
526 return 0;
529 static int
530 i2c_release(struct inode *inode, struct file *filp)
532 return 0;
535 /* Main device API. ioctl's to write or read to/from i2c registers.
538 static int
539 i2c_ioctl(struct inode *inode, struct file *file,
540 unsigned int cmd, unsigned long arg)
542 if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) {
543 return -EINVAL;
546 switch (_IOC_NR(cmd)) {
547 case I2C_WRITEREG:
548 /* write to an i2c slave */
549 D(printk("i2cw %d %d %d\n",
550 I2C_ARGSLAVE(arg),
551 I2C_ARGREG(arg),
552 I2C_ARGVALUE(arg)));
554 return i2c_writereg(I2C_ARGSLAVE(arg),
555 I2C_ARGREG(arg),
556 I2C_ARGVALUE(arg));
557 case I2C_READREG:
559 unsigned char val;
560 /* read from an i2c slave */
561 D(printk("i2cr %d %d ",
562 I2C_ARGSLAVE(arg),
563 I2C_ARGREG(arg)));
564 val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
565 D(printk("= %d\n", val));
566 return val;
568 default:
569 return -EINVAL;
573 return 0;
576 static struct file_operations i2c_fops = {
577 owner: THIS_MODULE,
578 ioctl: i2c_ioctl,
579 open: i2c_open,
580 release: i2c_release,
583 int __init
584 i2c_init(void)
586 int res;
588 /* Setup and enable the Port B I2C interface */
590 crisv32_io_get_name(&cris_i2c_data, CONFIG_ETRAX_I2C_DATA_PORT);
591 crisv32_io_get_name(&cris_i2c_clk, CONFIG_ETRAX_I2C_CLK_PORT);
593 /* register char device */
595 res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops);
596 if(res < 0) {
597 printk(KERN_ERR "i2c: couldn't get a major number.\n");
598 return res;
601 printk(KERN_INFO "I2C driver v2.2, (c) 1999-2001 Axis Communications AB\n");
603 return 0;
606 /* this makes sure that i2c_init is called during boot */
608 module_init(i2c_init);
610 /****************** END OF FILE i2c.c ********************************/