2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2001-2004, 2006 Silicon Graphics, Inc. All rights reserved.
9 #include <linux/interrupt.h>
10 #include <linux/types.h>
11 #include <linux/pci.h>
12 #include <asm/sn/addrs.h>
13 #include <asm/sn/geo.h>
14 #include <asm/sn/pcibr_provider.h>
15 #include <asm/sn/pcibus_provider_defs.h>
16 #include <asm/sn/pcidev.h>
17 #include <asm/sn/sn_sal.h>
18 #include <asm/sn/sn2/sn_hwperf.h>
19 #include "xtalk/xwidgetdev.h"
20 #include "xtalk/hubdev.h"
23 sal_pcibr_slot_enable(struct pcibus_info
*soft
, int device
, void *resp
)
25 struct ia64_sal_retval ret_stuff
;
32 segment
= soft
->pbi_buscommon
.bs_persist_segment
;
33 busnum
= soft
->pbi_buscommon
.bs_persist_busnum
;
34 SAL_CALL_NOLOCK(ret_stuff
, (u64
) SN_SAL_IOIF_SLOT_ENABLE
, segment
,
35 busnum
, (u64
) device
, (u64
) resp
, 0, 0, 0);
37 return (int)ret_stuff
.v0
;
41 sal_pcibr_slot_disable(struct pcibus_info
*soft
, int device
, int action
,
44 struct ia64_sal_retval ret_stuff
;
51 segment
= soft
->pbi_buscommon
.bs_persist_segment
;
52 busnum
= soft
->pbi_buscommon
.bs_persist_busnum
;
53 SAL_CALL_NOLOCK(ret_stuff
, (u64
) SN_SAL_IOIF_SLOT_DISABLE
,
54 segment
, busnum
, (u64
) device
, (u64
) action
,
57 return (int)ret_stuff
.v0
;
60 static int sal_pcibr_error_interrupt(struct pcibus_info
*soft
)
62 struct ia64_sal_retval ret_stuff
;
68 segment
= soft
->pbi_buscommon
.bs_persist_segment
;
69 busnum
= soft
->pbi_buscommon
.bs_persist_busnum
;
70 SAL_CALL_NOLOCK(ret_stuff
,
71 (u64
) SN_SAL_IOIF_ERROR_INTERRUPT
,
72 (u64
) segment
, (u64
) busnum
, 0, 0, 0, 0, 0);
74 return (int)ret_stuff
.v0
;
77 u16
sn_ioboard_to_pci_bus(struct pci_bus
*pci_bus
)
81 nasid_t nasid
= NASID_GET(SN_PCIBUS_BUSSOFT(pci_bus
)->bs_base
);
83 rc
= ia64_sn_sysctl_ioboard_get(nasid
, &ioboard
);
85 printk(KERN_WARNING
"ia64_sn_sysctl_ioboard_get failed: %ld\n",
94 * PCI Bridge Error interrupt handler. Gets invoked whenever a PCI
95 * bridge sends an error interrupt.
98 pcibr_error_intr_handler(int irq
, void *arg
)
100 struct pcibus_info
*soft
= (struct pcibus_info
*)arg
;
102 if (sal_pcibr_error_interrupt(soft
) < 0) {
103 panic("pcibr_error_intr_handler(): Fatal Bridge Error");
109 pcibr_bus_fixup(struct pcibus_bussoft
*prom_bussoft
, struct pci_controller
*controller
)
112 struct hubdev_info
*hubdev_info
;
113 struct pcibus_info
*soft
;
114 struct sn_flush_device_kernel
*sn_flush_device_kernel
;
115 struct sn_flush_device_common
*common
;
117 if (! IS_PCI_BRIDGE_ASIC(prom_bussoft
->bs_asic_type
)) {
122 * Allocate kernel bus soft and copy from prom.
125 soft
= kmalloc(sizeof(struct pcibus_info
), GFP_KERNEL
);
130 memcpy(soft
, prom_bussoft
, sizeof(struct pcibus_info
));
131 soft
->pbi_buscommon
.bs_base
=
132 (((u64
) soft
->pbi_buscommon
.
133 bs_base
<< 4) >> 4) | __IA64_UNCACHED_OFFSET
;
135 spin_lock_init(&soft
->pbi_lock
);
138 * register the bridge's error interrupt handler
140 if (request_irq(SGI_PCIASIC_ERROR
, pcibr_error_intr_handler
,
141 IRQF_SHARED
, "PCIBR error", (void *)(soft
))) {
143 "pcibr cannot allocate interrupt for error handler\n");
147 * Update the Bridge with the "kernel" pagesize
149 if (PAGE_SIZE
< 16384) {
150 pcireg_control_bit_clr(soft
, PCIBR_CTRL_PAGE_SIZE
);
152 pcireg_control_bit_set(soft
, PCIBR_CTRL_PAGE_SIZE
);
155 nasid
= NASID_GET(soft
->pbi_buscommon
.bs_base
);
156 cnode
= nasid_to_cnodeid(nasid
);
157 hubdev_info
= (struct hubdev_info
*)(NODEPDA(cnode
)->pdinfo
);
159 if (hubdev_info
->hdi_flush_nasid_list
.widget_p
) {
160 sn_flush_device_kernel
= hubdev_info
->hdi_flush_nasid_list
.
161 widget_p
[(int)soft
->pbi_buscommon
.bs_xid
];
162 if (sn_flush_device_kernel
) {
163 for (j
= 0; j
< DEV_PER_WIDGET
;
164 j
++, sn_flush_device_kernel
++) {
165 common
= sn_flush_device_kernel
->common
;
166 if (common
->sfdl_slot
== -1)
168 if ((common
->sfdl_persistent_segment
==
169 soft
->pbi_buscommon
.bs_persist_segment
) &&
170 (common
->sfdl_persistent_busnum
==
171 soft
->pbi_buscommon
.bs_persist_busnum
))
172 common
->sfdl_pcibus_info
=
178 /* Setup the PMU ATE map */
179 soft
->pbi_int_ate_resource
.lowest_free_index
= 0;
180 soft
->pbi_int_ate_resource
.ate
=
181 kzalloc(soft
->pbi_int_ate_size
* sizeof(u64
), GFP_KERNEL
);
183 if (!soft
->pbi_int_ate_resource
.ate
) {
191 void pcibr_force_interrupt(struct sn_irq_info
*sn_irq_info
)
193 struct pcidev_info
*pcidev_info
;
194 struct pcibus_info
*pcibus_info
;
195 int bit
= sn_irq_info
->irq_int_bit
;
197 if (! sn_irq_info
->irq_bridge
)
200 pcidev_info
= (struct pcidev_info
*)sn_irq_info
->irq_pciioinfo
;
203 (struct pcibus_info
*)pcidev_info
->pdi_host_pcidev_info
->
205 pcireg_force_intr_set(pcibus_info
, bit
);
209 void pcibr_target_interrupt(struct sn_irq_info
*sn_irq_info
)
211 struct pcidev_info
*pcidev_info
;
212 struct pcibus_info
*pcibus_info
;
213 int bit
= sn_irq_info
->irq_int_bit
;
214 u64 xtalk_addr
= sn_irq_info
->irq_xtalkaddr
;
216 pcidev_info
= (struct pcidev_info
*)sn_irq_info
->irq_pciioinfo
;
219 (struct pcibus_info
*)pcidev_info
->pdi_host_pcidev_info
->
222 /* Disable the device's IRQ */
223 pcireg_intr_enable_bit_clr(pcibus_info
, (1 << bit
));
225 /* Change the device's IRQ */
226 pcireg_intr_addr_addr_set(pcibus_info
, bit
, xtalk_addr
);
228 /* Re-enable the device's IRQ */
229 pcireg_intr_enable_bit_set(pcibus_info
, (1 << bit
));
231 pcibr_force_interrupt(sn_irq_info
);
236 * Provider entries for PIC/CP
239 struct sn_pcibus_provider pcibr_provider
= {
240 .dma_map
= pcibr_dma_map
,
241 .dma_map_consistent
= pcibr_dma_map_consistent
,
242 .dma_unmap
= pcibr_dma_unmap
,
243 .bus_fixup
= pcibr_bus_fixup
,
244 .force_interrupt
= pcibr_force_interrupt
,
245 .target_interrupt
= pcibr_target_interrupt
249 pcibr_init_provider(void)
251 sn_pci_provider
[PCIIO_ASIC_TYPE_PIC
] = &pcibr_provider
;
252 sn_pci_provider
[PCIIO_ASIC_TYPE_TIOCP
] = &pcibr_provider
;
257 EXPORT_SYMBOL_GPL(sal_pcibr_slot_enable
);
258 EXPORT_SYMBOL_GPL(sal_pcibr_slot_disable
);
259 EXPORT_SYMBOL_GPL(sn_ioboard_to_pci_bus
);