1 /***************************************************************************/
4 * linux/arch/m68knommu/platform/5307/config.c
6 * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
7 * Copyright (C) 2000, Lineo (www.lineo.com)
10 /***************************************************************************/
12 #include <linux/kernel.h>
13 #include <linux/sched.h>
14 #include <linux/param.h>
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
19 #include <asm/traps.h>
20 #include <asm/machdep.h>
21 #include <asm/coldfire.h>
22 #include <asm/mcftimer.h>
23 #include <asm/mcfsim.h>
24 #include <asm/mcfdma.h>
25 #include <asm/mcfwdebug.h>
27 /***************************************************************************/
29 void coldfire_tick(void);
30 void coldfire_timer_init(irqreturn_t (*handler
)(int, void *, struct pt_regs
*));
31 unsigned long coldfire_timer_offset(void);
32 void coldfire_trap_init(void);
33 void coldfire_reset(void);
35 extern unsigned int mcf_timervector
;
36 extern unsigned int mcf_profilevector
;
37 extern unsigned int mcf_timerlevel
;
39 /***************************************************************************/
42 * Some platforms need software versions of the GPIO data registers.
44 unsigned short ppdata
;
45 unsigned char ledbank
= 0xff;
47 /***************************************************************************/
50 * DMA channel base address table.
52 unsigned int dma_base_addr
[MAX_M68K_DMA_CHANNELS
] = {
53 MCF_MBAR
+ MCFDMA_BASE0
,
54 MCF_MBAR
+ MCFDMA_BASE1
,
55 MCF_MBAR
+ MCFDMA_BASE2
,
56 MCF_MBAR
+ MCFDMA_BASE3
,
59 unsigned int dma_device_address
[MAX_M68K_DMA_CHANNELS
];
61 /***************************************************************************/
63 void mcf_autovector(unsigned int vec
)
65 volatile unsigned char *mbar
;
67 if ((vec
>= 25) && (vec
<= 31)) {
68 mbar
= (volatile unsigned char *) MCF_MBAR
;
69 vec
= 0x1 << (vec
- 24);
70 *(mbar
+ MCFSIM_AVR
) |= vec
;
71 mcf_setimr(mcf_getimr() & ~vec
);
75 /***************************************************************************/
77 void mcf_settimericr(unsigned int timer
, unsigned int level
)
79 volatile unsigned char *icrp
;
80 unsigned int icr
, imr
;
84 case 2: icr
= MCFSIM_TIMER2ICR
; imr
= MCFSIM_IMR_TIMER2
; break;
85 default: icr
= MCFSIM_TIMER1ICR
; imr
= MCFSIM_IMR_TIMER1
; break;
88 icrp
= (volatile unsigned char *) (MCF_MBAR
+ icr
);
89 *icrp
= MCFSIM_ICR_AUTOVEC
| (level
<< 2) | MCFSIM_ICR_PRI3
;
90 mcf_setimr(mcf_getimr() & ~imr
);
94 /***************************************************************************/
96 int mcf_timerirqpending(int timer
)
101 case 1: imr
= MCFSIM_IMR_TIMER1
; break;
102 case 2: imr
= MCFSIM_IMR_TIMER2
; break;
105 return (mcf_getipr() & imr
);
108 /***************************************************************************/
110 void config_BSP(char *commandp
, int size
)
112 mcf_setimr(MCFSIM_IMR_MASKALL
);
114 #if defined(CONFIG_BOOTPARAM)
115 strncpy(commandp
, CONFIG_BOOTPARAM_STRING
, size
);
116 commandp
[size
-1] = 0;
117 #elif defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \
118 defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3) || \
119 defined(CONFIG_CLEOPATRA)
120 /* Copy command line from FLASH to local buffer... */
121 memcpy(commandp
, (char *) 0xf0004000, size
);
122 commandp
[size
-1] = 0;
123 /* Different timer setup - to prevent device clash */
124 mcf_timervector
= 30;
125 mcf_profilevector
= 31;
128 memset(commandp
, 0, size
);
131 mach_sched_init
= coldfire_timer_init
;
132 mach_tick
= coldfire_tick
;
133 mach_gettimeoffset
= coldfire_timer_offset
;
134 mach_trap_init
= coldfire_trap_init
;
135 mach_reset
= coldfire_reset
;
137 #ifdef MCF_BDM_DISABLE
139 * Disable the BDM clocking. This also turns off most of the rest of
140 * the BDM device. This is good for EMC reasons. This option is not
141 * incompatible with the memory protection option.
143 wdebug(MCFDEBUG_CSR
, MCFDEBUG_CSR_PSTCLK
);
147 /***************************************************************************/