2 * pci.c: GT64120 PCI support.
4 * Copyright (C) 2006, Wind River System Inc. Rongkai.Zhan <rongkai.zhan@windriver.com>
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 #include <linux/init.h>
11 #include <linux/types.h>
12 #include <linux/pci.h>
13 #include <linux/kernel.h>
14 #include <asm/gt64120.h>
16 extern struct pci_ops gt64120_pci_ops
;
18 static struct resource pci0_io_resource
= {
20 .start
= GT_PCI_IO_BASE
,
21 .end
= GT_PCI_IO_BASE
+ GT_PCI_IO_SIZE
- 1,
22 .flags
= IORESOURCE_IO
,
25 static struct resource pci0_mem_resource
= {
26 .name
= "pci_0 memory",
27 .start
= GT_PCI_MEM_BASE
,
28 .end
= GT_PCI_MEM_BASE
+ GT_PCI_MEM_SIZE
- 1,
29 .flags
= IORESOURCE_MEM
,
32 static struct pci_controller hose_0
= {
33 .pci_ops
= >64120_pci_ops
,
34 .io_resource
= &pci0_io_resource
,
35 .mem_resource
= &pci0_mem_resource
,
38 static int __init
gt64120_pci_init(void)
42 tmp
= GT_READ(GT_PCI0_CMD_OFS
); /* Huh??? -- Ralf */
43 tmp
= GT_READ(GT_PCI0_BARE_OFS
);
45 /* reset the whole PCI I/O space range */
46 ioport_resource
.start
= GT_PCI_IO_BASE
;
47 ioport_resource
.end
= GT_PCI_IO_BASE
+ GT_PCI_IO_SIZE
- 1;
49 register_pci_controller(&hose_0
);
53 arch_initcall(gt64120_pci_init
);