arch/mips/tx4938/toshiba_rbtx4938/irq.c

   1 /*
   2  * linux/arch/mips/tx4938/toshiba_rbtx4938/irq.c
   3  *
   4  * Toshiba RBTX4938 specific interrupt handlers
   5  * Copyright (C) 2000-2001 Toshiba Corporation
   6  *
   7  * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
   8  * terms of the GNU General Public License version 2. This program is
   9  * licensed "as is" without any warranty of any kind, whether express
  10  * or implied.
  11  *
  12  * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
  13  */
  14
  15 /*
  16 IRQ  Device
  17
  18 16   TX4938-CP0/00 Software 0
  19 17   TX4938-CP0/01 Software 1
  20 18   TX4938-CP0/02 Cascade TX4938-CP0
  21 19   TX4938-CP0/03 Multiplexed -- do not use
  22 20   TX4938-CP0/04 Multiplexed -- do not use
  23 21   TX4938-CP0/05 Multiplexed -- do not use
  24 22   TX4938-CP0/06 Multiplexed -- do not use
  25 23   TX4938-CP0/07 CPU TIMER
  26
  27 24   TX4938-PIC/00
  28 25   TX4938-PIC/01
  29 26   TX4938-PIC/02 Cascade RBTX4938-IOC
  30 27   TX4938-PIC/03 RBTX4938 RTL-8019AS Ethernet
  31 28   TX4938-PIC/04
  32 29   TX4938-PIC/05 TX4938 ETH1
  33 30   TX4938-PIC/06 TX4938 ETH0
  34 31   TX4938-PIC/07
  35 32   TX4938-PIC/08 TX4938 SIO 0
  36 33   TX4938-PIC/09 TX4938 SIO 1
  37 34   TX4938-PIC/10 TX4938 DMA0
  38 35   TX4938-PIC/11 TX4938 DMA1
  39 36   TX4938-PIC/12 TX4938 DMA2
  40 37   TX4938-PIC/13 TX4938 DMA3
  41 38   TX4938-PIC/14
  42 39   TX4938-PIC/15
  43 40   TX4938-PIC/16 TX4938 PCIC
  44 41   TX4938-PIC/17 TX4938 TMR0
  45 42   TX4938-PIC/18 TX4938 TMR1
  46 43   TX4938-PIC/19 TX4938 TMR2
  47 44   TX4938-PIC/20
  48 45   TX4938-PIC/21
  49 46   TX4938-PIC/22 TX4938 PCIERR
  50 47   TX4938-PIC/23
  51 48   TX4938-PIC/24
  52 49   TX4938-PIC/25
  53 50   TX4938-PIC/26
  54 51   TX4938-PIC/27
  55 52   TX4938-PIC/28
  56 53   TX4938-PIC/29
  57 54   TX4938-PIC/30
  58 55   TX4938-PIC/31 TX4938 SPI
  59
  60 56 RBTX4938-IOC/00 PCI-D
  61 57 RBTX4938-IOC/01 PCI-C
  62 58 RBTX4938-IOC/02 PCI-B
  63 59 RBTX4938-IOC/03 PCI-A
  64 60 RBTX4938-IOC/04 RTC
  65 61 RBTX4938-IOC/05 ATA
  66 62 RBTX4938-IOC/06 MODEM
  67 63 RBTX4938-IOC/07 SWINT
  68 */
  69 #include <linux/init.h>
  70 #include <linux/kernel.h>
  71 #include <linux/types.h>
  72 #include <linux/mm.h>
  73 #include <linux/swap.h>
  74 #include <linux/ioport.h>
  75 #include <linux/sched.h>
  76 #include <linux/interrupt.h>
  77 #include <linux/pci.h>
  78 #include <linux/timex.h>
  79 #include <asm/bootinfo.h>
  80 #include <asm/page.h>
  81 #include <asm/io.h>
  82 #include <asm/irq.h>
  83 #include <asm/processor.h>
  84 #include <asm/reboot.h>
  85 #include <asm/time.h>
  86 #include <asm/wbflush.h>
  87 #include <linux/bootmem.h>
  88 #include <asm/tx4938/rbtx4938.h>
  89
  90 static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq);
  91 static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq);
  92 static void toshiba_rbtx4938_irq_ioc_end(unsigned int irq);
  93
  94 #define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC"
  95 static struct irq_chip toshiba_rbtx4938_irq_ioc_type = {
  96         .typename = TOSHIBA_RBTX4938_IOC_NAME,
  97         .ack = toshiba_rbtx4938_irq_ioc_disable,
  98         .mask = toshiba_rbtx4938_irq_ioc_disable,
  99         .mask_ack = toshiba_rbtx4938_irq_ioc_disable,
 100         .unmask = toshiba_rbtx4938_irq_ioc_enable,
 101         .end = toshiba_rbtx4938_irq_ioc_end,
 102 };
 103
 104 #define TOSHIBA_RBTX4938_IOC_INTR_ENAB 0xb7f02000
 105 #define TOSHIBA_RBTX4938_IOC_INTR_STAT 0xb7f0200a
 106
 107 int
 108 toshiba_rbtx4938_irq_nested(int sw_irq)
 109 {
 110         u8 level3;
 111
 112         level3 = reg_rd08(TOSHIBA_RBTX4938_IOC_INTR_STAT) & 0xff;
 113         if (level3) {
 114                 /* must use fls so onboard ATA has priority */
 115                 sw_irq = TOSHIBA_RBTX4938_IRQ_IOC_BEG + fls(level3) - 1;
 116         }
 117
 118         wbflush();
 119         return sw_irq;
 120 }
 121
 122 static struct irqaction toshiba_rbtx4938_irq_ioc_action = {
 123         .handler = no_action,
 124         .flags = 0,
 125         .mask = CPU_MASK_NONE,
 126         .name = TOSHIBA_RBTX4938_IOC_NAME,
 127 };
 128
 129 /**********************************************************************************/
 130 /* Functions for ioc                                                              */
 131 /**********************************************************************************/
 132 static void __init
 133 toshiba_rbtx4938_irq_ioc_init(void)
 134 {
 135         int i;
 136
 137         for (i = TOSHIBA_RBTX4938_IRQ_IOC_BEG;
 138              i <= TOSHIBA_RBTX4938_IRQ_IOC_END; i++)
 139                 set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type,
 140                                          handle_level_irq);
 141
 142         setup_irq(RBTX4938_IRQ_IOCINT,
 143                   &toshiba_rbtx4938_irq_ioc_action);
 144 }
 145
 146 static void
 147 toshiba_rbtx4938_irq_ioc_enable(unsigned int irq)
 148 {
 149         volatile unsigned char v;
 150
 151         v = TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB);
 152         v |= (1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG));
 153         TX4938_WR08(TOSHIBA_RBTX4938_IOC_INTR_ENAB, v);
 154         mmiowb();
 155         TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB);
 156 }
 157
 158 static void
 159 toshiba_rbtx4938_irq_ioc_disable(unsigned int irq)
 160 {
 161         volatile unsigned char v;
 162
 163         v = TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB);
 164         v &= ~(1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG));
 165         TX4938_WR08(TOSHIBA_RBTX4938_IOC_INTR_ENAB, v);
 166         mmiowb();
 167         TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB);
 168 }
 169
 170 static void
 171 toshiba_rbtx4938_irq_ioc_end(unsigned int irq)
 172 {
 173         if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
 174                 toshiba_rbtx4938_irq_ioc_enable(irq);
 175         }
 176 }
 177
 178 extern void __init txx9_spi_irqinit(int irc_irq);
 179
 180 void __init arch_init_irq(void)
 181 {
 182         extern void tx4938_irq_init(void);
 183
 184         /* Now, interrupt control disabled, */
 185         /* all IRC interrupts are masked, */
 186         /* all IRC interrupt mode are Low Active. */
 187
 188         /* mask all IOC interrupts */
 189         *rbtx4938_imask_ptr = 0;
 190
 191         /* clear SoftInt interrupts */
 192         *rbtx4938_softint_ptr = 0;
 193         tx4938_irq_init();
 194         toshiba_rbtx4938_irq_ioc_init();
 195         /* Onboard 10M Ether: High Active */
 196         TX4938_WR(TX4938_MKA(TX4938_IRC_IRDM0), 0x00000040);
 197
 198         if (tx4938_ccfgptr->pcfg & TX4938_PCFG_SPI_SEL) {
 199                 txx9_spi_irqinit(RBTX4938_IRQ_IRC_SPI);
 200         }
 201
 202         wbflush();
 203 }