drivers/isdn/hisax/hisax.h

   1 /* $Id: hisax.h,v 2.64.2.4 2004/02/11 13:21:33 keil Exp $
   2  *
   3  * Basic declarations, defines and prototypes
   4  *
   5  * This software may be used and distributed according to the terms
   6  * of the GNU General Public License, incorporated herein by reference.
   7  *
   8  */
   9 #include <linux/errno.h>
  10 #include <linux/fs.h>
  11 #include <linux/major.h>
  12 #include <asm/io.h>
  13 #include <linux/delay.h>
  14 #include <linux/kernel.h>
  15 #include <linux/signal.h>
  16 #include <linux/slab.h>
  17 #include <linux/mm.h>
  18 #include <linux/mman.h>
  19 #include <linux/ioport.h>
  20 #include <linux/timer.h>
  21 #include <linux/wait.h>
  22 #include <linux/isdnif.h>
  23 #include <linux/tty.h>
  24 #include <linux/serial_reg.h>
  25 #include <linux/netdevice.h>
  26
  27 #define ERROR_STATISTIC
  28
  29 #define REQUEST         0
  30 #define CONFIRM         1
  31 #define INDICATION      2
  32 #define RESPONSE        3
  33
  34 #define HW_ENABLE       0x0000
  35 #define HW_RESET        0x0004
  36 #define HW_POWERUP      0x0008
  37 #define HW_ACTIVATE     0x0010
  38 #define HW_DEACTIVATE   0x0018
  39
  40 #define HW_INFO1        0x0010
  41 #define HW_INFO2        0x0020
  42 #define HW_INFO3        0x0030
  43 #define HW_INFO4        0x0040
  44 #define HW_INFO4_P8     0x0040
  45 #define HW_INFO4_P10    0x0048
  46 #define HW_RSYNC        0x0060
  47 #define HW_TESTLOOP     0x0070
  48 #define CARD_RESET      0x00F0
  49 #define CARD_INIT       0x00F2
  50 #define CARD_RELEASE    0x00F3
  51 #define CARD_TEST       0x00F4
  52 #define CARD_AUX_IND    0x00F5
  53
  54 #define PH_ACTIVATE     0x0100
  55 #define PH_DEACTIVATE   0x0110
  56 #define PH_DATA         0x0120
  57 #define PH_PULL         0x0130
  58 #define PH_TESTLOOP     0x0140
  59 #define PH_PAUSE        0x0150
  60 #define MPH_ACTIVATE    0x0180
  61 #define MPH_DEACTIVATE  0x0190
  62 #define MPH_INFORMATION 0x01A0
  63
  64 #define DL_ESTABLISH    0x0200
  65 #define DL_RELEASE      0x0210
  66 #define DL_DATA         0x0220
  67 #define DL_FLUSH        0x0224
  68 #define DL_UNIT_DATA    0x0230
  69
  70 #define MDL_BC_RELEASE  0x0278  // Formula-n enter:now
  71 #define MDL_BC_ASSIGN   0x027C  // Formula-n enter:now
  72 #define MDL_ASSIGN      0x0280
  73 #define MDL_REMOVE      0x0284
  74 #define MDL_ERROR       0x0288
  75 #define MDL_INFO_SETUP  0x02E0
  76 #define MDL_INFO_CONN   0x02E4
  77 #define MDL_INFO_REL    0x02E8
  78
  79 #define CC_SETUP        0x0300
  80 #define CC_RESUME       0x0304
  81 #define CC_MORE_INFO    0x0310
  82 #define CC_IGNORE       0x0320
  83 #define CC_REJECT       0x0324
  84 #define CC_SETUP_COMPL  0x0330
  85 #define CC_PROCEEDING   0x0340
  86 #define CC_ALERTING     0x0344
  87 #define CC_PROGRESS     0x0348
  88 #define CC_CONNECT      0x0350
  89 #define CC_CHARGE       0x0354
  90 #define CC_NOTIFY       0x0358
  91 #define CC_DISCONNECT   0x0360
  92 #define CC_RELEASE      0x0368
  93 #define CC_SUSPEND      0x0370
  94 #define CC_PROCEED_SEND 0x0374
  95 #define CC_REDIR        0x0378
  96 #define CC_T302         0x0382
  97 #define CC_T303         0x0383
  98 #define CC_T304         0x0384
  99 #define CC_T305         0x0385
 100 #define CC_T308_1       0x0388
 101 #define CC_T308_2       0x038A
 102 #define CC_T309         0x0309
 103 #define CC_T310         0x0390
 104 #define CC_T313         0x0393
 105 #define CC_T318         0x0398
 106 #define CC_T319         0x0399
 107 #define CC_TSPID        0x03A0
 108 #define CC_NOSETUP_RSP  0x03E0
 109 #define CC_SETUP_ERR    0x03E1
 110 #define CC_SUSPEND_ERR  0x03E2
 111 #define CC_RESUME_ERR   0x03E3
 112 #define CC_CONNECT_ERR  0x03E4
 113 #define CC_RELEASE_ERR  0x03E5
 114 #define CC_RESTART      0x03F4
 115 #define CC_TDSS1_IO     0x13F4    /* DSS1 IO user timer */
 116 #define CC_TNI1_IO      0x13F5    /* NI1 IO user timer */
 117
 118 /* define maximum number of possible waiting incoming calls */
 119 #define MAX_WAITING_CALLS 2
 120
 121
 122 #ifdef __KERNEL__
 123
 124 /* include l3dss1 & ni1 specific process structures, but no other defines */
 125 #ifdef CONFIG_HISAX_EURO
 126   #define l3dss1_process
 127   #include "l3dss1.h"
 128   #undef  l3dss1_process
 129 #endif /* CONFIG_HISAX_EURO */
 130
 131 #ifdef CONFIG_HISAX_NI1
 132   #define l3ni1_process
 133   #include "l3ni1.h"
 134   #undef  l3ni1_process
 135 #endif /* CONFIG_HISAX_NI1 */
 136
 137 #define MAX_DFRAME_LEN  260
 138 #define MAX_DFRAME_LEN_L1       300
 139 #define HSCX_BUFMAX     4096
 140 #define MAX_DATA_SIZE   (HSCX_BUFMAX - 4)
 141 #define MAX_DATA_MEM    (HSCX_BUFMAX + 64)
 142 #define RAW_BUFMAX      (((HSCX_BUFMAX*6)/5) + 5)
 143 #define MAX_HEADER_LEN  4
 144 #define MAX_WINDOW      8
 145 #define MAX_MON_FRAME   32
 146 #define MAX_DLOG_SPACE  2048
 147 #define MAX_BLOG_SPACE  256
 148
 149 /* #define I4L_IRQ_FLAG SA_INTERRUPT */
 150 #define I4L_IRQ_FLAG    0
 151
 152 /*
 153  * Statemachine
 154  */
 155
 156 struct FsmInst;
 157
 158 typedef void (* FSMFNPTR)(struct FsmInst *, int, void *);
 159
 160 struct Fsm {
 161         FSMFNPTR *jumpmatrix;
 162         int state_count, event_count;
 163         char **strEvent, **strState;
 164 };
 165
 166 struct FsmInst {
 167         struct Fsm *fsm;
 168         int state;
 169         int debug;
 170         void *userdata;
 171         int userint;
 172         void (*printdebug) (struct FsmInst *, char *, ...);
 173 };
 174
 175 struct FsmNode {
 176         int state, event;
 177         void (*routine) (struct FsmInst *, int, void *);
 178 };
 179
 180 struct FsmTimer {
 181         struct FsmInst *fi;
 182         struct timer_list tl;
 183         int event;
 184         void *arg;
 185 };
 186
 187 struct L3Timer {
 188         struct l3_process *pc;
 189         struct timer_list tl;
 190         int event;
 191 };
 192
 193 #define FLG_L1_ACTIVATING       1
 194 #define FLG_L1_ACTIVATED        2
 195 #define FLG_L1_DEACTTIMER       3
 196 #define FLG_L1_ACTTIMER         4
 197 #define FLG_L1_T3RUN            5
 198 #define FLG_L1_PULL_REQ         6
 199 #define FLG_L1_UINT             7
 200
 201 struct Layer1 {
 202         void *hardware;
 203         struct BCState *bcs;
 204         struct PStack **stlistp;
 205         long Flags;
 206         struct FsmInst l1m;
 207         struct FsmTimer timer;
 208         void (*l1l2) (struct PStack *, int, void *);
 209         void (*l1hw) (struct PStack *, int, void *);
 210         void (*l1tei) (struct PStack *, int, void *);
 211         int mode, bc;
 212         int delay;
 213 };
 214
 215 #define GROUP_TEI       127
 216 #define TEI_SAPI        63
 217 #define CTRL_SAPI       0
 218 #define PACKET_NOACK    7
 219
 220 /* Layer2 Flags */
 221
 222 #define FLG_LAPB        0
 223 #define FLG_LAPD        1
 224 #define FLG_ORIG        2
 225 #define FLG_MOD128      3
 226 #define FLG_PEND_REL    4
 227 #define FLG_L3_INIT     5
 228 #define FLG_T200_RUN    6
 229 #define FLG_ACK_PEND    7
 230 #define FLG_REJEXC      8
 231 #define FLG_OWN_BUSY    9
 232 #define FLG_PEER_BUSY   10
 233 #define FLG_DCHAN_BUSY  11
 234 #define FLG_L1_ACTIV    12
 235 #define FLG_ESTAB_PEND  13
 236 #define FLG_PTP         14
 237 #define FLG_FIXED_TEI   15
 238 #define FLG_L2BLOCK     16
 239
 240 struct Layer2 {
 241         int tei;
 242         int sap;
 243         int maxlen;
 244         u_long flag;
 245         spinlock_t lock;
 246         u_int vs, va, vr;
 247         int rc;
 248         unsigned int window;
 249         unsigned int sow;
 250         struct sk_buff *windowar[MAX_WINDOW];
 251         struct sk_buff_head i_queue;
 252         struct sk_buff_head ui_queue;
 253         void (*l2l1) (struct PStack *, int, void *);
 254         void (*l2l3) (struct PStack *, int, void *);
 255         void (*l2tei) (struct PStack *, int, void *);
 256         struct FsmInst l2m;
 257         struct FsmTimer t200, t203;
 258         int T200, N200, T203;
 259         int debug;
 260         char debug_id[16];
 261 };
 262
 263 struct Layer3 {
 264         void (*l3l4) (struct PStack *, int, void *);
 265         void (*l3ml3) (struct PStack *, int, void *);
 266         void (*l3l2) (struct PStack *, int, void *);
 267         struct FsmInst l3m;
 268         struct FsmTimer l3m_timer;
 269         struct sk_buff_head squeue;
 270         struct l3_process *proc;
 271         struct l3_process *global;
 272         int N303;
 273         int debug;
 274         char debug_id[8];
 275 };
 276
 277 struct LLInterface {
 278         void (*l4l3) (struct PStack *, int, void *);
 279         int  (*l4l3_proto) (struct PStack *, isdn_ctrl *);
 280         void *userdata;
 281         u_long flag;
 282 };
 283
 284 #define FLG_LLI_L1WAKEUP        1
 285 #define FLG_LLI_L2WAKEUP        2
 286
 287 struct Management {
 288         int     ri;
 289         struct FsmInst tei_m;
 290         struct FsmTimer t202;
 291         int T202, N202, debug;
 292         void (*layer) (struct PStack *, int, void *);
 293 };
 294
 295 #define NO_CAUSE 254
 296
 297 struct Param {
 298         u_char cause;
 299         u_char loc;
 300         u_char diag[6];
 301         int bchannel;
 302         int chargeinfo;
 303         int spv;                /* SPV Flag */
 304         setup_parm setup;       /* from isdnif.h numbers and Serviceindicator */
 305         u_char moderate;        /* transfer mode and rate (bearer octet 4) */
 306 };
 307
 308
 309 struct PStack {
 310         struct PStack *next;
 311         struct Layer1 l1;
 312         struct Layer2 l2;
 313         struct Layer3 l3;
 314         struct LLInterface lli;
 315         struct Management ma;
 316         int protocol;           /* EDSS1, 1TR6 or NI1 */
 317
 318         /* protocol specific data fields */
 319         union
 320          { u_char uuuu; /* only as dummy */
 321 #ifdef CONFIG_HISAX_EURO
 322            dss1_stk_priv dss1; /* private dss1 data */
 323 #endif /* CONFIG_HISAX_EURO */
 324 #ifdef CONFIG_HISAX_NI1
 325            ni1_stk_priv ni1; /* private ni1 data */
 326 #endif /* CONFIG_HISAX_NI1 */
 327          } prot;
 328 };
 329
 330 struct l3_process {
 331         int callref;
 332         int state;
 333         struct L3Timer timer;
 334         int N303;
 335         int debug;
 336         struct Param para;
 337         struct Channel *chan;
 338         struct PStack *st;
 339         struct l3_process *next;
 340         ulong redir_result;
 341
 342         /* protocol specific data fields */
 343         union
 344          { u_char uuuu; /* only when euro not defined, avoiding empty union */
 345 #ifdef CONFIG_HISAX_EURO
 346            dss1_proc_priv dss1; /* private dss1 data */
 347 #endif /* CONFIG_HISAX_EURO */
 348 #ifdef CONFIG_HISAX_NI1
 349            ni1_proc_priv ni1; /* private ni1 data */
 350 #endif /* CONFIG_HISAX_NI1 */
 351          } prot;
 352 };
 353
 354 struct hscx_hw {
 355         int hscx;
 356         int rcvidx;
 357         int count;              /* Current skb sent count */
 358         u_char *rcvbuf;         /* B-Channel receive Buffer */
 359         u_char tsaxr0;
 360         u_char tsaxr1;
 361 };
 362
 363 struct w6692B_hw {
 364         int bchan;
 365         int rcvidx;
 366         int count;              /* Current skb sent count */
 367         u_char *rcvbuf;         /* B-Channel receive Buffer */
 368 };
 369
 370 struct isar_reg {
 371         unsigned long Flags;
 372         volatile u_char bstat;
 373         volatile u_char iis;
 374         volatile u_char cmsb;
 375         volatile u_char clsb;
 376         volatile u_char par[8];
 377 };
 378
 379 struct isar_hw {
 380         int dpath;
 381         int rcvidx;
 382         int txcnt;
 383         int mml;
 384         u_char state;
 385         u_char cmd;
 386         u_char mod;
 387         u_char newcmd;
 388         u_char newmod;
 389         char try_mod;
 390         struct timer_list ftimer;
 391         u_char *rcvbuf;         /* B-Channel receive Buffer */
 392         u_char conmsg[16];
 393         struct isar_reg *reg;
 394 };
 395
 396 struct hdlc_stat_reg {
 397 #ifdef __BIG_ENDIAN
 398         u_char fill;
 399         u_char mode;
 400         u_char xml;
 401         u_char cmd;
 402 #else
 403         u_char cmd;
 404         u_char xml;
 405         u_char mode;
 406         u_char fill;
 407 #endif
 408 } __attribute__((packed));
 409
 410 struct hdlc_hw {
 411         union {
 412                 u_int ctrl;
 413                 struct hdlc_stat_reg sr;
 414         } ctrl;
 415         u_int stat;
 416         int rcvidx;
 417         int count;              /* Current skb sent count */
 418         u_char *rcvbuf;         /* B-Channel receive Buffer */
 419 };
 420
 421 struct hfcB_hw {
 422         unsigned int *send;
 423         int f1;
 424         int f2;
 425 };
 426
 427 struct tiger_hw {
 428         u_int *send;
 429         u_int *s_irq;
 430         u_int *s_end;
 431         u_int *sendp;
 432         u_int *rec;
 433         int free;
 434         u_char *rcvbuf;
 435         u_char *sendbuf;
 436         u_char *sp;
 437         int sendcnt;
 438         u_int s_tot;
 439         u_int r_bitcnt;
 440         u_int r_tot;
 441         u_int r_err;
 442         u_int r_fcs;
 443         u_char r_state;
 444         u_char r_one;
 445         u_char r_val;
 446         u_char s_state;
 447 };
 448
 449 struct amd7930_hw {
 450         u_char *tx_buff;
 451         u_char *rv_buff;
 452         int rv_buff_in;
 453         int rv_buff_out;
 454         struct sk_buff *rv_skb;
 455         struct hdlc_state *hdlc_state;
 456         struct work_struct tq_rcv;
 457         struct work_struct tq_xmt;
 458 };
 459
 460 #define BC_FLG_INIT     1
 461 #define BC_FLG_ACTIV    2
 462 #define BC_FLG_BUSY     3
 463 #define BC_FLG_NOFRAME  4
 464 #define BC_FLG_HALF     5
 465 #define BC_FLG_EMPTY    6
 466 #define BC_FLG_ORIG     7
 467 #define BC_FLG_DLEETX   8
 468 #define BC_FLG_LASTDLE  9
 469 #define BC_FLG_FIRST    10
 470 #define BC_FLG_LASTDATA 11
 471 #define BC_FLG_NMD_DATA 12
 472 #define BC_FLG_FTI_RUN  13
 473 #define BC_FLG_LL_OK    14
 474 #define BC_FLG_LL_CONN  15
 475 #define BC_FLG_FTI_FTS  16
 476 #define BC_FLG_FRH_WAIT 17
 477
 478 #define L1_MODE_NULL    0
 479 #define L1_MODE_TRANS   1
 480 #define L1_MODE_HDLC    2
 481 #define L1_MODE_EXTRN   3
 482 #define L1_MODE_HDLC_56K 4
 483 #define L1_MODE_MODEM   7
 484 #define L1_MODE_V32     8
 485 #define L1_MODE_FAX     9
 486
 487 struct BCState {
 488         int channel;
 489         int mode;
 490         u_long Flag;
 491         struct IsdnCardState *cs;
 492         int tx_cnt;             /* B-Channel transmit counter */
 493         struct sk_buff *tx_skb; /* B-Channel transmit Buffer */
 494         struct sk_buff_head rqueue;     /* B-Channel receive Queue */
 495         struct sk_buff_head squeue;     /* B-Channel send Queue */
 496         int ackcnt;
 497         spinlock_t aclock;
 498         struct PStack *st;
 499         u_char *blog;
 500         u_char *conmsg;
 501         struct timer_list transbusy;
 502         struct work_struct tqueue;
 503         u_long event;
 504         int  (*BC_SetStack) (struct PStack *, struct BCState *);
 505         void (*BC_Close) (struct BCState *);
 506 #ifdef ERROR_STATISTIC
 507         int err_crc;
 508         int err_tx;
 509         int err_rdo;
 510         int err_inv;
 511 #endif
 512         union {
 513                 struct hscx_hw hscx;
 514                 struct hdlc_hw hdlc;
 515                 struct isar_hw isar;
 516                 struct hfcB_hw hfc;
 517                 struct tiger_hw tiger;
 518                 struct amd7930_hw  amd7930;
 519                 struct w6692B_hw w6692;
 520                 struct hisax_b_if *b_if;
 521         } hw;
 522 };
 523
 524 struct Channel {
 525         struct PStack *b_st, *d_st;
 526         struct IsdnCardState *cs;
 527         struct BCState *bcs;
 528         int chan;
 529         int incoming;
 530         struct FsmInst fi;
 531         struct FsmTimer drel_timer, dial_timer;
 532         int debug;
 533         int l2_protocol, l2_active_protocol;
 534         int l3_protocol;
 535         int data_open;
 536         struct l3_process *proc;
 537         setup_parm setup;       /* from isdnif.h numbers and Serviceindicator */
 538         u_long Flags;           /* for remembering action done in l4 */
 539         int leased;
 540 };
 541
 542 struct elsa_hw {
 543         struct pci_dev *dev;
 544         unsigned long base;
 545         unsigned int cfg;
 546         unsigned int ctrl;
 547         unsigned int ale;
 548         unsigned int isac;
 549         unsigned int itac;
 550         unsigned int hscx;
 551         unsigned int trig;
 552         unsigned int timer;
 553         unsigned int counter;
 554         unsigned int status;
 555         struct timer_list tl;
 556         unsigned int MFlag;
 557         struct BCState *bcs;
 558         u_char *transbuf;
 559         u_char *rcvbuf;
 560         unsigned int transp;
 561         unsigned int rcvp;
 562         unsigned int transcnt;
 563         unsigned int rcvcnt;
 564         u_char IER;
 565         u_char FCR;
 566         u_char LCR;
 567         u_char MCR;
 568         u_char ctrl_reg;
 569 };
 570
 571 struct teles3_hw {
 572         unsigned int cfg_reg;
 573         signed   int isac;
 574         signed   int hscx[2];
 575         signed   int isacfifo;
 576         signed   int hscxfifo[2];
 577 };
 578
 579 struct teles0_hw {
 580         unsigned int cfg_reg;
 581         void __iomem *membase;
 582         unsigned long phymem;
 583 };
 584
 585 struct avm_hw {
 586         unsigned int cfg_reg;
 587         unsigned int isac;
 588         unsigned int hscx[2];
 589         unsigned int isacfifo;
 590         unsigned int hscxfifo[2];
 591         unsigned int counter;
 592         struct pci_dev *dev;
 593 };
 594
 595 struct ix1_hw {
 596         unsigned int cfg_reg;
 597         unsigned int isac_ale;
 598         unsigned int isac;
 599         unsigned int hscx_ale;
 600         unsigned int hscx;
 601 };
 602
 603 struct diva_hw {
 604         unsigned long cfg_reg;
 605         unsigned long pci_cfg;
 606         unsigned int ctrl;
 607         unsigned long isac_adr;
 608         unsigned int isac;
 609         unsigned long hscx_adr;
 610         unsigned int hscx;
 611         unsigned int status;
 612         struct timer_list tl;
 613         u_char ctrl_reg;
 614         struct pci_dev *dev;
 615 };
 616
 617 struct asus_hw {
 618         unsigned int cfg_reg;
 619         unsigned int adr;
 620         unsigned int isac;
 621         unsigned int hscx;
 622         unsigned int u7;
 623         unsigned int pots;
 624 };
 625
 626
 627 struct hfc_hw {
 628         unsigned int addr;
 629         unsigned int fifosize;
 630         unsigned char cirm;
 631         unsigned char ctmt;
 632         unsigned char cip;
 633         u_char isac_spcr;
 634         struct timer_list timer;
 635 };
 636
 637 struct sedl_hw {
 638         unsigned int cfg_reg;
 639         unsigned int adr;
 640         unsigned int isac;
 641         unsigned int hscx;
 642         unsigned int reset_on;
 643         unsigned int reset_off;
 644         struct isar_reg isar;
 645         unsigned int chip;
 646         unsigned int bus;
 647         struct pci_dev *dev;
 648 };
 649
 650 struct spt_hw {
 651         unsigned int cfg_reg;
 652         unsigned int isac;
 653         unsigned int hscx[2];
 654         unsigned char res_irq;
 655 };
 656
 657 struct mic_hw {
 658         unsigned int cfg_reg;
 659         unsigned int adr;
 660         unsigned int isac;
 661         unsigned int hscx;
 662 };
 663
 664 struct njet_hw {
 665         unsigned long base;
 666         unsigned int isac;
 667         unsigned int auxa;
 668         unsigned char auxd;
 669         unsigned char dmactrl;
 670         unsigned char ctrl_reg;
 671         unsigned char irqmask0;
 672         unsigned char irqstat0;
 673         unsigned char last_is0;
 674         struct pci_dev *dev;
 675 };
 676
 677 struct hfcPCI_hw {
 678         unsigned char cirm;
 679         unsigned char ctmt;
 680         unsigned char conn;
 681         unsigned char mst_m;
 682         unsigned char int_m1;
 683         unsigned char int_m2;
 684         unsigned char int_s1;
 685         unsigned char sctrl;
 686         unsigned char sctrl_r;
 687         unsigned char sctrl_e;
 688         unsigned char trm;
 689         unsigned char stat;
 690         unsigned char fifo;
 691         unsigned char fifo_en;
 692         unsigned char bswapped;
 693         unsigned char nt_mode;
 694         int nt_timer;
 695         struct pci_dev *dev;
 696         unsigned char *pci_io; /* start of PCI IO memory */
 697         void *share_start; /* shared memory for Fifos start */
 698         void *fifos; /* FIFO memory */
 699         int last_bfifo_cnt[2]; /* marker saving last b-fifo frame count */
 700         struct timer_list timer;
 701 };
 702
 703 struct hfcSX_hw {
 704         unsigned long base;
 705         unsigned char cirm;
 706         unsigned char ctmt;
 707         unsigned char conn;
 708         unsigned char mst_m;
 709         unsigned char int_m1;
 710         unsigned char int_m2;
 711         unsigned char int_s1;
 712         unsigned char sctrl;
 713         unsigned char sctrl_r;
 714         unsigned char sctrl_e;
 715         unsigned char trm;
 716         unsigned char stat;
 717         unsigned char fifo;
 718         unsigned char bswapped;
 719         unsigned char nt_mode;
 720         unsigned char chip;
 721         int b_fifo_size;
 722         unsigned char last_fifo;
 723         void *extra;
 724         int nt_timer;
 725         struct timer_list timer;
 726 };
 727
 728 struct hfcD_hw {
 729         unsigned int addr;
 730         unsigned int bfifosize;
 731         unsigned int dfifosize;
 732         unsigned char cirm;
 733         unsigned char ctmt;
 734         unsigned char cip;
 735         unsigned char conn;
 736         unsigned char mst_m;
 737         unsigned char int_m1;
 738         unsigned char int_m2;
 739         unsigned char int_s1;
 740         unsigned char sctrl;
 741         unsigned char stat;
 742         unsigned char fifo;
 743         unsigned char f1;
 744         unsigned char f2;
 745         unsigned int *send;
 746         struct timer_list timer;
 747 };
 748
 749 struct isurf_hw {
 750         unsigned int reset;
 751         unsigned long phymem;
 752         void __iomem *isac;
 753         void __iomem *isar;
 754         struct isar_reg isar_r;
 755 };
 756
 757 struct saphir_hw {
 758         struct pci_dev *dev;
 759         unsigned int cfg_reg;
 760         unsigned int ale;
 761         unsigned int isac;
 762         unsigned int hscx;
 763         struct timer_list timer;
 764 };
 765
 766 struct bkm_hw {
 767         struct pci_dev *dev;
 768         unsigned long base;
 769         /* A4T stuff */
 770         unsigned long isac_adr;
 771         unsigned int isac_ale;
 772         unsigned long jade_adr;
 773         unsigned int jade_ale;
 774         /* Scitel Quadro stuff */
 775         unsigned long plx_adr;
 776         unsigned long data_adr;
 777 };
 778
 779 struct gazel_hw {
 780         struct pci_dev *dev;
 781         unsigned int cfg_reg;
 782         unsigned int pciaddr[2];
 783         signed   int ipac;
 784         signed   int isac;
 785         signed   int hscx[2];
 786         signed   int isacfifo;
 787         signed   int hscxfifo[2];
 788         unsigned char timeslot;
 789         unsigned char iom2;
 790 };
 791
 792 struct w6692_hw {
 793         struct pci_dev *dev;
 794         unsigned int iobase;
 795         struct timer_list timer;
 796 };
 797
 798 #ifdef  CONFIG_HISAX_TESTEMU
 799 struct te_hw {
 800         unsigned char *sfifo;
 801         unsigned char *sfifo_w;
 802         unsigned char *sfifo_r;
 803         unsigned char *sfifo_e;
 804         int sfifo_cnt;
 805         unsigned int stat;
 806         wait_queue_head_t rwaitq;
 807         wait_queue_head_t swaitq;
 808 };
 809 #endif
 810
 811 struct arcofi_msg {
 812         struct arcofi_msg *next;
 813         u_char receive;
 814         u_char len;
 815         u_char msg[10];
 816 };
 817
 818 struct isac_chip {
 819         int ph_state;
 820         u_char *mon_tx;
 821         u_char *mon_rx;
 822         int mon_txp;
 823         int mon_txc;
 824         int mon_rxp;
 825         struct arcofi_msg *arcofi_list;
 826         struct timer_list arcofitimer;
 827         wait_queue_head_t arcofi_wait;
 828         u_char arcofi_bc;
 829         u_char arcofi_state;
 830         u_char mocr;
 831         u_char adf2;
 832 };
 833
 834 struct hfcd_chip {
 835         int ph_state;
 836 };
 837
 838 struct hfcpci_chip {
 839         int ph_state;
 840 };
 841
 842 struct hfcsx_chip {
 843         int ph_state;
 844 };
 845
 846 struct w6692_chip {
 847         int ph_state;
 848 };
 849
 850 struct amd7930_chip {
 851         u_char lmr1;
 852         u_char ph_state;
 853         u_char old_state;
 854         u_char flg_t3;
 855         unsigned int tx_xmtlen;
 856         struct timer_list timer3;
 857         void (*ph_command) (struct IsdnCardState *, u_char, char *);
 858         void (*setIrqMask) (struct IsdnCardState *, u_char);
 859 };
 860
 861 struct icc_chip {
 862         int ph_state;
 863         u_char *mon_tx;
 864         u_char *mon_rx;
 865         int mon_txp;
 866         int mon_txc;
 867         int mon_rxp;
 868         struct arcofi_msg *arcofi_list;
 869         struct timer_list arcofitimer;
 870         wait_queue_head_t arcofi_wait;
 871         u_char arcofi_bc;
 872         u_char arcofi_state;
 873         u_char mocr;
 874         u_char adf2;
 875 };
 876
 877 #define HW_IOM1                 0
 878 #define HW_IPAC                 1
 879 #define HW_ISAR                 2
 880 #define HW_ARCOFI               3
 881 #define FLG_TWO_DCHAN           4
 882 #define FLG_L1_DBUSY            5
 883 #define FLG_DBUSY_TIMER         6
 884 #define FLG_LOCK_ATOMIC         7
 885 #define FLG_ARCOFI_TIMER        8
 886 #define FLG_ARCOFI_ERROR        9
 887 #define FLG_HW_L1_UINT          10
 888
 889 struct IsdnCardState {
 890         spinlock_t      lock;
 891         u_char          typ;
 892         u_char          subtyp;
 893         int             protocol;
 894         u_int           irq;
 895         u_long          irq_flags;
 896         u_long          HW_Flags;
 897         int             *busy_flag;
 898         int             chanlimit; /* limited number of B-chans to use */
 899         int             logecho; /* log echo if supported by card */
 900         union {
 901                 struct elsa_hw elsa;
 902                 struct teles0_hw teles0;
 903                 struct teles3_hw teles3;
 904                 struct avm_hw avm;
 905                 struct ix1_hw ix1;
 906                 struct diva_hw diva;
 907                 struct asus_hw asus;
 908                 struct hfc_hw hfc;
 909                 struct sedl_hw sedl;
 910                 struct spt_hw spt;
 911                 struct mic_hw mic;
 912                 struct njet_hw njet;
 913                 struct hfcD_hw hfcD;
 914                 struct hfcPCI_hw hfcpci;
 915                 struct hfcSX_hw hfcsx;
 916                 struct ix1_hw niccy;
 917                 struct isurf_hw isurf;
 918                 struct saphir_hw saphir;
 919 #ifdef CONFIG_HISAX_TESTEMU
 920                 struct te_hw te;
 921 #endif
 922                 struct bkm_hw ax;
 923                 struct gazel_hw gazel;
 924                 struct w6692_hw w6692;
 925                 struct hisax_d_if *hisax_d_if;
 926         } hw;
 927         int             myid;
 928         isdn_if         iif;
 929         spinlock_t      statlock;
 930         u_char          *status_buf;
 931         u_char          *status_read;
 932         u_char          *status_write;
 933         u_char          *status_end;
 934         u_char          (*readisac) (struct IsdnCardState *, u_char);
 935         void            (*writeisac) (struct IsdnCardState *, u_char, u_char);
 936         void            (*readisacfifo) (struct IsdnCardState *, u_char *, int);
 937         void            (*writeisacfifo) (struct IsdnCardState *, u_char *, int);
 938         u_char          (*BC_Read_Reg) (struct IsdnCardState *, int, u_char);
 939         void            (*BC_Write_Reg) (struct IsdnCardState *, int, u_char, u_char);
 940         void            (*BC_Send_Data) (struct BCState *);
 941         int             (*cardmsg) (struct IsdnCardState *, int, void *);
 942         void            (*setstack_d) (struct PStack *, struct IsdnCardState *);
 943         void            (*DC_Close) (struct IsdnCardState *);
 944         int             (*irq_func) (int, void *);
 945         int             (*auxcmd) (struct IsdnCardState *, isdn_ctrl *);
 946         struct Channel  channel[2+MAX_WAITING_CALLS];
 947         struct BCState  bcs[2+MAX_WAITING_CALLS];
 948         struct PStack   *stlist;
 949         struct sk_buff_head rq, sq; /* D-channel queues */
 950         int             cardnr;
 951         char            *dlog;
 952         int             debug;
 953         union {
 954                 struct isac_chip isac;
 955                 struct hfcd_chip hfcd;
 956                 struct hfcpci_chip hfcpci;
 957                 struct hfcsx_chip hfcsx;
 958                 struct w6692_chip w6692;
 959                 struct amd7930_chip amd7930;
 960                 struct icc_chip icc;
 961         } dc;
 962         u_char          *rcvbuf;
 963         int             rcvidx;
 964         struct sk_buff  *tx_skb;
 965         int             tx_cnt;
 966         u_long          event;
 967         struct work_struct tqueue;
 968         struct timer_list dbusytimer;
 969 #ifdef ERROR_STATISTIC
 970         int             err_crc;
 971         int             err_tx;
 972         int             err_rx;
 973 #endif
 974 };
 975
 976
 977 #define  schedule_event(s, ev)  do {test_and_set_bit(ev, &s->event);schedule_work(&s->tqueue); } while(0)
 978
 979 #define  MON0_RX        1
 980 #define  MON1_RX        2
 981 #define  MON0_TX        4
 982 #define  MON1_TX        8
 983
 984
 985 #ifdef ISDN_CHIP_ISAC
 986 #undef ISDN_CHIP_ISAC
 987 #endif
 988
 989 #ifdef  CONFIG_HISAX_16_0
 990 #define  CARD_TELES0 1
 991 #ifndef ISDN_CHIP_ISAC
 992 #define ISDN_CHIP_ISAC 1
 993 #endif
 994 #else
 995 #define  CARD_TELES0  0
 996 #endif
 997
 998 #ifdef  CONFIG_HISAX_16_3
 999 #define  CARD_TELES3 1
1000 #ifndef ISDN_CHIP_ISAC
1001 #define ISDN_CHIP_ISAC 1
1002 #endif
1003 #else
1004 #define  CARD_TELES3  0
1005 #endif
1006
1007 #ifdef  CONFIG_HISAX_TELESPCI
1008 #define  CARD_TELESPCI 1
1009 #ifndef ISDN_CHIP_ISAC
1010 #define ISDN_CHIP_ISAC 1
1011 #endif
1012 #else
1013 #define  CARD_TELESPCI  0
1014 #endif
1015
1016 #ifdef  CONFIG_HISAX_AVM_A1
1017 #define  CARD_AVM_A1 1
1018 #ifndef ISDN_CHIP_ISAC
1019 #define ISDN_CHIP_ISAC 1
1020 #endif
1021 #else
1022 #define  CARD_AVM_A1  0
1023 #endif
1024
1025 #ifdef  CONFIG_HISAX_AVM_A1_PCMCIA
1026 #define  CARD_AVM_A1_PCMCIA 1
1027 #ifndef ISDN_CHIP_ISAC
1028 #define ISDN_CHIP_ISAC 1
1029 #endif
1030 #else
1031 #define  CARD_AVM_A1_PCMCIA  0
1032 #endif
1033
1034 #ifdef  CONFIG_HISAX_FRITZPCI
1035 #define  CARD_FRITZPCI 1
1036 #ifndef ISDN_CHIP_ISAC
1037 #define ISDN_CHIP_ISAC 1
1038 #endif
1039 #else
1040 #define  CARD_FRITZPCI  0
1041 #endif
1042
1043 #ifdef  CONFIG_HISAX_ELSA
1044 #define  CARD_ELSA 1
1045 #ifndef ISDN_CHIP_ISAC
1046 #define ISDN_CHIP_ISAC 1
1047 #endif
1048 #else
1049 #define  CARD_ELSA  0
1050 #endif
1051
1052 #ifdef  CONFIG_HISAX_IX1MICROR2
1053 #define CARD_IX1MICROR2 1
1054 #ifndef ISDN_CHIP_ISAC
1055 #define ISDN_CHIP_ISAC 1
1056 #endif
1057 #else
1058 #define CARD_IX1MICROR2 0
1059 #endif
1060
1061 #ifdef  CONFIG_HISAX_DIEHLDIVA
1062 #define CARD_DIEHLDIVA 1
1063 #ifndef ISDN_CHIP_ISAC
1064 #define ISDN_CHIP_ISAC 1
1065 #endif
1066 #else
1067 #define CARD_DIEHLDIVA 0
1068 #endif
1069
1070 #ifdef  CONFIG_HISAX_ASUSCOM
1071 #define CARD_ASUSCOM 1
1072 #ifndef ISDN_CHIP_ISAC
1073 #define ISDN_CHIP_ISAC 1
1074 #endif
1075 #else
1076 #define CARD_ASUSCOM 0
1077 #endif
1078
1079 #ifdef  CONFIG_HISAX_TELEINT
1080 #define CARD_TELEINT 1
1081 #ifndef ISDN_CHIP_ISAC
1082 #define ISDN_CHIP_ISAC 1
1083 #endif
1084 #else
1085 #define CARD_TELEINT 0
1086 #endif
1087
1088 #ifdef  CONFIG_HISAX_SEDLBAUER
1089 #define CARD_SEDLBAUER 1
1090 #ifndef ISDN_CHIP_ISAC
1091 #define ISDN_CHIP_ISAC 1
1092 #endif
1093 #else
1094 #define CARD_SEDLBAUER 0
1095 #endif
1096
1097 #ifdef  CONFIG_HISAX_SPORTSTER
1098 #define CARD_SPORTSTER 1
1099 #ifndef ISDN_CHIP_ISAC
1100 #define ISDN_CHIP_ISAC 1
1101 #endif
1102 #else
1103 #define CARD_SPORTSTER 0
1104 #endif
1105
1106 #ifdef  CONFIG_HISAX_MIC
1107 #define CARD_MIC 1
1108 #ifndef ISDN_CHIP_ISAC
1109 #define ISDN_CHIP_ISAC 1
1110 #endif
1111 #else
1112 #define CARD_MIC 0
1113 #endif
1114
1115 #ifdef  CONFIG_HISAX_NETJET
1116 #define CARD_NETJET_S 1
1117 #ifndef ISDN_CHIP_ISAC
1118 #define ISDN_CHIP_ISAC 1
1119 #endif
1120 #else
1121 #define CARD_NETJET_S 0
1122 #endif
1123
1124 #ifdef  CONFIG_HISAX_HFCS
1125 #define  CARD_HFCS 1
1126 #else
1127 #define  CARD_HFCS 0
1128 #endif
1129
1130 #ifdef  CONFIG_HISAX_HFC_PCI
1131 #define  CARD_HFC_PCI 1
1132 #else
1133 #define  CARD_HFC_PCI 0
1134 #endif
1135
1136 #ifdef  CONFIG_HISAX_HFC_SX
1137 #define  CARD_HFC_SX 1
1138 #else
1139 #define  CARD_HFC_SX 0
1140 #endif
1141
1142 #ifdef  CONFIG_HISAX_AMD7930
1143 #define CARD_AMD7930 1
1144 #else
1145 #define CARD_AMD7930 0
1146 #endif
1147
1148 #ifdef  CONFIG_HISAX_NICCY
1149 #define CARD_NICCY 1
1150 #ifndef ISDN_CHIP_ISAC
1151 #define ISDN_CHIP_ISAC 1
1152 #endif
1153 #else
1154 #define CARD_NICCY 0
1155 #endif
1156
1157 #ifdef  CONFIG_HISAX_ISURF
1158 #define CARD_ISURF 1
1159 #ifndef ISDN_CHIP_ISAC
1160 #define ISDN_CHIP_ISAC 1
1161 #endif
1162 #else
1163 #define CARD_ISURF 0
1164 #endif
1165
1166 #ifdef  CONFIG_HISAX_S0BOX
1167 #define CARD_S0BOX 1
1168 #ifndef ISDN_CHIP_ISAC
1169 #define ISDN_CHIP_ISAC 1
1170 #endif
1171 #else
1172 #define CARD_S0BOX 0
1173 #endif
1174
1175 #ifdef  CONFIG_HISAX_HSTSAPHIR
1176 #define CARD_HSTSAPHIR 1
1177 #ifndef ISDN_CHIP_ISAC
1178 #define ISDN_CHIP_ISAC 1
1179 #endif
1180 #else
1181 #define CARD_HSTSAPHIR 0
1182 #endif
1183
1184 #ifdef  CONFIG_HISAX_TESTEMU
1185 #define CARD_TESTEMU 1
1186 #define ISDN_CTYPE_TESTEMU 99
1187 #undef ISDN_CTYPE_COUNT
1188 #define  ISDN_CTYPE_COUNT ISDN_CTYPE_TESTEMU
1189 #else
1190 #define CARD_TESTEMU 0
1191 #endif
1192
1193 #ifdef  CONFIG_HISAX_BKM_A4T
1194 #define CARD_BKM_A4T 1
1195 #ifndef ISDN_CHIP_ISAC
1196 #define ISDN_CHIP_ISAC 1
1197 #endif
1198 #else
1199 #define CARD_BKM_A4T 0
1200 #endif
1201
1202 #ifdef  CONFIG_HISAX_SCT_QUADRO
1203 #define CARD_SCT_QUADRO 1
1204 #ifndef ISDN_CHIP_ISAC
1205 #define ISDN_CHIP_ISAC 1
1206 #endif
1207 #else
1208 #define CARD_SCT_QUADRO 0
1209 #endif
1210
1211 #ifdef  CONFIG_HISAX_GAZEL
1212 #define  CARD_GAZEL 1
1213 #ifndef ISDN_CHIP_ISAC
1214 #define ISDN_CHIP_ISAC 1
1215 #endif
1216 #else
1217 #define  CARD_GAZEL  0
1218 #endif
1219
1220 #ifdef  CONFIG_HISAX_W6692
1221 #define CARD_W6692      1
1222 #ifndef ISDN_CHIP_W6692
1223 #define ISDN_CHIP_W6692 1
1224 #endif
1225 #else
1226 #define CARD_W6692      0
1227 #endif
1228
1229 #ifdef  CONFIG_HISAX_NETJET_U
1230 #define CARD_NETJET_U 1
1231 #ifndef ISDN_CHIP_ICC
1232 #define ISDN_CHIP_ICC 1
1233 #endif
1234 #ifndef HISAX_UINTERFACE
1235 #define HISAX_UINTERFACE 1
1236 #endif
1237 #else
1238 #define CARD_NETJET_U 0
1239 #endif
1240
1241 #ifdef CONFIG_HISAX_ENTERNOW_PCI
1242 #define CARD_FN_ENTERNOW_PCI 1
1243 #else
1244 #define CARD_FN_ENTERNOW_PCI 0
1245 #endif
1246
1247 #define TEI_PER_CARD 1
1248
1249 /* L1 Debug */
1250 #define L1_DEB_WARN             0x01
1251 #define L1_DEB_INTSTAT          0x02
1252 #define L1_DEB_ISAC             0x04
1253 #define L1_DEB_ISAC_FIFO        0x08
1254 #define L1_DEB_HSCX             0x10
1255 #define L1_DEB_HSCX_FIFO        0x20
1256 #define L1_DEB_LAPD             0x40
1257 #define L1_DEB_IPAC             0x80
1258 #define L1_DEB_RECEIVE_FRAME    0x100
1259 #define L1_DEB_MONITOR          0x200
1260 #define DEB_DLOG_HEX            0x400
1261 #define DEB_DLOG_VERBOSE        0x800
1262
1263 #define L2FRAME_DEBUG
1264
1265 #ifdef L2FRAME_DEBUG
1266 extern void Logl2Frame(struct IsdnCardState *cs, struct sk_buff *skb, char *buf, int dir);
1267 #endif
1268
1269 #include "hisax_cfg.h"
1270
1271 void init_bcstate(struct IsdnCardState *cs, int bc);
1272
1273 void setstack_HiSax(struct PStack *st, struct IsdnCardState *cs);
1274 void HiSax_addlist(struct IsdnCardState *sp, struct PStack *st);
1275 void HiSax_rmlist(struct IsdnCardState *sp, struct PStack *st);
1276
1277 void setstack_l1_B(struct PStack *st);
1278
1279 void setstack_tei(struct PStack *st);
1280 void setstack_manager(struct PStack *st);
1281
1282 void setstack_isdnl2(struct PStack *st, char *debug_id);
1283 void releasestack_isdnl2(struct PStack *st);
1284 void setstack_transl2(struct PStack *st);
1285 void releasestack_transl2(struct PStack *st);
1286 void lli_writewakeup(struct PStack *st, int len);
1287
1288 void setstack_l3dc(struct PStack *st, struct Channel *chanp);
1289 void setstack_l3bc(struct PStack *st, struct Channel *chanp);
1290 void releasestack_isdnl3(struct PStack *st);
1291
1292 u_char *findie(u_char * p, int size, u_char ie, int wanted_set);
1293 int getcallref(u_char * p);
1294 int newcallref(void);
1295
1296 int FsmNew(struct Fsm *fsm, struct FsmNode *fnlist, int fncount);
1297 void FsmFree(struct Fsm *fsm);
1298 int FsmEvent(struct FsmInst *fi, int event, void *arg);
1299 void FsmChangeState(struct FsmInst *fi, int newstate);
1300 void FsmInitTimer(struct FsmInst *fi, struct FsmTimer *ft);
1301 int FsmAddTimer(struct FsmTimer *ft, int millisec, int event,
1302         void *arg, int where);
1303 void FsmRestartTimer(struct FsmTimer *ft, int millisec, int event,
1304         void *arg, int where);
1305 void FsmDelTimer(struct FsmTimer *ft, int where);
1306 int jiftime(char *s, long mark);
1307
1308 int HiSax_command(isdn_ctrl * ic);
1309 int HiSax_writebuf_skb(int id, int chan, int ack, struct sk_buff *skb);
1310 void HiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, ...);
1311 void VHiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, va_list args);
1312 void HiSax_reportcard(int cardnr, int sel);
1313 int QuickHex(char *txt, u_char * p, int cnt);
1314 void LogFrame(struct IsdnCardState *cs, u_char * p, int size);
1315 void dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir);
1316 void iecpy(u_char * dest, u_char * iestart, int ieoffset);
1317 #endif  /* __KERNEL__ */
1318
1319 /*
1320  * Busywait delay for `jiffs' jiffies
1321  */
1322 #define HZDELAY(jiffs) do {                                     \
1323                 int tout = jiffs;                               \
1324                                                                 \
1325                 while (tout--) {                                \
1326                         int loops = USEC_PER_SEC / HZ;          \
1327                         while (loops--)                         \
1328                                 udelay(1);                      \
1329                 }                                               \
1330         } while (0)
1331
1332 int ll_run(struct IsdnCardState *cs, int addfeatures);
1333 int CallcNew(void);
1334 void CallcFree(void);
1335 int CallcNewChan(struct IsdnCardState *cs);
1336 void CallcFreeChan(struct IsdnCardState *cs);
1337 int Isdnl1New(void);
1338 void Isdnl1Free(void);
1339 int Isdnl2New(void);
1340 void Isdnl2Free(void);
1341 int Isdnl3New(void);
1342 void Isdnl3Free(void);
1343 void init_tei(struct IsdnCardState *cs, int protocol);
1344 void release_tei(struct IsdnCardState *cs);
1345 char *HiSax_getrev(const char *revision);
1346 int TeiNew(void);
1347 void TeiFree(void);