2 * madgemc.c: Driver for the Madge Smart 16/4 MC16 MCA token ring card.
4 * Written 2000 by Adam Fritzler
6 * This software may be used and distributed according to the terms
7 * of the GNU General Public License, incorporated herein by reference.
9 * This driver module supports the following cards:
10 * - Madge Smart 16/4 Ringnode MC16
11 * - Madge Smart 16/4 Ringnode MC32 (??)
14 * AF Adam Fritzler mid@auk.cx
16 * Modification History:
17 * 16-Jan-00 AF Created
20 static const char version
[] = "madgemc.c: v0.91 23/01/2000 by Adam Fritzler\n";
22 #include <linux/module.h>
23 #include <linux/mca.h>
24 #include <linux/kernel.h>
25 #include <linux/errno.h>
26 #include <linux/pci.h>
27 #include <linux/init.h>
28 #include <linux/netdevice.h>
29 #include <linux/trdevice.h>
31 #include <asm/system.h>
36 #include "madgemc.h" /* Madge-specific constants */
38 #define MADGEMC_IO_EXTENT 32
39 #define MADGEMC_SIF_OFFSET 0x08
43 * These are read from the BIA ROM.
46 unsigned int cardtype
;
51 * These are read from the MCA POS registers.
53 unsigned int burstmode
:2;
54 unsigned int fairness
:1; /* 0 = Fair, 1 = Unfair */
55 unsigned int arblevel
:4;
56 unsigned int ringspeed
:2; /* 0 = 4mb, 1 = 16, 2 = Auto/none */
57 unsigned int cabletype
:1; /* 0 = RJ45, 1 = DB9 */
60 static int madgemc_open(struct net_device
*dev
);
61 static int madgemc_close(struct net_device
*dev
);
62 static int madgemc_chipset_init(struct net_device
*dev
);
63 static void madgemc_read_rom(struct net_device
*dev
, struct card_info
*card
);
64 static unsigned short madgemc_setnselout_pins(struct net_device
*dev
);
65 static void madgemc_setcabletype(struct net_device
*dev
, int type
);
67 static int madgemc_mcaproc(char *buf
, int slot
, void *d
);
69 static void madgemc_setregpage(struct net_device
*dev
, int page
);
70 static void madgemc_setsifsel(struct net_device
*dev
, int val
);
71 static void madgemc_setint(struct net_device
*dev
, int val
);
73 static irqreturn_t
madgemc_interrupt(int irq
, void *dev_id
);
76 * These work around paging, however they don't guarentee you're on the
79 #define SIFREADB(reg) (inb(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
80 #define SIFWRITEB(val, reg) (outb(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
81 #define SIFREADW(reg) (inw(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
82 #define SIFWRITEW(val, reg) (outw(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
85 * Read a byte-length value from the register.
87 static unsigned short madgemc_sifreadb(struct net_device
*dev
, unsigned short reg
)
93 madgemc_setregpage(dev
, 1);
95 madgemc_setregpage(dev
, 0);
101 * Write a byte-length value to a register.
103 static void madgemc_sifwriteb(struct net_device
*dev
, unsigned short val
, unsigned short reg
)
108 madgemc_setregpage(dev
, 1);
110 madgemc_setregpage(dev
, 0);
116 * Read a word-length value from a register
118 static unsigned short madgemc_sifreadw(struct net_device
*dev
, unsigned short reg
)
124 madgemc_setregpage(dev
, 1);
126 madgemc_setregpage(dev
, 0);
132 * Write a word-length value to a register.
134 static void madgemc_sifwritew(struct net_device
*dev
, unsigned short val
, unsigned short reg
)
139 madgemc_setregpage(dev
, 1);
141 madgemc_setregpage(dev
, 0);
148 static int __devinit
madgemc_probe(struct device
*device
)
150 static int versionprinted
;
151 struct net_device
*dev
;
152 struct net_local
*tp
;
153 struct card_info
*card
;
154 struct mca_device
*mdev
= to_mca_device(device
);
157 if (versionprinted
++ == 0)
158 printk("%s", version
);
160 if(mca_device_claimed(mdev
))
162 mca_device_set_claim(mdev
, 1);
164 dev
= alloc_trdev(sizeof(struct net_local
));
166 printk("madgemc: unable to allocate dev space\n");
167 mca_device_set_claim(mdev
, 0);
172 SET_MODULE_OWNER(dev
);
175 card
= kmalloc(sizeof(struct card_info
), GFP_KERNEL
);
177 printk("madgemc: unable to allocate card struct\n");
183 * Parse configuration information. This all comes
184 * directly from the publicly available @002d.ADF.
185 * Get it from Madge or your local ADF library.
191 dev
->base_addr
= 0x0a20 +
192 ((mdev
->pos
[2] & MC16_POS2_ADDR2
)?0x0400:0) +
193 ((mdev
->pos
[0] & MC16_POS0_ADDR1
)?0x1000:0) +
194 ((mdev
->pos
[3] & MC16_POS3_ADDR3
)?0x2000:0);
199 switch(mdev
->pos
[0] >> 6) { /* upper two bits */
200 case 0x1: dev
->irq
= 3; break;
201 case 0x2: dev
->irq
= 9; break; /* IRQ 2 = IRQ 9 */
202 case 0x3: dev
->irq
= 10; break;
203 default: dev
->irq
= 0; break;
207 printk("%s: invalid IRQ\n", dev
->name
);
212 if (!request_region(dev
->base_addr
, MADGEMC_IO_EXTENT
,
214 printk(KERN_INFO
"madgemc: unable to setup Smart MC in slot %d because of I/O base conflict at 0x%04lx\n", mdev
->slot
, dev
->base_addr
);
215 dev
->base_addr
+= MADGEMC_SIF_OFFSET
;
219 dev
->base_addr
+= MADGEMC_SIF_OFFSET
;
224 card
->arblevel
= ((mdev
->pos
[0] >> 1) & 0x7) + 8;
227 * Burst mode and Fairness
229 card
->burstmode
= ((mdev
->pos
[2] >> 6) & 0x3);
230 card
->fairness
= ((mdev
->pos
[2] >> 4) & 0x1);
235 if ((mdev
->pos
[1] >> 2)&0x1)
236 card
->ringspeed
= 2; /* not selected */
237 else if ((mdev
->pos
[2] >> 5) & 0x1)
238 card
->ringspeed
= 1; /* 16Mb */
240 card
->ringspeed
= 0; /* 4Mb */
245 if ((mdev
->pos
[1] >> 6)&0x1)
246 card
->cabletype
= 1; /* STP/DB9 */
248 card
->cabletype
= 0; /* UTP/RJ-45 */
252 * ROM Info. This requires us to actually twiddle
253 * bits on the card, so we must ensure above that
254 * the base address is free of conflict (request_region above).
256 madgemc_read_rom(dev
, card
);
258 if (card
->manid
!= 0x4d) { /* something went wrong */
259 printk(KERN_INFO
"%s: Madge MC ROM read failed (unknown manufacturer ID %02x)\n", dev
->name
, card
->manid
);
263 if ((card
->cardtype
!= 0x08) && (card
->cardtype
!= 0x0d)) {
264 printk(KERN_INFO
"%s: Madge MC ROM read failed (unknown card ID %02x)\n", dev
->name
, card
->cardtype
);
269 /* All cards except Rev 0 and 1 MC16's have 256kb of RAM */
270 if ((card
->cardtype
== 0x08) && (card
->cardrev
<= 0x01))
275 printk("%s: %s Rev %d at 0x%04lx IRQ %d\n",
277 (card
->cardtype
== 0x08)?MADGEMC16_CARDNAME
:
278 MADGEMC32_CARDNAME
, card
->cardrev
,
279 dev
->base_addr
, dev
->irq
);
281 if (card
->cardtype
== 0x0d)
282 printk("%s: Warning: MC32 support is experimental and highly untested\n", dev
->name
);
284 if (card
->ringspeed
==2) { /* Unknown */
285 printk("%s: Warning: Ring speed not set in POS -- Please run the reference disk and set it!\n", dev
->name
);
286 card
->ringspeed
= 1; /* default to 16mb */
289 printk("%s: RAM Size: %dKB\n", dev
->name
, card
->ramsize
);
291 printk("%s: Ring Speed: %dMb/sec on %s\n", dev
->name
,
292 (card
->ringspeed
)?16:4,
293 card
->cabletype
?"STP/DB9":"UTP/RJ-45");
294 printk("%s: Arbitration Level: %d\n", dev
->name
,
297 printk("%s: Burst Mode: ", dev
->name
);
298 switch(card
->burstmode
) {
299 case 0: printk("Cycle steal"); break;
300 case 1: printk("Limited burst"); break;
301 case 2: printk("Delayed release"); break;
302 case 3: printk("Immediate release"); break;
304 printk(" (%s)\n", (card
->fairness
)?"Unfair":"Fair");
308 * Enable SIF before we assign the interrupt handler,
309 * just in case we get spurious interrupts that need
312 outb(0, dev
->base_addr
+ MC_CONTROL_REG0
); /* sanity */
313 madgemc_setsifsel(dev
, 1);
314 if (request_irq(dev
->irq
, madgemc_interrupt
, IRQF_SHARED
,
320 madgemc_chipset_init(dev
); /* enables interrupts! */
321 madgemc_setcabletype(dev
, card
->cabletype
);
323 /* Setup MCA structures */
324 mca_device_set_name(mdev
, (card
->cardtype
== 0x08)?MADGEMC16_CARDNAME
:MADGEMC32_CARDNAME
);
325 mca_set_adapter_procfn(mdev
->slot
, madgemc_mcaproc
, dev
);
327 printk("%s: Ring Station Address: ", dev
->name
);
328 printk("%2.2x", dev
->dev_addr
[0]);
329 for (i
= 1; i
< 6; i
++)
330 printk(":%2.2x", dev
->dev_addr
[i
]);
333 if (tmsdev_init(dev
, device
)) {
334 printk("%s: unable to get memory for dev->priv.\n",
339 tp
= netdev_priv(dev
);
342 * The MC16 is physically a 32bit card. However, Madge
343 * insists on calling it 16bit, so I'll assume here that
344 * they know what they're talking about. Cut off DMA
347 tp
->setnselout
= madgemc_setnselout_pins
;
348 tp
->sifwriteb
= madgemc_sifwriteb
;
349 tp
->sifreadb
= madgemc_sifreadb
;
350 tp
->sifwritew
= madgemc_sifwritew
;
351 tp
->sifreadw
= madgemc_sifreadw
;
352 tp
->DataRate
= (card
->ringspeed
)?SPEED_16
:SPEED_4
;
354 memcpy(tp
->ProductID
, "Madge MCA 16/4 ", PROD_ID_SIZE
+ 1);
356 dev
->open
= madgemc_open
;
357 dev
->stop
= madgemc_close
;
360 dev_set_drvdata(device
, dev
);
362 if (register_netdev(dev
) == 0)
365 dev_set_drvdata(device
, NULL
);
368 free_irq(dev
->irq
, dev
);
370 release_region(dev
->base_addr
-MADGEMC_SIF_OFFSET
,
377 mca_device_set_claim(mdev
, 0);
382 * Handle interrupts generated by the card
384 * The MicroChannel Madge cards need slightly more handling
385 * after an interrupt than other TMS380 cards do.
387 * First we must make sure it was this card that generated the
388 * interrupt (since interrupt sharing is allowed). Then,
389 * because we're using level-triggered interrupts (as is
390 * standard on MCA), we must toggle the interrupt line
391 * on the card in order to claim and acknowledge the interrupt.
392 * Once that is done, the interrupt should be handlable in
393 * the normal tms380tr_interrupt() routine.
395 * There's two ways we can check to see if the interrupt is ours,
396 * both with their own disadvantages...
398 * 1) Read in the SIFSTS register from the TMS controller. This
399 * is guarenteed to be accurate, however, there's a fairly
400 * large performance penalty for doing so: the Madge chips
401 * must request the register from the Eagle, the Eagle must
402 * read them from its internal bus, and then take the route
403 * back out again, for a 16bit read.
405 * 2) Use the MC_CONTROL_REG0_SINTR bit from the Madge ASICs.
406 * The major disadvantage here is that the accuracy of the
407 * bit is in question. However, it cuts out the extra read
408 * cycles it takes to read the Eagle's SIF, as its only an
409 * 8bit read, and theoretically the Madge bit is directly
410 * connected to the interrupt latch coming out of the Eagle
411 * hardware (that statement is not verified).
413 * I can't determine which of these methods has the best win. For now,
414 * we make a compromise. Use the Madge way for the first interrupt,
415 * which should be the fast-path, and then once we hit the first
416 * interrupt, keep on trying using the SIF method until we've
417 * exhausted all contiguous interrupts.
420 static irqreturn_t
madgemc_interrupt(int irq
, void *dev_id
)
423 struct net_device
*dev
;
426 printk("madgemc_interrupt: was not passed a dev_id!\n");
430 dev
= (struct net_device
*)dev_id
;
432 /* Make sure its really us. -- the Madge way */
433 pending
= inb(dev
->base_addr
+ MC_CONTROL_REG0
);
434 if (!(pending
& MC_CONTROL_REG0_SINTR
))
435 return IRQ_NONE
; /* not our interrupt */
438 * Since we're level-triggered, we may miss the rising edge
439 * of the next interrupt while we're off handling this one,
440 * so keep checking until the SIF verifies that it has nothing
443 pending
= STS_SYSTEM_IRQ
;
445 if (pending
& STS_SYSTEM_IRQ
) {
447 /* Toggle the interrupt to reset the latch on card */
448 reg1
= inb(dev
->base_addr
+ MC_CONTROL_REG1
);
449 outb(reg1
^ MC_CONTROL_REG1_SINTEN
,
450 dev
->base_addr
+ MC_CONTROL_REG1
);
451 outb(reg1
, dev
->base_addr
+ MC_CONTROL_REG1
);
453 /* Continue handling as normal */
454 tms380tr_interrupt(irq
, dev_id
);
456 pending
= SIFREADW(SIFSTS
); /* restart - the SIF way */
462 return IRQ_HANDLED
; /* not reachable */
466 * Set the card to the prefered ring speed.
468 * Unlike newer cards, the MC16/32 have their speed selection
469 * circuit connected to the Madge ASICs and not to the TMS380
470 * NSELOUT pins. Set the ASIC bits correctly here, and return
471 * zero to leave the TMS NSELOUT bits unaffected.
474 unsigned short madgemc_setnselout_pins(struct net_device
*dev
)
477 struct net_local
*tp
= netdev_priv(dev
);
479 reg1
= inb(dev
->base_addr
+ MC_CONTROL_REG1
);
481 if(tp
->DataRate
== SPEED_16
)
482 reg1
|= MC_CONTROL_REG1_SPEED_SEL
; /* add for 16mb */
483 else if (reg1
& MC_CONTROL_REG1_SPEED_SEL
)
484 reg1
^= MC_CONTROL_REG1_SPEED_SEL
; /* remove for 4mb */
485 outb(reg1
, dev
->base_addr
+ MC_CONTROL_REG1
);
487 return 0; /* no change */
491 * Set the register page. This equates to the SRSX line
494 * Register selection is normally done via three contiguous
495 * bits. However, some boards (such as the MC16/32) use only
496 * two bits, plus a separate bit in the glue chip. This
497 * sets the SRSX bit (the top bit). See page 4-17 in the
498 * Yellow Book for which registers are affected.
501 static void madgemc_setregpage(struct net_device
*dev
, int page
)
505 reg1
= inb(dev
->base_addr
+ MC_CONTROL_REG1
);
506 if ((page
== 0) && (reg1
& MC_CONTROL_REG1_SRSX
)) {
507 outb(reg1
^ MC_CONTROL_REG1_SRSX
,
508 dev
->base_addr
+ MC_CONTROL_REG1
);
510 else if (page
== 1) {
511 outb(reg1
| MC_CONTROL_REG1_SRSX
,
512 dev
->base_addr
+ MC_CONTROL_REG1
);
514 reg1
= inb(dev
->base_addr
+ MC_CONTROL_REG1
);
520 * The SIF registers are not mapped into register space by default
521 * Set this to 1 to map them, 0 to map the BIA ROM.
524 static void madgemc_setsifsel(struct net_device
*dev
, int val
)
528 reg0
= inb(dev
->base_addr
+ MC_CONTROL_REG0
);
529 if ((val
== 0) && (reg0
& MC_CONTROL_REG0_SIFSEL
)) {
530 outb(reg0
^ MC_CONTROL_REG0_SIFSEL
,
531 dev
->base_addr
+ MC_CONTROL_REG0
);
532 } else if (val
== 1) {
533 outb(reg0
| MC_CONTROL_REG0_SIFSEL
,
534 dev
->base_addr
+ MC_CONTROL_REG0
);
536 reg0
= inb(dev
->base_addr
+ MC_CONTROL_REG0
);
542 * Enable SIF interrupts
544 * This does not enable interrupts in the SIF, but rather
545 * enables SIF interrupts to be passed onto the host.
548 static void madgemc_setint(struct net_device
*dev
, int val
)
552 reg1
= inb(dev
->base_addr
+ MC_CONTROL_REG1
);
553 if ((val
== 0) && (reg1
& MC_CONTROL_REG1_SINTEN
)) {
554 outb(reg1
^ MC_CONTROL_REG1_SINTEN
,
555 dev
->base_addr
+ MC_CONTROL_REG1
);
556 } else if (val
== 1) {
557 outb(reg1
| MC_CONTROL_REG1_SINTEN
,
558 dev
->base_addr
+ MC_CONTROL_REG1
);
565 * Cable type is set via control register 7. Bit zero high
566 * for UTP, low for STP.
568 static void madgemc_setcabletype(struct net_device
*dev
, int type
)
570 outb((type
==0)?MC_CONTROL_REG7_CABLEUTP
:MC_CONTROL_REG7_CABLESTP
,
571 dev
->base_addr
+ MC_CONTROL_REG7
);
575 * Enable the functions of the Madge chipset needed for
576 * full working order.
578 static int madgemc_chipset_init(struct net_device
*dev
)
580 outb(0, dev
->base_addr
+ MC_CONTROL_REG1
); /* pull SRESET low */
581 tms380tr_wait(100); /* wait for card to reset */
583 /* bring back into normal operating mode */
584 outb(MC_CONTROL_REG1_NSRESET
, dev
->base_addr
+ MC_CONTROL_REG1
);
586 /* map SIF registers */
587 madgemc_setsifsel(dev
, 1);
589 /* enable SIF interrupts */
590 madgemc_setint(dev
, 1);
596 * Disable the board, and put back into power-up state.
598 static void madgemc_chipset_close(struct net_device
*dev
)
600 /* disable interrupts */
601 madgemc_setint(dev
, 0);
602 /* unmap SIF registers */
603 madgemc_setsifsel(dev
, 0);
609 * Read the card type (MC16 or MC32) from the card.
611 * The configuration registers are stored in two separate
612 * pages. Pages are flipped by clearing bit 3 of CONTROL_REG0 (PAGE)
613 * for page zero, or setting bit 3 for page one.
615 * Page zero contains the following data:
616 * Byte 0: Manufacturer ID (0x4D -- ASCII "M")
620 * Byte 2: Card revision
621 * Byte 3: Mirror of POS config register 0
622 * Byte 4: Mirror of POS 1
623 * Byte 5: Mirror of POS 2
625 * Page one contains the following data:
627 * Byte 1-6: BIA, MSB to LSB.
629 * Note that to read the BIA, we must unmap the SIF registers
630 * by clearing bit 2 of CONTROL_REG0 (SIFSEL), as the data
631 * will reside in the same logical location. For this reason,
632 * _never_ read the BIA while the Eagle processor is running!
633 * The SIF will be completely inaccessible until the BIA operation
637 static void madgemc_read_rom(struct net_device
*dev
, struct card_info
*card
)
639 unsigned long ioaddr
;
640 unsigned char reg0
, reg1
, tmpreg0
, i
;
642 ioaddr
= dev
->base_addr
;
644 reg0
= inb(ioaddr
+ MC_CONTROL_REG0
);
645 reg1
= inb(ioaddr
+ MC_CONTROL_REG1
);
647 /* Switch to page zero and unmap SIF */
648 tmpreg0
= reg0
& ~(MC_CONTROL_REG0_PAGE
+ MC_CONTROL_REG0_SIFSEL
);
649 outb(tmpreg0
, ioaddr
+ MC_CONTROL_REG0
);
651 card
->manid
= inb(ioaddr
+ MC_ROM_MANUFACTURERID
);
652 card
->cardtype
= inb(ioaddr
+ MC_ROM_ADAPTERID
);
653 card
->cardrev
= inb(ioaddr
+ MC_ROM_REVISION
);
655 /* Switch to rom page one */
656 outb(tmpreg0
| MC_CONTROL_REG0_PAGE
, ioaddr
+ MC_CONTROL_REG0
);
660 for (i
= 0; i
< 6; i
++)
661 dev
->dev_addr
[i
] = inb(ioaddr
+ MC_ROM_BIA_START
+ i
);
663 /* Restore original register values */
664 outb(reg0
, ioaddr
+ MC_CONTROL_REG0
);
665 outb(reg1
, ioaddr
+ MC_CONTROL_REG1
);
670 static int madgemc_open(struct net_device
*dev
)
673 * Go ahead and reinitialize the chipset again, just to
674 * make sure we didn't get left in a bad state.
676 madgemc_chipset_init(dev
);
681 static int madgemc_close(struct net_device
*dev
)
684 madgemc_chipset_close(dev
);
689 * Give some details available from /proc/mca/slotX
691 static int madgemc_mcaproc(char *buf
, int slot
, void *d
)
693 struct net_device
*dev
= (struct net_device
*)d
;
694 struct net_local
*tp
= dev
->priv
;
695 struct card_info
*curcard
= tp
->tmspriv
;
698 len
+= sprintf(buf
+len
, "-------\n");
700 struct net_local
*tp
= netdev_priv(dev
);
703 len
+= sprintf(buf
+len
, "Card Revision: %d\n", curcard
->cardrev
);
704 len
+= sprintf(buf
+len
, "RAM Size: %dkb\n", curcard
->ramsize
);
705 len
+= sprintf(buf
+len
, "Cable type: %s\n", (curcard
->cabletype
)?"STP/DB9":"UTP/RJ-45");
706 len
+= sprintf(buf
+len
, "Configured ring speed: %dMb/sec\n", (curcard
->ringspeed
)?16:4);
707 len
+= sprintf(buf
+len
, "Running ring speed: %dMb/sec\n", (tp
->DataRate
==SPEED_16
)?16:4);
708 len
+= sprintf(buf
+len
, "Device: %s\n", dev
->name
);
709 len
+= sprintf(buf
+len
, "IO Port: 0x%04lx\n", dev
->base_addr
);
710 len
+= sprintf(buf
+len
, "IRQ: %d\n", dev
->irq
);
711 len
+= sprintf(buf
+len
, "Arbitration Level: %d\n", curcard
->arblevel
);
712 len
+= sprintf(buf
+len
, "Burst Mode: ");
713 switch(curcard
->burstmode
) {
714 case 0: len
+= sprintf(buf
+len
, "Cycle steal"); break;
715 case 1: len
+= sprintf(buf
+len
, "Limited burst"); break;
716 case 2: len
+= sprintf(buf
+len
, "Delayed release"); break;
717 case 3: len
+= sprintf(buf
+len
, "Immediate release"); break;
719 len
+= sprintf(buf
+len
, " (%s)\n", (curcard
->fairness
)?"Unfair":"Fair");
721 len
+= sprintf(buf
+len
, "Ring Station Address: ");
722 len
+= sprintf(buf
+len
, "%2.2x", dev
->dev_addr
[0]);
723 for (i
= 1; i
< 6; i
++)
724 len
+= sprintf(buf
+len
, " %2.2x", dev
->dev_addr
[i
]);
725 len
+= sprintf(buf
+len
, "\n");
727 len
+= sprintf(buf
+len
, "Card not configured\n");
732 static int __devexit
madgemc_remove(struct device
*device
)
734 struct net_device
*dev
= dev_get_drvdata(device
);
735 struct net_local
*tp
;
736 struct card_info
*card
;
745 unregister_netdev(dev
);
746 release_region(dev
->base_addr
-MADGEMC_SIF_OFFSET
, MADGEMC_IO_EXTENT
);
747 free_irq(dev
->irq
, dev
);
750 dev_set_drvdata(device
, NULL
);
755 static short madgemc_adapter_ids
[] __initdata
= {
760 static struct mca_driver madgemc_driver
= {
761 .id_table
= madgemc_adapter_ids
,
764 .bus
= &mca_bus_type
,
765 .probe
= madgemc_probe
,
766 .remove
= __devexit_p(madgemc_remove
),
770 static int __init
madgemc_init (void)
772 return mca_register_driver (&madgemc_driver
);
775 static void __exit
madgemc_exit (void)
777 mca_unregister_driver (&madgemc_driver
);
780 module_init(madgemc_init
);
781 module_exit(madgemc_exit
);
783 MODULE_LICENSE("GPL");