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[hh.org.git] / drivers / net / wireless / bcm43xx / bcm43xx_phy.c
blob52ce2a9334fb12eee4fa0d831950b04ea3128178
1 /*
2
3 Broadcom BCM43xx wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
11 Some parts of the code in this file are derived from the ipw2200
12 driver Copyright(c) 2003 - 2004 Intel Corporation.
13
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
18
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
23
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27 Boston, MA 02110-1301, USA.
28
29 */
30
31 #include <linux/delay.h>
32 #include <linux/pci.h>
33 #include <linux/types.h>
34
35 #include "bcm43xx.h"
36 #include "bcm43xx_phy.h"
37 #include "bcm43xx_main.h"
38 #include "bcm43xx_radio.h"
39 #include "bcm43xx_ilt.h"
40 #include "bcm43xx_power.h"
41
42
43 static const s8 bcm43xx_tssi2dbm_b_table[] = {
44 0x4D, 0x4C, 0x4B, 0x4A,
45 0x4A, 0x49, 0x48, 0x47,
46 0x47, 0x46, 0x45, 0x45,
47 0x44, 0x43, 0x42, 0x42,
48 0x41, 0x40, 0x3F, 0x3E,
49 0x3D, 0x3C, 0x3B, 0x3A,
50 0x39, 0x38, 0x37, 0x36,
51 0x35, 0x34, 0x32, 0x31,
52 0x30, 0x2F, 0x2D, 0x2C,
53 0x2B, 0x29, 0x28, 0x26,
54 0x25, 0x23, 0x21, 0x1F,
55 0x1D, 0x1A, 0x17, 0x14,
56 0x10, 0x0C, 0x06, 0x00,
57 -7, -7, -7, -7,
58 -7, -7, -7, -7,
59 -7, -7, -7, -7,
60 };
61
62 static const s8 bcm43xx_tssi2dbm_g_table[] = {
63 77, 77, 77, 76,
64 76, 76, 75, 75,
65 74, 74, 73, 73,
66 73, 72, 72, 71,
67 71, 70, 70, 69,
68 68, 68, 67, 67,
69 66, 65, 65, 64,
70 63, 63, 62, 61,
71 60, 59, 58, 57,
72 56, 55, 54, 53,
73 52, 50, 49, 47,
74 45, 43, 40, 37,
75 33, 28, 22, 14,
76 5, -7, -20, -20,
77 -20, -20, -20, -20,
78 -20, -20, -20, -20,
79 };
80
81 static void bcm43xx_phy_initg(struct bcm43xx_private *bcm);
82
83
84 static inline
85 void bcm43xx_voluntary_preempt(void)
86 {
87 assert(!in_atomic() && !in_irq() &&
88 !in_interrupt() && !irqs_disabled());
89 #ifndef CONFIG_PREEMPT
90 cond_resched();
91 #endif /* CONFIG_PREEMPT */
92 }
93
94 void bcm43xx_raw_phy_lock(struct bcm43xx_private *bcm)
95 {
96 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
97
98 assert(irqs_disabled());
99 if (bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD) == 0x00000000) {
100 phy->is_locked = 0;
101 return;
102 }
103 if (bcm->current_core->rev < 3) {
104 bcm43xx_mac_suspend(bcm);
105 spin_lock(&phy->lock);
106 } else {
107 if (bcm->ieee->iw_mode != IW_MODE_MASTER)
108 bcm43xx_power_saving_ctl_bits(bcm, -1, 1);
109 }
110 phy->is_locked = 1;
111 }
112
113 void bcm43xx_raw_phy_unlock(struct bcm43xx_private *bcm)
114 {
115 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
116
117 assert(irqs_disabled());
118 if (bcm->current_core->rev < 3) {
119 if (phy->is_locked) {
120 spin_unlock(&phy->lock);
121 bcm43xx_mac_enable(bcm);
122 }
123 } else {
124 if (bcm->ieee->iw_mode != IW_MODE_MASTER)
125 bcm43xx_power_saving_ctl_bits(bcm, -1, -1);
126 }
127 phy->is_locked = 0;
128 }
129
130 u16 bcm43xx_phy_read(struct bcm43xx_private *bcm, u16 offset)
131 {
132 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
133 return bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_DATA);
134 }
135
136 void bcm43xx_phy_write(struct bcm43xx_private *bcm, u16 offset, u16 val)
137 {
138 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
139 mmiowb();
140 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_DATA, val);
141 }
142
143 void bcm43xx_phy_calibrate(struct bcm43xx_private *bcm)
144 {
145 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
146
147 bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); /* Dummy read. */
148 if (phy->calibrated)
149 return;
150 if (phy->type == BCM43xx_PHYTYPE_G && phy->rev == 1) {
151 bcm43xx_wireless_core_reset(bcm, 0);
152 bcm43xx_phy_initg(bcm);
153 bcm43xx_wireless_core_reset(bcm, 1);
154 }
155 phy->calibrated = 1;
156 }
157
158 /* Connect the PHY
159 * http://bcm-specs.sipsolutions.net/SetPHY
160 */
161 int bcm43xx_phy_connect(struct bcm43xx_private *bcm, int connect)
162 {
163 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
164 u32 flags;
165
166 if (bcm->current_core->rev < 5)
167 goto out;
168
169 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATEHIGH);
170 if (connect) {
171 if (!(flags & 0x00010000))
172 return -ENODEV;
173 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
174 flags |= (0x800 << 18);
175 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);
176 } else {
177 if (!(flags & 0x00020000))
178 return -ENODEV;
179 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
180 flags &= ~(0x800 << 18);
181 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);
182 }
183 out:
184 phy->connected = connect;
185 if (connect)
186 dprintk(KERN_INFO PFX "PHY connected\n");
187 else
188 dprintk(KERN_INFO PFX "PHY disconnected\n");
189
190 return 0;
191 }
192
193 /* intialize B PHY power control
194 * as described in http://bcm-specs.sipsolutions.net/InitPowerControl
195 */
196 static void bcm43xx_phy_init_pctl(struct bcm43xx_private *bcm)
197 {
198 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
199 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
200 u16 saved_batt = 0, saved_ratt = 0, saved_txctl1 = 0;
201 int must_reset_txpower = 0;
202
203 assert(phy->type != BCM43xx_PHYTYPE_A);
204 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
205 (bcm->board_type == 0x0416))
206 return;
207
208 bcm43xx_write16(bcm, 0x03E6, bcm43xx_read16(bcm, 0x03E6) & 0xFFDF);
209 bcm43xx_phy_write(bcm, 0x0028, 0x8018);
210
211 if (phy->type == BCM43xx_PHYTYPE_G) {
212 if (!phy->connected)
213 return;
214 bcm43xx_phy_write(bcm, 0x047A, 0xC111);
215 }
216 if (phy->savedpctlreg != 0xFFFF)
217 return;
218
219 if (phy->type == BCM43xx_PHYTYPE_B &&
220 phy->rev >= 2 &&
221 radio->version == 0x2050) {
222 bcm43xx_radio_write16(bcm, 0x0076,
223 bcm43xx_radio_read16(bcm, 0x0076) | 0x0084);
224 } else {
225 saved_batt = radio->baseband_atten;
226 saved_ratt = radio->radio_atten;
227 saved_txctl1 = radio->txctl1;
228 if ((radio->revision >= 6) && (radio->revision <= 8)
229 && /*FIXME: incomplete specs for 5 < revision < 9 */ 0)
230 bcm43xx_radio_set_txpower_bg(bcm, 0xB, 0x1F, 0);
231 else
232 bcm43xx_radio_set_txpower_bg(bcm, 0xB, 9, 0);
233 must_reset_txpower = 1;
234 }
235 bcm43xx_dummy_transmission(bcm);
236
237 phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_PCTL);
238
239 if (must_reset_txpower)
240 bcm43xx_radio_set_txpower_bg(bcm, saved_batt, saved_ratt, saved_txctl1);
241 else
242 bcm43xx_radio_write16(bcm, 0x0076, bcm43xx_radio_read16(bcm, 0x0076) & 0xFF7B);
243 bcm43xx_radio_clear_tssi(bcm);
244 }
245
246 static void bcm43xx_phy_agcsetup(struct bcm43xx_private *bcm)
247 {
248 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
249 u16 offset = 0x0000;
250
251 if (phy->rev == 1)
252 offset = 0x4C00;
253
254 bcm43xx_ilt_write(bcm, offset, 0x00FE);
255 bcm43xx_ilt_write(bcm, offset + 1, 0x000D);
256 bcm43xx_ilt_write(bcm, offset + 2, 0x0013);
257 bcm43xx_ilt_write(bcm, offset + 3, 0x0019);
258
259 if (phy->rev == 1) {
260 bcm43xx_ilt_write(bcm, 0x1800, 0x2710);
261 bcm43xx_ilt_write(bcm, 0x1801, 0x9B83);
262 bcm43xx_ilt_write(bcm, 0x1802, 0x9B83);
263 bcm43xx_ilt_write(bcm, 0x1803, 0x0F8D);
264 bcm43xx_phy_write(bcm, 0x0455, 0x0004);
265 }
266
267 bcm43xx_phy_write(bcm, 0x04A5, (bcm43xx_phy_read(bcm, 0x04A5) & 0x00FF) | 0x5700);
268 bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xFF80) | 0x000F);
269 bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xC07F) | 0x2B80);
270 bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xF0FF) | 0x0300);
271
272 bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0008);
273
274 bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xFFF0) | 0x0008);
275 bcm43xx_phy_write(bcm, 0x04A1, (bcm43xx_phy_read(bcm, 0x04A1) & 0xF0FF) | 0x0600);
276 bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xF0FF) | 0x0700);
277 bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xF0FF) | 0x0100);
278
279 if (phy->rev == 1)
280 bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xFFF0) | 0x0007);
281
282 bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xFF00) | 0x001C);
283 bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xC0FF) | 0x0200);
284 bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0xFF00) | 0x001C);
285 bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xFF00) | 0x0020);
286 bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xC0FF) | 0x0200);
287 bcm43xx_phy_write(bcm, 0x0482, (bcm43xx_phy_read(bcm, 0x0482) & 0xFF00) | 0x002E);
288 bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0x00FF) | 0x1A00);
289 bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0xFF00) | 0x0028);
290 bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0x00FF) | 0x2C00);
291
292 if (phy->rev == 1) {
293 bcm43xx_phy_write(bcm, 0x0430, 0x092B);
294 bcm43xx_phy_write(bcm, 0x041B, (bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1) | 0x0002);
295 } else {
296 bcm43xx_phy_write(bcm, 0x041B, bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1);
297 bcm43xx_phy_write(bcm, 0x041F, 0x287A);
298 bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0xFFF0) | 0x0004);
299 }
300
301 if (phy->rev > 2) {
302 bcm43xx_phy_write(bcm, 0x0422, 0x287A);
303 bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0x0FFF) | 0x3000);
304 }
305
306 bcm43xx_phy_write(bcm, 0x04A8, (bcm43xx_phy_read(bcm, 0x04A8) & 0x8080) | 0x7874);
307 bcm43xx_phy_write(bcm, 0x048E, 0x1C00);
308
309 if (phy->rev == 1) {
310 bcm43xx_phy_write(bcm, 0x04AB, (bcm43xx_phy_read(bcm, 0x04AB) & 0xF0FF) | 0x0600);
311 bcm43xx_phy_write(bcm, 0x048B, 0x005E);
312 bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xFF00) | 0x001E);
313 bcm43xx_phy_write(bcm, 0x048D, 0x0002);
314 }
315
316 bcm43xx_ilt_write(bcm, offset + 0x0800, 0);
317 bcm43xx_ilt_write(bcm, offset + 0x0801, 7);
318 bcm43xx_ilt_write(bcm, offset + 0x0802, 16);
319 bcm43xx_ilt_write(bcm, offset + 0x0803, 28);
320 }
321
322 static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm)
323 {
324 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
325 u16 i;
326
327 assert(phy->type == BCM43xx_PHYTYPE_G);
328 if (phy->rev == 1) {
329 bcm43xx_phy_write(bcm, 0x0406, 0x4F19);
330 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
331 (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0xFC3F) | 0x0340);
332 bcm43xx_phy_write(bcm, 0x042C, 0x005A);
333 bcm43xx_phy_write(bcm, 0x0427, 0x001A);
334
335 for (i = 0; i < BCM43xx_ILT_FINEFREQG_SIZE; i++)
336 bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqg[i]);
337 for (i = 0; i < BCM43xx_ILT_NOISEG1_SIZE; i++)
338 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg1[i]);
339 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
340 bcm43xx_ilt_write(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
341 } else {
342 /* nrssi values are signed 6-bit values. Not sure why we write 0x7654 here... */
343 bcm43xx_nrssi_hw_write(bcm, 0xBA98, (s16)0x7654);
344
345 if (phy->rev == 2) {
346 bcm43xx_phy_write(bcm, 0x04C0, 0x1861);
347 bcm43xx_phy_write(bcm, 0x04C1, 0x0271);
348 } else if (phy->rev > 2) {
349 bcm43xx_phy_write(bcm, 0x04C0, 0x0098);
350 bcm43xx_phy_write(bcm, 0x04C1, 0x0070);
351 bcm43xx_phy_write(bcm, 0x04C9, 0x0080);
352 }
353 bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x800);
354
355 for (i = 0; i < 64; i++)
356 bcm43xx_ilt_write(bcm, 0x4000 + i, i);
357 for (i = 0; i < BCM43xx_ILT_NOISEG2_SIZE; i++)
358 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg2[i]);
359 }
360
361 if (phy->rev <= 2)
362 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
363 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg1[i]);
364 else if ((phy->rev >= 7) && (bcm43xx_phy_read(bcm, 0x0449) & 0x0200))
365 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
366 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg3[i]);
367 else
368 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
369 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg2[i]);
370
371 if (phy->rev == 2)
372 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
373 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
374 else if ((phy->rev > 2) && (phy->rev <= 8))
375 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
376 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr2[i]);
377
378 if (phy->rev == 1) {
379 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
380 bcm43xx_ilt_write(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
381 for (i = 0; i < 4; i++) {
382 bcm43xx_ilt_write(bcm, 0x5404 + i, 0x0020);
383 bcm43xx_ilt_write(bcm, 0x5408 + i, 0x0020);
384 bcm43xx_ilt_write(bcm, 0x540C + i, 0x0020);
385 bcm43xx_ilt_write(bcm, 0x5410 + i, 0x0020);
386 }
387 bcm43xx_phy_agcsetup(bcm);
388
389 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
390 (bcm->board_type == 0x0416) &&
391 (bcm->board_revision == 0x0017))
392 return;
393
394 bcm43xx_ilt_write(bcm, 0x5001, 0x0002);
395 bcm43xx_ilt_write(bcm, 0x5002, 0x0001);
396 } else {
397 for (i = 0; i <= 0x2F; i++)
398 bcm43xx_ilt_write(bcm, 0x1000 + i, 0x0820);
399 bcm43xx_phy_agcsetup(bcm);
400 bcm43xx_phy_read(bcm, 0x0400); /* dummy read */
401 bcm43xx_phy_write(bcm, 0x0403, 0x1000);
402 bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);
403 bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);
404
405 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
406 (bcm->board_type == 0x0416) &&
407 (bcm->board_revision == 0x0017))
408 return;
409
410 bcm43xx_ilt_write(bcm, 0x0401, 0x0002);
411 bcm43xx_ilt_write(bcm, 0x0402, 0x0001);
412 }
413 }
414
415 /* Initialize the noisescaletable for APHY */
416 static void bcm43xx_phy_init_noisescaletbl(struct bcm43xx_private *bcm)
417 {
418 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
419 int i;
420
421 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, 0x1400);
422 for (i = 0; i < 12; i++) {
423 if (phy->rev == 2)
424 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6767);
425 else
426 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2323);
427 }
428 if (phy->rev == 2)
429 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6700);
430 else
431 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2300);
432 for (i = 0; i < 11; i++) {
433 if (phy->rev == 2)
434 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6767);
435 else
436 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2323);
437 }
438 if (phy->rev == 2)
439 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x0067);
440 else
441 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x0023);
442 }
443
444 static void bcm43xx_phy_setupa(struct bcm43xx_private *bcm)
445 {
446 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
447 u16 i;
448
449 assert(phy->type == BCM43xx_PHYTYPE_A);
450 switch (phy->rev) {
451 case 2:
452 bcm43xx_phy_write(bcm, 0x008E, 0x3800);
453 bcm43xx_phy_write(bcm, 0x0035, 0x03FF);
454 bcm43xx_phy_write(bcm, 0x0036, 0x0400);
455
456 bcm43xx_ilt_write(bcm, 0x3807, 0x0051);
457
458 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
459 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
460 bcm43xx_ilt_write(bcm, 0x3C0C, 0x07BF);
461 bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
462
463 bcm43xx_phy_write(bcm, 0x0024, 0x4680);
464 bcm43xx_phy_write(bcm, 0x0020, 0x0003);
465 bcm43xx_phy_write(bcm, 0x001D, 0x0F40);
466 bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
467
468 bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
469 bcm43xx_phy_write(bcm, 0x002B, bcm43xx_phy_read(bcm, 0x002B) & 0xFBFF);
470 bcm43xx_phy_write(bcm, 0x008E, 0x58C1);
471
472 bcm43xx_ilt_write(bcm, 0x0803, 0x000F);
473 bcm43xx_ilt_write(bcm, 0x0804, 0x001F);
474 bcm43xx_ilt_write(bcm, 0x0805, 0x002A);
475 bcm43xx_ilt_write(bcm, 0x0805, 0x0030);
476 bcm43xx_ilt_write(bcm, 0x0807, 0x003A);
477
478 bcm43xx_ilt_write(bcm, 0x0000, 0x0013);
479 bcm43xx_ilt_write(bcm, 0x0001, 0x0013);
480 bcm43xx_ilt_write(bcm, 0x0002, 0x0013);
481 bcm43xx_ilt_write(bcm, 0x0003, 0x0013);
482 bcm43xx_ilt_write(bcm, 0x0004, 0x0015);
483 bcm43xx_ilt_write(bcm, 0x0005, 0x0015);
484 bcm43xx_ilt_write(bcm, 0x0006, 0x0019);
485
486 bcm43xx_ilt_write(bcm, 0x0404, 0x0003);
487 bcm43xx_ilt_write(bcm, 0x0405, 0x0003);
488 bcm43xx_ilt_write(bcm, 0x0406, 0x0007);
489
490 for (i = 0; i < 16; i++)
491 bcm43xx_ilt_write(bcm, 0x4000 + i, (0x8 + i) & 0x000F);
492
493 bcm43xx_ilt_write(bcm, 0x3003, 0x1044);
494 bcm43xx_ilt_write(bcm, 0x3004, 0x7201);
495 bcm43xx_ilt_write(bcm, 0x3006, 0x0040);
496 bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);
497
498 for (i = 0; i < BCM43xx_ILT_FINEFREQA_SIZE; i++)
499 bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqa[i]);
500 for (i = 0; i < BCM43xx_ILT_NOISEA2_SIZE; i++)
501 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea2[i]);
502 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
503 bcm43xx_ilt_write(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
504 bcm43xx_phy_init_noisescaletbl(bcm);
505 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
506 bcm43xx_ilt_write(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
507 break;
508 case 3:
509 for (i = 0; i < 64; i++)
510 bcm43xx_ilt_write(bcm, 0x4000 + i, i);
511
512 bcm43xx_ilt_write(bcm, 0x3807, 0x0051);
513
514 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
515 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
516 bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
517
518 bcm43xx_phy_write(bcm, 0x0024, 0x4680);
519 bcm43xx_phy_write(bcm, 0x0020, 0x0003);
520 bcm43xx_phy_write(bcm, 0x001D, 0x0F40);
521 bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
522 bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
523
524 bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);
525 for (i = 0; i < BCM43xx_ILT_NOISEA3_SIZE; i++)
526 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea3[i]);
527 bcm43xx_phy_init_noisescaletbl(bcm);
528 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
529 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
530
531 bcm43xx_phy_write(bcm, 0x0003, 0x1808);
532
533 bcm43xx_ilt_write(bcm, 0x0803, 0x000F);
534 bcm43xx_ilt_write(bcm, 0x0804, 0x001F);
535 bcm43xx_ilt_write(bcm, 0x0805, 0x002A);
536 bcm43xx_ilt_write(bcm, 0x0805, 0x0030);
537 bcm43xx_ilt_write(bcm, 0x0807, 0x003A);
538
539 bcm43xx_ilt_write(bcm, 0x0000, 0x0013);
540 bcm43xx_ilt_write(bcm, 0x0001, 0x0013);
541 bcm43xx_ilt_write(bcm, 0x0002, 0x0013);
542 bcm43xx_ilt_write(bcm, 0x0003, 0x0013);
543 bcm43xx_ilt_write(bcm, 0x0004, 0x0015);
544 bcm43xx_ilt_write(bcm, 0x0005, 0x0015);
545 bcm43xx_ilt_write(bcm, 0x0006, 0x0019);
546
547 bcm43xx_ilt_write(bcm, 0x0404, 0x0003);
548 bcm43xx_ilt_write(bcm, 0x0405, 0x0003);
549 bcm43xx_ilt_write(bcm, 0x0406, 0x0007);
550
551 bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);
552 bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);
553 break;
554 default:
555 assert(0);
556 }
557 }
558
559 /* Initialize APHY. This is also called for the GPHY in some cases. */
560 static void bcm43xx_phy_inita(struct bcm43xx_private *bcm)
561 {
562 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
563 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
564 u16 tval;
565
566 if (phy->type == BCM43xx_PHYTYPE_A) {
567 bcm43xx_phy_setupa(bcm);
568 } else {
569 bcm43xx_phy_setupg(bcm);
570 if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
571 bcm43xx_phy_write(bcm, 0x046E, 0x03CF);
572 return;
573 }
574
575 bcm43xx_phy_write(bcm, BCM43xx_PHY_A_CRS,
576 (bcm43xx_phy_read(bcm, BCM43xx_PHY_A_CRS) & 0xF83C) | 0x0340);
577 bcm43xx_phy_write(bcm, 0x0034, 0x0001);
578
579 TODO();//TODO: RSSI AGC
580 bcm43xx_phy_write(bcm, BCM43xx_PHY_A_CRS,
581 bcm43xx_phy_read(bcm, BCM43xx_PHY_A_CRS) | (1 << 14));
582 bcm43xx_radio_init2060(bcm);
583
584 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM)
585 && ((bcm->board_type == 0x0416) || (bcm->board_type == 0x040A))) {
586 if (radio->lofcal == 0xFFFF) {
587 TODO();//TODO: LOF Cal
588 bcm43xx_radio_set_tx_iq(bcm);
589 } else
590 bcm43xx_radio_write16(bcm, 0x001E, radio->lofcal);
591 }
592
593 bcm43xx_phy_write(bcm, 0x007A, 0xF111);
594
595 if (phy->savedpctlreg == 0xFFFF) {
596 bcm43xx_radio_write16(bcm, 0x0019, 0x0000);
597 bcm43xx_radio_write16(bcm, 0x0017, 0x0020);
598
599 tval = bcm43xx_ilt_read(bcm, 0x3001);
600 if (phy->rev == 1) {
601 bcm43xx_ilt_write(bcm, 0x3001,
602 (bcm43xx_ilt_read(bcm, 0x3001) & 0xFF87)
603 | 0x0058);
604 } else {
605 bcm43xx_ilt_write(bcm, 0x3001,
606 (bcm43xx_ilt_read(bcm, 0x3001) & 0xFFC3)
607 | 0x002C);
608 }
609 bcm43xx_dummy_transmission(bcm);
610 phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_A_PCTL);
611 bcm43xx_ilt_write(bcm, 0x3001, tval);
612
613 bcm43xx_radio_set_txpower_a(bcm, 0x0018);
614 }
615 bcm43xx_radio_clear_tssi(bcm);
616 }
617
618 static void bcm43xx_phy_initb2(struct bcm43xx_private *bcm)
619 {
620 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
621 u16 offset, val;
622
623 bcm43xx_write16(bcm, 0x03EC, 0x3F22);
624 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
625 bcm43xx_phy_write(bcm, 0x0026, 0x0000);
626 bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
627 bcm43xx_phy_write(bcm, 0x0088, 0x3E00);
628 val = 0x3C3D;
629 for (offset = 0x0089; offset < 0x00A7; offset++) {
630 bcm43xx_phy_write(bcm, offset, val);
631 val -= 0x0202;
632 }
633 bcm43xx_phy_write(bcm, 0x03E4, 0x3000);
634 if (radio->channel == 0xFF)
635 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
636 else
637 bcm43xx_radio_selectchannel(bcm, radio->channel, 0);
638 if (radio->version != 0x2050) {
639 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
640 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
641 }
642 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
643 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
644 if (radio->version == 0x2050) {
645 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
646 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
647 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
648 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
649 bcm43xx_radio_write16(bcm, 0x007A, 0x000F);
650 bcm43xx_phy_write(bcm, 0x0038, 0x0677);
651 bcm43xx_radio_init2050(bcm);
652 }
653 bcm43xx_phy_write(bcm, 0x0014, 0x0080);
654 bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
655 bcm43xx_phy_write(bcm, 0x0032, 0x00CC);
656 bcm43xx_phy_write(bcm, 0x0035, 0x07C2);
657 bcm43xx_phy_lo_b_measure(bcm);
658 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
659 if (radio->version != 0x2050)
660 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
661 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x1000);
662 bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
663 if (radio->version != 0x2050)
664 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
665 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
666 bcm43xx_phy_init_pctl(bcm);
667 }
668
669 static void bcm43xx_phy_initb4(struct bcm43xx_private *bcm)
670 {
671 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
672 u16 offset, val;
673
674 bcm43xx_write16(bcm, 0x03EC, 0x3F22);
675 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
676 bcm43xx_phy_write(bcm, 0x0026, 0x0000);
677 bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
678 bcm43xx_phy_write(bcm, 0x0088, 0x3E00);
679 val = 0x3C3D;
680 for (offset = 0x0089; offset < 0x00A7; offset++) {
681 bcm43xx_phy_write(bcm, offset, val);
682 val -= 0x0202;
683 }
684 bcm43xx_phy_write(bcm, 0x03E4, 0x3000);
685 if (radio->channel == 0xFF)
686 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
687 else
688 bcm43xx_radio_selectchannel(bcm, radio->channel, 0);
689 if (radio->version != 0x2050) {
690 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
691 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
692 }
693 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
694 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
695 if (radio->version == 0x2050) {
696 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
697 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
698 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
699 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
700 bcm43xx_radio_write16(bcm, 0x007A, 0x000F);
701 bcm43xx_phy_write(bcm, 0x0038, 0x0677);
702 bcm43xx_radio_init2050(bcm);
703 }
704 bcm43xx_phy_write(bcm, 0x0014, 0x0080);
705 bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
706 if (radio->version == 0x2050)
707 bcm43xx_phy_write(bcm, 0x0032, 0x00E0);
708 bcm43xx_phy_write(bcm, 0x0035, 0x07C2);
709
710 bcm43xx_phy_lo_b_measure(bcm);
711
712 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
713 if (radio->version == 0x2050)
714 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
715 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x1100);
716 bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
717 if (radio->version == 0x2050)
718 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
719 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
720 if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
721 bcm43xx_calc_nrssi_slope(bcm);
722 bcm43xx_calc_nrssi_threshold(bcm);
723 }
724 bcm43xx_phy_init_pctl(bcm);
725 }
726
727 static void bcm43xx_phy_initb5(struct bcm43xx_private *bcm)
728 {
729 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
730 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
731 u16 offset;
732
733 if (phy->version == 1 &&
734 radio->version == 0x2050) {
735 bcm43xx_radio_write16(bcm, 0x007A,
736 bcm43xx_radio_read16(bcm, 0x007A)
737 | 0x0050);
738 }
739 if ((bcm->board_vendor != PCI_VENDOR_ID_BROADCOM) &&
740 (bcm->board_type != 0x0416)) {
741 for (offset = 0x00A8 ; offset < 0x00C7; offset++) {
742 bcm43xx_phy_write(bcm, offset,
743 (bcm43xx_phy_read(bcm, offset) + 0x2020)
744 & 0x3F3F);
745 }
746 }
747 bcm43xx_phy_write(bcm, 0x0035,
748 (bcm43xx_phy_read(bcm, 0x0035) & 0xF0FF)
749 | 0x0700);
750 if (radio->version == 0x2050)
751 bcm43xx_phy_write(bcm, 0x0038, 0x0667);
752
753 if (phy->connected) {
754 if (radio->version == 0x2050) {
755 bcm43xx_radio_write16(bcm, 0x007A,
756 bcm43xx_radio_read16(bcm, 0x007A)
757 | 0x0020);
758 bcm43xx_radio_write16(bcm, 0x0051,
759 bcm43xx_radio_read16(bcm, 0x0051)
760 | 0x0004);
761 }
762 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_RADIO, 0x0000);
763
764 bcm43xx_phy_write(bcm, 0x0802, bcm43xx_phy_read(bcm, 0x0802) | 0x0100);
765 bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x2000);
766
767 bcm43xx_phy_write(bcm, 0x001C, 0x186A);
768
769 bcm43xx_phy_write(bcm, 0x0013, (bcm43xx_phy_read(bcm, 0x0013) & 0x00FF) | 0x1900);
770 bcm43xx_phy_write(bcm, 0x0035, (bcm43xx_phy_read(bcm, 0x0035) & 0xFFC0) | 0x0064);
771 bcm43xx_phy_write(bcm, 0x005D, (bcm43xx_phy_read(bcm, 0x005D) & 0xFF80) | 0x000A);
772 }
773
774 if (bcm->bad_frames_preempt) {
775 bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
776 bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) | (1 << 11));
777 }
778
779 if (phy->version == 1 && radio->version == 0x2050) {
780 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
781 bcm43xx_phy_write(bcm, 0x0021, 0x3763);
782 bcm43xx_phy_write(bcm, 0x0022, 0x1BC3);
783 bcm43xx_phy_write(bcm, 0x0023, 0x06F9);
784 bcm43xx_phy_write(bcm, 0x0024, 0x037E);
785 } else
786 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
787 bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
788 bcm43xx_write16(bcm, 0x03EC, 0x3F22);
789
790 if (phy->version == 1 && radio->version == 0x2050)
791 bcm43xx_phy_write(bcm, 0x0020, 0x3E1C);
792 else
793 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
794
795 if (phy->version == 0)
796 bcm43xx_write16(bcm, 0x03E4, 0x3000);
797
798 /* Force to channel 7, even if not supported. */
799 bcm43xx_radio_selectchannel(bcm, 7, 0);
800
801 if (radio->version != 0x2050) {
802 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
803 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
804 }
805
806 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
807 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
808
809 if (radio->version == 0x2050) {
810 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
811 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
812 }
813
814 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
815 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
816
817 bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0007);
818
819 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
820
821 bcm43xx_phy_write(bcm, 0x0014, 0x0080);
822 bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
823 bcm43xx_phy_write(bcm, 0x88A3, 0x002A);
824
825 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
826
827 if (radio->version == 0x2050)
828 bcm43xx_radio_write16(bcm, 0x005D, 0x000D);
829
830 bcm43xx_write16(bcm, 0x03E4, (bcm43xx_read16(bcm, 0x03E4) & 0xFFC0) | 0x0004);
831 }
832
833 static void bcm43xx_phy_initb6(struct bcm43xx_private *bcm)
834 {
835 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
836 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
837 u16 offset, val;
838
839 bcm43xx_phy_write(bcm, 0x003E, 0x817A);
840 bcm43xx_radio_write16(bcm, 0x007A,
841 (bcm43xx_radio_read16(bcm, 0x007A) | 0x0058));
842 if ((radio->manufact == 0x17F) &&
843 (radio->version == 0x2050) &&
844 (radio->revision == 3 ||
845 radio->revision == 4 ||
846 radio->revision == 5)) {
847 bcm43xx_radio_write16(bcm, 0x0051, 0x001F);
848 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
849 bcm43xx_radio_write16(bcm, 0x0053, 0x005B);
850 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
851 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
852 bcm43xx_radio_write16(bcm, 0x005B, 0x0088);
853 bcm43xx_radio_write16(bcm, 0x005D, 0x0088);
854 bcm43xx_radio_write16(bcm, 0x005E, 0x0088);
855 bcm43xx_radio_write16(bcm, 0x007D, 0x0088);
856 }
857 if ((radio->manufact == 0x17F) &&
858 (radio->version == 0x2050) &&
859 (radio->revision == 6)) {
860 bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
861 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
862 bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
863 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
864 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
865 bcm43xx_radio_write16(bcm, 0x005B, 0x008B);
866 bcm43xx_radio_write16(bcm, 0x005C, 0x00B5);
867 bcm43xx_radio_write16(bcm, 0x005D, 0x0088);
868 bcm43xx_radio_write16(bcm, 0x005E, 0x0088);
869 bcm43xx_radio_write16(bcm, 0x007D, 0x0088);
870 bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
871 bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
872 }
873 if ((radio->manufact == 0x17F) &&
874 (radio->version == 0x2050) &&
875 (radio->revision == 7)) {
876 bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
877 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
878 bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
879 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
880 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
881 bcm43xx_radio_write16(bcm, 0x005B, 0x00A8);
882 bcm43xx_radio_write16(bcm, 0x005C, 0x0075);
883 bcm43xx_radio_write16(bcm, 0x005D, 0x00F5);
884 bcm43xx_radio_write16(bcm, 0x005E, 0x00B8);
885 bcm43xx_radio_write16(bcm, 0x007D, 0x00E8);
886 bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
887 bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
888 bcm43xx_radio_write16(bcm, 0x007B, 0x0000);
889 }
890 if ((radio->manufact == 0x17F) &&
891 (radio->version == 0x2050) &&
892 (radio->revision == 8)) {
893 bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
894 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
895 bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
896 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
897 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
898 bcm43xx_radio_write16(bcm, 0x005B, 0x006B);
899 bcm43xx_radio_write16(bcm, 0x005C, 0x000F);
900 if (bcm->sprom.boardflags & 0x8000) {
901 bcm43xx_radio_write16(bcm, 0x005D, 0x00FA);
902 bcm43xx_radio_write16(bcm, 0x005E, 0x00D8);
903 } else {
904 bcm43xx_radio_write16(bcm, 0x005D, 0x00F5);
905 bcm43xx_radio_write16(bcm, 0x005E, 0x00B8);
906 }
907 bcm43xx_radio_write16(bcm, 0x0073, 0x0003);
908 bcm43xx_radio_write16(bcm, 0x007D, 0x00A8);
909 bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
910 bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
911 }
912 val = 0x1E1F;
913 for (offset = 0x0088; offset < 0x0098; offset++) {
914 bcm43xx_phy_write(bcm, offset, val);
915 val -= 0x0202;
916 }
917 val = 0x3E3F;
918 for (offset = 0x0098; offset < 0x00A8; offset++) {
919 bcm43xx_phy_write(bcm, offset, val);
920 val -= 0x0202;
921 }
922 val = 0x2120;
923 for (offset = 0x00A8; offset < 0x00C8; offset++) {
924 bcm43xx_phy_write(bcm, offset, (val & 0x3F3F));
925 val += 0x0202;
926 }
927 if (phy->type == BCM43xx_PHYTYPE_G) {
928 bcm43xx_radio_write16(bcm, 0x007A,
929 bcm43xx_radio_read16(bcm, 0x007A) | 0x0020);
930 bcm43xx_radio_write16(bcm, 0x0051,
931 bcm43xx_radio_read16(bcm, 0x0051) | 0x0004);
932 bcm43xx_phy_write(bcm, 0x0802,
933 bcm43xx_phy_read(bcm, 0x0802) | 0x0100);
934 bcm43xx_phy_write(bcm, 0x042B,
935 bcm43xx_phy_read(bcm, 0x042B) | 0x2000);
936 }
937
938 /* Force to channel 7, even if not supported. */
939 bcm43xx_radio_selectchannel(bcm, 7, 0);
940
941 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
942 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
943 udelay(40);
944 bcm43xx_radio_write16(bcm, 0x007C, (bcm43xx_radio_read16(bcm, 0x007C) | 0x0002));
945 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
946 if (radio->manufact == 0x17F &&
947 radio->version == 0x2050 &&
948 radio->revision <= 2) {
949 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
950 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
951 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
952 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
953 }
954 bcm43xx_radio_write16(bcm, 0x007A,
955 (bcm43xx_radio_read16(bcm, 0x007A) & 0x00F8) | 0x0007);
956
957 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
958
959 bcm43xx_phy_write(bcm, 0x0014, 0x0200);
960 if (radio->version == 0x2050){
961 if (radio->revision == 3 ||
962 radio->revision == 4 ||
963 radio->revision == 5)
964 bcm43xx_phy_write(bcm, 0x002A, 0x8AC0);
965 else
966 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
967 }
968 bcm43xx_phy_write(bcm, 0x0038, 0x0668);
969 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
970 if (radio->version == 0x2050) {
971 if (radio->revision == 3 ||
972 radio->revision == 4 ||
973 radio->revision == 5)
974 bcm43xx_phy_write(bcm, 0x005D, bcm43xx_phy_read(bcm, 0x005D) | 0x0003);
975 else if (radio->revision <= 2)
976 bcm43xx_radio_write16(bcm, 0x005D, 0x000D);
977 }
978
979 if (phy->rev == 4)
980 bcm43xx_phy_write(bcm, 0x0002, (bcm43xx_phy_read(bcm, 0x0002) & 0xFFC0) | 0x0004);
981 else
982 bcm43xx_write16(bcm, 0x03E4, 0x0009);
983 if (phy->type == BCM43xx_PHYTYPE_B) {
984 bcm43xx_write16(bcm, 0x03E6, 0x8140);
985 bcm43xx_phy_write(bcm, 0x0016, 0x0410);
986 bcm43xx_phy_write(bcm, 0x0017, 0x0820);
987 bcm43xx_phy_write(bcm, 0x0062, 0x0007);
988 (void) bcm43xx_radio_calibrationvalue(bcm);
989 bcm43xx_phy_lo_b_measure(bcm);
990 if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
991 bcm43xx_calc_nrssi_slope(bcm);
992 bcm43xx_calc_nrssi_threshold(bcm);
993 }
994 bcm43xx_phy_init_pctl(bcm);
995 } else
996 bcm43xx_write16(bcm, 0x03E6, 0x0);
997 }
998
999 static void bcm43xx_calc_loopback_gain(struct bcm43xx_private *bcm)
1000 {
1001 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1002 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1003 u16 backup_phy[15];
1004 u16 backup_radio[3];
1005 u16 backup_bband;
1006 u16 i;
1007 u16 loop1_cnt, loop1_done, loop1_omitted;
1008 u16 loop2_done;
1009
1010 backup_phy[0] = bcm43xx_phy_read(bcm, 0x0429);
1011 backup_phy[1] = bcm43xx_phy_read(bcm, 0x0001);
1012 backup_phy[2] = bcm43xx_phy_read(bcm, 0x0811);
1013 backup_phy[3] = bcm43xx_phy_read(bcm, 0x0812);
1014 backup_phy[4] = bcm43xx_phy_read(bcm, 0x0814);
1015 backup_phy[5] = bcm43xx_phy_read(bcm, 0x0815);
1016 backup_phy[6] = bcm43xx_phy_read(bcm, 0x005A);
1017 backup_phy[7] = bcm43xx_phy_read(bcm, 0x0059);
1018 backup_phy[8] = bcm43xx_phy_read(bcm, 0x0058);
1019 backup_phy[9] = bcm43xx_phy_read(bcm, 0x000A);
1020 backup_phy[10] = bcm43xx_phy_read(bcm, 0x0003);
1021 backup_phy[11] = bcm43xx_phy_read(bcm, 0x080F);
1022 backup_phy[12] = bcm43xx_phy_read(bcm, 0x0810);
1023 backup_phy[13] = bcm43xx_phy_read(bcm, 0x002B);
1024 backup_phy[14] = bcm43xx_phy_read(bcm, 0x0015);
1025 bcm43xx_phy_read(bcm, 0x002D); /* dummy read */
1026 backup_bband = radio->baseband_atten;
1027 backup_radio[0] = bcm43xx_radio_read16(bcm, 0x0052);
1028 backup_radio[1] = bcm43xx_radio_read16(bcm, 0x0043);
1029 backup_radio[2] = bcm43xx_radio_read16(bcm, 0x007A);
1030
1031 bcm43xx_phy_write(bcm, 0x0429,
1032 bcm43xx_phy_read(bcm, 0x0429) & 0x3FFF);
1033 bcm43xx_phy_write(bcm, 0x0001,
1034 bcm43xx_phy_read(bcm, 0x0001) & 0x8000);
1035 bcm43xx_phy_write(bcm, 0x0811,
1036 bcm43xx_phy_read(bcm, 0x0811) | 0x0002);
1037 bcm43xx_phy_write(bcm, 0x0812,
1038 bcm43xx_phy_read(bcm, 0x0812) & 0xFFFD);
1039 bcm43xx_phy_write(bcm, 0x0811,
1040 bcm43xx_phy_read(bcm, 0x0811) | 0x0001);
1041 bcm43xx_phy_write(bcm, 0x0812,
1042 bcm43xx_phy_read(bcm, 0x0812) & 0xFFFE);
1043 bcm43xx_phy_write(bcm, 0x0814,
1044 bcm43xx_phy_read(bcm, 0x0814) | 0x0001);
1045 bcm43xx_phy_write(bcm, 0x0815,
1046 bcm43xx_phy_read(bcm, 0x0815) & 0xFFFE);
1047 bcm43xx_phy_write(bcm, 0x0814,
1048 bcm43xx_phy_read(bcm, 0x0814) | 0x0002);
1049 bcm43xx_phy_write(bcm, 0x0815,
1050 bcm43xx_phy_read(bcm, 0x0815) & 0xFFFD);
1051 bcm43xx_phy_write(bcm, 0x0811,
1052 bcm43xx_phy_read(bcm, 0x0811) | 0x000C);
1053 bcm43xx_phy_write(bcm, 0x0812,
1054 bcm43xx_phy_read(bcm, 0x0812) | 0x000C);
1055
1056 bcm43xx_phy_write(bcm, 0x0811,
1057 (bcm43xx_phy_read(bcm, 0x0811)
1058 & 0xFFCF) | 0x0030);
1059 bcm43xx_phy_write(bcm, 0x0812,
1060 (bcm43xx_phy_read(bcm, 0x0812)
1061 & 0xFFCF) | 0x0010);
1062
1063 bcm43xx_phy_write(bcm, 0x005A, 0x0780);
1064 bcm43xx_phy_write(bcm, 0x0059, 0xC810);
1065 bcm43xx_phy_write(bcm, 0x0058, 0x000D);
1066 if (phy->version == 0) {
1067 bcm43xx_phy_write(bcm, 0x0003, 0x0122);
1068 } else {
1069 bcm43xx_phy_write(bcm, 0x000A,
1070 bcm43xx_phy_read(bcm, 0x000A)
1071 | 0x2000);
1072 }
1073 bcm43xx_phy_write(bcm, 0x0814,
1074 bcm43xx_phy_read(bcm, 0x0814) | 0x0004);
1075 bcm43xx_phy_write(bcm, 0x0815,
1076 bcm43xx_phy_read(bcm, 0x0815) & 0xFFFB);
1077 bcm43xx_phy_write(bcm, 0x0003,
1078 (bcm43xx_phy_read(bcm, 0x0003)
1079 & 0xFF9F) | 0x0040);
1080 if (radio->version == 0x2050 && radio->revision == 2) {
1081 bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
1082 bcm43xx_radio_write16(bcm, 0x0043,
1083 (bcm43xx_radio_read16(bcm, 0x0043)
1084 & 0xFFF0) | 0x0009);
1085 loop1_cnt = 9;
1086 } else if (radio->revision == 8) {
1087 bcm43xx_radio_write16(bcm, 0x0043, 0x000F);
1088 loop1_cnt = 15;
1089 } else
1090 loop1_cnt = 0;
1091
1092 bcm43xx_phy_set_baseband_attenuation(bcm, 11);
1093
1094 if (phy->rev >= 3)
1095 bcm43xx_phy_write(bcm, 0x080F, 0xC020);
1096 else
1097 bcm43xx_phy_write(bcm, 0x080F, 0x8020);
1098 bcm43xx_phy_write(bcm, 0x0810, 0x0000);
1099
1100 bcm43xx_phy_write(bcm, 0x002B,
1101 (bcm43xx_phy_read(bcm, 0x002B)
1102 & 0xFFC0) | 0x0001);
1103 bcm43xx_phy_write(bcm, 0x002B,
1104 (bcm43xx_phy_read(bcm, 0x002B)
1105 & 0xC0FF) | 0x0800);
1106 bcm43xx_phy_write(bcm, 0x0811,
1107 bcm43xx_phy_read(bcm, 0x0811) | 0x0100);
1108 bcm43xx_phy_write(bcm, 0x0812,
1109 bcm43xx_phy_read(bcm, 0x0812) & 0xCFFF);
1110 if (bcm->sprom.boardflags & BCM43xx_BFL_EXTLNA) {
1111 if (phy->rev >= 7) {
1112 bcm43xx_phy_write(bcm, 0x0811,
1113 bcm43xx_phy_read(bcm, 0x0811)
1114 | 0x0800);
1115 bcm43xx_phy_write(bcm, 0x0812,
1116 bcm43xx_phy_read(bcm, 0x0812)
1117 | 0x8000);
1118 }
1119 }
1120 bcm43xx_radio_write16(bcm, 0x007A,
1121 bcm43xx_radio_read16(bcm, 0x007A)
1122 & 0x00F7);
1123
1124 for (i = 0; i < loop1_cnt; i++) {
1125 bcm43xx_radio_write16(bcm, 0x0043, loop1_cnt);
1126 bcm43xx_phy_write(bcm, 0x0812,
1127 (bcm43xx_phy_read(bcm, 0x0812)
1128 & 0xF0FF) | (i << 8));
1129 bcm43xx_phy_write(bcm, 0x0015,
1130 (bcm43xx_phy_read(bcm, 0x0015)
1131 & 0x0FFF) | 0xA000);
1132 bcm43xx_phy_write(bcm, 0x0015,
1133 (bcm43xx_phy_read(bcm, 0x0015)
1134 & 0x0FFF) | 0xF000);
1135 udelay(20);
1136 if (bcm43xx_phy_read(bcm, 0x002D) >= 0x0DFC)
1137 break;
1138 }
1139 loop1_done = i;
1140 loop1_omitted = loop1_cnt - loop1_done;
1141
1142 loop2_done = 0;
1143 if (loop1_done >= 8) {
1144 bcm43xx_phy_write(bcm, 0x0812,
1145 bcm43xx_phy_read(bcm, 0x0812)
1146 | 0x0030);
1147 for (i = loop1_done - 8; i < 16; i++) {
1148 bcm43xx_phy_write(bcm, 0x0812,
1149 (bcm43xx_phy_read(bcm, 0x0812)
1150 & 0xF0FF) | (i << 8));
1151 bcm43xx_phy_write(bcm, 0x0015,
1152 (bcm43xx_phy_read(bcm, 0x0015)
1153 & 0x0FFF) | 0xA000);
1154 bcm43xx_phy_write(bcm, 0x0015,
1155 (bcm43xx_phy_read(bcm, 0x0015)
1156 & 0x0FFF) | 0xF000);
1157 udelay(20);
1158 if (bcm43xx_phy_read(bcm, 0x002D) >= 0x0DFC)
1159 break;
1160 }
1161 }
1162
1163 bcm43xx_phy_write(bcm, 0x0814, backup_phy[4]);
1164 bcm43xx_phy_write(bcm, 0x0815, backup_phy[5]);
1165 bcm43xx_phy_write(bcm, 0x005A, backup_phy[6]);
1166 bcm43xx_phy_write(bcm, 0x0059, backup_phy[7]);
1167 bcm43xx_phy_write(bcm, 0x0058, backup_phy[8]);
1168 bcm43xx_phy_write(bcm, 0x000A, backup_phy[9]);
1169 bcm43xx_phy_write(bcm, 0x0003, backup_phy[10]);
1170 bcm43xx_phy_write(bcm, 0x080F, backup_phy[11]);
1171 bcm43xx_phy_write(bcm, 0x0810, backup_phy[12]);
1172 bcm43xx_phy_write(bcm, 0x002B, backup_phy[13]);
1173 bcm43xx_phy_write(bcm, 0x0015, backup_phy[14]);
1174
1175 bcm43xx_phy_set_baseband_attenuation(bcm, backup_bband);
1176
1177 bcm43xx_radio_write16(bcm, 0x0052, backup_radio[0]);
1178 bcm43xx_radio_write16(bcm, 0x0043, backup_radio[1]);
1179 bcm43xx_radio_write16(bcm, 0x007A, backup_radio[2]);
1180
1181 bcm43xx_phy_write(bcm, 0x0811, backup_phy[2] | 0x0003);
1182 udelay(10);
1183 bcm43xx_phy_write(bcm, 0x0811, backup_phy[2]);
1184 bcm43xx_phy_write(bcm, 0x0812, backup_phy[3]);
1185 bcm43xx_phy_write(bcm, 0x0429, backup_phy[0]);
1186 bcm43xx_phy_write(bcm, 0x0001, backup_phy[1]);
1187
1188 phy->loopback_gain[0] = ((loop1_done * 6) - (loop1_omitted * 4)) - 11;
1189 phy->loopback_gain[1] = (24 - (3 * loop2_done)) * 2;
1190 }
1191
1192 static void bcm43xx_phy_initg(struct bcm43xx_private *bcm)
1193 {
1194 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1195 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1196 u16 tmp;
1197
1198 if (phy->rev == 1)
1199 bcm43xx_phy_initb5(bcm);
1200 else
1201 bcm43xx_phy_initb6(bcm);
1202 if (phy->rev >= 2 || phy->connected)
1203 bcm43xx_phy_inita(bcm);
1204
1205 if (phy->rev >= 2) {
1206 bcm43xx_phy_write(bcm, 0x0814, 0x0000);
1207 bcm43xx_phy_write(bcm, 0x0815, 0x0000);
1208 if (phy->rev == 2)
1209 bcm43xx_phy_write(bcm, 0x0811, 0x0000);
1210 else if (phy->rev >= 3)
1211 bcm43xx_phy_write(bcm, 0x0811, 0x0400);
1212 bcm43xx_phy_write(bcm, 0x0015, 0x00C0);
1213 if (phy->connected) {
1214 tmp = bcm43xx_phy_read(bcm, 0x0400) & 0xFF;
1215 if (tmp < 6) {
1216 bcm43xx_phy_write(bcm, 0x04C2, 0x1816);
1217 bcm43xx_phy_write(bcm, 0x04C3, 0x8006);
1218 if (tmp != 3) {
1219 bcm43xx_phy_write(bcm, 0x04CC,
1220 (bcm43xx_phy_read(bcm, 0x04CC)
1221 & 0x00FF) | 0x1F00);
1222 }
1223 }
1224 }
1225 }
1226 if (phy->rev < 3 && phy->connected)
1227 bcm43xx_phy_write(bcm, 0x047E, 0x0078);
1228 if (phy->rev >= 6 && phy->rev <= 8) {
1229 bcm43xx_phy_write(bcm, 0x0801, bcm43xx_phy_read(bcm, 0x0801) | 0x0080);
1230 bcm43xx_phy_write(bcm, 0x043E, bcm43xx_phy_read(bcm, 0x043E) | 0x0004);
1231 }
1232 if (phy->rev >= 2 && phy->connected)
1233 bcm43xx_calc_loopback_gain(bcm);
1234 if (radio->revision != 8) {
1235 if (radio->initval == 0xFFFF)
1236 radio->initval = bcm43xx_radio_init2050(bcm);
1237 else
1238 bcm43xx_radio_write16(bcm, 0x0078, radio->initval);
1239 }
1240 if (radio->txctl2 == 0xFFFF) {
1241 bcm43xx_phy_lo_g_measure(bcm);
1242 } else {
1243 if (radio->version == 0x2050 && radio->revision == 8) {
1244 bcm43xx_radio_write16(bcm, 0x0052,
1245 (radio->txctl1 << 4) | radio->txctl2);
1246 } else {
1247 bcm43xx_radio_write16(bcm, 0x0052,
1248 (bcm43xx_radio_read16(bcm, 0x0052)
1249 & 0xFFF0) | radio->txctl1);
1250 }
1251 if (phy->rev >= 6) {
1252 bcm43xx_phy_write(bcm, 0x0036,
1253 (bcm43xx_phy_read(bcm, 0x0036)
1254 & 0xF000) | (radio->txctl2 << 12));
1255 }
1256 if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
1257 bcm43xx_phy_write(bcm, 0x002E, 0x8075);
1258 else
1259 bcm43xx_phy_write(bcm, 0x002E, 0x807F);
1260 if (phy->rev < 2)
1261 bcm43xx_phy_write(bcm, 0x002F, 0x0101);
1262 else
1263 bcm43xx_phy_write(bcm, 0x002F, 0x0202);
1264 }
1265 if (phy->connected) {
1266 bcm43xx_phy_lo_adjust(bcm, 0);
1267 bcm43xx_phy_write(bcm, 0x080F, 0x8078);
1268 }
1269
1270 if (!(bcm->sprom.boardflags & BCM43xx_BFL_RSSI)) {
1271 /* The specs state to update the NRSSI LT with
1272 * the value 0x7FFFFFFF here. I think that is some weird
1273 * compiler optimization in the original driver.
1274 * Essentially, what we do here is resetting all NRSSI LT
1275 * entries to -32 (see the limit_value() in nrssi_hw_update())
1276 */
1277 bcm43xx_nrssi_hw_update(bcm, 0xFFFF);
1278 bcm43xx_calc_nrssi_threshold(bcm);
1279 } else if (phy->connected) {
1280 if (radio->nrssi[0] == -1000) {
1281 assert(radio->nrssi[1] == -1000);
1282 bcm43xx_calc_nrssi_slope(bcm);
1283 } else {
1284 assert(radio->nrssi[1] != -1000);
1285 bcm43xx_calc_nrssi_threshold(bcm);
1286 }
1287 }
1288 if (radio->revision == 8)
1289 bcm43xx_phy_write(bcm, 0x0805, 0x3230);
1290 bcm43xx_phy_init_pctl(bcm);
1291 if (bcm->chip_id == 0x4306 && bcm->chip_package == 2) {
1292 bcm43xx_phy_write(bcm, 0x0429,
1293 bcm43xx_phy_read(bcm, 0x0429) & 0xBFFF);
1294 bcm43xx_phy_write(bcm, 0x04C3,
1295 bcm43xx_phy_read(bcm, 0x04C3) & 0x7FFF);
1296 }
1297 }
1298
1299 static u16 bcm43xx_phy_lo_b_r15_loop(struct bcm43xx_private *bcm)
1300 {
1301 int i;
1302 u16 ret = 0;
1303 unsigned long flags;
1304
1305 local_irq_save(flags);
1306 for (i = 0; i < 10; i++){
1307 bcm43xx_phy_write(bcm, 0x0015, 0xAFA0);
1308 udelay(1);
1309 bcm43xx_phy_write(bcm, 0x0015, 0xEFA0);
1310 udelay(10);
1311 bcm43xx_phy_write(bcm, 0x0015, 0xFFA0);
1312 udelay(40);
1313 ret += bcm43xx_phy_read(bcm, 0x002C);
1314 }
1315 local_irq_restore(flags);
1316 bcm43xx_voluntary_preempt();
1317
1318 return ret;
1319 }
1320
1321 void bcm43xx_phy_lo_b_measure(struct bcm43xx_private *bcm)
1322 {
1323 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1324 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1325 u16 regstack[12] = { 0 };
1326 u16 mls;
1327 u16 fval;
1328 int i, j;
1329
1330 regstack[0] = bcm43xx_phy_read(bcm, 0x0015);
1331 regstack[1] = bcm43xx_radio_read16(bcm, 0x0052) & 0xFFF0;
1332
1333 if (radio->version == 0x2053) {
1334 regstack[2] = bcm43xx_phy_read(bcm, 0x000A);
1335 regstack[3] = bcm43xx_phy_read(bcm, 0x002A);
1336 regstack[4] = bcm43xx_phy_read(bcm, 0x0035);
1337 regstack[5] = bcm43xx_phy_read(bcm, 0x0003);
1338 regstack[6] = bcm43xx_phy_read(bcm, 0x0001);
1339 regstack[7] = bcm43xx_phy_read(bcm, 0x0030);
1340
1341 regstack[8] = bcm43xx_radio_read16(bcm, 0x0043);
1342 regstack[9] = bcm43xx_radio_read16(bcm, 0x007A);
1343 regstack[10] = bcm43xx_read16(bcm, 0x03EC);
1344 regstack[11] = bcm43xx_radio_read16(bcm, 0x0052) & 0x00F0;
1345
1346 bcm43xx_phy_write(bcm, 0x0030, 0x00FF);
1347 bcm43xx_write16(bcm, 0x03EC, 0x3F3F);
1348 bcm43xx_phy_write(bcm, 0x0035, regstack[4] & 0xFF7F);
1349 bcm43xx_radio_write16(bcm, 0x007A, regstack[9] & 0xFFF0);
1350 }
1351 bcm43xx_phy_write(bcm, 0x0015, 0xB000);
1352 bcm43xx_phy_write(bcm, 0x002B, 0x0004);
1353
1354 if (radio->version == 0x2053) {
1355 bcm43xx_phy_write(bcm, 0x002B, 0x0203);
1356 bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
1357 }
1358
1359 phy->minlowsig[0] = 0xFFFF;
1360
1361 for (i = 0; i < 4; i++) {
1362 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | i);
1363 bcm43xx_phy_lo_b_r15_loop(bcm);
1364 }
1365 for (i = 0; i < 10; i++) {
1366 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | i);
1367 mls = bcm43xx_phy_lo_b_r15_loop(bcm) / 10;
1368 if (mls < phy->minlowsig[0]) {
1369 phy->minlowsig[0] = mls;
1370 phy->minlowsigpos[0] = i;
1371 }
1372 }
1373 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | phy->minlowsigpos[0]);
1374
1375 phy->minlowsig[1] = 0xFFFF;
1376
1377 for (i = -4; i < 5; i += 2) {
1378 for (j = -4; j < 5; j += 2) {
1379 if (j < 0)
1380 fval = (0x0100 * i) + j + 0x0100;
1381 else
1382 fval = (0x0100 * i) + j;
1383 bcm43xx_phy_write(bcm, 0x002F, fval);
1384 mls = bcm43xx_phy_lo_b_r15_loop(bcm) / 10;
1385 if (mls < phy->minlowsig[1]) {
1386 phy->minlowsig[1] = mls;
1387 phy->minlowsigpos[1] = fval;
1388 }
1389 }
1390 }
1391 phy->minlowsigpos[1] += 0x0101;
1392
1393 bcm43xx_phy_write(bcm, 0x002F, phy->minlowsigpos[1]);
1394 if (radio->version == 0x2053) {
1395 bcm43xx_phy_write(bcm, 0x000A, regstack[2]);
1396 bcm43xx_phy_write(bcm, 0x002A, regstack[3]);
1397 bcm43xx_phy_write(bcm, 0x0035, regstack[4]);
1398 bcm43xx_phy_write(bcm, 0x0003, regstack[5]);
1399 bcm43xx_phy_write(bcm, 0x0001, regstack[6]);
1400 bcm43xx_phy_write(bcm, 0x0030, regstack[7]);
1401
1402 bcm43xx_radio_write16(bcm, 0x0043, regstack[8]);
1403 bcm43xx_radio_write16(bcm, 0x007A, regstack[9]);
1404
1405 bcm43xx_radio_write16(bcm, 0x0052,
1406 (bcm43xx_radio_read16(bcm, 0x0052) & 0x000F)
1407 | regstack[11]);
1408
1409 bcm43xx_write16(bcm, 0x03EC, regstack[10]);
1410 }
1411 bcm43xx_phy_write(bcm, 0x0015, regstack[0]);
1412 }
1413
1414 static inline
1415 u16 bcm43xx_phy_lo_g_deviation_subval(struct bcm43xx_private *bcm, u16 control)
1416 {
1417 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1418 u16 ret;
1419 unsigned long flags;
1420
1421 local_irq_save(flags);
1422 if (phy->connected) {
1423 bcm43xx_phy_write(bcm, 0x15, 0xE300);
1424 control <<= 8;
1425 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B0);
1426 udelay(5);
1427 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B2);
1428 udelay(2);
1429 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B3);
1430 udelay(4);
1431 bcm43xx_phy_write(bcm, 0x0015, 0xF300);
1432 udelay(8);
1433 } else {
1434 bcm43xx_phy_write(bcm, 0x0015, control | 0xEFA0);
1435 udelay(2);
1436 bcm43xx_phy_write(bcm, 0x0015, control | 0xEFE0);
1437 udelay(4);
1438 bcm43xx_phy_write(bcm, 0x0015, control | 0xFFE0);
1439 udelay(8);
1440 }
1441 ret = bcm43xx_phy_read(bcm, 0x002D);
1442 local_irq_restore(flags);
1443 bcm43xx_voluntary_preempt();
1444
1445 return ret;
1446 }
1447
1448 static u32 bcm43xx_phy_lo_g_singledeviation(struct bcm43xx_private *bcm, u16 control)
1449 {
1450 int i;
1451 u32 ret = 0;
1452
1453 for (i = 0; i < 8; i++)
1454 ret += bcm43xx_phy_lo_g_deviation_subval(bcm, control);
1455
1456 return ret;
1457 }
1458
1459 /* Write the LocalOscillator CONTROL */
1460 static inline
1461 void bcm43xx_lo_write(struct bcm43xx_private *bcm,
1462 struct bcm43xx_lopair *pair)
1463 {
1464 u16 value;
1465
1466 value = (u8)(pair->low);
1467 value |= ((u8)(pair->high)) << 8;
1468
1469 #ifdef CONFIG_BCM43XX_DEBUG
1470 /* Sanity check. */
1471 if (pair->low < -8 || pair->low > 8 ||
1472 pair->high < -8 || pair->high > 8) {
1473 printk(KERN_WARNING PFX
1474 "WARNING: Writing invalid LOpair "
1475 "(low: %d, high: %d, index: %lu)\n",
1476 pair->low, pair->high,
1477 (unsigned long)(pair - bcm43xx_current_phy(bcm)->_lo_pairs));
1478 dump_stack();
1479 }
1480 #endif
1481
1482 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_LO_CONTROL, value);
1483 }
1484
1485 static inline
1486 struct bcm43xx_lopair * bcm43xx_find_lopair(struct bcm43xx_private *bcm,
1487 u16 baseband_attenuation,
1488 u16 radio_attenuation,
1489 u16 tx)
1490 {
1491 static const u8 dict[10] = { 11, 10, 11, 12, 13, 12, 13, 12, 13, 12 };
1492 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1493
1494 if (baseband_attenuation > 6)
1495 baseband_attenuation = 6;
1496 assert(radio_attenuation < 10);
1497
1498 if (tx == 3) {
1499 return bcm43xx_get_lopair(phy,
1500 radio_attenuation,
1501 baseband_attenuation);
1502 }
1503 return bcm43xx_get_lopair(phy, dict[radio_attenuation], baseband_attenuation);
1504 }
1505
1506 static inline
1507 struct bcm43xx_lopair * bcm43xx_current_lopair(struct bcm43xx_private *bcm)
1508 {
1509 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1510
1511 return bcm43xx_find_lopair(bcm,
1512 radio->baseband_atten,
1513 radio->radio_atten,
1514 radio->txctl1);
1515 }
1516
1517 /* Adjust B/G LO */
1518 void bcm43xx_phy_lo_adjust(struct bcm43xx_private *bcm, int fixed)
1519 {
1520 struct bcm43xx_lopair *pair;
1521
1522 if (fixed) {
1523 /* Use fixed values. Only for initialization. */
1524 pair = bcm43xx_find_lopair(bcm, 2, 3, 0);
1525 } else
1526 pair = bcm43xx_current_lopair(bcm);
1527 bcm43xx_lo_write(bcm, pair);
1528 }
1529
1530 static void bcm43xx_phy_lo_g_measure_txctl2(struct bcm43xx_private *bcm)
1531 {
1532 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1533 u16 txctl2 = 0, i;
1534 u32 smallest, tmp;
1535
1536 bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
1537 udelay(10);
1538 smallest = bcm43xx_phy_lo_g_singledeviation(bcm, 0);
1539 for (i = 0; i < 16; i++) {
1540 bcm43xx_radio_write16(bcm, 0x0052, i);
1541 udelay(10);
1542 tmp = bcm43xx_phy_lo_g_singledeviation(bcm, 0);
1543 if (tmp < smallest) {
1544 smallest = tmp;
1545 txctl2 = i;
1546 }
1547 }
1548 radio->txctl2 = txctl2;
1549 }
1550
1551 static
1552 void bcm43xx_phy_lo_g_state(struct bcm43xx_private *bcm,
1553 const struct bcm43xx_lopair *in_pair,
1554 struct bcm43xx_lopair *out_pair,
1555 u16 r27)
1556 {
1557 static const struct bcm43xx_lopair transitions[8] = {
1558 { .high = 1, .low = 1, },
1559 { .high = 1, .low = 0, },
1560 { .high = 1, .low = -1, },
1561 { .high = 0, .low = -1, },
1562 { .high = -1, .low = -1, },
1563 { .high = -1, .low = 0, },
1564 { .high = -1, .low = 1, },
1565 { .high = 0, .low = 1, },
1566 };
1567 struct bcm43xx_lopair lowest_transition = {
1568 .high = in_pair->high,
1569 .low = in_pair->low,
1570 };
1571 struct bcm43xx_lopair tmp_pair;
1572 struct bcm43xx_lopair transition;
1573 int i = 12;
1574 int state = 0;
1575 int found_lower;
1576 int j, begin, end;
1577 u32 lowest_deviation;
1578 u32 tmp;
1579
1580 /* Note that in_pair and out_pair can point to the same pair. Be careful. */
1581
1582 bcm43xx_lo_write(bcm, &lowest_transition);
1583 lowest_deviation = bcm43xx_phy_lo_g_singledeviation(bcm, r27);
1584 do {
1585 found_lower = 0;
1586 assert(state >= 0 && state <= 8);
1587 if (state == 0) {
1588 begin = 1;
1589 end = 8;
1590 } else if (state % 2 == 0) {
1591 begin = state - 1;
1592 end = state + 1;
1593 } else {
1594 begin = state - 2;
1595 end = state + 2;
1596 }
1597 if (begin < 1)
1598 begin += 8;
1599 if (end > 8)
1600 end -= 8;
1601
1602 j = begin;
1603 tmp_pair.high = lowest_transition.high;
1604 tmp_pair.low = lowest_transition.low;
1605 while (1) {
1606 assert(j >= 1 && j <= 8);
1607 transition.high = tmp_pair.high + transitions[j - 1].high;
1608 transition.low = tmp_pair.low + transitions[j - 1].low;
1609 if ((abs(transition.low) < 9) && (abs(transition.high) < 9)) {
1610 bcm43xx_lo_write(bcm, &transition);
1611 tmp = bcm43xx_phy_lo_g_singledeviation(bcm, r27);
1612 if (tmp < lowest_deviation) {
1613 lowest_deviation = tmp;
1614 state = j;
1615 found_lower = 1;
1616
1617 lowest_transition.high = transition.high;
1618 lowest_transition.low = transition.low;
1619 }
1620 }
1621 if (j == end)
1622 break;
1623 if (j == 8)
1624 j = 1;
1625 else
1626 j++;
1627 }
1628 } while (i-- && found_lower);
1629
1630 out_pair->high = lowest_transition.high;
1631 out_pair->low = lowest_transition.low;
1632 }
1633
1634 /* Set the baseband attenuation value on chip. */
1635 void bcm43xx_phy_set_baseband_attenuation(struct bcm43xx_private *bcm,
1636 u16 baseband_attenuation)
1637 {
1638 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1639 u16 value;
1640
1641 if (phy->version == 0) {
1642 value = (bcm43xx_read16(bcm, 0x03E6) & 0xFFF0);
1643 value |= (baseband_attenuation & 0x000F);
1644 bcm43xx_write16(bcm, 0x03E6, value);
1645 return;
1646 }
1647
1648 if (phy->version > 1) {
1649 value = bcm43xx_phy_read(bcm, 0x0060) & ~0x003C;
1650 value |= (baseband_attenuation << 2) & 0x003C;
1651 } else {
1652 value = bcm43xx_phy_read(bcm, 0x0060) & ~0x0078;
1653 value |= (baseband_attenuation << 3) & 0x0078;
1654 }
1655 bcm43xx_phy_write(bcm, 0x0060, value);
1656 }
1657
1658 /* http://bcm-specs.sipsolutions.net/LocalOscillator/Measure */
1659 void bcm43xx_phy_lo_g_measure(struct bcm43xx_private *bcm)
1660 {
1661 static const u8 pairorder[10] = { 3, 1, 5, 7, 9, 2, 0, 4, 6, 8 };
1662 const int is_initializing = (bcm43xx_status(bcm) == BCM43xx_STAT_INITIALIZING);
1663 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1664 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1665 u16 h, i, oldi = 0, j;
1666 struct bcm43xx_lopair control;
1667 struct bcm43xx_lopair *tmp_control;
1668 u16 tmp;
1669 u16 regstack[16] = { 0 };
1670 u8 oldchannel;
1671
1672 //XXX: What are these?
1673 u8 r27 = 0, r31;
1674
1675 oldchannel = radio->channel;
1676 /* Setup */
1677 if (phy->connected) {
1678 regstack[0] = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS);
1679 regstack[1] = bcm43xx_phy_read(bcm, 0x0802);
1680 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0] & 0x7FFF);
1681 bcm43xx_phy_write(bcm, 0x0802, regstack[1] & 0xFFFC);
1682 }
1683 regstack[3] = bcm43xx_read16(bcm, 0x03E2);
1684 bcm43xx_write16(bcm, 0x03E2, regstack[3] | 0x8000);
1685 regstack[4] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
1686 regstack[5] = bcm43xx_phy_read(bcm, 0x15);
1687 regstack[6] = bcm43xx_phy_read(bcm, 0x2A);
1688 regstack[7] = bcm43xx_phy_read(bcm, 0x35);
1689 regstack[8] = bcm43xx_phy_read(bcm, 0x60);
1690 regstack[9] = bcm43xx_radio_read16(bcm, 0x43);
1691 regstack[10] = bcm43xx_radio_read16(bcm, 0x7A);
1692 regstack[11] = bcm43xx_radio_read16(bcm, 0x52);
1693 if (phy->connected) {
1694 regstack[12] = bcm43xx_phy_read(bcm, 0x0811);
1695 regstack[13] = bcm43xx_phy_read(bcm, 0x0812);
1696 regstack[14] = bcm43xx_phy_read(bcm, 0x0814);
1697 regstack[15] = bcm43xx_phy_read(bcm, 0x0815);
1698 }
1699 bcm43xx_radio_selectchannel(bcm, 6, 0);
1700 if (phy->connected) {
1701 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0] & 0x7FFF);
1702 bcm43xx_phy_write(bcm, 0x0802, regstack[1] & 0xFFFC);
1703 bcm43xx_dummy_transmission(bcm);
1704 }
1705 bcm43xx_radio_write16(bcm, 0x0043, 0x0006);
1706
1707 bcm43xx_phy_set_baseband_attenuation(bcm, 2);
1708
1709 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x0000);
1710 bcm43xx_phy_write(bcm, 0x002E, 0x007F);
1711 bcm43xx_phy_write(bcm, 0x080F, 0x0078);
1712 bcm43xx_phy_write(bcm, 0x0035, regstack[7] & ~(1 << 7));
1713 bcm43xx_radio_write16(bcm, 0x007A, regstack[10] & 0xFFF0);
1714 bcm43xx_phy_write(bcm, 0x002B, 0x0203);
1715 bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
1716 if (phy->connected) {
1717 bcm43xx_phy_write(bcm, 0x0814, regstack[14] | 0x0003);
1718 bcm43xx_phy_write(bcm, 0x0815, regstack[15] & 0xFFFC);
1719 bcm43xx_phy_write(bcm, 0x0811, 0x01B3);
1720 bcm43xx_phy_write(bcm, 0x0812, 0x00B2);
1721 }
1722 if (is_initializing)
1723 bcm43xx_phy_lo_g_measure_txctl2(bcm);
1724 bcm43xx_phy_write(bcm, 0x080F, 0x8078);
1725
1726 /* Measure */
1727 control.low = 0;
1728 control.high = 0;
1729 for (h = 0; h < 10; h++) {
1730 /* Loop over each possible RadioAttenuation (0-9) */
1731 i = pairorder[h];
1732 if (is_initializing) {
1733 if (i == 3) {
1734 control.low = 0;
1735 control.high = 0;
1736 } else if (((i % 2 == 1) && (oldi % 2 == 1)) ||
1737 ((i % 2 == 0) && (oldi % 2 == 0))) {
1738 tmp_control = bcm43xx_get_lopair(phy, oldi, 0);
1739 memcpy(&control, tmp_control, sizeof(control));
1740 } else {
1741 tmp_control = bcm43xx_get_lopair(phy, 3, 0);
1742 memcpy(&control, tmp_control, sizeof(control));
1743 }
1744 }
1745 /* Loop over each possible BasebandAttenuation/2 */
1746 for (j = 0; j < 4; j++) {
1747 if (is_initializing) {
1748 tmp = i * 2 + j;
1749 r27 = 0;
1750 r31 = 0;
1751 if (tmp > 14) {
1752 r31 = 1;
1753 if (tmp > 17)
1754 r27 = 1;
1755 if (tmp > 19)
1756 r27 = 2;
1757 }
1758 } else {
1759 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1760 if (!tmp_control->used)
1761 continue;
1762 memcpy(&control, tmp_control, sizeof(control));
1763 r27 = 3;
1764 r31 = 0;
1765 }
1766 bcm43xx_radio_write16(bcm, 0x43, i);
1767 bcm43xx_radio_write16(bcm, 0x52, radio->txctl2);
1768 udelay(10);
1769 bcm43xx_voluntary_preempt();
1770
1771 bcm43xx_phy_set_baseband_attenuation(bcm, j * 2);
1772
1773 tmp = (regstack[10] & 0xFFF0);
1774 if (r31)
1775 tmp |= 0x0008;
1776 bcm43xx_radio_write16(bcm, 0x007A, tmp);
1777
1778 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1779 bcm43xx_phy_lo_g_state(bcm, &control, tmp_control, r27);
1780 }
1781 oldi = i;
1782 }
1783 /* Loop over each possible RadioAttenuation (10-13) */
1784 for (i = 10; i < 14; i++) {
1785 /* Loop over each possible BasebandAttenuation/2 */
1786 for (j = 0; j < 4; j++) {
1787 if (is_initializing) {
1788 tmp_control = bcm43xx_get_lopair(phy, i - 9, j * 2);
1789 memcpy(&control, tmp_control, sizeof(control));
1790 tmp = (i - 9) * 2 + j - 5;//FIXME: This is wrong, as the following if statement can never trigger.
1791 r27 = 0;
1792 r31 = 0;
1793 if (tmp > 14) {
1794 r31 = 1;
1795 if (tmp > 17)
1796 r27 = 1;
1797 if (tmp > 19)
1798 r27 = 2;
1799 }
1800 } else {
1801 tmp_control = bcm43xx_get_lopair(phy, i - 9, j * 2);
1802 if (!tmp_control->used)
1803 continue;
1804 memcpy(&control, tmp_control, sizeof(control));
1805 r27 = 3;
1806 r31 = 0;
1807 }
1808 bcm43xx_radio_write16(bcm, 0x43, i - 9);
1809 bcm43xx_radio_write16(bcm, 0x52,
1810 radio->txctl2
1811 | (3/*txctl1*/ << 4));//FIXME: shouldn't txctl1 be zero here and 3 in the loop above?
1812 udelay(10);
1813 bcm43xx_voluntary_preempt();
1814
1815 bcm43xx_phy_set_baseband_attenuation(bcm, j * 2);
1816
1817 tmp = (regstack[10] & 0xFFF0);
1818 if (r31)
1819 tmp |= 0x0008;
1820 bcm43xx_radio_write16(bcm, 0x7A, tmp);
1821
1822 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1823 bcm43xx_phy_lo_g_state(bcm, &control, tmp_control, r27);
1824 }
1825 }
1826
1827 /* Restoration */
1828 if (phy->connected) {
1829 bcm43xx_phy_write(bcm, 0x0015, 0xE300);
1830 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA0);
1831 udelay(5);
1832 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA2);
1833 udelay(2);
1834 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA3);
1835 bcm43xx_voluntary_preempt();
1836 } else
1837 bcm43xx_phy_write(bcm, 0x0015, r27 | 0xEFA0);
1838 bcm43xx_phy_lo_adjust(bcm, is_initializing);
1839 bcm43xx_phy_write(bcm, 0x002E, 0x807F);
1840 if (phy->connected)
1841 bcm43xx_phy_write(bcm, 0x002F, 0x0202);
1842 else
1843 bcm43xx_phy_write(bcm, 0x002F, 0x0101);
1844 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, regstack[4]);
1845 bcm43xx_phy_write(bcm, 0x0015, regstack[5]);
1846 bcm43xx_phy_write(bcm, 0x002A, regstack[6]);
1847 bcm43xx_phy_write(bcm, 0x0035, regstack[7]);
1848 bcm43xx_phy_write(bcm, 0x0060, regstack[8]);
1849 bcm43xx_radio_write16(bcm, 0x0043, regstack[9]);
1850 bcm43xx_radio_write16(bcm, 0x007A, regstack[10]);
1851 regstack[11] &= 0x00F0;
1852 regstack[11] |= (bcm43xx_radio_read16(bcm, 0x52) & 0x000F);
1853 bcm43xx_radio_write16(bcm, 0x52, regstack[11]);
1854 bcm43xx_write16(bcm, 0x03E2, regstack[3]);
1855 if (phy->connected) {
1856 bcm43xx_phy_write(bcm, 0x0811, regstack[12]);
1857 bcm43xx_phy_write(bcm, 0x0812, regstack[13]);
1858 bcm43xx_phy_write(bcm, 0x0814, regstack[14]);
1859 bcm43xx_phy_write(bcm, 0x0815, regstack[15]);
1860 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0]);
1861 bcm43xx_phy_write(bcm, 0x0802, regstack[1]);
1862 }
1863 bcm43xx_radio_selectchannel(bcm, oldchannel, 1);
1864
1865 #ifdef CONFIG_BCM43XX_DEBUG
1866 {
1867 /* Sanity check for all lopairs. */
1868 for (i = 0; i < BCM43xx_LO_COUNT; i++) {
1869 tmp_control = phy->_lo_pairs + i;
1870 if (tmp_control->low < -8 || tmp_control->low > 8 ||
1871 tmp_control->high < -8 || tmp_control->high > 8) {
1872 printk(KERN_WARNING PFX
1873 "WARNING: Invalid LOpair (low: %d, high: %d, index: %d)\n",
1874 tmp_control->low, tmp_control->high, i);
1875 }
1876 }
1877 }
1878 #endif /* CONFIG_BCM43XX_DEBUG */
1879 }
1880
1881 static
1882 void bcm43xx_phy_lo_mark_current_used(struct bcm43xx_private *bcm)
1883 {
1884 struct bcm43xx_lopair *pair;
1885
1886 pair = bcm43xx_current_lopair(bcm);
1887 pair->used = 1;
1888 }
1889
1890 void bcm43xx_phy_lo_mark_all_unused(struct bcm43xx_private *bcm)
1891 {
1892 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1893 struct bcm43xx_lopair *pair;
1894 int i;
1895
1896 for (i = 0; i < BCM43xx_LO_COUNT; i++) {
1897 pair = phy->_lo_pairs + i;
1898 pair->used = 0;
1899 }
1900 }
1901
1902 /* http://bcm-specs.sipsolutions.net/EstimatePowerOut
1903 * This function converts a TSSI value to dBm in Q5.2
1904 */
1905 static s8 bcm43xx_phy_estimate_power_out(struct bcm43xx_private *bcm, s8 tssi)
1906 {
1907 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1908 s8 dbm = 0;
1909 s32 tmp;
1910
1911 tmp = phy->idle_tssi;
1912 tmp += tssi;
1913 tmp -= phy->savedpctlreg;
1914
1915 switch (phy->type) {
1916 case BCM43xx_PHYTYPE_A:
1917 tmp += 0x80;
1918 tmp = limit_value(tmp, 0x00, 0xFF);
1919 dbm = phy->tssi2dbm[tmp];
1920 TODO(); //TODO: There's a FIXME on the specs
1921 break;
1922 case BCM43xx_PHYTYPE_B:
1923 case BCM43xx_PHYTYPE_G:
1924 tmp = limit_value(tmp, 0x00, 0x3F);
1925 dbm = phy->tssi2dbm[tmp];
1926 break;
1927 default:
1928 assert(0);
1929 }
1930
1931 return dbm;
1932 }
1933
1934 /* http://bcm-specs.sipsolutions.net/RecalculateTransmissionPower */
1935 void bcm43xx_phy_xmitpower(struct bcm43xx_private *bcm)
1936 {
1937 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1938 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1939
1940 if (phy->savedpctlreg == 0xFFFF)
1941 return;
1942 if ((bcm->board_type == 0x0416) &&
1943 (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM))
1944 return;
1945
1946 switch (phy->type) {
1947 case BCM43xx_PHYTYPE_A: {
1948
1949 TODO(); //TODO: Nothing for A PHYs yet :-/
1950
1951 break;
1952 }
1953 case BCM43xx_PHYTYPE_B:
1954 case BCM43xx_PHYTYPE_G: {
1955 u16 tmp;
1956 u16 txpower;
1957 s8 v0, v1, v2, v3;
1958 s8 average;
1959 u8 max_pwr;
1960 s16 desired_pwr, estimated_pwr, pwr_adjust;
1961 s16 radio_att_delta, baseband_att_delta;
1962 s16 radio_attenuation, baseband_attenuation;
1963 unsigned long phylock_flags;
1964
1965 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0058);
1966 v0 = (s8)(tmp & 0x00FF);
1967 v1 = (s8)((tmp & 0xFF00) >> 8);
1968 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x005A);
1969 v2 = (s8)(tmp & 0x00FF);
1970 v3 = (s8)((tmp & 0xFF00) >> 8);
1971 tmp = 0;
1972
1973 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) {
1974 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0070);
1975 v0 = (s8)(tmp & 0x00FF);
1976 v1 = (s8)((tmp & 0xFF00) >> 8);
1977 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0072);
1978 v2 = (s8)(tmp & 0x00FF);
1979 v3 = (s8)((tmp & 0xFF00) >> 8);
1980 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F)
1981 return;
1982 v0 = (v0 + 0x20) & 0x3F;
1983 v1 = (v1 + 0x20) & 0x3F;
1984 v2 = (v2 + 0x20) & 0x3F;
1985 v3 = (v3 + 0x20) & 0x3F;
1986 tmp = 1;
1987 }
1988 bcm43xx_radio_clear_tssi(bcm);
1989
1990 average = (v0 + v1 + v2 + v3 + 2) / 4;
1991
1992 if (tmp && (bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x005E) & 0x8))
1993 average -= 13;
1994
1995 estimated_pwr = bcm43xx_phy_estimate_power_out(bcm, average);
1996
1997 max_pwr = bcm->sprom.maxpower_bgphy;
1998
1999 if ((bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) &&
2000 (phy->type == BCM43xx_PHYTYPE_G))
2001 max_pwr -= 0x3;
2002
2003 /*TODO:
2004 max_pwr = min(REG - bcm->sprom.antennagain_bgphy - 0x6, max_pwr)
2005 where REG is the max power as per the regulatory domain
2006 */
2007
2008 desired_pwr = limit_value(radio->txpower_desired, 0, max_pwr);
2009 /* Check if we need to adjust the current power. */
2010 pwr_adjust = desired_pwr - estimated_pwr;
2011 radio_att_delta = -(pwr_adjust + 7) >> 3;
2012 baseband_att_delta = -(pwr_adjust >> 1) - (4 * radio_att_delta);
2013 if ((radio_att_delta == 0) && (baseband_att_delta == 0)) {
2014 bcm43xx_phy_lo_mark_current_used(bcm);
2015 return;
2016 }
2017
2018 /* Calculate the new attenuation values. */
2019 baseband_attenuation = radio->baseband_atten;
2020 baseband_attenuation += baseband_att_delta;
2021 radio_attenuation = radio->radio_atten;
2022 radio_attenuation += radio_att_delta;
2023
2024 /* Get baseband and radio attenuation values into their permitted ranges.
2025 * baseband 0-11, radio 0-9.
2026 * Radio attenuation affects power level 4 times as much as baseband.
2027 */
2028 if (radio_attenuation < 0) {
2029 baseband_attenuation -= (4 * -radio_attenuation);
2030 radio_attenuation = 0;
2031 } else if (radio_attenuation > 9) {
2032 baseband_attenuation += (4 * (radio_attenuation - 9));
2033 radio_attenuation = 9;
2034 } else {
2035 while (baseband_attenuation < 0 && radio_attenuation > 0) {
2036 baseband_attenuation += 4;
2037 radio_attenuation--;
2038 }
2039 while (baseband_attenuation > 11 && radio_attenuation < 9) {
2040 baseband_attenuation -= 4;
2041 radio_attenuation++;
2042 }
2043 }
2044 baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
2045
2046 txpower = radio->txctl1;
2047 if ((radio->version == 0x2050) && (radio->revision == 2)) {
2048 if (radio_attenuation <= 1) {
2049 if (txpower == 0) {
2050 txpower = 3;
2051 radio_attenuation += 2;
2052 baseband_attenuation += 2;
2053 } else if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) {
2054 baseband_attenuation += 4 * (radio_attenuation - 2);
2055 radio_attenuation = 2;
2056 }
2057 } else if (radio_attenuation > 4 && txpower != 0) {
2058 txpower = 0;
2059 if (baseband_attenuation < 3) {
2060 radio_attenuation -= 3;
2061 baseband_attenuation += 2;
2062 } else {
2063 radio_attenuation -= 2;
2064 baseband_attenuation -= 2;
2065 }
2066 }
2067 }
2068 radio->txctl1 = txpower;
2069 baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
2070 radio_attenuation = limit_value(radio_attenuation, 0, 9);
2071
2072 bcm43xx_phy_lock(bcm, phylock_flags);
2073 bcm43xx_radio_lock(bcm);
2074 bcm43xx_radio_set_txpower_bg(bcm, baseband_attenuation,
2075 radio_attenuation, txpower);
2076 bcm43xx_phy_lo_mark_current_used(bcm);
2077 bcm43xx_radio_unlock(bcm);
2078 bcm43xx_phy_unlock(bcm, phylock_flags);
2079 break;
2080 }
2081 default:
2082 assert(0);
2083 }
2084 }
2085
2086 static inline
2087 s32 bcm43xx_tssi2dbm_ad(s32 num, s32 den)
2088 {
2089 if (num < 0)
2090 return num/den;
2091 else
2092 return (num+den/2)/den;
2093 }
2094
2095 static inline
2096 s8 bcm43xx_tssi2dbm_entry(s8 entry [], u8 index, s16 pab0, s16 pab1, s16 pab2)
2097 {
2098 s32 m1, m2, f = 256, q, delta;
2099 s8 i = 0;
2100
2101 m1 = bcm43xx_tssi2dbm_ad(16 * pab0 + index * pab1, 32);
2102 m2 = max(bcm43xx_tssi2dbm_ad(32768 + index * pab2, 256), 1);
2103 do {
2104 if (i > 15)
2105 return -EINVAL;
2106 q = bcm43xx_tssi2dbm_ad(f * 4096 -
2107 bcm43xx_tssi2dbm_ad(m2 * f, 16) * f, 2048);
2108 delta = abs(q - f);
2109 f = q;
2110 i++;
2111 } while (delta >= 2);
2112 entry[index] = limit_value(bcm43xx_tssi2dbm_ad(m1 * f, 8192), -127, 128);
2113 return 0;
2114 }
2115
2116 /* http://bcm-specs.sipsolutions.net/TSSI_to_DBM_Table */
2117 int bcm43xx_phy_init_tssi2dbm_table(struct bcm43xx_private *bcm)
2118 {
2119 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2120 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
2121 s16 pab0, pab1, pab2;
2122 u8 idx;
2123 s8 *dyn_tssi2dbm;
2124
2125 if (phy->type == BCM43xx_PHYTYPE_A) {
2126 pab0 = (s16)(bcm->sprom.pa1b0);
2127 pab1 = (s16)(bcm->sprom.pa1b1);
2128 pab2 = (s16)(bcm->sprom.pa1b2);
2129 } else {
2130 pab0 = (s16)(bcm->sprom.pa0b0);
2131 pab1 = (s16)(bcm->sprom.pa0b1);
2132 pab2 = (s16)(bcm->sprom.pa0b2);
2133 }
2134
2135 if ((bcm->chip_id == 0x4301) && (radio->version != 0x2050)) {
2136 phy->idle_tssi = 0x34;
2137 phy->tssi2dbm = bcm43xx_tssi2dbm_b_table;
2138 return 0;
2139 }
2140
2141 if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
2142 pab0 != -1 && pab1 != -1 && pab2 != -1) {
2143 /* The pabX values are set in SPROM. Use them. */
2144 if (phy->type == BCM43xx_PHYTYPE_A) {
2145 if ((s8)bcm->sprom.idle_tssi_tgt_aphy != 0 &&
2146 (s8)bcm->sprom.idle_tssi_tgt_aphy != -1)
2147 phy->idle_tssi = (s8)(bcm->sprom.idle_tssi_tgt_aphy);
2148 else
2149 phy->idle_tssi = 62;
2150 } else {
2151 if ((s8)bcm->sprom.idle_tssi_tgt_bgphy != 0 &&
2152 (s8)bcm->sprom.idle_tssi_tgt_bgphy != -1)
2153 phy->idle_tssi = (s8)(bcm->sprom.idle_tssi_tgt_bgphy);
2154 else
2155 phy->idle_tssi = 62;
2156 }
2157 dyn_tssi2dbm = kmalloc(64, GFP_KERNEL);
2158 if (dyn_tssi2dbm == NULL) {
2159 printk(KERN_ERR PFX "Could not allocate memory"
2160 "for tssi2dbm table\n");
2161 return -ENOMEM;
2162 }
2163 for (idx = 0; idx < 64; idx++)
2164 if (bcm43xx_tssi2dbm_entry(dyn_tssi2dbm, idx, pab0, pab1, pab2)) {
2165 phy->tssi2dbm = NULL;
2166 printk(KERN_ERR PFX "Could not generate "
2167 "tssi2dBm table\n");
2168 kfree(dyn_tssi2dbm);
2169 return -ENODEV;
2170 }
2171 phy->tssi2dbm = dyn_tssi2dbm;
2172 phy->dyn_tssi_tbl = 1;
2173 } else {
2174 /* pabX values not set in SPROM. */
2175 switch (phy->type) {
2176 case BCM43xx_PHYTYPE_A:
2177 /* APHY needs a generated table. */
2178 phy->tssi2dbm = NULL;
2179 printk(KERN_ERR PFX "Could not generate tssi2dBm "
2180 "table (wrong SPROM info)!\n");
2181 return -ENODEV;
2182 case BCM43xx_PHYTYPE_B:
2183 phy->idle_tssi = 0x34;
2184 phy->tssi2dbm = bcm43xx_tssi2dbm_b_table;
2185 break;
2186 case BCM43xx_PHYTYPE_G:
2187 phy->idle_tssi = 0x34;
2188 phy->tssi2dbm = bcm43xx_tssi2dbm_g_table;
2189 break;
2190 }
2191 }
2192
2193 return 0;
2194 }
2195
2196 int bcm43xx_phy_init(struct bcm43xx_private *bcm)
2197 {
2198 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2199 int err = -ENODEV;
2200
2201 switch (phy->type) {
2202 case BCM43xx_PHYTYPE_A:
2203 if (phy->rev == 2 || phy->rev == 3) {
2204 bcm43xx_phy_inita(bcm);
2205 err = 0;
2206 }
2207 break;
2208 case BCM43xx_PHYTYPE_B:
2209 switch (phy->rev) {
2210 case 2:
2211 bcm43xx_phy_initb2(bcm);
2212 err = 0;
2213 break;
2214 case 4:
2215 bcm43xx_phy_initb4(bcm);
2216 err = 0;
2217 break;
2218 case 5:
2219 bcm43xx_phy_initb5(bcm);
2220 err = 0;
2221 break;
2222 case 6:
2223 bcm43xx_phy_initb6(bcm);
2224 err = 0;
2225 break;
2226 }
2227 break;
2228 case BCM43xx_PHYTYPE_G:
2229 bcm43xx_phy_initg(bcm);
2230 err = 0;
2231 break;
2232 }
2233 if (err)
2234 printk(KERN_WARNING PFX "Unknown PHYTYPE found!\n");
2235
2236 return err;
2237 }
2238
2239 void bcm43xx_phy_set_antenna_diversity(struct bcm43xx_private *bcm)
2240 {
2241 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2242 u16 antennadiv;
2243 u16 offset;
2244 u16 value;
2245 u32 ucodeflags;
2246
2247 antennadiv = phy->antenna_diversity;
2248
2249 if (antennadiv == 0xFFFF)
2250 antennadiv = 3;
2251 assert(antennadiv <= 3);
2252
2253 ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
2254 BCM43xx_UCODEFLAGS_OFFSET);
2255 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
2256 BCM43xx_UCODEFLAGS_OFFSET,
2257 ucodeflags & ~BCM43xx_UCODEFLAG_AUTODIV);
2258
2259 switch (phy->type) {
2260 case BCM43xx_PHYTYPE_A:
2261 case BCM43xx_PHYTYPE_G:
2262 if (phy->type == BCM43xx_PHYTYPE_A)
2263 offset = 0x0000;
2264 else
2265 offset = 0x0400;
2266
2267 if (antennadiv == 2)
2268 value = (3/*automatic*/ << 7);
2269 else
2270 value = (antennadiv << 7);
2271 bcm43xx_phy_write(bcm, offset + 1,
2272 (bcm43xx_phy_read(bcm, offset + 1)
2273 & 0x7E7F) | value);
2274
2275 if (antennadiv >= 2) {
2276 if (antennadiv == 2)
2277 value = (antennadiv << 7);
2278 else
2279 value = (0/*force0*/ << 7);
2280 bcm43xx_phy_write(bcm, offset + 0x2B,
2281 (bcm43xx_phy_read(bcm, offset + 0x2B)
2282 & 0xFEFF) | value);
2283 }
2284
2285 if (phy->type == BCM43xx_PHYTYPE_G) {
2286 if (antennadiv >= 2)
2287 bcm43xx_phy_write(bcm, 0x048C,
2288 bcm43xx_phy_read(bcm, 0x048C)
2289 | 0x2000);
2290 else
2291 bcm43xx_phy_write(bcm, 0x048C,
2292 bcm43xx_phy_read(bcm, 0x048C)
2293 & ~0x2000);
2294 if (phy->rev >= 2) {
2295 bcm43xx_phy_write(bcm, 0x0461,
2296 bcm43xx_phy_read(bcm, 0x0461)
2297 | 0x0010);
2298 bcm43xx_phy_write(bcm, 0x04AD,
2299 (bcm43xx_phy_read(bcm, 0x04AD)
2300 & 0x00FF) | 0x0015);
2301 if (phy->rev == 2)
2302 bcm43xx_phy_write(bcm, 0x0427, 0x0008);
2303 else
2304 bcm43xx_phy_write(bcm, 0x0427,
2305 (bcm43xx_phy_read(bcm, 0x0427)
2306 & 0x00FF) | 0x0008);
2307 }
2308 else if (phy->rev >= 6)
2309 bcm43xx_phy_write(bcm, 0x049B, 0x00DC);
2310 } else {
2311 if (phy->rev < 3)
2312 bcm43xx_phy_write(bcm, 0x002B,
2313 (bcm43xx_phy_read(bcm, 0x002B)
2314 & 0x00FF) | 0x0024);
2315 else {
2316 bcm43xx_phy_write(bcm, 0x0061,
2317 bcm43xx_phy_read(bcm, 0x0061)
2318 | 0x0010);
2319 if (phy->rev == 3) {
2320 bcm43xx_phy_write(bcm, 0x0093, 0x001D);
2321 bcm43xx_phy_write(bcm, 0x0027, 0x0008);
2322 } else {
2323 bcm43xx_phy_write(bcm, 0x0093, 0x003A);
2324 bcm43xx_phy_write(bcm, 0x0027,
2325 (bcm43xx_phy_read(bcm, 0x0027)
2326 & 0x00FF) | 0x0008);
2327 }
2328 }
2329 }
2330 break;
2331 case BCM43xx_PHYTYPE_B:
2332 if (bcm->current_core->rev == 2)
2333 value = (3/*automatic*/ << 7);
2334 else
2335 value = (antennadiv << 7);
2336 bcm43xx_phy_write(bcm, 0x03E2,
2337 (bcm43xx_phy_read(bcm, 0x03E2)
2338 & 0xFE7F) | value);
2339 break;
2340 default:
2341 assert(0);
2342 }
2343
2344 if (antennadiv >= 2) {
2345 ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
2346 BCM43xx_UCODEFLAGS_OFFSET);
2347 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
2348 BCM43xx_UCODEFLAGS_OFFSET,
2349 ucodeflags | BCM43xx_UCODEFLAG_AUTODIV);
2350 }
2351
2352 phy->antenna_diversity = antennadiv;
2353 }
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