include/asm-sh/pgtable.h

   1 /*
   2  * This file contains the functions and defines necessary to modify and
   3  * use the SuperH page table tree.
   4  *
   5  * Copyright (C) 1999 Niibe Yutaka
   6  * Copyright (C) 2002 - 2005 Paul Mundt
   7  *
   8  * This file is subject to the terms and conditions of the GNU General
   9  * Public License.  See the file "COPYING" in the main directory of this
  10  * archive for more details.
  11  */
  12 #ifndef __ASM_SH_PGTABLE_H
  13 #define __ASM_SH_PGTABLE_H
  14
  15 #include <asm-generic/pgtable-nopmd.h>
  16 #include <asm/page.h>
  17
  18 #define PTRS_PER_PGD            1024
  19
  20 #ifndef __ASSEMBLY__
  21 #include <asm/addrspace.h>
  22 #include <asm/fixmap.h>
  23
  24 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
  25 extern void paging_init(void);
  26
  27 /*
  28  * ZERO_PAGE is a global shared page that is always zero: used
  29  * for zero-mapped memory areas etc..
  30  */
  31 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
  32 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
  33
  34 #endif /* !__ASSEMBLY__ */
  35
  36 /* traditional two-level paging structure */
  37 #define PGDIR_SHIFT     22
  38 #define PTRS_PER_PMD    1
  39 #define PTRS_PER_PTE    1024
  40 #define PMD_SIZE        (1UL << PMD_SHIFT)
  41 #define PMD_MASK        (~(PMD_SIZE-1))
  42 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
  43 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
  44
  45 #define USER_PTRS_PER_PGD       (TASK_SIZE/PGDIR_SIZE)
  46 #define FIRST_USER_ADDRESS      0
  47
  48 #define PTE_PHYS_MASK   0x1ffff000
  49
  50 /*
  51  * First 1MB map is used by fixed purpose.
  52  * Currently only 4-enty (16kB) is used (see arch/sh/mm/cache.c)
  53  */
  54 #define VMALLOC_START   (P3SEG+0x00100000)
  55 #define VMALLOC_END     (FIXADDR_START-2*PAGE_SIZE)
  56
  57 /*
  58  * Linux PTEL encoding.
  59  *
  60  * Hardware and software bit definitions for the PTEL value:
  61  *
  62  * - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4).
  63  *
  64  * - Bit 1 is the SH-bit, but is unused on SH-3 due to an MMU bug (the
  65  *   hardware PTEL value can't have the SH-bit set when MMUCR.IX is set,
  66  *   which is the default in cpu-sh3/mmu_context.h:MMU_CONTROL_INIT).
  67  *
  68  *   In order to keep this relatively clean, do not use these for defining
  69  *   SH-3 specific flags until all of the other unused bits have been
  70  *   exhausted.
  71  *
  72  * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE.
  73  *
  74  * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages.
  75  *   Bit 10 is used for _PAGE_ACCESSED, bit 11 remains unused.
  76  *
  77  * - Bits 31, 30, and 29 remain unused by everyone and can be used for future
  78  *   software flags, although care must be taken to update _PAGE_CLEAR_FLAGS.
  79  */
  80 #define _PAGE_WT        0x001           /* WT-bit on SH-4, 0 on SH-3 */
  81 #define _PAGE_HW_SHARED 0x002           /* SH-bit  : shared among processes */
  82 #define _PAGE_DIRTY     0x004           /* D-bit   : page changed */
  83 #define _PAGE_CACHABLE  0x008           /* C-bit   : cachable */
  84 #define _PAGE_SZ0       0x010           /* SZ0-bit : Size of page */
  85 #define _PAGE_RW        0x020           /* PR0-bit : write access allowed */
  86 #define _PAGE_USER      0x040           /* PR1-bit : user space access allowed */
  87 #define _PAGE_SZ1       0x080           /* SZ1-bit : Size of page (on SH-4) */
  88 #define _PAGE_PRESENT   0x100           /* V-bit   : page is valid */
  89 #define _PAGE_PROTNONE  0x200           /* software: if not present  */
  90 #define _PAGE_ACCESSED  0x400           /* software: page referenced */
  91 #define _PAGE_FILE      _PAGE_WT        /* software: pagecache or swap? */
  92
  93 /* software: moves to PTEA.TC (Timing Control) */
  94 #define _PAGE_PCC_AREA5 0x00000000      /* use BSC registers for area5 */
  95 #define _PAGE_PCC_AREA6 0x80000000      /* use BSC registers for area6 */
  96
  97 /* software: moves to PTEA.SA[2:0] (Space Attributes) */
  98 #define _PAGE_PCC_IODYN 0x00000001      /* IO space, dynamically sized bus */
  99 #define _PAGE_PCC_IO8   0x20000000      /* IO space, 8 bit bus */
 100 #define _PAGE_PCC_IO16  0x20000001      /* IO space, 16 bit bus */
 101 #define _PAGE_PCC_COM8  0x40000000      /* Common Memory space, 8 bit bus */
 102 #define _PAGE_PCC_COM16 0x40000001      /* Common Memory space, 16 bit bus */
 103 #define _PAGE_PCC_ATR8  0x60000000      /* Attribute Memory space, 8 bit bus */
 104 #define _PAGE_PCC_ATR16 0x60000001      /* Attribute Memory space, 6 bit bus */
 105
 106 /* Mask which drops unused bits from the PTEL value */
 107 #ifdef CONFIG_CPU_SH3
 108 #define _PAGE_CLEAR_FLAGS       (_PAGE_PROTNONE | _PAGE_ACCESSED| \
 109                                  _PAGE_FILE     | _PAGE_SZ1     | \
 110                                  _PAGE_HW_SHARED)
 111 #else
 112 #define _PAGE_CLEAR_FLAGS       (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE)
 113 #endif
 114
 115 #define _PAGE_FLAGS_HARDWARE_MASK       (0x1fffffff & ~(_PAGE_CLEAR_FLAGS))
 116
 117 /* Hardware flags: SZ0=1 (4k-byte) */
 118 #define _PAGE_FLAGS_HARD        _PAGE_SZ0
 119
 120 #if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
 121 #define _PAGE_SZHUGE    (_PAGE_SZ1)
 122 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
 123 #define _PAGE_SZHUGE    (_PAGE_SZ0 | _PAGE_SZ1)
 124 #endif
 125
 126 #define _PAGE_TABLE     (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
 127 #define _KERNPG_TABLE   (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
 128 #define _PAGE_CHG_MASK  (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY)
 129
 130 #ifndef __ASSEMBLY__
 131
 132 #ifdef CONFIG_MMU
 133 #define PAGE_NONE       __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
 134 #define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
 135 #define PAGE_COPY       __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
 136 #define PAGE_READONLY   __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
 137 #define PAGE_KERNEL     __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
 138 #define PAGE_KERNEL_NOCACHE \
 139                         __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
 140 #define PAGE_KERNEL_RO  __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
 141 #define PAGE_KERNEL_PCC(slot, type) \
 142                         __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_FLAGS_HARD | (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | (type))
 143 #else /* no mmu */
 144 #define PAGE_NONE               __pgprot(0)
 145 #define PAGE_SHARED             __pgprot(0)
 146 #define PAGE_COPY               __pgprot(0)
 147 #define PAGE_READONLY           __pgprot(0)
 148 #define PAGE_KERNEL             __pgprot(0)
 149 #define PAGE_KERNEL_NOCACHE     __pgprot(0)
 150 #define PAGE_KERNEL_RO          __pgprot(0)
 151 #define PAGE_KERNEL_PCC         __pgprot(0)
 152 #endif
 153
 154 #endif /* __ASSEMBLY__ */
 155
 156 /*
 157  * As i386 and MIPS, SuperH can't do page protection for execute, and
 158  * considers that the same as a read.  Also, write permissions imply
 159  * read permissions. This is the closest we can get..
 160  */
 161 #define __P000  PAGE_NONE
 162 #define __P001  PAGE_READONLY
 163 #define __P010  PAGE_COPY
 164 #define __P011  PAGE_COPY
 165 #define __P100  PAGE_READONLY
 166 #define __P101  PAGE_READONLY
 167 #define __P110  PAGE_COPY
 168 #define __P111  PAGE_COPY
 169
 170 #define __S000  PAGE_NONE
 171 #define __S001  PAGE_READONLY
 172 #define __S010  PAGE_SHARED
 173 #define __S011  PAGE_SHARED
 174 #define __S100  PAGE_READONLY
 175 #define __S101  PAGE_READONLY
 176 #define __S110  PAGE_SHARED
 177 #define __S111  PAGE_SHARED
 178
 179 #ifndef __ASSEMBLY__
 180
 181 /*
 182  * Certain architectures need to do special things when PTEs
 183  * within a page table are directly modified.  Thus, the following
 184  * hook is made available.
 185  */
 186 #define set_pte(pteptr, pteval) (*(pteptr) = pteval)
 187 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
 188
 189 /*
 190  * (pmds are folded into pgds so this doesn't get actually called,
 191  * but the define is needed for a generic inline function.)
 192  */
 193 #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
 194
 195 #define pte_pfn(x)              ((unsigned long)(((x).pte >> PAGE_SHIFT)))
 196 #define pfn_pte(pfn, prot)      __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
 197 #define pfn_pmd(pfn, prot)      __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
 198
 199 #define pte_none(x)     (!pte_val(x))
 200 #define pte_present(x)  (pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
 201 #define pte_clear(mm,addr,xp)   do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
 202
 203 #define pmd_none(x)     (!pmd_val(x))
 204 #define pmd_present(x)  (pmd_val(x) & _PAGE_PRESENT)
 205 #define pmd_clear(xp)   do { set_pmd(xp, __pmd(0)); } while (0)
 206 #define pmd_bad(x)      ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
 207
 208 #define pages_to_mb(x)  ((x) >> (20-PAGE_SHIFT))
 209 #define pte_page(x)     phys_to_page(pte_val(x)&PTE_PHYS_MASK)
 210
 211 /*
 212  * The following only work if pte_present() is true.
 213  * Undefined behaviour if not..
 214  */
 215 static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
 216 static inline int pte_exec(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
 217 static inline int pte_dirty(pte_t pte){ return pte_val(pte) & _PAGE_DIRTY; }
 218 static inline int pte_young(pte_t pte){ return pte_val(pte) & _PAGE_ACCESSED; }
 219 static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
 220 static inline int pte_write(pte_t pte){ return pte_val(pte) & _PAGE_RW; }
 221 static inline int pte_not_present(pte_t pte){ return !(pte_val(pte) & _PAGE_PRESENT); }
 222
 223 static inline pte_t pte_rdprotect(pte_t pte)    { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
 224 static inline pte_t pte_exprotect(pte_t pte)    { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
 225 static inline pte_t pte_mkclean(pte_t pte)      { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
 226 static inline pte_t pte_mkold(pte_t pte)        { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; }
 227 static inline pte_t pte_wrprotect(pte_t pte)    { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; }
 228 static inline pte_t pte_mkread(pte_t pte)       { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; }
 229 static inline pte_t pte_mkexec(pte_t pte)       { set_pte(&pte, __pte(pte_val(pte) | _PAGE_USER)); return pte; }
 230 static inline pte_t pte_mkdirty(pte_t pte)      { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
 231 static inline pte_t pte_mkyoung(pte_t pte)      { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
 232 static inline pte_t pte_mkwrite(pte_t pte)      { set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
 233 #ifdef CONFIG_HUGETLB_PAGE
 234 static inline pte_t pte_mkhuge(pte_t pte)       { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; }
 235 #endif
 236
 237 /*
 238  * Macro and implementation to make a page protection as uncachable.
 239  */
 240 #define pgprot_noncached pgprot_noncached
 241
 242 static inline pgprot_t pgprot_noncached(pgprot_t _prot)
 243 {
 244         unsigned long prot = pgprot_val(_prot);
 245
 246         prot &= ~_PAGE_CACHABLE;
 247         return __pgprot(prot);
 248 }
 249
 250 #define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
 251
 252 /*
 253  * Conversion functions: convert a page and protection to a page entry,
 254  * and a page entry and page directory to the page they refer to.
 255  *
 256  * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
 257  */
 258 #define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
 259
 260 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 261 { set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; }
 262
 263 #define pmd_page_vaddr(pmd) \
 264 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
 265
 266 #define pmd_page(pmd) \
 267         (phys_to_page(pmd_val(pmd)))
 268
 269 /* to find an entry in a page-table-directory. */
 270 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
 271 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
 272
 273 /* to find an entry in a kernel page-table-directory */
 274 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
 275
 276 /* Find an entry in the third-level page table.. */
 277 #define pte_index(address) \
 278                 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 279 #define pte_offset_kernel(dir, address) \
 280         ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
 281 #define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
 282 #define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address)
 283 #define pte_unmap(pte)          do { } while (0)
 284 #define pte_unmap_nested(pte)   do { } while (0)
 285
 286 #define pte_ERROR(e) \
 287         printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
 288 #define pgd_ERROR(e) \
 289         printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
 290
 291 struct vm_area_struct;
 292 extern void update_mmu_cache(struct vm_area_struct * vma,
 293                              unsigned long address, pte_t pte);
 294
 295 /* Encode and de-code a swap entry */
 296 /*
 297  * NOTE: We should set ZEROs at the position of _PAGE_PRESENT
 298  *       and _PAGE_PROTNONE bits
 299  */
 300 #define __swp_type(x)           ((x).val & 0xff)
 301 #define __swp_offset(x)         ((x).val >> 10)
 302 #define __swp_entry(type, offset) ((swp_entry_t) { (type) | ((offset) << 10) })
 303 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 })
 304 #define __swp_entry_to_pte(x)   ((pte_t) { (x).val << 1 })
 305
 306 /*
 307  * Encode and decode a nonlinear file mapping entry
 308  */
 309 #define PTE_FILE_MAX_BITS       29
 310 #define pte_to_pgoff(pte)       (pte_val(pte) >> 1)
 311 #define pgoff_to_pte(off)       ((pte_t) { ((off) << 1) | _PAGE_FILE })
 312
 313 typedef pte_t *pte_addr_t;
 314
 315 #define kern_addr_valid(addr)   (1)
 316
 317 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)         \
 318                 remap_pfn_range(vma, vaddr, pfn, size, prot)
 319
 320 #define MK_IOSPACE_PFN(space, pfn)      (pfn)
 321 #define GET_IOSPACE(pfn)                0
 322 #define GET_PFN(pfn)                    (pfn)
 323
 324 struct mm_struct;
 325
 326 /*
 327  * No page table caches to initialise
 328  */
 329 #define pgtable_cache_init()    do { } while (0)
 330
 331 #ifndef CONFIG_MMU
 332 extern unsigned int kobjsize(const void *objp);
 333 #endif /* !CONFIG_MMU */
 334
 335 #if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
 336 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 337 extern pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
 338 #endif
 339
 340 #include <asm-generic/pgtable.h>
 341
 342 #endif /* !__ASSEMBLY__ */
 343 #endif /* __ASM_SH_PAGE_H */