include/asm-sh/r7780rp.h

   1 #ifndef __ASM_SH_RENESAS_R7780RP_H
   2 #define __ASM_SH_RENESAS_R7780RP_H
   3
   4 /*
   5  * linux/include/asm-sh/r7780rp.h
   6  *
   7  * Copyright (C) 2000  Atom Create Engineering Co., Ltd.
   8  *
   9  * Renesas Solutions Highlander R7780RP support
  10  */
  11
  12 /* Box specific addresses.  */
  13 #if defined(CONFIG_SH_R7780MP)
  14 #define PA_BCR          0xa4000000      /* FPGA */
  15 #define PA_IRLMSK       (PA_BCR+0x0000) /* Interrupt Mask control */
  16 #define PA_IRLMON       (PA_BCR+0x0002) /* Interrupt Status control */
  17 #define PA_IRLPRI1      (PA_BCR+0x0004) /* Interrupt Priorty 1 */
  18 #define PA_IRLPRI2      (PA_BCR+0x0006) /* Interrupt Priorty 2 */
  19 #define PA_IRLPRI3      (PA_BCR+0x0008) /* Interrupt Priorty 3 */
  20 #define PA_IRLPRI4      (PA_BCR+0x000a) /* Interrupt Priorty 4 */
  21 #define PA_RSTCTL       (PA_BCR+0x000c) /* Reset Control */
  22 #define PA_PCIBD        (PA_BCR+0x000e) /* PCI Board detect control */
  23 #define PA_PCICD        (PA_BCR+0x0010) /* PCI Conector detect control */
  24 #define PA_EXTGIO       (PA_BCR+0x0016) /* Extension GPIO Control */
  25 #define PA_IVDRMON      (PA_BCR+0x0018) /* iVDR Moniter control */
  26 #define PA_IVDRCTL      (PA_BCR+0x001a) /* iVDR control */
  27 #define PA_OBLED        (PA_BCR+0x001c) /* On Board LED control */
  28 #define PA_OBSW         (PA_BCR+0x001e) /* On Board Switch control */
  29 #define PA_AUDIOSEL     (PA_BCR+0x0020) /* Sound Interface Select control */
  30 #define PA_EXTPLR       (PA_BCR+0x001e) /* Extention Pin Polarity control */
  31 #define PA_TPCTL        (PA_BCR+0x0100) /* Touch Panel Access control */
  32 #define PA_TPDCKCTL     (PA_BCR+0x0102) /* Touch Panel Access data control */
  33 #define PA_TPCTLCLR     (PA_BCR+0x0104) /* Touch Panel Access control */
  34 #define PA_TPXPOS       (PA_BCR+0x0106) /* Touch Panel X position control */
  35 #define PA_TPYPOS       (PA_BCR+0x0108) /* Touch Panel Y position control */
  36 #define PA_DBSW         (PA_BCR+0x0200) /* Debug Board Switch control */
  37 #define PA_CFCTL        (PA_BCR+0x0300) /* CF Timing control */
  38 #define PA_CFPOW        (PA_BCR+0x0302) /* CF Power control */
  39 #define PA_CFCDINTCLR   (PA_BCR+0x0304) /* CF Insert Interrupt clear */
  40 #define PA_SCSMR0       (PA_BCR+0x0400) /* SCIF0 Serial mode control */
  41 #define PA_SCBRR0       (PA_BCR+0x0404) /* SCIF0 Bit rate control */
  42 #define PA_SCSCR0       (PA_BCR+0x0408) /* SCIF0 Serial control */
  43 #define PA_SCFTDR0      (PA_BCR+0x040c) /* SCIF0 Send FIFO control */
  44 #define PA_SCFSR0       (PA_BCR+0x0410) /* SCIF0 Serial status control */
  45 #define PA_SCFRDR0      (PA_BCR+0x0414) /* SCIF0 Receive FIFO control */
  46 #define PA_SCFCR0       (PA_BCR+0x0418) /* SCIF0 FIFO control */
  47 #define PA_SCTFDR0      (PA_BCR+0x041c) /* SCIF0 Send FIFO data control */
  48 #define PA_SCRFDR0      (PA_BCR+0x0420) /* SCIF0 Receive FIFO data control */
  49 #define PA_SCSPTR0      (PA_BCR+0x0424) /* SCIF0 Serial Port control */
  50 #define PA_SCLSR0       (PA_BCR+0x0428) /* SCIF0 Line Status control */
  51 #define PA_SCRER0       (PA_BCR+0x042c) /* SCIF0 Serial Error control */
  52 #define PA_SCSMR1       (PA_BCR+0x0500) /* SCIF1 Serial mode control */
  53 #define PA_SCBRR1       (PA_BCR+0x0504) /* SCIF1 Bit rate control */
  54 #define PA_SCSCR1       (PA_BCR+0x0508) /* SCIF1 Serial control */
  55 #define PA_SCFTDR1      (PA_BCR+0x050c) /* SCIF1 Send FIFO control */
  56 #define PA_SCFSR1       (PA_BCR+0x0510) /* SCIF1 Serial status control */
  57 #define PA_SCFRDR1      (PA_BCR+0x0514) /* SCIF1 Receive FIFO control */
  58 #define PA_SCFCR1       (PA_BCR+0x0518) /* SCIF1 FIFO control */
  59 #define PA_SCTFDR1      (PA_BCR+0x051c) /* SCIF1 Send FIFO data control */
  60 #define PA_SCRFDR1      (PA_BCR+0x0520) /* SCIF1 Receive FIFO data control */
  61 #define PA_SCSPTR1      (PA_BCR+0x0524) /* SCIF1 Serial Port control */
  62 #define PA_SCLSR1       (PA_BCR+0x0528) /* SCIF1 Line Status control */
  63 #define PA_SCRER1       (PA_BCR+0x052c) /* SCIF1 Serial Error control */
  64 #define PA_ICCR         (PA_BCR+0x0600) /* Serial control */
  65 #define PA_SAR          (PA_BCR+0x0602) /* Serial Slave control */
  66 #define PA_MDR          (PA_BCR+0x0604) /* Serial Mode control */
  67 #define PA_ADR1         (PA_BCR+0x0606) /* Serial Address1 control */
  68 #define PA_DAR1         (PA_BCR+0x0646) /* Serial Data1 control */
  69 #define PA_VERREG       (PA_BCR+0x0700) /* FPGA Version Register */
  70 #define PA_POFF         (PA_BCR+0x0800) /* System Power Off control */
  71 #define PA_PMR          (PA_BCR+0x0900) /*  */
  72
  73 #define PA_AX88796L     0xa4100400      /* AX88796L Area */
  74 #define PA_SC1602BSLB   0xa6000000      /* SC1602BSLB Area */
  75 #define PA_IDE_OFFSET   0x1f0           /* CF IDE Offset */
  76 #define AX88796L_IO_BASE        0x1000  /* AX88796L IO Base Address */
  77
  78 #define IRLCNTR1        (PA_BCR + 0)    /* Interrupt Control Register1 */
  79
  80 #define IRQ_PCISLOT1    65              /* PCI Slot #1 IRQ */
  81 #define IRQ_PCISLOT2    66              /* PCI Slot #2 IRQ */
  82 #define IRQ_PCISLOT3    67              /* PCI Slot #3 IRQ */
  83 #define IRQ_PCISLOT4    68              /* PCI Slot #4 IRQ */
  84 // #define IRQ_CFINST   0               /* CF Card Insert IRQ */
  85 #define IRQ_TP          2               /* Touch Panel IRQ */
  86 #define IRQ_SCI1        3               /* SCI1 IRQ */
  87 #define IRQ_SCI0        4               /* SCI0 IRQ */
  88 #define IRQ_2SERIAL     5               /* Serial IRQ */
  89 #define IRQ_RTC         6               /* RTC A / B IRQ */
  90 #define IRQ_EXTENTION6  7               /* EXT6n IRQ */
  91 #define IRQ_EXTENTION5  8               /* EXT5n IRQ */
  92 #define IRQ_EXTENTION4  9               /* EXT4n IRQ */
  93 #define IRQ_EXTENTION2  10              /* EXT2n IRQ */
  94 #define IRQ_EXTENTION1  11              /* EXT1n IRQ */
  95 #define IRQ_ONETH       13              /* On board Ethernet IRQ */
  96 #define IRQ_PSW         14              /* Push Switch IRQ */
  97
  98 #else /* R7780RP */
  99
 100 #define PA_BCR          0xa5000000      /* FPGA */
 101 #define PA_IRLMSK       (PA_BCR+0x0000) /* Interrupt Mask control */
 102 #define PA_IRLMON       (PA_BCR+0x0002) /* Interrupt Status control */
 103 #define PA_SDPOW        (PA_BCR+0x0004) /* SD Power control */
 104 #define PA_RSTCTL       (PA_BCR+0x0006) /* Device Reset control */
 105 #define PA_PCIBD        (PA_BCR+0x0008) /* PCI Board detect control */
 106 #define PA_PCICD        (PA_BCR+0x000a) /* PCI Conector detect control */
 107 #define PA_ZIGIO1       (PA_BCR+0x000c) /* Zigbee IO control 1 */
 108 #define PA_ZIGIO2       (PA_BCR+0x000e) /* Zigbee IO control 2 */
 109 #define PA_ZIGIO3       (PA_BCR+0x0010) /* Zigbee IO control 3 */
 110 #define PA_ZIGIO4       (PA_BCR+0x0012) /* Zigbee IO control 4 */
 111 #define PA_IVDRMON      (PA_BCR+0x0014) /* iVDR Moniter control */
 112 #define PA_IVDRCTL      (PA_BCR+0x0016) /* iVDR control */
 113 #define PA_OBLED        (PA_BCR+0x0018) /* On Board LED control */
 114 #define PA_OBSW         (PA_BCR+0x001a) /* On Board Switch control */
 115 #define PA_AUDIOSEL     (PA_BCR+0x001c) /* Sound Interface Select control */
 116 #define PA_EXTPLR       (PA_BCR+0x001e) /* Extention Pin Polarity control */
 117 #define PA_TPCTL        (PA_BCR+0x0100) /* Touch Panel Access control */
 118 #define PA_TPDCKCTL     (PA_BCR+0x0102) /* Touch Panel Access data control */
 119 #define PA_TPCTLCLR     (PA_BCR+0x0104) /* Touch Panel Access control */
 120 #define PA_TPXPOS       (PA_BCR+0x0106) /* Touch Panel X position control */
 121 #define PA_TPYPOS       (PA_BCR+0x0108) /* Touch Panel Y position control */
 122 #define PA_DBDET        (PA_BCR+0x0200) /* Debug Board detect control */
 123 #define PA_DBDISPCTL    (PA_BCR+0x0202) /* Debug Board Dot timing control */
 124 #define PA_DBSW         (PA_BCR+0x0204) /* Debug Board Switch control */
 125 #define PA_CFCTL        (PA_BCR+0x0300) /* CF Timing control */
 126 #define PA_CFPOW        (PA_BCR+0x0302) /* CF Power control */
 127 #define PA_CFCDINTCLR   (PA_BCR+0x0304) /* CF Insert Interrupt clear */
 128 #define PA_SCSMR        (PA_BCR+0x0400) /* SCIF Serial mode control */
 129 #define PA_SCBRR        (PA_BCR+0x0402) /* SCIF Bit rate control */
 130 #define PA_SCSCR        (PA_BCR+0x0404) /* SCIF Serial control */
 131 #define PA_SCFDTR       (PA_BCR+0x0406) /* SCIF Send FIFO control */
 132 #define PA_SCFSR        (PA_BCR+0x0408) /* SCIF Serial status control */
 133 #define PA_SCFRDR       (PA_BCR+0x040a) /* SCIF Receive FIFO control */
 134 #define PA_SCFCR        (PA_BCR+0x040c) /* SCIF FIFO control */
 135 #define PA_SCFDR        (PA_BCR+0x040e) /* SCIF FIFO data control */
 136 #define PA_SCLSR        (PA_BCR+0x0412) /* SCIF Line Status control */
 137 #define PA_ICCR         (PA_BCR+0x0500) /* Serial control */
 138 #define PA_SAR          (PA_BCR+0x0502) /* Serial Slave control */
 139 #define PA_MDR          (PA_BCR+0x0504) /* Serial Mode control */
 140 #define PA_ADR1         (PA_BCR+0x0506) /* Serial Address1 control */
 141 #define PA_DAR1         (PA_BCR+0x0546) /* Serial Data1 control */
 142 #define PA_VERREG       (PA_BCR+0x0600) /* FPGA Version Register */
 143
 144 #define PA_AX88796L     0xa5800400      /* AX88796L Area */
 145 #define PA_SC1602BSLB   0xa6000000      /* SC1602BSLB Area */
 146 #define PA_IDE_OFFSET   0x1f0           /* CF IDE Offset */
 147 #define AX88796L_IO_BASE        0x1000  /* AX88796L IO Base Address */
 148
 149 #define IRLCNTR1        (PA_BCR + 0)    /* Interrupt Control Register1 */
 150
 151 #define IRQ_PCISLOT1    0               /* PCI Slot #1 IRQ */
 152 #define IRQ_PCISLOT2    1               /* PCI Slot #2 IRQ */
 153 #define IRQ_PCISLOT3    2               /* PCI Slot #3 IRQ */
 154 #define IRQ_PCISLOT4    3               /* PCI Slot #4 IRQ */
 155 #define IRQ_CFINST      5               /* CF Card Insert IRQ */
 156 #define IRQ_M66596      6               /* M66596 IRQ */
 157 #define IRQ_SDCARD      7               /* SD Card IRQ */
 158 #define IRQ_TUCHPANEL   8               /* Touch Panel IRQ */
 159 #define IRQ_SCI         9               /* SCI IRQ */
 160 #define IRQ_2SERIAL     10              /* Serial IRQ */
 161 #define IRQ_EXTENTION   11              /* EXTn IRQ */
 162 #define IRQ_ONETH       12              /* On board Ethernet IRQ */
 163 #define IRQ_PSW         13              /* Push Switch IRQ */
 164 #define IRQ_ZIGBEE      14              /* Ziggbee IO IRQ */
 165
 166 #endif  /* CONFIG_SH_R7780MP */
 167
 168 #define __IO_PREFIX     r7780rp
 169 #include <asm/io_generic.h>
 170
 171 #endif  /* __ASM_SH_RENESAS_R7780RP */