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[hh.org.git] / drivers / mmc / asic3_mmc.h
blob714dfbd4da0e04984560384cbd3a121061f39778
1 #ifndef __ASIC3_MMC_H
2 #define __ASIC3_MMC_H
4 #define DRIVER_NAME "asic3_mmc"
6 #ifdef CONFIG_MMC_DEBUG
7 #define DBG(x...) printk(DRIVER_NAME ": " x)
8 #else
9 #define DBG(x...) do { } while (0)
10 #endif
12 /* Response types */
13 #define APP_CMD 0x0040
15 #define SD_CONFIG_CLKSTOP_ENABLE_ALL 0x1f
17 #define DONT_CARE_CARD_BITS ( \
18 SD_CTRL_INTMASKCARD_SIGNAL_STATE_PRESENT_3 \
19 | SD_CTRL_INTMASKCARD_WRITE_PROTECT \
20 | SD_CTRL_INTMASKCARD_UNK6 \
21 | SD_CTRL_INTMASKCARD_SIGNAL_STATE_PRESENT_0 \
23 #define DONT_CARE_BUFFER_BITS ( SD_CTRL_INTMASKBUFFER_UNK7 | SD_CTRL_INTMASKBUFFER_CMD_BUSY )
25 #define ASIC3_MMC_DRIVER_CLOCK_SEL_MASK ( CLOCK_SEL_SD_HCLK_SEL | CLOCK_SEL_SD_BCLK_SEL )
26 #define ASIC3_MMC_DRIVER_CLOCK_SEL_BITS ( CLOCK_SEL_SD_HCLK_SEL | 0 )
27 #define ASIC3_MMC_DRIVER_CLOCK_CDEX_MASK ( CLOCK_CDEX_SD_HOST | CLOCK_CDEX_SD_BUS )
28 #define ASIC3_MMC_DRIVER_CLOCK_CDEX_BITS ( CLOCK_CDEX_SD_HOST | CLOCK_CDEX_SD_BUS )
30 #endif // __ASIC3_MMC_H