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[hh.org.git] / drivers / net / netxen / netxen_nic_niu.c
blob7950a04532e6603e69a0190f6df90593ae4e7226
1 /*
2 * Copyright (C) 2003 - 2006 NetXen, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
25 * NetXen,
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
28 *
29 *
30 * Provides access to the Network Interface Unit h/w block.
31 *
32 */
33
34 #include "netxen_nic.h"
35
36 #define NETXEN_GB_MAC_SOFT_RESET 0x80000000
37 #define NETXEN_GB_MAC_RESET_PROT_BLK 0x000F0000
38 #define NETXEN_GB_MAC_ENABLE_TX_RX 0x00000005
39 #define NETXEN_GB_MAC_PAUSED_FRMS 0x00000020
40
41 static long phy_lock_timeout = 100000000;
42
43 static inline int phy_lock(void)
44 {
45 int i;
46 int done = 0, timeout = 0;
47
48 while (!done) {
49 done = readl((void __iomem *)NETXEN_PCIE_REG(PCIE_SEM3_LOCK));
50 if (done == 1)
51 break;
52 if (timeout >= phy_lock_timeout) {
53 return -1;
54 }
55 timeout++;
56 if (!in_atomic())
57 schedule();
58 else {
59 for (i = 0; i < 20; i++)
60 cpu_relax();
61 }
62 }
63
64 writel(NETXEN_PHY_LOCK_ID, (void __iomem *)PHY_LOCK_DRIVER);
65 return 0;
66 }
67
68 static inline int phy_unlock(void)
69 {
70 readl((void __iomem *)NETXEN_PCIE_REG(PCIE_SEM3_UNLOCK));
71 return 0;
72 }
73
74 /*
75 * netxen_niu_gbe_phy_read - read a register from the GbE PHY via
76 * mii management interface.
77 *
78 * Note: The MII management interface goes through port 0.
79 * Individual phys are addressed as follows:
80 * @param phy [15:8] phy id
81 * @param reg [7:0] register number
82 *
83 * @returns 0 on success
84 * -1 on error
85 *
86 */
87 int netxen_niu_gbe_phy_read(struct netxen_adapter *adapter, long phy,
88 long reg, __le32 * readval)
89 {
90 long timeout = 0;
91 long result = 0;
92 long restore = 0;
93 __le32 address;
94 __le32 command;
95 __le32 status;
96 __le32 mac_cfg0;
97
98 if (phy_lock() != 0) {
99 return -1;
100 }
101
102 /*
103 * MII mgmt all goes through port 0 MAC interface,
104 * so it cannot be in reset
105 */
106
107 if (netxen_nic_hw_read_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0),
108 &mac_cfg0, 4))
109 return -EIO;
110 if (netxen_gb_get_soft_reset(mac_cfg0)) {
111 __le32 temp;
112 temp = 0;
113 netxen_gb_tx_reset_pb(temp);
114 netxen_gb_rx_reset_pb(temp);
115 netxen_gb_tx_reset_mac(temp);
116 netxen_gb_rx_reset_mac(temp);
117 if (netxen_nic_hw_write_wx(adapter,
118 NETXEN_NIU_GB_MAC_CONFIG_0(0),
119 &temp, 4))
120 return -EIO;
121 restore = 1;
122 }
123
124 address = 0;
125 netxen_gb_mii_mgmt_reg_addr(address, reg);
126 netxen_gb_mii_mgmt_phy_addr(address, phy);
127 if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0),
128 &address, 4))
129 return -EIO;
130 command = 0; /* turn off any prior activity */
131 if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
132 &command, 4))
133 return -EIO;
134 /* send read command */
135 netxen_gb_mii_mgmt_set_read_cycle(command);
136 if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
137 &command, 4))
138 return -EIO;
139
140 status = 0;
141 do {
142 if (netxen_nic_hw_read_wx(adapter,
143 NETXEN_NIU_GB_MII_MGMT_INDICATE(0),
144 &status, 4))
145 return -EIO;
146 timeout++;
147 } while ((netxen_get_gb_mii_mgmt_busy(status)
148 || netxen_get_gb_mii_mgmt_notvalid(status))
149 && (timeout++ < NETXEN_NIU_PHY_WAITMAX));
150
151 if (timeout < NETXEN_NIU_PHY_WAITMAX) {
152 if (netxen_nic_hw_read_wx(adapter,
153 NETXEN_NIU_GB_MII_MGMT_STATUS(0),
154 readval, 4))
155 return -EIO;
156 result = 0;
157 } else
158 result = -1;
159
160 if (restore)
161 if (netxen_nic_hw_write_wx(adapter,
162 NETXEN_NIU_GB_MAC_CONFIG_0(0),
163 &mac_cfg0, 4))
164 return -EIO;
165 phy_unlock();
166 return result;
167 }
168
169 /*
170 * netxen_niu_gbe_phy_write - write a register to the GbE PHY via
171 * mii management interface.
172 *
173 * Note: The MII management interface goes through port 0.
174 * Individual phys are addressed as follows:
175 * @param phy [15:8] phy id
176 * @param reg [7:0] register number
177 *
178 * @returns 0 on success
179 * -1 on error
180 *
181 */
182 int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter,
183 long phy, long reg, __le32 val)
184 {
185 long timeout = 0;
186 long result = 0;
187 long restore = 0;
188 __le32 address;
189 __le32 command;
190 __le32 status;
191 __le32 mac_cfg0;
192
193 /*
194 * MII mgmt all goes through port 0 MAC interface, so it
195 * cannot be in reset
196 */
197
198 if (netxen_nic_hw_read_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0),
199 &mac_cfg0, 4))
200 return -EIO;
201 if (netxen_gb_get_soft_reset(mac_cfg0)) {
202 __le32 temp;
203 temp = 0;
204 netxen_gb_tx_reset_pb(temp);
205 netxen_gb_rx_reset_pb(temp);
206 netxen_gb_tx_reset_mac(temp);
207 netxen_gb_rx_reset_mac(temp);
208
209 if (netxen_nic_hw_write_wx(adapter,
210 NETXEN_NIU_GB_MAC_CONFIG_0(0),
211 &temp, 4))
212 return -EIO;
213 restore = 1;
214 }
215
216 command = 0; /* turn off any prior activity */
217 if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
218 &command, 4))
219 return -EIO;
220
221 address = 0;
222 netxen_gb_mii_mgmt_reg_addr(address, reg);
223 netxen_gb_mii_mgmt_phy_addr(address, phy);
224 if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0),
225 &address, 4))
226 return -EIO;
227
228 if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_CTRL(0),
229 &val, 4))
230 return -EIO;
231
232 status = 0;
233 do {
234 if (netxen_nic_hw_read_wx(adapter,
235 NETXEN_NIU_GB_MII_MGMT_INDICATE(0),
236 &status, 4))
237 return -EIO;
238 timeout++;
239 } while ((netxen_get_gb_mii_mgmt_busy(status))
240 && (timeout++ < NETXEN_NIU_PHY_WAITMAX));
241
242 if (timeout < NETXEN_NIU_PHY_WAITMAX)
243 result = 0;
244 else
245 result = -EIO;
246
247 /* restore the state of port 0 MAC in case we tampered with it */
248 if (restore)
249 if (netxen_nic_hw_write_wx(adapter,
250 NETXEN_NIU_GB_MAC_CONFIG_0(0),
251 &mac_cfg0, 4))
252 return -EIO;
253
254 return result;
255 }
256
257 int netxen_niu_xgbe_enable_phy_interrupts(struct netxen_adapter *adapter,
258 int port)
259 {
260 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_INT_MASK, 0x3f);
261 return 0;
262 }
263
264 int netxen_niu_gbe_enable_phy_interrupts(struct netxen_adapter *adapter,
265 int port)
266 {
267 int result = 0;
268 __le32 enable = 0;
269 netxen_set_phy_int_link_status_changed(enable);
270 netxen_set_phy_int_autoneg_completed(enable);
271 netxen_set_phy_int_speed_changed(enable);
272
273 if (0 !=
274 netxen_niu_gbe_phy_write(adapter, port,
275 NETXEN_NIU_GB_MII_MGMT_ADDR_INT_ENABLE,
276 enable))
277 result = -EIO;
278
279 return result;
280 }
281
282 int netxen_niu_xgbe_disable_phy_interrupts(struct netxen_adapter *adapter,
283 int port)
284 {
285 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_INT_MASK, 0x7f);
286 return 0;
287 }
288
289 int netxen_niu_gbe_disable_phy_interrupts(struct netxen_adapter *adapter,
290 int port)
291 {
292 int result = 0;
293 if (0 !=
294 netxen_niu_gbe_phy_write(adapter, port,
295 NETXEN_NIU_GB_MII_MGMT_ADDR_INT_ENABLE, 0))
296 result = -EIO;
297
298 return result;
299 }
300
301 int netxen_niu_xgbe_clear_phy_interrupts(struct netxen_adapter *adapter,
302 int port)
303 {
304 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_ACTIVE_INT, -1);
305 return 0;
306 }
307
308 int netxen_niu_gbe_clear_phy_interrupts(struct netxen_adapter *adapter,
309 int port)
310 {
311 int result = 0;
312 if (0 !=
313 netxen_niu_gbe_phy_write(adapter, port,
314 NETXEN_NIU_GB_MII_MGMT_ADDR_INT_STATUS,
315 -EIO))
316 result = -EIO;
317
318 return result;
319 }
320
321 /*
322 * netxen_niu_gbe_set_mii_mode- Set 10/100 Mbit Mode for GbE MAC
323 *
324 */
325 void netxen_niu_gbe_set_mii_mode(struct netxen_adapter *adapter,
326 int port, long enable)
327 {
328 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_MODE, 0x2);
329 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
330 0x80000000);
331 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
332 0x0000f0025);
333 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_1(port),
334 0xf1ff);
335 netxen_crb_writelit_adapter(adapter,
336 NETXEN_NIU_GB0_GMII_MODE + (port << 3), 0);
337 netxen_crb_writelit_adapter(adapter,
338 NETXEN_NIU_GB0_MII_MODE + (port << 3), 1);
339 netxen_crb_writelit_adapter(adapter,
340 (NETXEN_NIU_GB0_HALF_DUPLEX + port * 4), 0);
341 netxen_crb_writelit_adapter(adapter,
342 NETXEN_NIU_GB_MII_MGMT_CONFIG(port), 0x7);
343
344 if (enable) {
345 /*
346 * Do NOT enable flow control until a suitable solution for
347 * shutting down pause frames is found.
348 */
349 netxen_crb_writelit_adapter(adapter,
350 NETXEN_NIU_GB_MAC_CONFIG_0(port),
351 0x5);
352 }
353
354 if (netxen_niu_gbe_enable_phy_interrupts(adapter, port))
355 printk(KERN_ERR PFX "ERROR enabling PHY interrupts\n");
356 if (netxen_niu_gbe_clear_phy_interrupts(adapter, port))
357 printk(KERN_ERR PFX "ERROR clearing PHY interrupts\n");
358 }
359
360 /*
361 * netxen_niu_gbe_set_gmii_mode- Set GbE Mode for GbE MAC
362 */
363 void netxen_niu_gbe_set_gmii_mode(struct netxen_adapter *adapter,
364 int port, long enable)
365 {
366 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_MODE, 0x2);
367 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
368 0x80000000);
369 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
370 0x0000f0025);
371 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB_MAC_CONFIG_1(port),
372 0xf2ff);
373 netxen_crb_writelit_adapter(adapter,
374 NETXEN_NIU_GB0_MII_MODE + (port << 3), 0);
375 netxen_crb_writelit_adapter(adapter,
376 NETXEN_NIU_GB0_GMII_MODE + (port << 3), 1);
377 netxen_crb_writelit_adapter(adapter,
378 (NETXEN_NIU_GB0_HALF_DUPLEX + port * 4), 0);
379 netxen_crb_writelit_adapter(adapter,
380 NETXEN_NIU_GB_MII_MGMT_CONFIG(port), 0x7);
381
382 if (enable) {
383 /*
384 * Do NOT enable flow control until a suitable solution for
385 * shutting down pause frames is found.
386 */
387 netxen_crb_writelit_adapter(adapter,
388 NETXEN_NIU_GB_MAC_CONFIG_0(port),
389 0x5);
390 }
391
392 if (netxen_niu_gbe_enable_phy_interrupts(adapter, port))
393 printk(KERN_ERR PFX "ERROR enabling PHY interrupts\n");
394 if (netxen_niu_gbe_clear_phy_interrupts(adapter, port))
395 printk(KERN_ERR PFX "ERROR clearing PHY interrupts\n");
396 }
397
398 int netxen_niu_gbe_init_port(struct netxen_adapter *adapter, int port)
399 {
400 int result = 0;
401 __le32 status;
402 if (adapter->ops->disable_phy_interrupts)
403 adapter->ops->disable_phy_interrupts(adapter, port);
404 mdelay(2);
405
406 if (0 ==
407 netxen_niu_gbe_phy_read(adapter, port,
408 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
409 (__le32 *) & status)) {
410 if (netxen_get_phy_link(status)) {
411 if (netxen_get_phy_speed(status) == 2) {
412 netxen_niu_gbe_set_gmii_mode(adapter, port, 1);
413 } else if ((netxen_get_phy_speed(status) == 1)
414 || (netxen_get_phy_speed(status) == 0)) {
415 netxen_niu_gbe_set_mii_mode(adapter, port, 1);
416 } else {
417 result = -1;
418 }
419
420 } else {
421 /*
422 * We don't have link. Cable must be unconnected.
423 * Enable phy interrupts so we take action when
424 * plugged in.
425 */
426
427 netxen_crb_writelit_adapter(adapter,
428 NETXEN_NIU_GB_MAC_CONFIG_0
429 (port),
430 NETXEN_GB_MAC_SOFT_RESET);
431 netxen_crb_writelit_adapter(adapter,
432 NETXEN_NIU_GB_MAC_CONFIG_0
433 (port),
434 NETXEN_GB_MAC_RESET_PROT_BLK
435 | NETXEN_GB_MAC_ENABLE_TX_RX
436 |
437 NETXEN_GB_MAC_PAUSED_FRMS);
438 if (netxen_niu_gbe_clear_phy_interrupts(adapter, port))
439 printk(KERN_ERR PFX
440 "ERROR clearing PHY interrupts\n");
441 if (netxen_niu_gbe_enable_phy_interrupts(adapter, port))
442 printk(KERN_ERR PFX
443 "ERROR enabling PHY interrupts\n");
444 if (netxen_niu_gbe_clear_phy_interrupts(adapter, port))
445 printk(KERN_ERR PFX
446 "ERROR clearing PHY interrupts\n");
447 result = -1;
448 }
449 } else {
450 result = -EIO;
451 }
452 return result;
453 }
454
455 int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port)
456 {
457 long reg = 0, ret = 0;
458
459 if (adapter->ahw.boardcfg.board_type == NETXEN_BRDTYPE_P2_SB31_10G_IMEZ) {
460 netxen_crb_writelit_adapter(adapter,
461 NETXEN_NIU_XG1_CONFIG_0, 0x5);
462 /* XXX hack for Mez cards: both ports in promisc mode */
463 netxen_nic_hw_read_wx(adapter,
464 NETXEN_NIU_XGE_CONFIG_1, &reg, 4);
465 reg = (reg | 0x2000UL);
466 netxen_crb_writelit_adapter(adapter,
467 NETXEN_NIU_XGE_CONFIG_1, reg);
468 reg = 0;
469 netxen_nic_hw_read_wx(adapter,
470 NETXEN_NIU_XG1_CONFIG_1, &reg, 4);
471 reg = (reg | 0x2000UL);
472 netxen_crb_writelit_adapter(adapter,
473 NETXEN_NIU_XG1_CONFIG_1, reg);
474 }
475
476 return ret;
477 }
478
479 /*
480 * netxen_niu_gbe_handle_phy_interrupt - Handles GbE PHY interrupts
481 * @param enable 0 means don't enable the port
482 * 1 means enable (or re-enable) the port
483 */
484 int netxen_niu_gbe_handle_phy_interrupt(struct netxen_adapter *adapter,
485 int port, long enable)
486 {
487 int result = 0;
488 __le32 int_src;
489
490 printk(KERN_INFO PFX "NETXEN: Handling PHY interrupt on port %d"
491 " (device enable = %d)\n", (int)port, (int)enable);
492
493 /*
494 * The read of the PHY INT status will clear the pending
495 * interrupt status
496 */
497 if (netxen_niu_gbe_phy_read(adapter, port,
498 NETXEN_NIU_GB_MII_MGMT_ADDR_INT_STATUS,
499 &int_src) != 0)
500 result = -EINVAL;
501 else {
502 printk(KERN_INFO PFX "PHY Interrupt source = 0x%x \n", int_src);
503 if (netxen_get_phy_int_jabber(int_src))
504 printk(KERN_INFO PFX "jabber Interrupt ");
505 if (netxen_get_phy_int_polarity_changed(int_src))
506 printk(KERN_INFO PFX "polarity changed ");
507 if (netxen_get_phy_int_energy_detect(int_src))
508 printk(KERN_INFO PFX "energy detect \n");
509 if (netxen_get_phy_int_downshift(int_src))
510 printk(KERN_INFO PFX "downshift \n");
511 if (netxen_get_phy_int_mdi_xover_changed(int_src))
512 printk(KERN_INFO PFX "mdi_xover_changed ");
513 if (netxen_get_phy_int_fifo_over_underflow(int_src))
514 printk(KERN_INFO PFX "fifo_over_underflow ");
515 if (netxen_get_phy_int_false_carrier(int_src))
516 printk(KERN_INFO PFX "false_carrier ");
517 if (netxen_get_phy_int_symbol_error(int_src))
518 printk(KERN_INFO PFX "symbol_error ");
519 if (netxen_get_phy_int_autoneg_completed(int_src))
520 printk(KERN_INFO PFX "autoneg_completed ");
521 if (netxen_get_phy_int_page_received(int_src))
522 printk(KERN_INFO PFX "page_received ");
523 if (netxen_get_phy_int_duplex_changed(int_src))
524 printk(KERN_INFO PFX "duplex_changed ");
525 if (netxen_get_phy_int_autoneg_error(int_src))
526 printk(KERN_INFO PFX "autoneg_error ");
527 if ((netxen_get_phy_int_speed_changed(int_src))
528 || (netxen_get_phy_int_link_status_changed(int_src))) {
529 __le32 status;
530
531 printk(KERN_INFO PFX
532 "speed_changed or link status changed");
533 if (netxen_niu_gbe_phy_read
534 (adapter, port,
535 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
536 &status) == 0) {
537 if (netxen_get_phy_speed(status) == 2) {
538 printk
539 (KERN_INFO PFX "Link speed changed"
540 " to 1000 Mbps\n");
541 netxen_niu_gbe_set_gmii_mode(adapter,
542 port,
543 enable);
544 } else if (netxen_get_phy_speed(status) == 1) {
545 printk
546 (KERN_INFO PFX "Link speed changed"
547 " to 100 Mbps\n");
548 netxen_niu_gbe_set_mii_mode(adapter,
549 port,
550 enable);
551 } else if (netxen_get_phy_speed(status) == 0) {
552 printk
553 (KERN_INFO PFX "Link speed changed"
554 " to 10 Mbps\n");
555 netxen_niu_gbe_set_mii_mode(adapter,
556 port,
557 enable);
558 } else {
559 printk(KERN_ERR PFX "ERROR reading"
560 "PHY status. Illegal speed.\n");
561 result = -1;
562 }
563 } else {
564 printk(KERN_ERR PFX
565 "ERROR reading PHY status.\n");
566 result = -1;
567 }
568
569 }
570 printk(KERN_INFO "\n");
571 }
572 return result;
573 }
574
575 /*
576 * Return the current station MAC address.
577 * Note that the passed-in value must already be in network byte order.
578 */
579 int netxen_niu_macaddr_get(struct netxen_adapter *adapter,
580 int phy, netxen_ethernet_macaddr_t * addr)
581 {
582 u64 result = 0;
583 __le32 stationhigh;
584 __le32 stationlow;
585
586 if (addr == NULL)
587 return -EINVAL;
588 if ((phy < 0) || (phy > 3))
589 return -EINVAL;
590
591 if (netxen_nic_hw_read_wx(adapter, NETXEN_NIU_GB_STATION_ADDR_0(phy),
592 &stationhigh, 4))
593 return -EIO;
594 if (netxen_nic_hw_read_wx(adapter, NETXEN_NIU_GB_STATION_ADDR_1(phy),
595 &stationlow, 4))
596 return -EIO;
597
598 result = (u64) netxen_gb_get_stationaddress_low(stationlow);
599 result |= (u64) stationhigh << 16;
600 memcpy(*addr, &result, sizeof(netxen_ethernet_macaddr_t));
601
602 return 0;
603 }
604
605 /*
606 * Set the station MAC address.
607 * Note that the passed-in value must already be in network byte order.
608 */
609 int netxen_niu_macaddr_set(struct netxen_port *port,
610 netxen_ethernet_macaddr_t addr)
611 {
612 __le32 temp = 0;
613 struct netxen_adapter *adapter = port->adapter;
614 int phy = port->portnum;
615 unsigned char mac_addr[MAX_ADDR_LEN];
616 int i;
617
618 for (i = 0; i < 10; i++) {
619 memcpy(&temp, addr, 2);
620 temp <<= 16;
621 if (netxen_nic_hw_write_wx
622 (adapter, NETXEN_NIU_GB_STATION_ADDR_1(phy), &temp, 4))
623 return -EIO;
624
625 temp = 0;
626
627 memcpy(&temp, ((u8 *) addr) + 2, sizeof(__le32));
628 if (netxen_nic_hw_write_wx
629 (adapter, NETXEN_NIU_GB_STATION_ADDR_0(phy), &temp, 4))
630 return -2;
631
632 netxen_niu_macaddr_get(adapter, phy,
633 (netxen_ethernet_macaddr_t *) mac_addr);
634 if (memcmp(mac_addr, addr, MAX_ADDR_LEN == 0))
635 break;
636 }
637
638 if (i == 10) {
639 printk(KERN_ERR "%s: cannot set Mac addr for %s\n",
640 netxen_nic_driver_name, port->netdev->name);
641 printk(KERN_ERR "MAC address set: "
642 "%02x:%02x:%02x:%02x:%02x:%02x.\n",
643 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
644
645 printk(KERN_ERR "MAC address get: "
646 "%02x:%02x:%02x:%02x:%02x:%02x.\n",
647 mac_addr[0],
648 mac_addr[1],
649 mac_addr[2], mac_addr[3], mac_addr[4], mac_addr[5]);
650 }
651 return 0;
652 }
653
654 /* Enable a GbE interface */
655 int netxen_niu_enable_gbe_port(struct netxen_adapter *adapter,
656 int port, netxen_niu_gbe_ifmode_t mode)
657 {
658 __le32 mac_cfg0;
659 __le32 mac_cfg1;
660 __le32 mii_cfg;
661
662 if ((port < 0) || (port > NETXEN_NIU_MAX_GBE_PORTS))
663 return -EINVAL;
664
665 mac_cfg0 = 0;
666 netxen_gb_soft_reset(mac_cfg0);
667 if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
668 &mac_cfg0, 4))
669 return -EIO;
670 mac_cfg0 = 0;
671 netxen_gb_enable_tx(mac_cfg0);
672 netxen_gb_enable_rx(mac_cfg0);
673 netxen_gb_unset_rx_flowctl(mac_cfg0);
674 netxen_gb_tx_reset_pb(mac_cfg0);
675 netxen_gb_rx_reset_pb(mac_cfg0);
676 netxen_gb_tx_reset_mac(mac_cfg0);
677 netxen_gb_rx_reset_mac(mac_cfg0);
678
679 if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
680 &mac_cfg0, 4))
681 return -EIO;
682 mac_cfg1 = 0;
683 netxen_gb_set_preamblelen(mac_cfg1, 0xf);
684 netxen_gb_set_duplex(mac_cfg1);
685 netxen_gb_set_crc_enable(mac_cfg1);
686 netxen_gb_set_padshort(mac_cfg1);
687 netxen_gb_set_checklength(mac_cfg1);
688 netxen_gb_set_hugeframes(mac_cfg1);
689
690 if (mode == NETXEN_NIU_10_100_MB) {
691 netxen_gb_set_intfmode(mac_cfg1, 1);
692 if (netxen_nic_hw_write_wx(adapter,
693 NETXEN_NIU_GB_MAC_CONFIG_1(port),
694 &mac_cfg1, 4))
695 return -EIO;
696
697 /* set mii mode */
698 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB0_GMII_MODE +
699 (port << 3), 0);
700 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB0_MII_MODE +
701 (port << 3), 1);
702
703 } else if (mode == NETXEN_NIU_1000_MB) {
704 netxen_gb_set_intfmode(mac_cfg1, 2);
705 if (netxen_nic_hw_write_wx(adapter,
706 NETXEN_NIU_GB_MAC_CONFIG_1(port),
707 &mac_cfg1, 4))
708 return -EIO;
709 /* set gmii mode */
710 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB0_MII_MODE +
711 (port << 3), 0);
712 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_GB0_GMII_MODE +
713 (port << 3), 1);
714 }
715 mii_cfg = 0;
716 netxen_gb_set_mii_mgmt_clockselect(mii_cfg, 7);
717 if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MII_MGMT_CONFIG(port),
718 &mii_cfg, 4))
719 return -EIO;
720 mac_cfg0 = 0;
721 netxen_gb_enable_tx(mac_cfg0);
722 netxen_gb_enable_rx(mac_cfg0);
723 netxen_gb_unset_rx_flowctl(mac_cfg0);
724 netxen_gb_unset_tx_flowctl(mac_cfg0);
725
726 if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
727 &mac_cfg0, 4))
728 return -EIO;
729 return 0;
730 }
731
732 /* Disable a GbE interface */
733 int netxen_niu_disable_gbe_port(struct netxen_adapter *adapter, int port)
734 {
735 __le32 mac_cfg0;
736
737 if ((port < 0) || (port > NETXEN_NIU_MAX_GBE_PORTS))
738 return -EINVAL;
739
740 mac_cfg0 = 0;
741 netxen_gb_soft_reset(mac_cfg0);
742 if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(port),
743 &mac_cfg0, 4))
744 return -EIO;
745 return 0;
746 }
747
748 /* Disable an XG interface */
749 int netxen_niu_disable_xg_port(struct netxen_adapter *adapter, int port)
750 {
751 __le32 mac_cfg;
752
753 if (port != 0)
754 return -EINVAL;
755
756 mac_cfg = 0;
757 netxen_xg_soft_reset(mac_cfg);
758 if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_XGE_CONFIG_0,
759 &mac_cfg, 4))
760 return -EIO;
761 return 0;
762 }
763
764 /* Set promiscuous mode for a GbE interface */
765 int netxen_niu_set_promiscuous_mode(struct netxen_adapter *adapter, int port,
766 netxen_niu_prom_mode_t mode)
767 {
768 __le32 reg;
769
770 if ((port < 0) || (port > NETXEN_NIU_MAX_GBE_PORTS))
771 return -EINVAL;
772
773 /* save previous contents */
774 if (netxen_nic_hw_read_wx(adapter, NETXEN_NIU_GB_DROP_WRONGADDR,
775 &reg, 4))
776 return -EIO;
777 if (mode == NETXEN_NIU_PROMISC_MODE) {
778 switch (port) {
779 case 0:
780 netxen_clear_gb_drop_gb0(reg);
781 break;
782 case 1:
783 netxen_clear_gb_drop_gb1(reg);
784 break;
785 case 2:
786 netxen_clear_gb_drop_gb2(reg);
787 break;
788 case 3:
789 netxen_clear_gb_drop_gb3(reg);
790 break;
791 default:
792 return -EIO;
793 }
794 } else {
795 switch (port) {
796 case 0:
797 netxen_set_gb_drop_gb0(reg);
798 break;
799 case 1:
800 netxen_set_gb_drop_gb1(reg);
801 break;
802 case 2:
803 netxen_set_gb_drop_gb2(reg);
804 break;
805 case 3:
806 netxen_set_gb_drop_gb3(reg);
807 break;
808 default:
809 return -EIO;
810 }
811 }
812 if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_GB_DROP_WRONGADDR,
813 &reg, 4))
814 return -EIO;
815 return 0;
816 }
817
818 /*
819 * Set the MAC address for an XG port
820 * Note that the passed-in value must already be in network byte order.
821 */
822 int netxen_niu_xg_macaddr_set(struct netxen_port *port,
823 netxen_ethernet_macaddr_t addr)
824 {
825 __le32 temp = 0;
826 struct netxen_adapter *adapter = port->adapter;
827
828 memcpy(&temp, addr, 2);
829 temp = cpu_to_le32(temp);
830 temp <<= 16;
831 if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_1,
832 &temp, 4))
833 return -EIO;
834
835 temp = 0;
836
837 memcpy(&temp, ((u8 *) addr) + 2, sizeof(__le32));
838 temp = cpu_to_le32(temp);
839 if (netxen_nic_hw_write_wx(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_HI,
840 &temp, 4))
841 return -EIO;
842
843 return 0;
844 }
845
846 /*
847 * Return the current station MAC address.
848 * Note that the passed-in value must already be in network byte order.
849 */
850 int netxen_niu_xg_macaddr_get(struct netxen_adapter *adapter, int phy,
851 netxen_ethernet_macaddr_t * addr)
852 {
853 __le32 stationhigh;
854 __le32 stationlow;
855 u64 result;
856
857 if (addr == NULL)
858 return -EINVAL;
859 if (phy != 0)
860 return -EINVAL;
861
862 if (netxen_nic_hw_read_wx(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_HI,
863 &stationhigh, 4))
864 return -EIO;
865 if (netxen_nic_hw_read_wx(adapter, NETXEN_NIU_XGE_STATION_ADDR_0_1,
866 &stationlow, 4))
867 return -EIO;
868
869 result = ((u64) stationlow) >> 16;
870 result |= (u64) stationhigh << 16;
871 memcpy(*addr, &result, sizeof(netxen_ethernet_macaddr_t));
872
873 return 0;
874 }
875
876 int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
877 int port, netxen_niu_prom_mode_t mode)
878 {
879 __le32 reg;
880
881 if ((port < 0) || (port > NETXEN_NIU_MAX_GBE_PORTS))
882 return -EINVAL;
883
884 if (netxen_nic_hw_read_wx(adapter, NETXEN_NIU_XGE_CONFIG_1, &reg, 4))
885 return -EIO;
886 if (mode == NETXEN_NIU_PROMISC_MODE)
887 reg = (reg | 0x2000UL);
888 else
889 reg = (reg & ~0x2000UL);
890
891 netxen_crb_writelit_adapter(adapter, NETXEN_NIU_XGE_CONFIG_1, reg);
892
893 return 0;
894 }
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