[NETFILTER]: PPTP conntrack: simplify expectation handling
[hh.org.git] / arch / parisc / math-emu / float.h
blobce76f6dfa25b0995424c31363580771a1f8a3746
1 /*
2 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
4 * Floating-point emulation code
5 * Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
10 * any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 * BEGIN_DESC
24 * File:
25 * @(#) pa/spmath/float.h $Revision: 1.1 $
27 * Purpose:
28 * <<please update with a synopis of the functionality provided by this file>>
30 * BE header: no
32 * Shipped: yes
33 * /usr/conf/pa/spmath/float.h
35 * END_DESC
38 #ifdef __NO_PA_HDRS
39 PA header file -- do not include this header file for non-PA builds.
40 #endif
42 #include "fpbits.h"
43 #include "hppa.h"
45 * Want to pick up the FPU capability flags, not the PDC structures.
46 * 'LOCORE' isn't really true in this case, but we don't want the C structures
47 * so it suits our purposes
49 #define LOCORE
50 #include "fpu.h"
53 * Declare the basic structures for the 3 different
54 * floating-point precisions.
56 * Single number
57 * +-------+-------+-------+-------+-------+-------+-------+-------+
58 * |s| exp | mantissa |
59 * +-------+-------+-------+-------+-------+-------+-------+-------+
61 #define Sall(object) (object)
62 #define Ssign(object) Bitfield_extract( 0, 1,object)
63 #define Ssignedsign(object) Bitfield_signed_extract( 0, 1,object)
64 #define Sexponent(object) Bitfield_extract( 1, 8,object)
65 #define Smantissa(object) Bitfield_mask( 9, 23,object)
66 #define Ssignaling(object) Bitfield_extract( 9, 1,object)
67 #define Ssignalingnan(object) Bitfield_extract( 1, 9,object)
68 #define Shigh2mantissa(object) Bitfield_extract( 9, 2,object)
69 #define Sexponentmantissa(object) Bitfield_mask( 1, 31,object)
70 #define Ssignexponent(object) Bitfield_extract( 0, 9,object)
71 #define Shidden(object) Bitfield_extract( 8, 1,object)
72 #define Shiddenoverflow(object) Bitfield_extract( 7, 1,object)
73 #define Shiddenhigh7mantissa(object) Bitfield_extract( 8, 8,object)
74 #define Shiddenhigh3mantissa(object) Bitfield_extract( 8, 4,object)
75 #define Slow(object) Bitfield_mask( 31, 1,object)
76 #define Slow4(object) Bitfield_mask( 28, 4,object)
77 #define Slow31(object) Bitfield_mask( 1, 31,object)
78 #define Shigh31(object) Bitfield_extract( 0, 31,object)
79 #define Ssignedhigh31(object) Bitfield_signed_extract( 0, 31,object)
80 #define Shigh4(object) Bitfield_extract( 0, 4,object)
81 #define Sbit24(object) Bitfield_extract( 24, 1,object)
82 #define Sbit28(object) Bitfield_extract( 28, 1,object)
83 #define Sbit29(object) Bitfield_extract( 29, 1,object)
84 #define Sbit30(object) Bitfield_extract( 30, 1,object)
85 #define Sbit31(object) Bitfield_mask( 31, 1,object)
87 #define Deposit_ssign(object,value) Bitfield_deposit(value,0,1,object)
88 #define Deposit_sexponent(object,value) Bitfield_deposit(value,1,8,object)
89 #define Deposit_smantissa(object,value) Bitfield_deposit(value,9,23,object)
90 #define Deposit_shigh2mantissa(object,value) Bitfield_deposit(value,9,2,object)
91 #define Deposit_sexponentmantissa(object,value) \
92 Bitfield_deposit(value,1,31,object)
93 #define Deposit_ssignexponent(object,value) Bitfield_deposit(value,0,9,object)
94 #define Deposit_slow(object,value) Bitfield_deposit(value,31,1,object)
95 #define Deposit_shigh4(object,value) Bitfield_deposit(value,0,4,object)
97 #define Is_ssign(object) Bitfield_mask( 0, 1,object)
98 #define Is_ssignaling(object) Bitfield_mask( 9, 1,object)
99 #define Is_shidden(object) Bitfield_mask( 8, 1,object)
100 #define Is_shiddenoverflow(object) Bitfield_mask( 7, 1,object)
101 #define Is_slow(object) Bitfield_mask( 31, 1,object)
102 #define Is_sbit24(object) Bitfield_mask( 24, 1,object)
103 #define Is_sbit28(object) Bitfield_mask( 28, 1,object)
104 #define Is_sbit29(object) Bitfield_mask( 29, 1,object)
105 #define Is_sbit30(object) Bitfield_mask( 30, 1,object)
106 #define Is_sbit31(object) Bitfield_mask( 31, 1,object)
109 * Double number.
110 * +-------+-------+-------+-------+-------+-------+-------+-------+
111 * |s| exponent | mantissa part 1 |
112 * +-------+-------+-------+-------+-------+-------+-------+-------+
114 * +-------+-------+-------+-------+-------+-------+-------+-------+
115 * | mantissa part 2 |
116 * +-------+-------+-------+-------+-------+-------+-------+-------+
118 #define Dallp1(object) (object)
119 #define Dsign(object) Bitfield_extract( 0, 1,object)
120 #define Dsignedsign(object) Bitfield_signed_extract( 0, 1,object)
121 #define Dexponent(object) Bitfield_extract( 1, 11,object)
122 #define Dmantissap1(object) Bitfield_mask( 12, 20,object)
123 #define Dsignaling(object) Bitfield_extract( 12, 1,object)
124 #define Dsignalingnan(object) Bitfield_extract( 1, 12,object)
125 #define Dhigh2mantissa(object) Bitfield_extract( 12, 2,object)
126 #define Dexponentmantissap1(object) Bitfield_mask( 1, 31,object)
127 #define Dsignexponent(object) Bitfield_extract( 0, 12,object)
128 #define Dhidden(object) Bitfield_extract( 11, 1,object)
129 #define Dhiddenoverflow(object) Bitfield_extract( 10, 1,object)
130 #define Dhiddenhigh7mantissa(object) Bitfield_extract( 11, 8,object)
131 #define Dhiddenhigh3mantissa(object) Bitfield_extract( 11, 4,object)
132 #define Dlowp1(object) Bitfield_mask( 31, 1,object)
133 #define Dlow31p1(object) Bitfield_mask( 1, 31,object)
134 #define Dhighp1(object) Bitfield_extract( 0, 1,object)
135 #define Dhigh4p1(object) Bitfield_extract( 0, 4,object)
136 #define Dhigh31p1(object) Bitfield_extract( 0, 31,object)
137 #define Dsignedhigh31p1(object) Bitfield_signed_extract( 0, 31,object)
138 #define Dbit3p1(object) Bitfield_extract( 3, 1,object)
140 #define Deposit_dsign(object,value) Bitfield_deposit(value,0,1,object)
141 #define Deposit_dexponent(object,value) Bitfield_deposit(value,1,11,object)
142 #define Deposit_dmantissap1(object,value) Bitfield_deposit(value,12,20,object)
143 #define Deposit_dhigh2mantissa(object,value) Bitfield_deposit(value,12,2,object)
144 #define Deposit_dexponentmantissap1(object,value) \
145 Bitfield_deposit(value,1,31,object)
146 #define Deposit_dsignexponent(object,value) Bitfield_deposit(value,0,12,object)
147 #define Deposit_dlowp1(object,value) Bitfield_deposit(value,31,1,object)
148 #define Deposit_dhigh4p1(object,value) Bitfield_deposit(value,0,4,object)
150 #define Is_dsign(object) Bitfield_mask( 0, 1,object)
151 #define Is_dsignaling(object) Bitfield_mask( 12, 1,object)
152 #define Is_dhidden(object) Bitfield_mask( 11, 1,object)
153 #define Is_dhiddenoverflow(object) Bitfield_mask( 10, 1,object)
154 #define Is_dlowp1(object) Bitfield_mask( 31, 1,object)
155 #define Is_dhighp1(object) Bitfield_mask( 0, 1,object)
156 #define Is_dbit3p1(object) Bitfield_mask( 3, 1,object)
158 #define Dallp2(object) (object)
159 #define Dmantissap2(object) (object)
160 #define Dlowp2(object) Bitfield_mask( 31, 1,object)
161 #define Dlow4p2(object) Bitfield_mask( 28, 4,object)
162 #define Dlow31p2(object) Bitfield_mask( 1, 31,object)
163 #define Dhighp2(object) Bitfield_extract( 0, 1,object)
164 #define Dhigh31p2(object) Bitfield_extract( 0, 31,object)
165 #define Dbit2p2(object) Bitfield_extract( 2, 1,object)
166 #define Dbit3p2(object) Bitfield_extract( 3, 1,object)
167 #define Dbit21p2(object) Bitfield_extract( 21, 1,object)
168 #define Dbit28p2(object) Bitfield_extract( 28, 1,object)
169 #define Dbit29p2(object) Bitfield_extract( 29, 1,object)
170 #define Dbit30p2(object) Bitfield_extract( 30, 1,object)
171 #define Dbit31p2(object) Bitfield_mask( 31, 1,object)
173 #define Deposit_dlowp2(object,value) Bitfield_deposit(value,31,1,object)
175 #define Is_dlowp2(object) Bitfield_mask( 31, 1,object)
176 #define Is_dhighp2(object) Bitfield_mask( 0, 1,object)
177 #define Is_dbit2p2(object) Bitfield_mask( 2, 1,object)
178 #define Is_dbit3p2(object) Bitfield_mask( 3, 1,object)
179 #define Is_dbit21p2(object) Bitfield_mask( 21, 1,object)
180 #define Is_dbit28p2(object) Bitfield_mask( 28, 1,object)
181 #define Is_dbit29p2(object) Bitfield_mask( 29, 1,object)
182 #define Is_dbit30p2(object) Bitfield_mask( 30, 1,object)
183 #define Is_dbit31p2(object) Bitfield_mask( 31, 1,object)
186 * Quad number.
187 * +-------+-------+-------+-------+-------+-------+-------+-------+
188 * |s| exponent | mantissa part 1 |
189 * +-------+-------+-------+-------+-------+-------+-------+-------+
191 * +-------+-------+-------+-------+-------+-------+-------+-------+
192 * | mantissa part 2 |
193 * +-------+-------+-------+-------+-------+-------+-------+-------+
195 * +-------+-------+-------+-------+-------+-------+-------+-------+
196 * | mantissa part 3 |
197 * +-------+-------+-------+-------+-------+-------+-------+-------+
199 * +-------+-------+-------+-------+-------+-------+-------+-------+
200 * | mantissa part 4 |
201 * +-------+-------+-------+-------+-------+-------+-------+-------+
203 typedef struct
205 union
207 struct { unsigned qallp1; } u_qallp1;
208 /* Not needed for now...
209 Bitfield_extract( 0, 1,u_qsign,qsign)
210 Bitfield_signed_extract( 0, 1,u_qsignedsign,qsignedsign)
211 Bitfield_extract( 1, 15,u_qexponent,qexponent)
212 Bitfield_extract(16, 16,u_qmantissap1,qmantissap1)
213 Bitfield_extract(16, 1,u_qsignaling,qsignaling)
214 Bitfield_extract(1, 16,u_qsignalingnan,qsignalingnan)
215 Bitfield_extract(16, 2,u_qhigh2mantissa,qhigh2mantissa)
216 Bitfield_extract( 1, 31,u_qexponentmantissap1,qexponentmantissap1)
217 Bitfield_extract( 0, 16,u_qsignexponent,qsignexponent)
218 Bitfield_extract(15, 1,u_qhidden,qhidden)
219 Bitfield_extract(14, 1,u_qhiddenoverflow,qhiddenoverflow)
220 Bitfield_extract(15, 8,u_qhiddenhigh7mantissa,qhiddenhigh7mantissa)
221 Bitfield_extract(15, 4,u_qhiddenhigh3mantissa,qhiddenhigh3mantissa)
222 Bitfield_extract(31, 1,u_qlowp1,qlowp1)
223 Bitfield_extract( 1, 31,u_qlow31p1,qlow31p1)
224 Bitfield_extract( 0, 1,u_qhighp1,qhighp1)
225 Bitfield_extract( 0, 4,u_qhigh4p1,qhigh4p1)
226 Bitfield_extract( 0, 31,u_qhigh31p1,qhigh31p1)
228 } quad_u1;
229 union
231 struct { unsigned qallp2; } u_qallp2;
232 /* Not needed for now...
233 Bitfield_extract(31, 1,u_qlowp2,qlowp2)
234 Bitfield_extract( 1, 31,u_qlow31p2,qlow31p2)
235 Bitfield_extract( 0, 1,u_qhighp2,qhighp2)
236 Bitfield_extract( 0, 31,u_qhigh31p2,qhigh31p2)
238 } quad_u2;
239 union
241 struct { unsigned qallp3; } u_qallp3;
242 /* Not needed for now...
243 Bitfield_extract(31, 1,u_qlowp3,qlowp3)
244 Bitfield_extract( 1, 31,u_qlow31p3,qlow31p3)
245 Bitfield_extract( 0, 1,u_qhighp3,qhighp3)
246 Bitfield_extract( 0, 31,u_qhigh31p3,qhigh31p3)
248 } quad_u3;
249 union
251 struct { unsigned qallp4; } u_qallp4;
252 /* Not need for now...
253 Bitfield_extract(31, 1,u_qlowp4,qlowp4)
254 Bitfield_extract( 1, 31,u_qlow31p4,qlow31p4)
255 Bitfield_extract( 0, 1,u_qhighp4,qhighp4)
256 Bitfield_extract( 0, 31,u_qhigh31p4,qhigh31p4)
258 } quad_u4;
259 } quad_floating_point;
261 /* Extension - An additional structure to hold the guard, round and
262 * sticky bits during computations.
264 #define Extall(object) (object)
265 #define Extsign(object) Bitfield_extract( 0, 1,object)
266 #define Exthigh31(object) Bitfield_extract( 0, 31,object)
267 #define Extlow31(object) Bitfield_extract( 1, 31,object)
268 #define Extlow(object) Bitfield_extract( 31, 1,object)
271 * Single extended - The upper word is just like single precision,
272 * but one additional word of mantissa is needed.
274 #define Sextallp1(object) (object)
275 #define Sextallp2(object) (object)
276 #define Sextlowp1(object) Bitfield_extract( 31, 1,object)
277 #define Sexthighp2(object) Bitfield_extract( 0, 1,object)
278 #define Sextlow31p2(object) Bitfield_extract( 1, 31,object)
279 #define Sexthiddenoverflow(object) Bitfield_extract( 4, 1,object)
280 #define Is_sexthiddenoverflow(object) Bitfield_mask( 4, 1,object)
283 * Double extended - The upper two words are just like double precision,
284 * but two additional words of mantissa are needed.
286 #define Dextallp1(object) (object)
287 #define Dextallp2(object) (object)
288 #define Dextallp3(object) (object)
289 #define Dextallp4(object) (object)
290 #define Dextlowp2(object) Bitfield_extract( 31, 1,object)
291 #define Dexthighp3(object) Bitfield_extract( 0, 1,object)
292 #define Dextlow31p3(object) Bitfield_extract( 1, 31,object)
293 #define Dexthiddenoverflow(object) Bitfield_extract( 10, 1,object)
294 #define Is_dexthiddenoverflow(object) Bitfield_mask( 10, 1,object)
295 #define Deposit_dextlowp4(object,value) Bitfield_deposit(value,31,1,object)
298 * Declare the basic structures for the 3 different
299 * fixed-point precisions.
301 * Single number
302 * +-------+-------+-------+-------+-------+-------+-------+-------+
303 * |s| integer |
304 * +-------+-------+-------+-------+-------+-------+-------+-------+
306 typedef int sgl_integer;
309 * Double number.
310 * +-------+-------+-------+-------+-------+-------+-------+-------+
311 * |s| high integer |
312 * +-------+-------+-------+-------+-------+-------+-------+-------+
314 * +-------+-------+-------+-------+-------+-------+-------+-------+
315 * | low integer |
316 * +-------+-------+-------+-------+-------+-------+-------+-------+
318 struct dint {
319 int wd0;
320 unsigned int wd1;
323 struct dblwd {
324 unsigned int wd0;
325 unsigned int wd1;
329 * Quad number.
330 * +-------+-------+-------+-------+-------+-------+-------+-------+
331 * |s| integer part1 |
332 * +-------+-------+-------+-------+-------+-------+-------+-------+
334 * +-------+-------+-------+-------+-------+-------+-------+-------+
335 * | integer part 2 |
336 * +-------+-------+-------+-------+-------+-------+-------+-------+
338 * +-------+-------+-------+-------+-------+-------+-------+-------+
339 * | integer part 3 |
340 * +-------+-------+-------+-------+-------+-------+-------+-------+
342 * +-------+-------+-------+-------+-------+-------+-------+-------+
343 * | integer part 4 |
344 * +-------+-------+-------+-------+-------+-------+-------+-------+
347 struct quadwd {
348 int wd0;
349 unsigned int wd1;
350 unsigned int wd2;
351 unsigned int wd3;
354 typedef struct quadwd quad_integer;
357 /* useful typedefs */
358 typedef unsigned int sgl_floating_point;
359 typedef struct dblwd dbl_floating_point;
360 typedef struct dint dbl_integer;
361 typedef struct dblwd dbl_unsigned;
364 * Define the different precisions' parameters.
366 #define SGL_BITLENGTH 32
367 #define SGL_EMAX 127
368 #define SGL_EMIN (-126)
369 #define SGL_BIAS 127
370 #define SGL_WRAP 192
371 #define SGL_INFINITY_EXPONENT (SGL_EMAX+SGL_BIAS+1)
372 #define SGL_THRESHOLD 32
373 #define SGL_EXP_LENGTH 8
374 #define SGL_P 24
376 #define DBL_BITLENGTH 64
377 #define DBL_EMAX 1023
378 #define DBL_EMIN (-1022)
379 #define DBL_BIAS 1023
380 #define DBL_WRAP 1536
381 #define DBL_INFINITY_EXPONENT (DBL_EMAX+DBL_BIAS+1)
382 #define DBL_THRESHOLD 64
383 #define DBL_EXP_LENGTH 11
384 #define DBL_P 53
386 #define QUAD_BITLENGTH 128
387 #define QUAD_EMAX 16383
388 #define QUAD_EMIN (-16382)
389 #define QUAD_BIAS 16383
390 #define QUAD_WRAP 24576
391 #define QUAD_INFINITY_EXPONENT (QUAD_EMAX+QUAD_BIAS+1)
392 #define QUAD_P 113
394 /* Boolean Values etc. */
395 #define FALSE 0
396 #define TRUE (!FALSE)
397 #define NOT !
398 #define XOR ^
400 /* other constants */
401 #undef NULL
402 #define NULL 0
403 #define NIL 0
404 #define SGL 0
405 #define DBL 1
406 #define BADFMT 2
407 #define QUAD 3
410 /* Types */
411 typedef int boolean;
412 typedef int FORMAT;
413 typedef int VOID;
416 /* Declare status register equivalent to FPUs architecture.
418 * 0 1 2 3 4 5 6 7 8 910 1 2 3 4 5 6 7 8 920 1 2 3 4 5 6 7 8 930 1
419 * +-------+-------+-------+-------+-------+-------+-------+-------+
420 * |V|Z|O|U|I|C| rsv | model | version |RM |rsv|T|r|V|Z|O|U|I|
421 * +-------+-------+-------+-------+-------+-------+-------+-------+
423 #define Cbit(object) Bitfield_extract( 5, 1,object)
424 #define Tbit(object) Bitfield_extract( 25, 1,object)
425 #define Roundingmode(object) Bitfield_extract( 21, 2,object)
426 #define Invalidtrap(object) Bitfield_extract( 27, 1,object)
427 #define Divisionbyzerotrap(object) Bitfield_extract( 28, 1,object)
428 #define Overflowtrap(object) Bitfield_extract( 29, 1,object)
429 #define Underflowtrap(object) Bitfield_extract( 30, 1,object)
430 #define Inexacttrap(object) Bitfield_extract( 31, 1,object)
431 #define Invalidflag(object) Bitfield_extract( 0, 1,object)
432 #define Divisionbyzeroflag(object) Bitfield_extract( 1, 1,object)
433 #define Overflowflag(object) Bitfield_extract( 2, 1,object)
434 #define Underflowflag(object) Bitfield_extract( 3, 1,object)
435 #define Inexactflag(object) Bitfield_extract( 4, 1,object)
436 #define Allflags(object) Bitfield_extract( 0, 5,object)
438 /* Definitions relevant to the status register */
440 /* Rounding Modes */
441 #define ROUNDNEAREST 0
442 #define ROUNDZERO 1
443 #define ROUNDPLUS 2
444 #define ROUNDMINUS 3
446 /* Exceptions */
447 #define NOEXCEPTION 0x0
448 #define INVALIDEXCEPTION 0x20
449 #define DIVISIONBYZEROEXCEPTION 0x10
450 #define OVERFLOWEXCEPTION 0x08
451 #define UNDERFLOWEXCEPTION 0x04
452 #define INEXACTEXCEPTION 0x02
453 #define UNIMPLEMENTEDEXCEPTION 0x01
455 /* New exceptions for the 2E Opcode */
456 #define OPC_2E_INVALIDEXCEPTION 0x30
457 #define OPC_2E_OVERFLOWEXCEPTION 0x18
458 #define OPC_2E_UNDERFLOWEXCEPTION 0x0c
459 #define OPC_2E_INEXACTEXCEPTION 0x12
461 /* Declare exception registers equivalent to FPUs architecture
463 * 0 1 2 3 4 5 6 7 8 910 1 2 3 4 5 6 7 8 920 1 2 3 4 5 6 7 8 930 1
464 * +-------+-------+-------+-------+-------+-------+-------+-------+
465 * |excepttype | r1 | r2/ext | operation |parm |n| t/cond |
466 * +-------+-------+-------+-------+-------+-------+-------+-------+
468 #define Allexception(object) (object)
469 #define Exceptiontype(object) Bitfield_extract( 0, 6,object)
470 #define Instructionfield(object) Bitfield_mask( 6,26,object)
471 #define Parmfield(object) Bitfield_extract( 23, 3,object)
472 #define Rabit(object) Bitfield_extract( 24, 1,object)
473 #define Ibit(object) Bitfield_extract( 25, 1,object)
475 #define Set_exceptiontype(object,value) Bitfield_deposit(value, 0, 6,object)
476 #define Set_parmfield(object,value) Bitfield_deposit(value, 23, 3,object)
477 #define Set_exceptiontype_and_instr_field(exception,instruction,object) \
478 object = exception << 26 | instruction
480 /* Declare the condition field
482 * 0 1 2 3 4 5 6 7 8 910 1 2 3 4 5 6 7 8 920 1 2 3 4 5 6 7 8 930 1
483 * +-------+-------+-------+-------+-------+-------+-------+-------+
484 * | |G|L|E|U|X|
485 * +-------+-------+-------+-------+-------+-------+-------+-------+
487 #define Allexception(object) (object)
488 #define Greaterthanbit(object) Bitfield_extract( 27, 1,object)
489 #define Lessthanbit(object) Bitfield_extract( 28, 1,object)
490 #define Equalbit(object) Bitfield_extract( 29, 1,object)
491 #define Unorderedbit(object) Bitfield_extract( 30, 1,object)
492 #define Exceptionbit(object) Bitfield_extract( 31, 1,object)
494 /* An alias name for the status register */
495 #define Fpustatus_register (*status)
497 /**************************************************
498 * Status register referencing and manipulation. *
499 **************************************************/
501 /* Rounding mode */
502 #define Rounding_mode() Roundingmode(Fpustatus_register)
503 #define Is_rounding_mode(rmode) \
504 (Roundingmode(Fpustatus_register) == rmode)
505 #define Set_rounding_mode(value) \
506 Bitfield_deposit(value,21,2,Fpustatus_register)
508 /* Boolean testing of the trap enable bits */
509 #define Is_invalidtrap_enabled() Invalidtrap(Fpustatus_register)
510 #define Is_divisionbyzerotrap_enabled() Divisionbyzerotrap(Fpustatus_register)
511 #define Is_overflowtrap_enabled() Overflowtrap(Fpustatus_register)
512 #define Is_underflowtrap_enabled() Underflowtrap(Fpustatus_register)
513 #define Is_inexacttrap_enabled() Inexacttrap(Fpustatus_register)
515 /* Set the indicated flags in the status register */
516 #define Set_invalidflag() Bitfield_deposit(1,0,1,Fpustatus_register)
517 #define Set_divisionbyzeroflag() Bitfield_deposit(1,1,1,Fpustatus_register)
518 #define Set_overflowflag() Bitfield_deposit(1,2,1,Fpustatus_register)
519 #define Set_underflowflag() Bitfield_deposit(1,3,1,Fpustatus_register)
520 #define Set_inexactflag() Bitfield_deposit(1,4,1,Fpustatus_register)
522 #define Clear_all_flags() Bitfield_deposit(0,0,5,Fpustatus_register)
524 /* Manipulate the trap and condition code bits (tbit and cbit) */
525 #define Set_tbit() Bitfield_deposit(1,25,1,Fpustatus_register)
526 #define Clear_tbit() Bitfield_deposit(0,25,1,Fpustatus_register)
527 #define Is_tbit_set() Tbit(Fpustatus_register)
528 #define Is_cbit_set() Cbit(Fpustatus_register)
530 #define Set_status_cbit(value) \
531 Bitfield_deposit(value,5,1,Fpustatus_register)
533 /*******************************
534 * Condition field referencing *
535 *******************************/
536 #define Unordered(cond) Unorderedbit(cond)
537 #define Equal(cond) Equalbit(cond)
538 #define Lessthan(cond) Lessthanbit(cond)
539 #define Greaterthan(cond) Greaterthanbit(cond)
540 #define Exception(cond) Exceptionbit(cond)
543 /* Defines for the extension */
544 #define Ext_isone_sign(extent) (Extsign(extent))
545 #define Ext_isnotzero(extent) \
546 (Extall(extent))
547 #define Ext_isnotzero_lower(extent) \
548 (Extlow31(extent))
549 #define Ext_leftshiftby1(extent) \
550 Extall(extent) <<= 1
551 #define Ext_negate(extent) \
552 (int )Extall(extent) = 0 - (int )Extall(extent)
553 #define Ext_setone_low(extent) Bitfield_deposit(1,31,1,extent)
554 #define Ext_setzero(extent) Extall(extent) = 0
556 typedef int operation;
558 /* error messages */
560 #define NONE 0
561 #define UNDEFFPINST 1
563 /* Function definitions: opcode, opclass */
564 #define FTEST (1<<2) | 0
565 #define FCPY (2<<2) | 0
566 #define FABS (3<<2) | 0
567 #define FSQRT (4<<2) | 0
568 #define FRND (5<<2) | 0
570 #define FCNVFF (0<<2) | 1
571 #define FCNVXF (1<<2) | 1
572 #define FCNVFX (2<<2) | 1
573 #define FCNVFXT (3<<2) | 1
575 #define FCMP (0<<2) | 2
577 #define FADD (0<<2) | 3
578 #define FSUB (1<<2) | 3
579 #define FMPY (2<<2) | 3
580 #define FDIV (3<<2) | 3
581 #define FREM (4<<2) | 3