2 * A routine to find out how much memory the machine has.
5 * arch/ppc/kernel/mpc10x_common.c
7 * Author: Mark A. Greer
10 * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
11 * the terms of the GNU General Public License version 2. This program
12 * is licensed "as is" without any warranty of any kind, whether express
16 #include <linux/pci.h>
17 #include <asm/types.h>
22 * *** WARNING - A BAT MUST be set to access the PCI config addr/data regs ***
26 * PCI config space macros, similar to indirect_xxx and early_xxx macros.
29 #define MPC10X_CFG_read(val, addr, type, op) *val = op((type)(addr))
30 #define MPC10X_CFG_write(val, addr, type, op) op((type *)(addr), (val))
32 #define MPC10X_PCI_OP(rw, size, type, op, mask) \
34 mpc10x_##rw##_config_##size(unsigned int __iomem *cfg_addr, \
35 unsigned int *cfg_data, int devfn, int offset, \
39 ((offset & 0xfc) << 24) | (devfn << 16) \
41 MPC10X_CFG_##rw(val, cfg_data + (offset & mask), type, op); \
45 MPC10X_PCI_OP(read
, byte
, u8
*, in_8
, 3)
46 MPC10X_PCI_OP(read
, dword
, u32
*, in_le32
, 0)
49 * Read the memory controller registers to determine the amount of memory in
50 * the system. This assumes that the firmware has correctly set up the memory
51 * controller registers. On CONFIG_PPC_PREP, we know we are being called
52 * under a PReP memory map. On all other machines, we assume we are under
53 * a CHRP memory map. Further, on CONFIG_PPC_PREP we must rename
56 #ifdef CONFIG_PPC_PREP
57 #define get_mem_size mpc10x_get_mem_size
62 unsigned int *config_addr
, *config_data
, val
;
63 unsigned long start
, end
, total
, offset
;
65 unsigned char bank_enables
;
67 #ifdef CONFIG_PPC_PREP
68 config_addr
= (unsigned int *)MPC10X_MAPA_CNFG_ADDR
;
69 config_data
= (unsigned int *)MPC10X_MAPA_CNFG_DATA
;
71 config_addr
= (unsigned int *)MPC10X_MAPB_CNFG_ADDR
;
72 config_data
= (unsigned int *)MPC10X_MAPB_CNFG_DATA
;
75 mpc10x_read_config_byte(config_addr
, config_data
, PCI_DEVFN(0,0),
76 MPC10X_MCTLR_MEM_BANK_ENABLES
, &bank_enables
);
80 for (i
= 0; i
< 8; i
++) {
81 if (bank_enables
& (1 << i
)) {
82 offset
= MPC10X_MCTLR_MEM_START_1
+ ((i
> 3) ? 4 : 0);
83 mpc10x_read_config_dword(config_addr
, config_data
,
84 PCI_DEVFN(0,0), offset
, &val
);
85 start
= (val
>> ((i
& 3) << 3)) & 0xff;
87 offset
= MPC10X_MCTLR_EXT_MEM_START_1
+ ((i
>3) ? 4 : 0);
88 mpc10x_read_config_dword(config_addr
, config_data
,
89 PCI_DEVFN(0,0), offset
, &val
);
90 val
= (val
>> ((i
& 3) << 3)) & 0x03;
91 start
= (val
<< 28) | (start
<< 20);
93 offset
= MPC10X_MCTLR_MEM_END_1
+ ((i
> 3) ? 4 : 0);
94 mpc10x_read_config_dword(config_addr
, config_data
,
95 PCI_DEVFN(0,0), offset
, &val
);
96 end
= (val
>> ((i
& 3) << 3)) & 0xff;
98 offset
= MPC10X_MCTLR_EXT_MEM_END_1
+ ((i
> 3) ? 4 : 0);
99 mpc10x_read_config_dword(config_addr
, config_data
,
100 PCI_DEVFN(0,0), offset
, &val
);
101 val
= (val
>> ((i
& 3) << 3)) & 0x03;
102 end
= (val
<< 28) | (end
<< 20) | 0xfffff;
104 total
+= (end
- start
+ 1);