2 * (c) 2005, 2006 Advanced Micro Devices, Inc.
3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html
7 * Written by Jacob Shin - AMD, Inc.
9 * Support : jacob.shin@amd.com
12 * - added support for AMD Family 0x10 processors
14 * All MC4_MISCi registers are shared between multi-cores
17 #include <linux/cpu.h>
18 #include <linux/errno.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/kobject.h>
22 #include <linux/notifier.h>
23 #include <linux/sched.h>
24 #include <linux/smp.h>
25 #include <linux/sysdev.h>
26 #include <linux/sysfs.h>
30 #include <asm/percpu.h>
33 #define PFX "mce_threshold: "
34 #define VERSION "version 1.1.1"
37 #define THRESHOLD_MAX 0xFFF
38 #define INT_TYPE_APIC 0x00020000
39 #define MASK_VALID_HI 0x80000000
40 #define MASK_LVTOFF_HI 0x00F00000
41 #define MASK_COUNT_EN_HI 0x00080000
42 #define MASK_INT_TYPE_HI 0x00060000
43 #define MASK_OVERFLOW_HI 0x00010000
44 #define MASK_ERR_COUNT_HI 0x00000FFF
45 #define MASK_BLKPTR_LO 0xFF000000
46 #define MCG_XBLK_ADDR 0xC0000400
48 struct threshold_block
{
56 struct list_head miscj
;
59 /* defaults used early on boot */
60 static struct threshold_block threshold_defaults
= {
61 .interrupt_enable
= 0,
62 .threshold_limit
= THRESHOLD_MAX
,
65 struct threshold_bank
{
67 struct threshold_block
*blocks
;
70 static DEFINE_PER_CPU(struct threshold_bank
*, threshold_banks
[NR_BANKS
]);
73 static unsigned char shared_bank
[NR_BANKS
] = {
78 static DEFINE_PER_CPU(unsigned char, bank_map
); /* see which banks are on */
84 /* must be called with correct cpu affinity */
85 static void threshold_restart_bank(struct threshold_block
*b
,
86 int reset
, u16 old_limit
)
88 u32 mci_misc_hi
, mci_misc_lo
;
90 rdmsr(b
->address
, mci_misc_lo
, mci_misc_hi
);
92 if (b
->threshold_limit
< (mci_misc_hi
& THRESHOLD_MAX
))
93 reset
= 1; /* limit cannot be lower than err count */
95 if (reset
) { /* reset err count and overflow bit */
97 (mci_misc_hi
& ~(MASK_ERR_COUNT_HI
| MASK_OVERFLOW_HI
)) |
98 (THRESHOLD_MAX
- b
->threshold_limit
);
99 } else if (old_limit
) { /* change limit w/o reset */
100 int new_count
= (mci_misc_hi
& THRESHOLD_MAX
) +
101 (old_limit
- b
->threshold_limit
);
102 mci_misc_hi
= (mci_misc_hi
& ~MASK_ERR_COUNT_HI
) |
103 (new_count
& THRESHOLD_MAX
);
106 b
->interrupt_enable
?
107 (mci_misc_hi
= (mci_misc_hi
& ~MASK_INT_TYPE_HI
) | INT_TYPE_APIC
) :
108 (mci_misc_hi
&= ~MASK_INT_TYPE_HI
);
110 mci_misc_hi
|= MASK_COUNT_EN_HI
;
111 wrmsr(b
->address
, mci_misc_lo
, mci_misc_hi
);
114 /* cpu init entry point, called from mce.c with preempt off */
115 void __cpuinit
mce_amd_feature_init(struct cpuinfo_x86
*c
)
117 unsigned int bank
, block
;
118 unsigned int cpu
= smp_processor_id();
119 u32 low
= 0, high
= 0, address
= 0;
121 for (bank
= 0; bank
< NR_BANKS
; ++bank
) {
122 for (block
= 0; block
< NR_BLOCKS
; ++block
) {
124 address
= MSR_IA32_MC0_MISC
+ bank
* 4;
126 address
= MCG_XBLK_ADDR
127 + ((low
& MASK_BLKPTR_LO
) >> 21);
131 if (rdmsr_safe(address
, &low
, &high
))
134 if (!(high
& MASK_VALID_HI
)) {
141 if (!(high
& MASK_VALID_HI
>> 1) ||
142 (high
& MASK_VALID_HI
>> 2))
146 per_cpu(bank_map
, cpu
) |= (1 << bank
);
148 if (shared_bank
[bank
] && c
->cpu_core_id
)
151 high
&= ~MASK_LVTOFF_HI
;
152 high
|= K8_APIC_EXT_LVT_ENTRY_THRESHOLD
<< 20;
153 wrmsr(address
, low
, high
);
155 setup_APIC_extened_lvt(K8_APIC_EXT_LVT_ENTRY_THRESHOLD
,
156 THRESHOLD_APIC_VECTOR
,
157 K8_APIC_EXT_INT_MSG_FIX
, 0);
159 threshold_defaults
.address
= address
;
160 threshold_restart_bank(&threshold_defaults
, 0, 0);
166 * APIC Interrupt Handler
170 * threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
171 * the interrupt goes off when error_count reaches threshold_limit.
172 * the handler will simply log mcelog w/ software defined bank number.
174 asmlinkage
void mce_threshold_interrupt(void)
176 unsigned int bank
, block
;
178 u32 low
= 0, high
= 0, address
= 0;
184 memset(&m
, 0, sizeof(m
));
186 m
.cpu
= smp_processor_id();
188 /* assume first bank caused it */
189 for (bank
= 0; bank
< NR_BANKS
; ++bank
) {
190 for (block
= 0; block
< NR_BLOCKS
; ++block
) {
192 address
= MSR_IA32_MC0_MISC
+ bank
* 4;
194 address
= MCG_XBLK_ADDR
195 + ((low
& MASK_BLKPTR_LO
) >> 21);
199 if (rdmsr_safe(address
, &low
, &high
))
202 if (!(high
& MASK_VALID_HI
)) {
209 if (!(high
& MASK_VALID_HI
>> 1) ||
210 (high
& MASK_VALID_HI
>> 2))
213 if (high
& MASK_OVERFLOW_HI
) {
214 rdmsrl(address
, m
.misc
);
215 rdmsrl(MSR_IA32_MC0_STATUS
+ bank
* 4,
217 m
.bank
= K8_MCE_THRESHOLD_BASE
233 struct threshold_attr
{
234 struct attribute attr
;
235 ssize_t(*show
) (struct threshold_block
*, char *);
236 ssize_t(*store
) (struct threshold_block
*, const char *, size_t count
);
239 static cpumask_t
affinity_set(unsigned int cpu
)
241 cpumask_t oldmask
= current
->cpus_allowed
;
242 cpumask_t newmask
= CPU_MASK_NONE
;
243 cpu_set(cpu
, newmask
);
244 set_cpus_allowed(current
, newmask
);
248 static void affinity_restore(cpumask_t oldmask
)
250 set_cpus_allowed(current
, oldmask
);
253 #define SHOW_FIELDS(name) \
254 static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
256 return sprintf(buf, "%lx\n", (unsigned long) b->name); \
258 SHOW_FIELDS(interrupt_enable
)
259 SHOW_FIELDS(threshold_limit
)
261 static ssize_t
store_interrupt_enable(struct threshold_block
*b
,
262 const char *buf
, size_t count
)
266 unsigned long new = simple_strtoul(buf
, &end
, 0);
269 b
->interrupt_enable
= !!new;
271 oldmask
= affinity_set(b
->cpu
);
272 threshold_restart_bank(b
, 0, 0);
273 affinity_restore(oldmask
);
278 static ssize_t
store_threshold_limit(struct threshold_block
*b
,
279 const char *buf
, size_t count
)
284 unsigned long new = simple_strtoul(buf
, &end
, 0);
287 if (new > THRESHOLD_MAX
)
291 old
= b
->threshold_limit
;
292 b
->threshold_limit
= new;
294 oldmask
= affinity_set(b
->cpu
);
295 threshold_restart_bank(b
, 0, old
);
296 affinity_restore(oldmask
);
301 static ssize_t
show_error_count(struct threshold_block
*b
, char *buf
)
305 oldmask
= affinity_set(b
->cpu
);
306 rdmsr(b
->address
, low
, high
);
307 affinity_restore(oldmask
);
308 return sprintf(buf
, "%x\n",
309 (high
& 0xFFF) - (THRESHOLD_MAX
- b
->threshold_limit
));
312 static ssize_t
store_error_count(struct threshold_block
*b
,
313 const char *buf
, size_t count
)
316 oldmask
= affinity_set(b
->cpu
);
317 threshold_restart_bank(b
, 1, 0);
318 affinity_restore(oldmask
);
322 #define THRESHOLD_ATTR(_name,_mode,_show,_store) { \
323 .attr = {.name = __stringify(_name), .mode = _mode }, \
328 #define RW_ATTR(name) \
329 static struct threshold_attr name = \
330 THRESHOLD_ATTR(name, 0644, show_## name, store_## name)
332 RW_ATTR(interrupt_enable
);
333 RW_ATTR(threshold_limit
);
334 RW_ATTR(error_count
);
336 static struct attribute
*default_attrs
[] = {
337 &interrupt_enable
.attr
,
338 &threshold_limit
.attr
,
343 #define to_block(k) container_of(k, struct threshold_block, kobj)
344 #define to_attr(a) container_of(a, struct threshold_attr, attr)
346 static ssize_t
show(struct kobject
*kobj
, struct attribute
*attr
, char *buf
)
348 struct threshold_block
*b
= to_block(kobj
);
349 struct threshold_attr
*a
= to_attr(attr
);
351 ret
= a
->show
? a
->show(b
, buf
) : -EIO
;
355 static ssize_t
store(struct kobject
*kobj
, struct attribute
*attr
,
356 const char *buf
, size_t count
)
358 struct threshold_block
*b
= to_block(kobj
);
359 struct threshold_attr
*a
= to_attr(attr
);
361 ret
= a
->store
? a
->store(b
, buf
, count
) : -EIO
;
365 static struct sysfs_ops threshold_ops
= {
370 static struct kobj_type threshold_ktype
= {
371 .sysfs_ops
= &threshold_ops
,
372 .default_attrs
= default_attrs
,
375 static __cpuinit
int allocate_threshold_blocks(unsigned int cpu
,
382 struct threshold_block
*b
= NULL
;
384 if ((bank
>= NR_BANKS
) || (block
>= NR_BLOCKS
))
387 if (rdmsr_safe(address
, &low
, &high
))
390 if (!(high
& MASK_VALID_HI
)) {
397 if (!(high
& MASK_VALID_HI
>> 1) ||
398 (high
& MASK_VALID_HI
>> 2))
401 b
= kzalloc(sizeof(struct threshold_block
), GFP_KERNEL
);
404 memset(b
, 0, sizeof(struct threshold_block
));
409 b
->address
= address
;
410 b
->interrupt_enable
= 0;
411 b
->threshold_limit
= THRESHOLD_MAX
;
413 INIT_LIST_HEAD(&b
->miscj
);
415 if (per_cpu(threshold_banks
, cpu
)[bank
]->blocks
)
417 &per_cpu(threshold_banks
, cpu
)[bank
]->blocks
->miscj
);
419 per_cpu(threshold_banks
, cpu
)[bank
]->blocks
= b
;
421 kobject_set_name(&b
->kobj
, "misc%i", block
);
422 b
->kobj
.parent
= &per_cpu(threshold_banks
, cpu
)[bank
]->kobj
;
423 b
->kobj
.ktype
= &threshold_ktype
;
424 err
= kobject_register(&b
->kobj
);
429 address
= (low
& MASK_BLKPTR_LO
) >> 21;
432 address
+= MCG_XBLK_ADDR
;
436 err
= allocate_threshold_blocks(cpu
, bank
, ++block
, address
);
444 kobject_unregister(&b
->kobj
);
450 /* symlinks sibling shared banks to first core. first core owns dir/files. */
451 static __cpuinit
int threshold_create_bank(unsigned int cpu
, unsigned int bank
)
454 struct threshold_bank
*b
= NULL
;
455 cpumask_t oldmask
= CPU_MASK_NONE
;
458 sprintf(name
, "threshold_bank%i", bank
);
461 if (cpu_data
[cpu
].cpu_core_id
&& shared_bank
[bank
]) { /* symlink */
462 i
= first_cpu(cpu_core_map
[cpu
]);
464 /* first core not up yet */
465 if (cpu_data
[i
].cpu_core_id
)
469 if (per_cpu(threshold_banks
, cpu
)[bank
])
472 b
= per_cpu(threshold_banks
, i
)[bank
];
477 err
= sysfs_create_link(&per_cpu(device_mce
, cpu
).kobj
,
482 b
->cpus
= cpu_core_map
[cpu
];
483 per_cpu(threshold_banks
, cpu
)[bank
] = b
;
488 b
= kzalloc(sizeof(struct threshold_bank
), GFP_KERNEL
);
493 memset(b
, 0, sizeof(struct threshold_bank
));
495 kobject_set_name(&b
->kobj
, "threshold_bank%i", bank
);
496 b
->kobj
.parent
= &per_cpu(device_mce
, cpu
).kobj
;
498 b
->cpus
= CPU_MASK_ALL
;
500 b
->cpus
= cpu_core_map
[cpu
];
502 err
= kobject_register(&b
->kobj
);
506 per_cpu(threshold_banks
, cpu
)[bank
] = b
;
508 oldmask
= affinity_set(cpu
);
509 err
= allocate_threshold_blocks(cpu
, bank
, 0,
510 MSR_IA32_MC0_MISC
+ bank
* 4);
511 affinity_restore(oldmask
);
516 for_each_cpu_mask(i
, b
->cpus
) {
520 err
= sysfs_create_link(&per_cpu(device_mce
, i
).kobj
,
525 per_cpu(threshold_banks
, i
)[bank
] = b
;
531 per_cpu(threshold_banks
, cpu
)[bank
] = NULL
;
537 /* create dir/files for all valid threshold banks */
538 static __cpuinit
int threshold_create_device(unsigned int cpu
)
543 for (bank
= 0; bank
< NR_BANKS
; ++bank
) {
544 if (!(per_cpu(bank_map
, cpu
) & 1 << bank
))
546 err
= threshold_create_bank(cpu
, bank
);
554 #ifdef CONFIG_HOTPLUG_CPU
556 * let's be hotplug friendly.
557 * in case of multiple core processors, the first core always takes ownership
558 * of shared sysfs dir/files, and rest of the cores will be symlinked to it.
561 static void deallocate_threshold_block(unsigned int cpu
,
564 struct threshold_block
*pos
= NULL
;
565 struct threshold_block
*tmp
= NULL
;
566 struct threshold_bank
*head
= per_cpu(threshold_banks
, cpu
)[bank
];
571 list_for_each_entry_safe(pos
, tmp
, &head
->blocks
->miscj
, miscj
) {
572 kobject_unregister(&pos
->kobj
);
573 list_del(&pos
->miscj
);
577 kfree(per_cpu(threshold_banks
, cpu
)[bank
]->blocks
);
578 per_cpu(threshold_banks
, cpu
)[bank
]->blocks
= NULL
;
581 static void threshold_remove_bank(unsigned int cpu
, int bank
)
584 struct threshold_bank
*b
;
587 b
= per_cpu(threshold_banks
, cpu
)[bank
];
595 sprintf(name
, "threshold_bank%i", bank
);
597 /* sibling symlink */
598 if (shared_bank
[bank
] && b
->blocks
->cpu
!= cpu
) {
599 sysfs_remove_link(&per_cpu(device_mce
, cpu
).kobj
, name
);
600 per_cpu(threshold_banks
, cpu
)[bank
] = NULL
;
604 /* remove all sibling symlinks before unregistering */
605 for_each_cpu_mask(i
, b
->cpus
) {
609 sysfs_remove_link(&per_cpu(device_mce
, i
).kobj
, name
);
610 per_cpu(threshold_banks
, i
)[bank
] = NULL
;
613 deallocate_threshold_block(cpu
, bank
);
616 kobject_unregister(&b
->kobj
);
618 per_cpu(threshold_banks
, cpu
)[bank
] = NULL
;
621 static void threshold_remove_device(unsigned int cpu
)
625 for (bank
= 0; bank
< NR_BANKS
; ++bank
) {
626 if (!(per_cpu(bank_map
, cpu
) & 1 << bank
))
628 threshold_remove_bank(cpu
, bank
);
632 /* get notified when a cpu comes on/off */
633 static int threshold_cpu_callback(struct notifier_block
*nfb
,
634 unsigned long action
, void *hcpu
)
636 /* cpu was unsigned int to begin with */
637 unsigned int cpu
= (unsigned long)hcpu
;
644 threshold_create_device(cpu
);
647 threshold_remove_device(cpu
);
656 static struct notifier_block threshold_cpu_notifier
= {
657 .notifier_call
= threshold_cpu_callback
,
659 #endif /* CONFIG_HOTPLUG_CPU */
661 static __init
int threshold_init_device(void)
665 /* to hit CPUs online before the notifier is up */
666 for_each_online_cpu(lcpu
) {
667 int err
= threshold_create_device(lcpu
);
671 register_hotcpu_notifier(&threshold_cpu_notifier
);
675 device_initcall(threshold_init_device
);