4 /* Describe the MTT CTG module instruction Set */
6 OpCode InstructionSet
[OPCODES
] = {
8 /* { Name ,Comment ,Number ,Src1 ,Src2 ,Dest } */
10 { "HALT" ,"Stop program" ,HALT
,AtNothing
,AtNothing
,AtNothing
},
11 { "NOOP" ,"No operation" ,NOOP
,AtNothing
,AtNothing
,AtNothing
},
13 { "INT" ,"Interrupt[1..16]" ,INT
,AtLiteral
,AtNothing
,AtNothing
},
14 { "WEQV" ,"Wait value equal" ,WEQV
,AtLiteral
,AtRegister
,AtNothing
},
15 { "WRLV" ,"Wait value relative" ,WRLV
,AtLiteral
,AtRegister
,AtNothing
},
16 { "WORV" ,"Wait value bit mask" ,WORV
,AtLiteral
,AtRegister
,AtNothing
},
18 { "WEQR" ,"Wait register equal" ,WEQR
,AtRegister
,AtRegister
,AtNothing
},
19 { "WRLR" ,"Wait register relative" ,WRLR
,AtRegister
,AtRegister
,AtNothing
},
20 { "WORR" ,"Wait register bit mask" ,WORR
,AtRegister
,AtRegister
,AtNothing
},
22 { "MOVV" ,"Load register" ,MOVV
,AtLiteral
,AtNothing
,AtRegister
},
24 { "MOVR" ,"Move register" ,MOVR
,AtRegister
,AtNothing
,AtRegister
},
26 { "MOVIR" ,"Move Index register" ,MOVIR
,AtRegister
,AtNothing
,AtRegister
},
27 { "MOVRI" ,"Move register Index" ,MOVRI
,AtRegister
,AtRegister
,AtNothing
},
29 { "ADDR" ,"Add register" ,ADDR
,AtRegister
,AtRegister
,AtRegister
},
30 { "SUBR" ,"Subtract register" ,SUBR
,AtRegister
,AtRegister
,AtRegister
},
31 { "LORR" ,"Or register" ,LORR
,AtRegister
,AtRegister
,AtRegister
},
32 { "ANDR" ,"And register" ,ANDR
,AtRegister
,AtRegister
,AtRegister
},
33 { "XORR" ,"ExclusiveOr register" ,XORR
,AtRegister
,AtRegister
,AtRegister
},
35 { "LSR" ,"LeftShift register" ,LSR
,AtRegister
,AtRegister
,AtRegister
},
36 { "RSR" ,"RightShift register" ,RSR
,AtRegister
,AtRegister
,AtRegister
},
38 { "ADDV" ,"Add value" ,ADDV
,AtLiteral
,AtRegister
,AtRegister
},
39 { "SUBV" ,"Subtract value" ,SUBV
,AtLiteral
,AtRegister
,AtRegister
},
40 { "LORV" ,"Or value" ,LORV
,AtLiteral
,AtRegister
,AtRegister
},
41 { "ANDV" ,"And value" ,ANDV
,AtLiteral
,AtRegister
,AtRegister
},
42 { "XORV" ,"ExclusiveOr value" ,XORV
,AtLiteral
,AtRegister
,AtRegister
},
43 { "LSV" ,"LeftShift value" ,LSV
,AtLiteral
,AtRegister
,AtRegister
},
44 { "RSV" ,"RightShift value" ,RSV
,AtLiteral
,AtRegister
,AtRegister
},
46 { "WDOG" ,"Watch Dod" ,WDOG
,AtAddress
,AtNothing
,AtNothing
},
47 { "JMP" ,"Jump" ,JMP
,AtAddress
,AtNothing
,AtNothing
},
48 { "BEQ" ,"Branch Equal" ,BEQ
,AtAddress
,AtNothing
,AtNothing
},
49 { "BNE" ,"Branch NotEqual" ,BNE
,AtAddress
,AtNothing
,AtNothing
},
50 { "BLT" ,"Branch LessThan" ,BLT
,AtAddress
,AtNothing
,AtNothing
},
51 { "BGT" ,"Branch GreaterThan" ,BGT
,AtAddress
,AtNothing
,AtNothing
},
52 { "BLE" ,"Branch LessThanEqual" ,BLE
,AtAddress
,AtNothing
,AtNothing
},
53 { "BGE" ,"Branch GreaterThanEqual" ,BGE
,AtAddress
,AtNothing
,AtNothing
},
54 { "BCR" ,"Branch Carry" ,BCR
,AtAddress
,AtNothing
,AtNothing
} };
56 /* Describe the MTT CTG module register Set */
58 RegisterDsc Regs
[REGNAMES
] = {
60 { "GR" ,"Global" ,GAdrGR01
,LastGAdrGR
, 1, GLOBAL_REG
},
61 { "OUTPUTS" ,"Control of outputs" ,GAdrOUTPUTS
,GAdrOUTPUTS
, 0, GLOBAL_REG
},
62 { "EVIN" ,"Event input" ,GAdrEVIN
,GAdrEVIN
, 0, GLOBAL_REG
},
63 { "EVINCNT" ,"Event input counter" ,GAdrEVINCNT
,GAdrEVINCNT
, 0, GLOBAL_REG
},
64 { "EVOUTCNT","Event output counter" ,GAdrEVOUTCNT
,GAdrEVOUTCNT
, 0, GLOBAL_REG
},
65 { "EVOUTFB" ,"Event output feed back" ,GAdrEVOUTFB
,GAdrEVOUTFB
, 0, GLOBAL_REG
},
66 { "EVOUTL" ,"Event output low priority" ,GAdrEVOUTL
,GAdrEVOUTL
, 0, GLOBAL_REG
},
67 { "MSMR" ,"MilliSecond modulo" ,GAdrMSMR
,GAdrMSMR
, 0, GLOBAL_REG
},
68 { "TSYNC" ,"Time from sync" ,GAdrTSYNC
,GAdrTSYNC
, 0, GLOBAL_REG
},
69 { "VMEP2" ,"VME P2 input" ,GAdrVMEP2
,GAdrVMEP2
, 0, GLOBAL_REG
},
70 { "EVOUTH" ,"Event output high priority" ,GAdrEVOUTH
,GAdrEVOUTH
, 0, GLOBAL_REG
},
71 { "MSFR" ,"Free running milliSecond" ,GAdrMSFR
,GAdrMSFR
, 0, GLOBAL_REG
},
72 { "SYNCFR" ,"Free running Sync time" ,GAdrSYNCFR
,GAdrSYNCFR
, 0, GLOBAL_REG
},
73 { "INDEX" ,"Index address" ,LAdrINDEX
,LAdrINDEX
, 0, LOCAL_REG
},
74 { "LR" ,"Local" ,LAdrLR01
,LastLAdrLR
, 1, LOCAL_REG
}