vd80/include/vd80Drvr.h

   1 /* ======================================= */
   2 /* VD80 Sampler public user interface.     */
   3 /* Tue 10th Feb 2009 BE/CO/HT Julian Lewis */
   4 /* ======================================= */
   5
   6 #ifndef VD80DRVR
   7 #define VD80DRVR
   8
   9 #include <skeluser.h>
  10
  11 /* ============================================= */
  12
  13 /* WO is a vlue that you must supply */
  14 /* RO is a value returned to you by the driver */
  15 /* RW is WO followed by RO */
  16
  17 /* The driver will try to supply the requested data, in any case */
  18 /* it will adjust the values of TrigPosition and Samples as best it can */
  19 /* You should have set up the number of post-samples SET_POSTSAMPLES */
  20 /* prior to calling READ_SAMPLE. */
  21
  22 typedef struct {
  23    int Channel;        /* WO Channel to read from */
  24    int BufSizeSamples; /* WO Target buffer size (In samples) */
  25    int TrigPosition;   /* RW Position of trigger in buf */
  26    int Samples;        /* RO On return: The number of samples read */
  27    int PreTrigStat;    /* RO Pre-Trigger Status Register */
  28    short *SampleBuf;   /* RO Buffer where samples will be stored */
  29  } Vd80SampleBuf;
  30
  31 typedef enum {
  32    Vd80DrvrClockINTERNAL,
  33    Vd80DrvrClockEXTERNAL,
  34    Vd80DrvrCLOCKS
  35  } Vd80DrvrClock;
  36
  37 typedef enum {
  38    Vd80DrvrDivideModeDIVIDE,
  39    Vd80DrvrDivideModeSUBSAMPLE,
  40    Vd80DrvrDivideMODES
  41  } Vd80DrvrDivideMode;
  42
  43 typedef enum {
  44    Vd80DrvrEdgeRISING,
  45    Vd80DrvrEdgeFALLING,
  46    Vd80DrvrEDGES
  47  } Vd80DrvrEdge;
  48
  49 typedef enum {
  50    Vd80DrvrTerminationNONE,
  51    Vd80DrvrTermination50OHM,
  52    Vd80DrvrTERMINATIONS
  53  } Vd80DrvrTermination;
  54
  55 typedef enum {
  56    Vd80DrvrTriggerINTERNAL,
  57    Vd80DrvrTriggerEXTERNAL,
  58    Vd80DrvrTRIGGERS
  59  } Vd80DrvrTrigger;
  60
  61 typedef enum {
  62    Vd80DrvrStateIDLE        = 0x1,
  63    Vd80DrvrStatePRETRIGGER  = 0x2,
  64    Vd80DrvrStatePOSTTRIGGER = 0x4,
  65    Vd80DrvrSTATES           = 3
  66  } Vd80DrvrState;
  67
  68 typedef enum {
  69    Vd80DrvrCommandSTOP     = 0xE,
  70    Vd80DrvrCommandSTART    = 0xB,
  71    Vd80DrvrCommandSUBSTOP  = 0x8,
  72    Vd80DrvrCommandSUBSTART = 0x9,
  73    Vd80DrvrCommandTRIGGER  = 0x2,
  74    Vd80DrvrCommandREAD     = 0x4,
  75    Vd80DrvrCommandSINGLE   = 0x1,
  76    Vd80DrvrCommandCLEAR    = 0xC,
  77    Vd80DrvrCOMMANDS        = 8
  78  } Vd80DrvrCommand;
  79
  80 typedef enum {
  81    Vd80DrvrATrigDISABLED   = 0x0,
  82    Vd80DrvrATrigBELOW      = 0x3,
  83    Vd80DrvrATrigABOVE      = 0x4,
  84  } Vd80DrvrATrig;
  85
  86
  87 typedef struct {
  88    int           Channel;     /* Channel to define the trigger on */
  89    Vd80DrvrATrig Control;     /* Control options for trigger */
  90    short         Level;       /* Trigger level */
  91  } Vd80DrvrAnalogTrig;
  92
  93 typedef struct {
  94    int           TrigDelay;   /* Time to wait after trig in sample intervals */
  95    int           MinPreTrig;  /* Mininimum number of pretrig samples */
  96  } Vd80DrvrTrigConfig;
  97
  98 /* ============================================= */
  99 /* Define the VD80 specific IOCTL function codes */
 100
 101 typedef enum {
 102
 103    Vd80NumFIRST,
 104
 105    Vd80NumSET_CLOCK,              /* Set to a Vd80 clock */
 106    Vd80NumSET_CLOCK_DIVIDE_MODE,  /* Sub sample or clock */
 107    Vd80NumSET_CLOCK_DIVISOR,      /* A 16 bit integer so the lowest frequency is */
 108                                   /*    200000/65535 (16bits 0xFFFF) ~3.05Hz     */
 109    Vd80NumSET_CLOCK_EDGE,         /* Set to a Vd80 edge */
 110    Vd80NumSET_CLOCK_TERMINATION,  /* Set to a Vd80 termination */
 111
 112    Vd80NumGET_CLOCK,
 113    Vd80NumGET_CLOCK_DIVIDE_MODE,
 114    Vd80NumGET_CLOCK_DIVISOR,
 115    Vd80NumGET_CLOCK_EDGE,
 116    Vd80NumGET_CLOCK_TERMINATION,
 117
 118    Vd80NumSET_TRIGGER,
 119    Vd80NumSET_TRIGGER_EDGE,
 120    Vd80NumSET_TRIGGER_TERMINATION,
 121
 122    Vd80NumGET_TRIGGER,
 123    Vd80NumGET_TRIGGER_EDGE,
 124    Vd80NumGET_TRIGGER_TERMINATION,
 125
 126    Vd80NumSET_ANALOGUE_TRIGGER,   /* Vd80DrvrAnalogTrig */
 127    Vd80NumGET_ANALOGUE_TRIGGER,   /* Vd80DrvrAnalogTrig */
 128
 129    Vd80NumGET_STATE,              /* Returns a Vd80 state */
 130    Vd80NumSET_COMMAND,            /* Set to a Vd80 command */
 131
 132    Vd80NumREAD_ADC,
 133    Vd80NumREAD_SAMPLE,
 134
 135    Vd80NumGET_POSTSAMPLES, /* Get the number of post samples you set */
 136    Vd80NumSET_POSTSAMPLES, /* Set the number of post samples you want */
 137
 138    Vd80NumGET_TRIGGER_CONFIG,     /* Get Trig delay and min pre trig samples */
 139    Vd80NumSET_TRIGGER_CONFIG,     /* Set Trig delay and min pre trig samples */
 140
 141    Vd80NumLAST                                    /* The last IOCTL */
 142
 143  } Vd80Num;
 144
 145 #define Vd80DrvrSPECIFIC_IOCTL_CALLS (Vd80NumLAST - Vd80NumFIRST + 1)
 146
 147 #endif