1 /* channels per card */
2 #define VMOD16A2_CHANNELS 2
4 /* VMOD 16A2 registers offsets */
5 #define VMOD16A2_DAC0IN 0x00 /* channel 0 input */
6 #define VMOD16A2_DAC1IN 0x02 /* channel 1 input */
7 #define VMOD16A2_LDAC0 0x04 /* channel 0 load (start conversion) */
8 #define VMOD16A2_LDAC1 0x06 /* channel 1 load (start conversion) */
9 #define VMOD16A2_LDAC01 0x08 /* load both channels */
10 #define VMOD16A2_CDAC0 0x10 /* channel 0 clear */
11 #define VMOD16A2_CDAC1 0x12 /* channel 1 clear */
12 #define VMOD16A2_WDCTRL 0x16 /* watchdog timer ctrl register */
13 #define VMOD16A2_WDCLR 0x18 /* clear watchdog timer */
15 /** @ brief vmod16a2 register layout */
16 struct vmod16a2_registers
{
17 unsigned short dac0in
; /** DAC0 input */
18 unsigned short dac1in
; /** DAC1 input */
19 unsigned short ldac0
; /** load DAC0 */
20 unsigned short ldac1
; /** load DAC1 */
21 unsigned short ldac01
; /** load both DACs */
22 unsigned short cdac0
; /** clear DAC0 */
23 unsigned short cdac1
; /** clear DAC1 */
24 unsigned short wdctrl
; /** watchdog set/enable */
25 unsigned short wdclr
; /** watchdog clear */
28 /** @brief ioctl arg for IOCPUT */
29 struct vmod16a2_convert
{
30 unsigned int channel
; /**< output channel (0 or 1) */
31 unsigned int value
; /**< 16-bit value to output */
34 /* driver internals, device table size and ioctl commands */
36 #define VMOD16A2_MAX_MODULES 64
38 #define VMOD16A2_IOC_MAGIC 'J'
39 #define VMOD16A2_IOCPUT _IOW(VMOD16A2_IOC_MAGIC, 2, struct vmod16a2_convert)