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htcleo: fix hw3d hardcoding firmware in kernel
[htc-linux.git] / drivers / video / msm / gpu / kgsl / kgsl_ringbuffer.c
blob8a1f28596680f9c25af6f4ec5bd646c6d41ec2d4
1 /*
2 * (C) Copyright Advanced Micro Devices, Inc. 2002, 2007
3 * Copyright (c) 2008-2009 QUALCOMM USA, INC.
4 *
5 * All source code in this file is licensed under the following license
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
14 * See the GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, you can find it at http://www.fsf.org
18 */
19 #include <linux/firmware.h>
20 #include <linux/io.h>
21 #include <linux/sched.h>
22 #include <linux/wait.h>
23
24 #include "kgsl.h"
25 #include "kgsl_device.h"
26 #include "kgsl_log.h"
27 #include "kgsl_pm4types.h"
28 #include "kgsl_ringbuffer.h"
29 #include "kgsl_cmdstream.h"
30
31 #include "yamato_reg.h"
32
33 #define GSL_RB_NOP_SIZEDWORDS 2
34 /* protected mode error checking below register address 0x800
35 * note: if CP_INTERRUPT packet is used then checking needs
36 * to change to below register address 0x7C8
37 */
38 #define GSL_RB_PROTECTED_MODE_CONTROL 0x200001F2
39
40 #define GSL_CP_INT_MASK \
41 (CP_INT_CNTL__SW_INT_MASK | \
42 CP_INT_CNTL__T0_PACKET_IN_IB_MASK | \
43 CP_INT_CNTL__OPCODE_ERROR_MASK | \
44 CP_INT_CNTL__PROTECTED_MODE_ERROR_MASK | \
45 CP_INT_CNTL__RESERVED_BIT_ERROR_MASK | \
46 CP_INT_CNTL__IB_ERROR_MASK | \
47 CP_INT_CNTL__IB2_INT_MASK | \
48 CP_INT_CNTL__IB1_INT_MASK | \
49 CP_INT_CNTL__RB_INT_MASK)
50
51 #define YAMATO_PFP_FW "yamato_pfp.fw"
52 #define YAMATO_PM4_FW "yamato_pm4.fw"
53
54 /* ringbuffer size log2 quadwords equivalent */
55 inline unsigned int kgsl_ringbuffer_sizelog2quadwords(unsigned int sizedwords)
56 {
57 unsigned int sizelog2quadwords = 0;
58 int i = sizedwords >> 1;
59
60 while (i >>= 1)
61 sizelog2quadwords++;
62
63 return sizelog2quadwords;
64 }
65
66
67 // +Cotulla hack
68 #ifndef ARRAYSIZE
69 #define ARRAYSIZE(a) (sizeof(a)/sizeof(a[0]))
70 #endif
71
72 unsigned char fw_yamato_pfp[1156] =
73 {
74 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0xC6, 0x00, 0x4B, 0x42, 0x7E, 0x00, 0x00, 0x00, 0xA0, 0x00,
75 0x8B, 0x82, 0x7E, 0x00, 0x01, 0x00, 0x80, 0x00, 0x00, 0x04, 0xC6, 0x00, 0x03, 0x40, 0xCC, 0x00,
76 0x00, 0x00, 0x80, 0x00, 0x03, 0x00, 0xD6, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x2C, 0xC6, 0x00,
77 0x35, 0x0C, 0xC8, 0x00, 0x00, 0xC0, 0x98, 0x00, 0x35, 0x0C, 0xC8, 0x00, 0x00, 0x00, 0x88, 0x00,
78 0x1D, 0x0C, 0xC8, 0x00, 0x0B, 0x00, 0x84, 0x00, 0x00, 0x08, 0xC6, 0x00, 0x07, 0xC0, 0x98, 0x00,
79 0x00, 0x10, 0xC6, 0x00, 0x03, 0x80, 0x97, 0x00, 0x03, 0x40, 0xCC, 0x00, 0x04, 0x00, 0xD6, 0x00,
80 0x00, 0x00, 0x80, 0x00, 0x03, 0x00, 0xCD, 0x00, 0x00, 0x00, 0x80, 0x00, 0x1F, 0x00, 0xD6, 0x00,
81 0x0B, 0x00, 0x84, 0x00, 0x00, 0x08, 0xC6, 0x00, 0x0C, 0xC0, 0x98, 0x00, 0x00, 0x10, 0xC6, 0x00,
82 0x03, 0x40, 0xCC, 0x00, 0x00, 0x14, 0xC6, 0x00, 0x00, 0x18, 0xC6, 0x00, 0x40, 0x6D, 0x7D, 0x00,
83 0x1E, 0x40, 0xCD, 0x00, 0x03, 0x80, 0x97, 0x00, 0x1E, 0x80, 0xCD, 0x00, 0x04, 0x00, 0xD6, 0x00,
84 0x00, 0x00, 0x80, 0x00, 0x03, 0x00, 0xCD, 0x00, 0x00, 0x00, 0x80, 0x00, 0x1F, 0x00, 0xD6, 0x00,
85 0x0B, 0x00, 0x84, 0x00, 0x00, 0x08, 0xC6, 0x00, 0x07, 0xC0, 0x98, 0x00, 0x00, 0x0C, 0xC6, 0x00,
86 0x03, 0x40, 0xCC, 0x00, 0x03, 0x80, 0xCC, 0x00, 0x03, 0xC0, 0xCC, 0x00, 0x00, 0x00, 0x80, 0x00,
87 0x03, 0x00, 0xD6, 0x00, 0x00, 0x00, 0x80, 0x00, 0x1F, 0x00, 0xD6, 0x00, 0x00, 0x08, 0xC6, 0x00,
88 0x08, 0x8C, 0x34, 0x00, 0x06, 0xC0, 0x98, 0x00, 0x1E, 0x0C, 0xC8, 0x00, 0x00, 0xC0, 0x98, 0x00,
89 0x1E, 0x0C, 0xC8, 0x00, 0x3F, 0x00, 0x80, 0x00, 0x07, 0x80, 0xCC, 0x00, 0x08, 0x80, 0xCC, 0x00,
90 0x03, 0x40, 0xCC, 0x00, 0x00, 0x00, 0x80, 0x00, 0x03, 0x80, 0xCC, 0x00, 0x00, 0x04, 0xC6, 0x00,
91 0x07, 0x9C, 0x1A, 0x00, 0x21, 0x88, 0xCA, 0x00, 0xBB, 0xC3, 0x95, 0x00, 0x2C, 0x10, 0xC8, 0x00,
92 0x0A, 0x80, 0x98, 0x00, 0x18, 0x94, 0x32, 0x00, 0x04, 0x40, 0x9A, 0x00, 0x10, 0x68, 0xCC, 0x00,
93 0x01, 0x24, 0x04, 0x00, 0x43, 0x01, 0xD0, 0x00, 0x62, 0x01, 0xD0, 0x00, 0x02, 0x00, 0xCD, 0x00,
94 0x4C, 0x51, 0x7D, 0x00, 0x03, 0x40, 0xCD, 0x00, 0x07, 0x80, 0x9B, 0x00, 0x01, 0xA8, 0x06, 0x00,
95 0x03, 0x40, 0x96, 0x00, 0x00, 0x80, 0xC2, 0x00, 0x03, 0x40, 0xCF, 0x00, 0x01, 0x00, 0x80, 0x00,
96 0x00, 0x04, 0xC6, 0x00, 0x43, 0x00, 0x80, 0x00, 0x00, 0x04, 0xC6, 0x00, 0x01, 0x00, 0x80, 0x00,
97 0x00, 0x04, 0xC6, 0x00, 0x00, 0x08, 0xC6, 0x00, 0x00, 0x0C, 0xC6, 0x00, 0x2D, 0x10, 0xC8, 0x00,
98 0x02, 0x94, 0x34, 0x00, 0x0B, 0x00, 0x99, 0x00, 0x2E, 0x18, 0xC8, 0x00, 0x02, 0x40, 0xCD, 0x00,
99 0x02, 0x80, 0xCD, 0x00, 0xE3, 0x01, 0xD0, 0x00, 0xC3, 0x01, 0xD0, 0x00, 0x03, 0xC0, 0xCC, 0x00,
100 0x1C, 0x80, 0xCC, 0x00, 0x1D, 0x80, 0xCD, 0x00, 0x01, 0x00, 0x80, 0x00, 0x00, 0x04, 0xC6, 0x00,
101 0x03, 0x02, 0xD0, 0x00, 0x00, 0x00, 0x80, 0x00, 0xC3, 0x01, 0xD0, 0x00, 0x1F, 0x08, 0xC8, 0x00,
102 0x00, 0x0C, 0xC6, 0x00, 0x20, 0x0C, 0xC8, 0x00, 0x00, 0x80, 0x98, 0x00, 0x1F, 0x08, 0xC8, 0x00,
103 0x03, 0x40, 0xCC, 0x00, 0x03, 0xC0, 0xCC, 0x00, 0x03, 0x00, 0xD6, 0x00, 0x22, 0xC0, 0xCC, 0x00,
104 0x1F, 0x00, 0xCC, 0x00, 0x00, 0x00, 0x80, 0x00, 0x1F, 0x00, 0xCC, 0x00, 0x2F, 0x1C, 0xC8, 0x00,
105 0x00, 0x04, 0xC6, 0x00, 0x00, 0x08, 0xC6, 0x00, 0x00, 0x0C, 0xC6, 0x00, 0x30, 0x10, 0xC8, 0x00,
106 0x00, 0xC0, 0x99, 0x00, 0x2F, 0x1C, 0xC8, 0x00, 0x21, 0x80, 0xCC, 0x00, 0x20, 0x40, 0xCC, 0x00,
107 0x11, 0x00, 0x99, 0x00, 0xFF, 0x07, 0xC1, 0x00, 0x23, 0x02, 0xD0, 0x00, 0x43, 0x02, 0xD0, 0x00,
108 0x02, 0x54, 0x34, 0x00, 0x8B, 0xB1, 0x7C, 0x00, 0xCC, 0x95, 0x7D, 0x00, 0x02, 0xC0, 0xCD, 0x00,
109 0x02, 0xC0, 0xCC, 0x00, 0x63, 0x02, 0xD0, 0x00, 0x05, 0x80, 0x97, 0x00, 0x03, 0xC0, 0xCC, 0x00,
110 0x00, 0x08, 0xC6, 0x00, 0x88, 0x00, 0x80, 0x00, 0x00, 0x0C, 0xC6, 0x00, 0x00, 0x00, 0x80, 0x00,
111 0x83, 0x02, 0xD0, 0x00, 0x6D, 0x83, 0x97, 0x00, 0x00, 0x04, 0xC6, 0x00, 0x1F, 0x00, 0xD6, 0x00,
112 0x01, 0x00, 0x80, 0x00, 0x00, 0x04, 0xC6, 0x00, 0x0D, 0x00, 0xD2, 0x00, 0x0D, 0x00, 0xCC, 0x00,
113 0x00, 0x00, 0x80, 0x00, 0x0D, 0x00, 0xCC, 0x00, 0x00, 0x08, 0xC6, 0x00, 0x00, 0x0C, 0xC6, 0x00,
114 0x33, 0x14, 0xCA, 0x00, 0xA0, 0x22, 0xD0, 0x00, 0x00, 0xE0, 0xCC, 0x00, 0x5E, 0x43, 0x99, 0x00,
115 0x05, 0xE0, 0xCC, 0x00, 0x00, 0x00, 0x80, 0x00, 0x01, 0x20, 0x06, 0x00, 0x00, 0x08, 0xC6, 0x00,
116 0x00, 0x0C, 0xC6, 0x00, 0xC3, 0x02, 0xD2, 0x00, 0x03, 0x80, 0xCC, 0x00, 0x03, 0xC0, 0xCC, 0x00,
117 0x27, 0xE0, 0xCC, 0x00, 0x00, 0x00, 0x80, 0x00, 0x01, 0x20, 0x06, 0x00, 0x31, 0x08, 0xCA, 0x00,
118 0xFF, 0x83, 0x98, 0x00, 0x31, 0x08, 0xCA, 0x00, 0x1F, 0x00, 0xD6, 0x00, 0x01, 0x00, 0x80, 0x00,
119 0x00, 0x04, 0xC6, 0x00, 0x01, 0x20, 0x0A, 0x00, 0x01, 0x00, 0x80, 0x00, 0x00, 0x04, 0xC6, 0x00,
120 0x09, 0x00, 0xD2, 0x00, 0x0A, 0x00, 0xD2, 0x00, 0x1F, 0x00, 0xCC, 0x00, 0x00, 0x00, 0x80, 0x00,
121 0x1F, 0x00, 0xCC, 0x00, 0x0B, 0x00, 0xD2, 0x00, 0x0C, 0x00, 0xD2, 0x00, 0x1F, 0x00, 0xCC, 0x00,
122 0x00, 0x00, 0x80, 0x00, 0x1F, 0x00, 0xCC, 0x00, 0x23, 0x00, 0xCC, 0x00, 0x03, 0x40, 0xCC, 0x00,
123 0x03, 0x00, 0xCE, 0x00, 0x00, 0x00, 0x80, 0x00, 0x03, 0x00, 0xD6, 0x00, 0x03, 0x03, 0xD0, 0x00,
124 0x24, 0x00, 0xCC, 0x00, 0x03, 0x40, 0xCC, 0x00, 0x00, 0x00, 0x80, 0x00, 0x03, 0x00, 0xD6, 0x00,
125 0x23, 0x03, 0xD0, 0x00, 0x25, 0x00, 0xCC, 0x00, 0x03, 0x40, 0xCC, 0x00, 0x00, 0x00, 0x80, 0x00,
126 0x03, 0x00, 0xD6, 0x00, 0x43, 0x03, 0xD0, 0x00, 0x26, 0x00, 0xCC, 0x00, 0x03, 0x40, 0xCC, 0x00,
127 0x00, 0x00, 0x80, 0x00, 0x03, 0x00, 0xD6, 0x00, 0x00, 0x00, 0x80, 0x00, 0x1F, 0x00, 0xD6, 0x00,
128 0x01, 0x04, 0x28, 0x00, 0x01, 0x00, 0xD2, 0x00, 0x00, 0x10, 0xC6, 0x00, 0x00, 0x14, 0xC6, 0x00,
129 0x01, 0x40, 0xCC, 0x00, 0x06, 0x40, 0xCC, 0x00, 0xFA, 0x00, 0x84, 0x00, 0x02, 0x08, 0xC4, 0x00,
130 0x02, 0x00, 0xC4, 0x00, 0x15, 0x80, 0x94, 0x00, 0x2B, 0x40, 0xCC, 0x00, 0x01, 0x00, 0xCD, 0x00,
131 0x01, 0x40, 0xCC, 0x00, 0x06, 0x40, 0xCC, 0x00, 0xFA, 0x00, 0x84, 0x00, 0x02, 0x08, 0xC4, 0x00,
132 0x02, 0x00, 0xC4, 0x00, 0x00, 0x80, 0xC2, 0x00, 0xC7, 0x48, 0x7D, 0x00, 0x07, 0xC0, 0x94, 0x00,
133 0xC1, 0x48, 0x7D, 0x00, 0xC4, 0xF4, 0x7C, 0x00, 0x08, 0xC0, 0x94, 0x00, 0x2B, 0x40, 0xCC, 0x00,
134 0x00, 0x00, 0x80, 0x00, 0x1F, 0x00, 0xD2, 0x00, 0xC4, 0xF4, 0x7C, 0x00, 0x03, 0xC0, 0x94, 0x00,
135 0x2B, 0x40, 0xCC, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x38, 0xC6, 0x00, 0xFA, 0x00, 0x84, 0x00,
136 0x2B, 0x80, 0xCF, 0x00, 0x00, 0x00, 0x80, 0x00, 0x1F, 0x00, 0xD6, 0x00, 0x1F, 0x00, 0xCC, 0x00,
137 0x00, 0x00, 0x88, 0x00, 0x1F, 0x00, 0xCC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
138 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x01, 0x00, 0xCB, 0x00, 0x02, 0x00, 0xD0, 0x00, 0x03, 0x00,
139 0x04, 0x00, 0x05, 0x00, 0xD5, 0x00, 0x10, 0x00, 0xB4, 0x00, 0x17, 0x00, 0x10, 0x00, 0x22, 0x00,
140 0x36, 0x00, 0x23, 0x00, 0x42, 0x00, 0x25, 0x00, 0x5C, 0x00, 0x27, 0x00, 0x6E, 0x00, 0x2D, 0x00,
141 0x7A, 0x00, 0x2E, 0x00, 0x09, 0x00, 0x4B, 0x00, 0x1B, 0x00, 0x34, 0x00, 0x2B, 0x00, 0x36, 0x00,
142 0xA6, 0x00, 0x37, 0x00, 0x99, 0x00, 0x3B, 0x00, 0x9D, 0x00, 0x3F, 0x00, 0xD7, 0x00, 0x44, 0x00,
143 0xC1, 0x00, 0x48, 0x00, 0xB7, 0x00, 0x50, 0x00, 0xBC, 0x00, 0x51, 0x00, 0xC7, 0x00, 0x55, 0x00,
144 0xCC, 0x00, 0x56, 0x00, 0xD1, 0x00, 0x57, 0x00, 0xAE, 0x00, 0x5D, 0x00, 0xC2, 0x00, 0x5F, 0x00,
145 0x06, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00,
146 0x06, 0x00, 0x00, 0x00
147 };
148
149 unsigned char fw_yamato_pm4[9220] =
150 {
151 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x20, 0xC0, 0x00, 0x00, 0x00, 0x00,
152 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF3, 0x01, 0x00, 0x00,
153 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x11, 0x48, 0x20, 0x00,
154 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x04, 0x00, 0x00, 0x00,
155 0xFF, 0xFF, 0x00, 0x00, 0x21, 0x46, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
156 0x00, 0x48, 0x00, 0xD9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00,
157 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x34, 0x00, 0x00, 0x00, 0x00,
158 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x90, 0x02, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x00,
159 0x20, 0x0A, 0x28, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x82, 0x45, 0x29, 0x00,
160 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x48, 0x00, 0xD9, 0x00, 0x00, 0x00, 0x00,
161 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
162 0x00, 0x00, 0x60, 0x00, 0x90, 0x02, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x00, 0x20, 0x46, 0x28, 0xC0,
163 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x48, 0x00, 0xD9, 0x00, 0x00, 0x00, 0x00,
164 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
165 0x00, 0x00, 0x60, 0x00, 0xAC, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x20, 0xC0,
166 0x00, 0x00, 0x00, 0x00, 0xFC, 0x21, 0x00, 0x00, 0x2C, 0x46, 0x29, 0x00, 0x00, 0x00, 0x00, 0x00,
167 0x00, 0x00, 0x00, 0x00, 0x03, 0x48, 0x40, 0x00, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
168 0x00, 0x00, 0x60, 0x00, 0xAC, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0xC0,
169 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x20, 0xC0, 0x00, 0x00, 0x00, 0x00,
170 0xFC, 0x21, 0x00, 0x00, 0x2C, 0x46, 0x29, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
171 0x03, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x3F, 0x00, 0x00, 0x2F, 0x02, 0x2F, 0x00,
172 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x0C, 0x00, 0x00, 0x00, 0x00,
173 0xFD, 0xA1, 0x00, 0x00, 0x2C, 0x46, 0x29, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
174 0x00, 0x48, 0x00, 0xD9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00,
175 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00,
176 0x00, 0x10, 0x00, 0x00, 0x23, 0x12, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00,
177 0x24, 0x02, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x0C,
178 0x00, 0x00, 0x00, 0x00, 0xF9, 0x21, 0x00, 0x00, 0x2C, 0x46, 0x29, 0x00, 0x00, 0x00, 0x00, 0x00,
179 0x0E, 0x00, 0x00, 0x00, 0x11, 0x48, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x94, 0x03, 0x00, 0x00,
180 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x11, 0x48, 0x40, 0xC0,
181 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0xAC, 0x02, 0x00, 0x00,
182 0xF9, 0x21, 0x00, 0x00, 0x2C, 0x46, 0x29, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
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392 0xFF, 0xFF, 0x00, 0x9E, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0xEF, 0xBE, 0xAD, 0xDE,
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394 0x43, 0x01, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0xA4, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
395 0x00, 0x00, 0x00, 0x00, 0x0B, 0x48, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF3, 0x01, 0x00, 0x00,
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397 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD9, 0x00, 0x00, 0x00, 0x00,
398 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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400 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
401 0xFF, 0x0F, 0x00, 0x00, 0x23, 0x12, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00,
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405 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x48, 0x20, 0x00,
406 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x24, 0x12, 0x33, 0x00, 0x00, 0x00, 0x00, 0x00,
407 0xFF, 0xFF, 0x00, 0x86, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
408 0x04, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1D, 0x00, 0x00, 0x00, 0x23, 0x12, 0x21, 0x00,
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411 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x4F, 0x00, 0x00, 0x24, 0x4A, 0x30, 0x00,
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413 0xFF, 0x0F, 0x00, 0x00, 0x25, 0x16, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x0F, 0x00, 0x00,
414 0x23, 0x1A, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA6, 0x1C, 0x33, 0x00,
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419 0xFF, 0xFF, 0x00, 0x8B, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
420 0x04, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x24, 0x12, 0x38, 0x00,
421 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x24, 0x12, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00,
422 0x0C, 0x00, 0x00, 0x00, 0x24, 0x36, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x85,
423 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x48, 0x20, 0x00,
424 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC8, 0x1C, 0x33, 0x00, 0x00, 0x00, 0x00, 0x00,
425 0xFF, 0xFF, 0x00, 0x90, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
426 0x27, 0x4A, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x2E, 0x3A, 0x49, 0x00,
427 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x2C, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
428 0x01, 0x00, 0x00, 0x00, 0x2F, 0x3E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
429 0x00, 0x08, 0x20, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x02, 0x2F, 0x00,
430 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x0C, 0x77, 0x01, 0x00, 0x00,
431 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
432 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00,
433 0x90, 0x02, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x81, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
434 0x02, 0x00, 0x00, 0x00, 0x11, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
435 0x30, 0x02, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x0A,
436 0x7A, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x20, 0xC0, 0x00, 0x00, 0x00, 0x00,
437 0x09, 0x00, 0x00, 0x00, 0x22, 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
438 0x00, 0x00, 0xC0, 0x14, 0x82, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00,
439 0xB3, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x0C, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
440 0x16, 0x00, 0x00, 0x00, 0x23, 0x36, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
441 0x22, 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x14,
442 0x85, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0xC0, 0x00, 0x00, 0x00, 0x00,
443 0x01, 0x00, 0x00, 0x00, 0x22, 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
444 0x00, 0x00, 0xC0, 0x14, 0x88, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0xC0,
445 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x22, 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00,
446 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x14, 0x92, 0x01, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
447 0x20, 0x36, 0x20, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x20, 0x36, 0x20, 0xC0,
448 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x20, 0x36, 0x20, 0xC0, 0x00, 0x00, 0x00, 0x00,
449 0x07, 0x00, 0x00, 0x00, 0x20, 0x36, 0x20, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
450 0x20, 0x36, 0x20, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x20, 0x36, 0x20, 0xC0,
451 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x20, 0x36, 0x20, 0xC0, 0x00, 0x00, 0x00, 0x00,
452 0x0B, 0x00, 0x00, 0x00, 0x20, 0x36, 0x20, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
453 0x22, 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x14,
454 0xBA, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x20, 0xC0, 0x00, 0x00, 0x00, 0x00,
455 0xFF, 0xFF, 0x00, 0x8C, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
456 0x03, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x0F, 0x00, 0x00, 0x23, 0x12, 0x28, 0x00,
457 0x00, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x24, 0x36, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
458 0x03, 0x00, 0x00, 0x00, 0x24, 0x12, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00,
459 0x24, 0x12, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x24, 0x36, 0x20, 0x00,
460 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x87, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
461 0x00, 0x00, 0x00, 0x00, 0x04, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
462 0x24, 0x12, 0x33, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x86, 0x11, 0x44, 0x20, 0x00,
463 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
464 0x1D, 0x00, 0x00, 0x00, 0x23, 0x12, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00,
465 0x91, 0x20, 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x28, 0x12, 0x38, 0x00,
466 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x88, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
467 0xFF, 0x4F, 0x00, 0x00, 0x24, 0x4A, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00,
468 0x23, 0x16, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x0F, 0x00, 0x00, 0x25, 0x16, 0x28, 0x00,
469 0x00, 0x00, 0x00, 0x00, 0xFF, 0x0F, 0x00, 0x00, 0x23, 0x1A, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00,
470 0x00, 0x00, 0x00, 0x00, 0xA6, 0x1C, 0x33, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x8F,
471 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x27, 0x4A, 0x38, 0x00,
472 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x23, 0x12, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00,
473 0xFF, 0x0F, 0x00, 0x00, 0x24, 0x12, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00,
474 0x24, 0x36, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x8B, 0x11, 0x44, 0x20, 0x00,
475 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
476 0x03, 0x00, 0x00, 0x00, 0x24, 0x12, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00,
477 0x24, 0x12, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x24, 0x36, 0x20, 0x00,
478 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x85, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
479 0x00, 0x00, 0x00, 0x00, 0x04, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
480 0xC8, 0x1C, 0x33, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x90, 0x11, 0x44, 0x20, 0x00,
481 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x27, 0x4A, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00,
482 0x00, 0x00, 0x30, 0x00, 0x2E, 0x3A, 0x29, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
483 0x22, 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x14,
484 0xC2, 0x01, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0xA3, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
485 0x00, 0x00, 0x00, 0x00, 0x00, 0x48, 0x20, 0x40, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00,
486 0x20, 0x0E, 0x22, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x23, 0x36, 0x20, 0x00,
487 0x00, 0x00, 0x00, 0x00, 0xF4, 0x21, 0x00, 0x00, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
488 0x0A, 0x00, 0x00, 0x00, 0x2C, 0x4A, 0x61, 0x00, 0xB3, 0x02, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
489 0x22, 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x14,
490 0xC5, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0xC0, 0x00, 0x00, 0x00, 0x00,
491 0x06, 0x00, 0x00, 0x00, 0x22, 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
492 0x00, 0x00, 0xC0, 0x14, 0xCB, 0x01, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x9C, 0x11, 0x44, 0x20, 0x00,
493 0x00, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, 0x20, 0x4A, 0x21, 0x40, 0x00, 0x00, 0x00, 0x00,
494 0xFF, 0xFF, 0x00, 0x96, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
495 0x00, 0x48, 0x20, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x22, 0x02, 0x21, 0x00,
496 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x14, 0xD5, 0x01, 0x00, 0x00,
497 0xFF, 0xFF, 0xFF, 0x3F, 0x2E, 0x3A, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0,
498 0x20, 0x0E, 0x28, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6E, 0x38, 0x29, 0x00,
499 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x20, 0x0E, 0x28, 0x40, 0x00, 0x00, 0x00, 0x00,
500 0x16, 0x00, 0x00, 0x00, 0x23, 0x36, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0xA4,
501 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2C, 0x20, 0xC0,
502 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0B, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
503 0x08, 0x00, 0x00, 0x00, 0x22, 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
504 0x00, 0x00, 0xC0, 0x14, 0xE1, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x20, 0xC0,
505 0x00, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x23, 0x36, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
506 0x15, 0x00, 0x00, 0x00, 0x23, 0x36, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
507 0x20, 0x12, 0x22, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x83, 0x10, 0x30, 0x00,
508 0x00, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x24, 0x36, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
509 0x03, 0x00, 0x00, 0x00, 0x20, 0x0E, 0x21, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10,
510 0x23, 0x0E, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xEF, 0x2E, 0x3A, 0x28, 0x00,
511 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6E, 0x38, 0x29, 0x00, 0x00, 0x00, 0x00, 0x00,
512 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
513 0x00, 0x00, 0x60, 0x00, 0x90, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x20, 0xC0,
514 0x00, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, 0x22, 0x0E, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00,
515 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x14, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00,
516 0x22, 0x0E, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x22, 0x12, 0x21, 0x00,
517 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x24, 0x12, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00,
518 0x00, 0x00, 0x00, 0x00, 0x8D, 0x10, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00,
519 0x24, 0x12, 0x29, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x83, 0x11, 0x44, 0x20, 0x00,
520 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x84, 0x49, 0x29, 0x00, 0x00, 0x00, 0x00, 0x00,
521 0xFF, 0xFF, 0x00, 0x84, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
522 0x03, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x21,
523 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0xE3, 0x01, 0x00, 0x00,
524 0xFF, 0xFF, 0x00, 0x82, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
525 0x11, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x20, 0xC0,
526 0x00, 0x00, 0x00, 0x00, 0xFF, 0x3F, 0x00, 0x00, 0x20, 0x0E, 0x28, 0x40, 0x00, 0x00, 0x00, 0x00,
527 0x10, 0x00, 0x00, 0x00, 0x20, 0x12, 0x21, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
528 0x22, 0x02, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x0A,
529 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x2A, 0x0A, 0x02, 0x00, 0x00,
530 0x80, 0x00, 0x00, 0x20, 0x2E, 0x1E, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00,
531 0x27, 0x02, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x0C,
532 0xFD, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x1C, 0x40, 0x00, 0xFE, 0x01, 0x00, 0x00,
533 0x10, 0x00, 0x00, 0x00, 0x2D, 0x1E, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF9, 0x21, 0x00, 0x00,
534 0x27, 0x46, 0x29, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x48, 0x40, 0x00,
535 0x0A, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x22, 0x02, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00,
536 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x0A, 0x3F, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
537 0x00, 0x00, 0xE0, 0x28, 0x0A, 0x02, 0x00, 0x00, 0x80, 0x00, 0x80, 0x00, 0x2E, 0x1E, 0x28, 0x00,
538 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x27, 0x02, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00,
539 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x0C, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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657 0x11, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF4, 0x21, 0x00, 0x00, 0x2C, 0x46, 0x29, 0x00,
658 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x2A, 0x4A, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00,
659 0xFF, 0xFF, 0x00, 0xA2, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
660 0x11, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x81, 0x11, 0x44, 0x20, 0x00,
661 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x11, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
662 0x00, 0x00, 0x00, 0x00, 0x30, 0x01, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x7F, 0xDF,
663 0x2E, 0x3A, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x2A, 0x36, 0x80, 0x00,
664 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x97, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
665 0x00, 0x00, 0x00, 0x00, 0x0C, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0xA2,
666 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x48, 0x20, 0x00,
667 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x81, 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
668 0x02, 0x00, 0x00, 0x00, 0x11, 0x48, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
669 0x30, 0x01, 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x30, 0x20, 0x00,
670 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x2C, 0x36, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
671 0x01, 0x00, 0x00, 0x00, 0x2F, 0x3E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
672 0x00, 0x08, 0x20, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x02, 0x2F, 0x00,
673 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x0C, 0xBA, 0x02, 0x00, 0x00,
674 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
675 0x00, 0x08, 0x20, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x02, 0x2F, 0x00,
676 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x0C, 0xBE, 0x02, 0x00, 0x00,
677 0x00, 0x00, 0x00, 0x00, 0x0B, 0x08, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0xA4,
678 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x48, 0x40, 0x00,
679 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0xC0, 0x00, 0x00, 0x00, 0x00,
680 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x1A, 0xC1, 0x02, 0x00, 0x00, 0xFF, 0xFF, 0x00, 0x9F,
681 0x11, 0x44, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0xEF, 0xBE, 0xAD, 0xDE, 0x11, 0x48, 0x20, 0x00,
682 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x1A, 0xC4, 0x02, 0x00, 0x00,
683 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
684 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
685 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
686 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
687 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
688 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
689 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
690 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
691 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
692 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
693 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
694 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
695 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
696 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
697 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
698 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
699 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
700 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
701 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
702 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
703 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
704 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
705 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
706 0x00, 0x00, 0x00, 0x00, 0x48, 0x01, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
707 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00,
708 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0xE2, 0x01,
709 0x00, 0x00, 0x00, 0x00, 0xF3, 0x01, 0x63, 0x00, 0x12, 0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00,
710 0x02, 0x00, 0x02, 0x00, 0x26, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00,
711 0x02, 0x00, 0xF1, 0x01, 0x00, 0x00, 0x00, 0x00, 0x47, 0x02, 0x79, 0x00, 0x02, 0x00, 0x02, 0x00,
712 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
713 0x12, 0x00, 0x20, 0x00, 0x16, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00,
714 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC5, 0x00, 0x1B, 0x01, 0x25, 0x01, 0x02, 0x00,
715 0x00, 0x00, 0x00, 0x00, 0x46, 0x01, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
716 0x02, 0x00, 0xC5, 0x00, 0x2E, 0x00, 0x48, 0x01, 0x00, 0x00, 0x00, 0x00, 0x70, 0x01, 0xA2, 0x00,
717 0x4A, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x20, 0x01,
718 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x03, 0x01, 0x0F, 0x01, 0x00, 0x00, 0x00, 0x00,
719 0x02, 0x00, 0x09, 0x00, 0x0E, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3D, 0x00, 0x58, 0x00,
720 0x02, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC1, 0x00, 0x02, 0x00, 0x8E, 0x02, 0xB5, 0x02,
721 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
722 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00,
723 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00,
724 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
725 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00,
726 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x02, 0x05, 0x00, 0x08, 0x00, 0x02, 0x00,
727 0x00, 0x00, 0x00, 0x00
728 };
729 // -Cotulla hack
730
731 /* functions */
732 void kgsl_cp_intrcallback(struct kgsl_device *device)
733 {
734 unsigned int status = 0;
735 struct kgsl_ringbuffer *rb = &device->ringbuffer;
736
737 KGSL_CMD_VDBG("enter (device=%p)\n", device);
738
739 kgsl_yamato_regread(device, REG_CP_INT_STATUS, &status);
740
741 if (status & CP_INT_CNTL__RB_INT_MASK) {
742 /* signal intr completion event */
743 int init_reftimestamp = 0x7fffffff;
744 int enableflag = 0;
745 kgsl_sharedmem_write(&rb->device->memstore,
746 KGSL_DEVICE_MEMSTORE_OFFSET(ts_cmp_enable),
747 &enableflag, 4);
748 kgsl_sharedmem_write(&rb->device->memstore,
749 KGSL_DEVICE_MEMSTORE_OFFSET(ref_wait_ts),
750 &init_reftimestamp, 4);
751 KGSL_CMD_WARN("ringbuffer rb interrupt\n");
752 }
753
754 if (status & (CP_INT_CNTL__IB1_INT_MASK | CP_INT_CNTL__RB_INT_MASK)) {
755 KGSL_CMD_WARN("ringbuffer ib1/rb interrupt\n");
756 wake_up_interruptible_all(&device->ib1_wq);
757 }
758 if (status & CP_INT_CNTL__T0_PACKET_IN_IB_MASK) {
759 KGSL_CMD_FATAL("ringbuffer TO packet in IB interrupt\n");
760 kgsl_yamato_regwrite(rb->device, REG_CP_INT_CNTL, 0);
761 kgsl_ringbuffer_dump(rb);
762 }
763 if (status & CP_INT_CNTL__OPCODE_ERROR_MASK) {
764 KGSL_CMD_FATAL("ringbuffer opcode error interrupt\n");
765 kgsl_yamato_regwrite(rb->device, REG_CP_INT_CNTL, 0);
766 kgsl_ringbuffer_dump(rb);
767 }
768 if (status & CP_INT_CNTL__PROTECTED_MODE_ERROR_MASK) {
769 KGSL_CMD_FATAL("ringbuffer protected mode error interrupt\n");
770 kgsl_yamato_regwrite(rb->device, REG_CP_INT_CNTL, 0);
771 kgsl_ringbuffer_dump(rb);
772 }
773 if (status & CP_INT_CNTL__RESERVED_BIT_ERROR_MASK) {
774 KGSL_CMD_FATAL("ringbuffer reserved bit error interrupt\n");
775 kgsl_yamato_regwrite(rb->device, REG_CP_INT_CNTL, 0);
776 kgsl_ringbuffer_dump(rb);
777 }
778 if (status & CP_INT_CNTL__IB_ERROR_MASK) {
779 KGSL_CMD_FATAL("ringbuffer IB error interrupt\n");
780 kgsl_yamato_regwrite(rb->device, REG_CP_INT_CNTL, 0);
781 kgsl_ringbuffer_dump(rb);
782 }
783 if (status & CP_INT_CNTL__SW_INT_MASK)
784 KGSL_CMD_DBG("ringbuffer software interrupt\n");
785
786 if (status & CP_INT_CNTL__IB2_INT_MASK)
787 KGSL_CMD_DBG("ringbuffer ib2 interrupt\n");
788
789 if (status & (~GSL_CP_INT_MASK))
790 KGSL_CMD_DBG("bad bits in REG_CP_INT_STATUS %08x\n", status);
791
792 /* only ack bits we understand */
793 status &= GSL_CP_INT_MASK;
794 kgsl_yamato_regwrite(device, REG_CP_INT_ACK, status);
795
796 KGSL_CMD_VDBG("return\n");
797 }
798
799
800 void kgsl_ringbuffer_watchdog()
801 {
802 struct kgsl_device *device = NULL;
803 struct kgsl_ringbuffer *rb = NULL;
804
805 device = &kgsl_driver.yamato_device;
806
807 BUG_ON(device == NULL);
808
809 rb = &device->ringbuffer;
810
811 KGSL_CMD_VDBG("enter\n");
812
813 if ((rb->flags & KGSL_FLAGS_STARTED) == 0) {
814 KGSL_CMD_VDBG("not started\n");
815 return;
816 }
817
818 GSL_RB_GET_READPTR(rb, &rb->rptr);
819
820 if (rb->rptr == rb->wptr) {
821 /* clear rptr sample for interval n */
822 rb->watchdog.flags &= ~KGSL_FLAGS_ACTIVE;
823 goto done;
824 }
825 /* ringbuffer is currently not empty */
826 /* and a rptr sample was taken during interval n-1 */
827 if (rb->watchdog.flags & KGSL_FLAGS_ACTIVE) {
828 /* and the rptr did not advance between
829 * interval n-1 and n */
830 if (rb->rptr == rb->watchdog.rptr_sample) {
831 /* then the core has hung */
832 KGSL_CMD_FATAL("Watchdog detected core hung.\n");
833 goto done;
834 }
835 /* save rptr sample for interval n */
836 rb->watchdog.flags |= KGSL_FLAGS_ACTIVE;
837 rb->watchdog.rptr_sample = rb->rptr;
838 }
839 done:
840 KGSL_CMD_VDBG("return\n");
841 }
842
843 static void kgsl_ringbuffer_submit(struct kgsl_ringbuffer *rb)
844 {
845 BUG_ON(rb->wptr == 0);
846
847 GSL_RB_UPDATE_WPTR_POLLING(rb);
848 /* Drain write buffer and data memory barrier */
849 dsb();
850 dmb();
851
852 /* Memory fence to ensure all data has posted. On some systems,
853 * like 7x27, the register block is not allocated as strongly ordered
854 * memory. Adding a memory fence ensures ordering during ringbuffer
855 * submits.*/
856 mb();
857
858 kgsl_yamato_regwrite(rb->device, REG_CP_RB_WPTR, rb->wptr);
859
860 rb->flags |= KGSL_FLAGS_ACTIVE;
861 }
862
863 static int
864 kgsl_ringbuffer_waitspace(struct kgsl_ringbuffer *rb, unsigned int numcmds,
865 int wptr_ahead)
866 {
867 int nopcount;
868 unsigned int freecmds;
869 unsigned int *cmds;
870
871 KGSL_CMD_VDBG("enter (rb=%p, numcmds=%d, wptr_ahead=%d)\n",
872 rb, numcmds, wptr_ahead);
873
874 /* if wptr ahead, fill the remaining with NOPs */
875 if (wptr_ahead) {
876 /* -1 for header */
877 nopcount = rb->sizedwords - rb->wptr - 1;
878
879 cmds = (unsigned int *)rb->buffer_desc.hostptr + rb->wptr;
880 GSL_RB_WRITE(cmds, pm4_nop_packet(nopcount));
881 rb->wptr++;
882
883 kgsl_ringbuffer_submit(rb);
884
885 rb->wptr = 0;
886 }
887
888 /* wait for space in ringbuffer */
889 do {
890 GSL_RB_GET_READPTR(rb, &rb->rptr);
891
892 freecmds = rb->rptr - rb->wptr;
893
894 } while ((freecmds != 0) && (freecmds < numcmds));
895
896 KGSL_CMD_VDBG("return %d\n", 0);
897
898 return 0;
899 }
900
901
902 static unsigned int *kgsl_ringbuffer_allocspace(struct kgsl_ringbuffer *rb,
903 unsigned int numcmds)
904 {
905 unsigned int *ptr = NULL;
906 int status = 0;
907
908 BUG_ON(numcmds >= rb->sizedwords);
909
910 /* check for available space */
911 if (rb->wptr >= rb->rptr) {
912 /* wptr ahead or equal to rptr */
913 /* reserve dwords for nop packet */
914 if ((rb->wptr + numcmds) > (rb->sizedwords -
915 GSL_RB_NOP_SIZEDWORDS))
916 status = kgsl_ringbuffer_waitspace(rb, numcmds, 1);
917 } else {
918 /* wptr behind rptr */
919 if ((rb->wptr + numcmds) >= rb->rptr)
920 status = kgsl_ringbuffer_waitspace(rb, numcmds, 0);
921 /* check for remaining space */
922 /* reserve dwords for nop packet */
923 if ((rb->wptr + numcmds) > (rb->sizedwords -
924 GSL_RB_NOP_SIZEDWORDS))
925 status = kgsl_ringbuffer_waitspace(rb, numcmds, 1);
926 }
927
928 if (status == 0) {
929 ptr = (unsigned int *)rb->buffer_desc.hostptr + rb->wptr;
930 rb->wptr += numcmds;
931 }
932
933 return ptr;
934 }
935
936 static int kgsl_ringbuffer_load_pm4_ucode(struct kgsl_device *device)
937 {
938 int status = 0;
939 int i;
940 // const struct firmware *fw = NULL;
941 unsigned int *fw_ptr = NULL;
942 size_t fw_word_size = 0;
943 struct firmware foo_fw;
944 struct firmware *fw = &foo_fw;
945
946 /*
947 status = request_firmware(&fw, YAMATO_PM4_FW,
948 kgsl_driver.misc.this_device);
949 if (status != 0) {
950 KGSL_DRV_ERR("request_firmware failed for %s with error %d\n",
951 YAMATO_PM4_FW, status);
952 goto done;
953 }
954 */
955 fw->data = fw_yamato_pm4;
956 fw->size = ARRAYSIZE(fw_yamato_pm4);
957
958 /*this firmware must come in 3 word chunks. plus 1 word of version*/
959 if ((fw->size % (sizeof(uint32_t)*3)) != 4) {
960 KGSL_DRV_ERR("bad firmware size %d.\n", fw->size);
961 status = -EINVAL;
962 goto done;
963 }
964 fw_ptr = (unsigned int *)fw->data;
965 fw_word_size = fw->size/sizeof(uint32_t);
966 KGSL_DRV_INFO("loading pm4 ucode version: %d\n", fw_ptr[0]);
967
968 kgsl_yamato_regwrite(device, REG_CP_DEBUG, 0x02000000);
969 kgsl_yamato_regwrite(device, REG_CP_ME_RAM_WADDR, 0);
970 for (i = 1; i < fw_word_size; i++)
971 kgsl_yamato_regwrite(device, REG_CP_ME_RAM_DATA, fw_ptr[i]);
972
973 done:
974 // release_firmware(fw);
975 // return status;
976 return 0;
977 }
978
979 static int kgsl_ringbuffer_load_pfp_ucode(struct kgsl_device *device)
980 {
981 int status = 0;
982 int i;
983 //const struct firmware *fw = NULL;
984 unsigned int *fw_ptr = NULL;
985 size_t fw_word_size = 0;
986 struct firmware foo_fw;
987 struct firmware *fw = &foo_fw;
988
989 /* status = request_firmware(&fw, YAMATO_PFP_FW,
990 kgsl_driver.misc.this_device);
991 if (status != 0) {
992 KGSL_DRV_ERR("request_firmware for %s failed with error %d\n",
993 YAMATO_PFP_FW, status);
994 return status;
995 }
996 */
997 fw->data = fw_yamato_pfp;
998 fw->size = ARRAYSIZE(fw_yamato_pfp);
999
1000
1001 /*this firmware must come in 1 word chunks. */
1002 if ((fw->size % sizeof(uint32_t)) != 0) {
1003 KGSL_DRV_ERR("bad firmware size %d.\n", fw->size);
1004 release_firmware(fw);
1005 return -EINVAL;
1006 }
1007 fw_ptr = (unsigned int *)fw->data;
1008 fw_word_size = fw->size/sizeof(uint32_t);
1009
1010 KGSL_DRV_INFO("loading pfp ucode version: %d\n", fw_ptr[0]);
1011
1012 kgsl_yamato_regwrite(device, REG_CP_PFP_UCODE_ADDR, 0);
1013 for (i = 1; i < fw_word_size; i++)
1014 kgsl_yamato_regwrite(device, REG_CP_PFP_UCODE_DATA, fw_ptr[i]);
1015
1016 // release_firmware(fw);
1017 // return status;
1018 return 0;
1019 }
1020
1021 static int kgsl_ringbuffer_start(struct kgsl_ringbuffer *rb)
1022 {
1023 int status;
1024 /*cp_rb_cntl_u cp_rb_cntl; */
1025 union reg_cp_rb_cntl cp_rb_cntl;
1026 unsigned int *cmds, rb_cntl;
1027 struct kgsl_device *device = rb->device;
1028
1029 KGSL_CMD_VDBG("enter (rb=%p)\n", rb);
1030
1031 if (rb->flags & KGSL_FLAGS_STARTED) {
1032 KGSL_CMD_VDBG("return %d\n", 0);
1033 return 0;
1034 }
1035 kgsl_sharedmem_set(&rb->memptrs_desc, 0, 0,
1036 sizeof(struct kgsl_rbmemptrs));
1037
1038 kgsl_sharedmem_set(&rb->buffer_desc, 0, 0xAA,
1039 (rb->sizedwords << 2));
1040
1041 kgsl_yamato_regwrite(device, REG_CP_RB_WPTR_BASE,
1042 (rb->memptrs_desc.gpuaddr
1043 + GSL_RB_MEMPTRS_WPTRPOLL_OFFSET));
1044
1045 /* setup WPTR delay */
1046 kgsl_yamato_regwrite(device, REG_CP_RB_WPTR_DELAY, 0 /*0x70000010 */);
1047
1048 /*setup REG_CP_RB_CNTL */
1049 kgsl_yamato_regread(device, REG_CP_RB_CNTL, &rb_cntl);
1050 cp_rb_cntl.val = rb_cntl;
1051 /* size of ringbuffer */
1052 cp_rb_cntl.f.rb_bufsz =
1053 kgsl_ringbuffer_sizelog2quadwords(rb->sizedwords);
1054 /* quadwords to read before updating mem RPTR */
1055 cp_rb_cntl.f.rb_blksz = rb->blksizequadwords;
1056 cp_rb_cntl.f.rb_poll_en = GSL_RB_CNTL_POLL_EN; /* WPTR polling */
1057 /* mem RPTR writebacks */
1058 cp_rb_cntl.f.rb_no_update = GSL_RB_CNTL_NO_UPDATE;
1059
1060 kgsl_yamato_regwrite(device, REG_CP_RB_CNTL, cp_rb_cntl.val);
1061
1062 kgsl_yamato_regwrite(device, REG_CP_RB_BASE, rb->buffer_desc.gpuaddr);
1063
1064 kgsl_yamato_regwrite(device, REG_CP_RB_RPTR_ADDR,
1065 rb->memptrs_desc.gpuaddr +
1066 GSL_RB_MEMPTRS_RPTR_OFFSET);
1067
1068 /* explicitly clear all cp interrupts */
1069 kgsl_yamato_regwrite(device, REG_CP_INT_ACK, 0xFFFFFFFF);
1070
1071 /* setup scratch/timestamp */
1072 kgsl_yamato_regwrite(device, REG_SCRATCH_ADDR,
1073 device->memstore.gpuaddr +
1074 KGSL_DEVICE_MEMSTORE_OFFSET(soptimestamp));
1075
1076 kgsl_yamato_regwrite(device, REG_SCRATCH_UMSK,
1077 GSL_RB_MEMPTRS_SCRATCH_MASK);
1078
1079 /* load the CP ucode */
1080
1081 status = kgsl_ringbuffer_load_pm4_ucode(device);
1082 if (status != 0) {
1083 KGSL_DRV_ERR("kgsl_ringbuffer_load_pm4_ucode failed %d\n",
1084 status);
1085 return status;
1086 }
1087
1088
1089 /* load the prefetch parser ucode */
1090 status = kgsl_ringbuffer_load_pfp_ucode(device);
1091 if (status != 0) {
1092 KGSL_DRV_ERR("kgsl_ringbuffer_load_pm4_ucode failed %d\n",
1093 status);
1094 return status;
1095 }
1096
1097 kgsl_yamato_regwrite(device, REG_CP_QUEUE_THRESHOLDS, 0x000C0804);
1098
1099 rb->rptr = 0;
1100 rb->wptr = 0;
1101
1102 rb->timestamp = 0;
1103 GSL_RB_INIT_TIMESTAMP(rb);
1104
1105 INIT_LIST_HEAD(&rb->memqueue);
1106
1107 /* clear ME_HALT to start micro engine */
1108 kgsl_yamato_regwrite(device, REG_CP_ME_CNTL, 0);
1109
1110 /* ME_INIT */
1111 cmds = kgsl_ringbuffer_allocspace(rb, 19);
1112
1113 GSL_RB_WRITE(cmds, PM4_HDR_ME_INIT);
1114 /* All fields present (bits 9:0) */
1115 GSL_RB_WRITE(cmds, 0x000003ff);
1116 /* Disable/Enable Real-Time Stream processing (present but ignored) */
1117 GSL_RB_WRITE(cmds, 0x00000000);
1118 /* Enable (2D <-> 3D) implicit synchronization (present but ignored) */
1119 GSL_RB_WRITE(cmds, 0x00000000);
1120
1121 GSL_RB_WRITE(cmds, GSL_HAL_SUBBLOCK_OFFSET(REG_RB_SURFACE_INFO));
1122 GSL_RB_WRITE(cmds, GSL_HAL_SUBBLOCK_OFFSET(REG_PA_SC_WINDOW_OFFSET));
1123 GSL_RB_WRITE(cmds, GSL_HAL_SUBBLOCK_OFFSET(REG_VGT_MAX_VTX_INDX));
1124 GSL_RB_WRITE(cmds, GSL_HAL_SUBBLOCK_OFFSET(REG_SQ_PROGRAM_CNTL));
1125 GSL_RB_WRITE(cmds, GSL_HAL_SUBBLOCK_OFFSET(REG_RB_DEPTHCONTROL));
1126 GSL_RB_WRITE(cmds, GSL_HAL_SUBBLOCK_OFFSET(REG_PA_SU_POINT_SIZE));
1127 GSL_RB_WRITE(cmds, GSL_HAL_SUBBLOCK_OFFSET(REG_PA_SC_LINE_CNTL));
1128 GSL_RB_WRITE(cmds,
1129 GSL_HAL_SUBBLOCK_OFFSET(REG_PA_SU_POLY_OFFSET_FRONT_SCALE));
1130
1131 /* Vertex and Pixel Shader Start Addresses in instructions
1132 * (3 DWORDS per instruction) */
1133 GSL_RB_WRITE(cmds, 0x80000180);
1134 /* Maximum Contexts */
1135 GSL_RB_WRITE(cmds, 0x00000001);
1136 /* Write Confirm Interval and The CP will wait the
1137 * wait_interval * 16 clocks between polling */
1138 GSL_RB_WRITE(cmds, 0x00000000);
1139
1140 /* NQ and External Memory Swap */
1141 GSL_RB_WRITE(cmds, 0x00000000);
1142 /* Protected mode error checking */
1143 GSL_RB_WRITE(cmds, GSL_RB_PROTECTED_MODE_CONTROL);
1144 /* Disable header dumping and Header dump address */
1145 GSL_RB_WRITE(cmds, 0x00000000);
1146 /* Header dump size */
1147 GSL_RB_WRITE(cmds, 0x00000000);
1148
1149 kgsl_ringbuffer_submit(rb);
1150
1151 /* idle device to validate ME INIT */
1152 status = kgsl_yamato_idle(device, KGSL_TIMEOUT_DEFAULT);
1153
1154 KGSL_CMD_DBG("enabling CP interrupts: mask %08lx\n", GSL_CP_INT_MASK);
1155 kgsl_yamato_regwrite(rb->device, REG_CP_INT_CNTL, GSL_CP_INT_MASK);
1156 if (status == 0)
1157 rb->flags |= KGSL_FLAGS_STARTED;
1158
1159 KGSL_CMD_VDBG("return %d\n", status);
1160
1161 return status;
1162 }
1163
1164 static int kgsl_ringbuffer_stop(struct kgsl_ringbuffer *rb)
1165 {
1166 KGSL_CMD_VDBG("enter (rb=%p)\n", rb);
1167
1168 if (rb->flags & KGSL_FLAGS_STARTED) {
1169 KGSL_CMD_DBG("disabling CP interrupts: mask %08x\n", 0);
1170 kgsl_yamato_regwrite(rb->device, REG_CP_INT_CNTL, 0);
1171
1172 /* ME_HALT */
1173 kgsl_yamato_regwrite(rb->device, REG_CP_ME_CNTL, 0x10000000);
1174
1175 rb->flags &= ~KGSL_FLAGS_STARTED;
1176 kgsl_ringbuffer_dump(rb);
1177 }
1178
1179 KGSL_CMD_VDBG("return %d\n", 0);
1180
1181 return 0;
1182 }
1183
1184 int kgsl_ringbuffer_init(struct kgsl_device *device)
1185 {
1186 int status;
1187 uint32_t flags;
1188 struct kgsl_ringbuffer *rb = &device->ringbuffer;
1189
1190 KGSL_CMD_VDBG("enter (device=%p)\n", device);
1191
1192 rb->device = device;
1193 rb->sizedwords = (2 << kgsl_cfg_rb_sizelog2quadwords);
1194 rb->blksizequadwords = kgsl_cfg_rb_blksizequadwords;
1195
1196 /* allocate memory for ringbuffer, needs to be double octword aligned
1197 * align on page from contiguous physical memory
1198 */
1199 flags =
1200 (KGSL_MEMFLAGS_ALIGNPAGE | KGSL_MEMFLAGS_CONPHYS |
1201 KGSL_MEMFLAGS_STRICTREQUEST);
1202
1203 status = kgsl_sharedmem_alloc(flags, (rb->sizedwords << 2),
1204 &rb->buffer_desc);
1205
1206 if (status != 0) {
1207 kgsl_ringbuffer_close(rb);
1208 KGSL_CMD_VDBG("return %d\n", status);
1209 return status;
1210 }
1211
1212 /* allocate memory for polling and timestamps */
1213 /* This really can be at 4 byte alignment boundry but for using MMU
1214 * we need to make it at page boundary */
1215 flags = (KGSL_MEMFLAGS_ALIGNPAGE | KGSL_MEMFLAGS_CONPHYS);
1216
1217 status = kgsl_sharedmem_alloc(flags, sizeof(struct kgsl_rbmemptrs),
1218 &rb->memptrs_desc);
1219
1220 if (status != 0) {
1221 kgsl_ringbuffer_close(rb);
1222 KGSL_CMD_VDBG("return %d\n", status);
1223 return status;
1224 }
1225
1226 /* last allocation of init process is made here so map all
1227 * allocations to MMU */
1228 status = kgsl_yamato_setup_pt(device, device->mmu.defaultpagetable);
1229 if (status != 0) {
1230 kgsl_ringbuffer_close(rb);
1231 KGSL_CMD_VDBG("return %d\n", status);
1232 return status;
1233 }
1234
1235 /* overlay structure on memptrs memory */
1236 rb->memptrs = (struct kgsl_rbmemptrs *) rb->memptrs_desc.hostptr;
1237
1238 rb->flags |= KGSL_FLAGS_INITIALIZED;
1239
1240 status = kgsl_ringbuffer_start(rb);
1241 if (status != 0) {
1242 kgsl_ringbuffer_close(rb);
1243 KGSL_CMD_VDBG("return %d\n", status);
1244 return status;
1245 }
1246
1247 KGSL_CMD_VDBG("return %d\n", 0);
1248 return 0;
1249 }
1250
1251 int kgsl_ringbuffer_close(struct kgsl_ringbuffer *rb)
1252 {
1253 KGSL_CMD_VDBG("enter (rb=%p)\n", rb);
1254
1255 kgsl_cmdstream_memqueue_drain(rb->device);
1256
1257 kgsl_ringbuffer_stop(rb);
1258
1259 /* this must happen before first sharedmem_free */
1260 kgsl_yamato_cleanup_pt(rb->device, rb->device->mmu.defaultpagetable);
1261
1262 if (rb->buffer_desc.hostptr)
1263 kgsl_sharedmem_free(&rb->buffer_desc);
1264
1265 if (rb->memptrs_desc.hostptr)
1266 kgsl_sharedmem_free(&rb->memptrs_desc);
1267
1268 rb->flags &= ~KGSL_FLAGS_INITIALIZED;
1269
1270 memset(rb, 0, sizeof(struct kgsl_ringbuffer));
1271
1272 KGSL_CMD_VDBG("return %d\n", 0);
1273 return 0;
1274 }
1275
1276 static uint32_t
1277 kgsl_ringbuffer_addcmds(struct kgsl_ringbuffer *rb,
1278 int flags, unsigned int *cmds,
1279 int sizedwords)
1280 {
1281 unsigned int *ringcmds;
1282 unsigned int timestamp;
1283 unsigned int total_sizedwords = sizedwords + 6;
1284
1285 /* reserve space to temporarily turn off protected mode
1286 * error checking if needed
1287 */
1288 total_sizedwords += flags & KGSL_CMD_FLAGS_PMODE ? 4 : 0;
1289 total_sizedwords += !(flags & KGSL_CMD_FLAGS_NO_TS_CMP) ? 9 : 0;
1290
1291 ringcmds = kgsl_ringbuffer_allocspace(rb, total_sizedwords);
1292
1293 if (flags & KGSL_CMD_FLAGS_PMODE) {
1294 /* disable protected mode error checking */
1295 *ringcmds++ = pm4_type3_packet(PM4_SET_PROTECTED_MODE, 1);
1296 *ringcmds++ = 0;
1297 }
1298
1299 memcpy(ringcmds, cmds, (sizedwords << 2));
1300
1301 ringcmds += sizedwords;
1302
1303 if (flags & KGSL_CMD_FLAGS_PMODE) {
1304 /* re-enable protected mode error checking */
1305 *ringcmds++ = pm4_type3_packet(PM4_SET_PROTECTED_MODE, 1);
1306 *ringcmds++ = 1;
1307 }
1308
1309 rb->timestamp++;
1310 timestamp = rb->timestamp;
1311
1312 /* start-of-pipeline and end-of-pipeline timestamps */
1313 *ringcmds++ = pm4_type0_packet(REG_CP_TIMESTAMP, 1);
1314 *ringcmds++ = rb->timestamp;
1315 *ringcmds++ = pm4_type3_packet(PM4_EVENT_WRITE, 3);
1316 *ringcmds++ = CACHE_FLUSH_TS;
1317 *ringcmds++ =
1318 (rb->device->memstore.gpuaddr +
1319 KGSL_DEVICE_MEMSTORE_OFFSET(eoptimestamp));
1320 *ringcmds++ = rb->timestamp;
1321
1322 if (!(flags & KGSL_CMD_FLAGS_NO_TS_CMP)) {
1323 /* Add idle packet so avoid RBBM errors */
1324 *ringcmds++ = pm4_type3_packet(PM4_WAIT_FOR_IDLE, 1);
1325 *ringcmds++ = 0x00000000;
1326 /* Conditional execution based on memory values */
1327 *ringcmds++ = pm4_type3_packet(PM4_COND_EXEC, 4);
1328 *ringcmds++ = (rb->device->memstore.gpuaddr +
1329 KGSL_DEVICE_MEMSTORE_OFFSET(ts_cmp_enable)) >> 2;
1330 *ringcmds++ = (rb->device->memstore.gpuaddr +
1331 KGSL_DEVICE_MEMSTORE_OFFSET(ref_wait_ts)) >> 2;
1332 *ringcmds++ = rb->timestamp;
1333 /* # of conditional command DWORDs */
1334 *ringcmds++ = 2;
1335 *ringcmds++ = pm4_type3_packet(PM4_INTERRUPT, 1);
1336 *ringcmds++ = CP_INT_CNTL__RB_INT_MASK;
1337 }
1338
1339 kgsl_ringbuffer_submit(rb);
1340
1341 GSL_RB_STATS(rb->stats.words_total += sizedwords);
1342 GSL_RB_STATS(rb->stats.issues++);
1343
1344 KGSL_CMD_VDBG("return %d\n", timestamp);
1345
1346 /* return timestamp of issued coREG_ands */
1347 return timestamp;
1348 }
1349
1350 uint32_t
1351 kgsl_ringbuffer_issuecmds(struct kgsl_device *device,
1352 int flags,
1353 unsigned int *cmds,
1354 int sizedwords)
1355 {
1356 unsigned int timestamp;
1357 struct kgsl_ringbuffer *rb = &device->ringbuffer;
1358
1359 KGSL_CMD_VDBG("enter (device->id=%d, flags=%d, cmds=%p, "
1360 "sizedwords=%d)\n", device->id, flags, cmds, sizedwords);
1361
1362 timestamp = kgsl_ringbuffer_addcmds(rb, flags, cmds, sizedwords);
1363
1364 KGSL_CMD_VDBG("return %d\n)", timestamp);
1365 return timestamp;
1366 }
1367
1368 int
1369 kgsl_ringbuffer_issueibcmds(struct kgsl_device *device,
1370 int drawctxt_index,
1371 uint32_t ibaddr,
1372 int sizedwords,
1373 uint32_t *timestamp,
1374 unsigned int flags)
1375 {
1376 unsigned int link[3];
1377
1378 KGSL_CMD_VDBG("enter (device_id=%d, drawctxt_index=%d, ibaddr=0x%08x,"
1379 " sizedwords=%d, timestamp=%p)\n",
1380 device->id, drawctxt_index, ibaddr,
1381 sizedwords, timestamp);
1382
1383 if (!(device->ringbuffer.flags & KGSL_FLAGS_STARTED)) {
1384 KGSL_CMD_VDBG("return %d\n", -EINVAL);
1385 return -EINVAL;
1386 }
1387
1388 BUG_ON(ibaddr == 0);
1389 BUG_ON(sizedwords == 0);
1390
1391 link[0] = PM4_HDR_INDIRECT_BUFFER_PFD;
1392 link[1] = ibaddr;
1393 link[2] = sizedwords;
1394
1395 kgsl_drawctxt_switch(device, &device->drawctxt[drawctxt_index], flags);
1396
1397 *timestamp = kgsl_ringbuffer_addcmds(&device->ringbuffer,
1398 0, &link[0], 3);
1399
1400
1401 KGSL_CMD_INFO("ctxt %d g %08x sd %d ts %d\n",
1402 drawctxt_index, ibaddr, sizedwords, *timestamp);
1403
1404 KGSL_CMD_VDBG("return %d\n", 0);
1405
1406 return 0;
1407 }
1408
1409
1410 #ifdef DEBUG
1411 void kgsl_ringbuffer_debug(struct kgsl_ringbuffer *rb,
1412 struct kgsl_rb_debug *rb_debug)
1413 {
1414 memset(rb_debug, 0, sizeof(struct kgsl_rb_debug));
1415
1416 rb_debug->mem_rptr = rb->memptrs->rptr;
1417 rb_debug->mem_wptr_poll = rb->memptrs->wptr_poll;
1418 kgsl_yamato_regread(rb->device, REG_CP_RB_BASE,
1419 (unsigned int *)&rb_debug->cp_rb_base);
1420 kgsl_yamato_regread(rb->device, REG_CP_RB_CNTL,
1421 (unsigned int *)&rb_debug->cp_rb_cntl);
1422 kgsl_yamato_regread(rb->device, REG_CP_RB_RPTR_ADDR,
1423 (unsigned int *)&rb_debug->cp_rb_rptr_addr);
1424 kgsl_yamato_regread(rb->device, REG_CP_RB_RPTR,
1425 (unsigned int *)&rb_debug->cp_rb_rptr);
1426 kgsl_yamato_regread(rb->device, REG_CP_RB_RPTR_WR,
1427 (unsigned int *)&rb_debug->cp_rb_rptr_wr);
1428 kgsl_yamato_regread(rb->device, REG_CP_RB_WPTR,
1429 (unsigned int *)&rb_debug->cp_rb_wptr);
1430 kgsl_yamato_regread(rb->device, REG_CP_RB_WPTR_DELAY,
1431 (unsigned int *)&rb_debug->cp_rb_wptr_delay);
1432 kgsl_yamato_regread(rb->device, REG_CP_RB_WPTR_BASE,
1433 (unsigned int *)&rb_debug->cp_rb_wptr_base);
1434 kgsl_yamato_regread(rb->device, REG_CP_IB1_BASE,
1435 (unsigned int *)&rb_debug->cp_ib1_base);
1436 kgsl_yamato_regread(rb->device, REG_CP_IB1_BUFSZ,
1437 (unsigned int *)&rb_debug->cp_ib1_bufsz);
1438 kgsl_yamato_regread(rb->device, REG_CP_IB2_BASE,
1439 (unsigned int *)&rb_debug->cp_ib2_base);
1440 kgsl_yamato_regread(rb->device, REG_CP_IB2_BUFSZ,
1441 (unsigned int *)&rb_debug->cp_ib2_bufsz);
1442 kgsl_yamato_regread(rb->device, REG_CP_ST_BASE,
1443 (unsigned int *)&rb_debug->cp_st_base);
1444 kgsl_yamato_regread(rb->device, REG_CP_ST_BUFSZ,
1445 (unsigned int *)&rb_debug->cp_st_bufsz);
1446 kgsl_yamato_regread(rb->device, REG_CP_CSQ_RB_STAT,
1447 (unsigned int *)&rb_debug->cp_csq_rb_stat);
1448 kgsl_yamato_regread(rb->device, REG_CP_CSQ_IB1_STAT,
1449 (unsigned int *)&rb_debug->cp_csq_ib1_stat);
1450 kgsl_yamato_regread(rb->device, REG_CP_CSQ_IB2_STAT,
1451 (unsigned int *)&rb_debug->cp_csq_ib2_stat);
1452 kgsl_yamato_regread(rb->device, REG_SCRATCH_UMSK,
1453 (unsigned int *)&rb_debug->scratch_umsk);
1454 kgsl_yamato_regread(rb->device, REG_SCRATCH_ADDR,
1455 (unsigned int *)&rb_debug->scratch_addr);
1456 kgsl_yamato_regread(rb->device, REG_CP_ME_CNTL,
1457 (unsigned int *)&rb_debug->cp_me_cntl);
1458 kgsl_yamato_regread(rb->device, REG_CP_ME_STATUS,
1459 (unsigned int *)&rb_debug->cp_me_status);
1460 kgsl_yamato_regread(rb->device, REG_CP_DEBUG,
1461 (unsigned int *)&rb_debug->cp_debug);
1462 kgsl_yamato_regread(rb->device, REG_CP_STAT,
1463 (unsigned int *)&rb_debug->cp_stat);
1464 kgsl_yamato_regread(rb->device, REG_CP_INT_STATUS,
1465 (unsigned int *)&rb_debug->cp_int_status);
1466 kgsl_yamato_regread(rb->device, REG_CP_INT_CNTL,
1467 (unsigned int *)&rb_debug->cp_int_cntl);
1468 kgsl_yamato_regread(rb->device, REG_RBBM_STATUS,
1469 (unsigned int *)&rb_debug->rbbm_status);
1470 kgsl_yamato_regread(rb->device, REG_RBBM_INT_STATUS,
1471 (unsigned int *)&rb_debug->rbbm_int_status);
1472 GSL_RB_GET_SOP_TIMESTAMP(rb, (unsigned int *)&rb_debug->sop_timestamp);
1473 GSL_RB_GET_EOP_TIMESTAMP(rb, (unsigned int *)&rb_debug->eop_timestamp);
1474
1475 }
1476 #endif /*DEBUG*/
1477
1478 #ifdef DEBUG
1479 void kgsl_ringbuffer_dump(struct kgsl_ringbuffer *rb)
1480 {
1481 struct kgsl_rb_debug rb_debug;
1482 kgsl_ringbuffer_debug(rb, &rb_debug);
1483
1484 KGSL_CMD_DBG("rbbm_status %08x rbbm_int_status %08x"
1485 " mem_rptr %08x mem_wptr_poll %08x\n",
1486 rb_debug.rbbm_status,
1487 rb_debug.rbbm_int_status,
1488 rb_debug.mem_rptr, rb_debug.mem_wptr_poll);
1489
1490 KGSL_CMD_DBG("rb_base %08x rb_cntl %08x rb_rptr_addr %08x rb_rptr %08x"
1491 " rb_rptr_wr %08x\n",
1492 rb_debug.cp_rb_base, rb_debug.cp_rb_cntl,
1493 rb_debug.cp_rb_rptr_addr, rb_debug.cp_rb_rptr,
1494 rb_debug.cp_rb_rptr_wr);
1495
1496 KGSL_CMD_DBG("rb_wptr %08x rb_wptr_delay %08x rb_wptr_base %08x"
1497 " ib1_base %08x ib1_bufsz %08x\n",
1498 rb_debug.cp_rb_wptr, rb_debug.cp_rb_wptr_delay,
1499 rb_debug.cp_rb_wptr_base, rb_debug.cp_ib1_base,
1500 rb_debug.cp_ib1_bufsz);
1501
1502 KGSL_CMD_DBG("ib2_base %08x ib2_bufsz %08x st_base %08x st_bufsz %08x"
1503 " cp_me_cntl %08x cp_me_status %08x\n",
1504 rb_debug.cp_ib2_base, rb_debug.cp_ib2_bufsz,
1505 rb_debug.cp_st_base, rb_debug.cp_st_bufsz,
1506 rb_debug.cp_me_cntl, rb_debug.cp_me_status);
1507
1508 KGSL_CMD_DBG("cp_debug %08x cp_stat %08x cp_int_status %08x"
1509 " cp_int_cntl %08x\n",
1510 rb_debug.cp_debug, rb_debug.cp_stat,
1511 rb_debug.cp_int_status, rb_debug.cp_int_cntl);
1512
1513 KGSL_CMD_DBG("sop_timestamp: %d eop_timestamp: %d\n",
1514 rb_debug.sop_timestamp, rb_debug.eop_timestamp);
1515
1516 }
1517 #endif /* DEBUG */
kernels