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htcleo: add Cotulla's fixes for non-android touchscreen!
[htc-linux.git] / drivers / video / msm / mddi.c
blob0c39572cfadf8f0d378f6a3ead9cb4a319d63ba0
1 /*
2 * MSM MDDI Transport
3 *
4 * Copyright (C) 2007 Google Incorporated
5 * Copyright (C) 2007 QUALCOMM Incorporated
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/interrupt.h>
22 #include <linux/platform_device.h>
23 #include <linux/delay.h>
24 #include <linux/spinlock.h>
25 #include <linux/clk.h>
26 #include <linux/io.h>
27 #include <linux/sched.h>
28 #include <mach/msm_iomap.h>
29 #include <mach/irqs.h>
30 #include <mach/board.h>
31 #include <linux/delay.h>
32 #include <linux/earlysuspend.h>
33 #include <linux/wakelock.h>
34
35 #include <mach/msm_fb.h>
36 #include "mddi_hw.h"
37
38 #define FLAG_DISABLE_HIBERNATION 0x0001
39 #define FLAG_HAVE_CAPS 0x0002
40 #define FLAG_HAS_VSYNC_IRQ 0x0004
41 #define FLAG_HAVE_STATUS 0x0008
42
43 #define CMD_GET_CLIENT_CAP 0x0601
44 #define CMD_GET_CLIENT_STATUS 0x0602
45
46 static uint32_t mddi_debug_flags;
47 #ifdef CONFIG_MSM_MDP40
48 static struct clk *mdp_clk;
49 #endif
50 union mddi_rev {
51 unsigned char raw[MDDI_REV_BUFFER_SIZE];
52 struct mddi_rev_packet hdr;
53 struct mddi_client_status status;
54 struct mddi_client_caps caps;
55 struct mddi_register_access reg;
56 };
57
58 struct reg_read_info {
59 struct completion done;
60 uint32_t reg;
61 uint32_t status;
62 uint32_t result;
63 };
64
65 struct mddi_info {
66 uint16_t flags;
67 uint16_t version;
68 char __iomem *base;
69 int irq;
70 struct clk *clk;
71 struct msm_mddi_client_data client_data;
72
73 /* buffer for rev encap packets */
74 void *rev_data;
75 dma_addr_t rev_addr;
76 struct mddi_llentry *reg_write_data;
77 dma_addr_t reg_write_addr;
78 struct mddi_llentry *reg_read_data;
79 dma_addr_t reg_read_addr;
80 size_t rev_data_curr;
81
82 spinlock_t int_lock;
83 uint32_t int_enable;
84 uint32_t got_int;
85 wait_queue_head_t int_wait;
86
87 struct mutex reg_write_lock;
88 struct mutex reg_read_lock;
89 struct reg_read_info *reg_read;
90
91 struct mddi_client_caps caps;
92 struct mddi_client_status status;
93
94 struct wake_lock idle_lock;
95 struct wake_lock link_active_idle_lock;
96
97 void (*power_client)(struct msm_mddi_client_data *, int);
98
99 /* client device published to bind us to the
100 * appropriate mddi_client driver
101 */
102 char client_name[20];
103
104 struct platform_device client_pdev;
105 unsigned type;
106 };
107
108 static void mddi_init_rev_encap(struct mddi_info *mddi);
109 static void mddi_skew_calibration(struct mddi_info *mddi);
110
111 #define mddi_readl(r) readl(mddi->base + (MDDI_##r))
112 #define mddi_writel(v, r) writel((v), mddi->base + (MDDI_##r))
113
114 void mddi_activate_link(struct msm_mddi_client_data *cdata)
115 {
116 struct mddi_info *mddi = container_of(cdata, struct mddi_info,
117 client_data);
118 wake_lock(&mddi->link_active_idle_lock);
119 mddi_writel(MDDI_CMD_LINK_ACTIVE, CMD);
120 }
121
122 static void mddi_handle_link_list_done(struct mddi_info *mddi)
123 {
124 }
125
126 static void mddi_reset_rev_encap_ptr(struct mddi_info *mddi)
127 {
128 printk(KERN_INFO "mddi: resetting rev ptr\n");
129 mddi->rev_data_curr = 0;
130 mddi_writel(mddi->rev_addr, REV_PTR);
131 mddi_writel(mddi->rev_addr, REV_PTR);
132 mddi_writel(MDDI_CMD_FORCE_NEW_REV_PTR, CMD);
133 }
134
135 static void mddi_handle_rev_data(struct mddi_info *mddi, union mddi_rev *rev)
136 {
137 int i;
138 struct reg_read_info *ri;
139
140 if ((rev->hdr.length <= MDDI_REV_BUFFER_SIZE - 2) &&
141 (rev->hdr.length >= sizeof(struct mddi_rev_packet) - 2)) {
142 /* printk(KERN_INFO "rev: len=%04x type=%04x\n",
143 * rev->hdr.length, rev->hdr.type); */
144
145 switch (rev->hdr.type) {
146 case TYPE_CLIENT_CAPS:
147 memcpy(&mddi->caps, &rev->caps,
148 sizeof(struct mddi_client_caps));
149 mddi->flags |= FLAG_HAVE_CAPS;
150 wake_up(&mddi->int_wait);
151 break;
152 case TYPE_CLIENT_STATUS:
153 memcpy(&mddi->status, &rev->status,
154 sizeof(struct mddi_client_status));
155 mddi->flags |= FLAG_HAVE_STATUS;
156 wake_up(&mddi->int_wait);
157 break;
158 case TYPE_REGISTER_ACCESS:
159 /* printk(KERN_INFO "rev: reg %x = %x\n",
160 * rev->reg.register_address,
161 * rev->reg.register_data_list); */
162 ri = mddi->reg_read;
163 if (ri == 0) {
164 printk(KERN_INFO "rev: got reg %x = %x without "
165 " pending read\n",
166 rev->reg.register_address,
167 rev->reg.u.reg_data);
168 break;
169 }
170 if (ri->reg != rev->reg.register_address) {
171 printk(KERN_INFO "rev: got reg %x = %x for "
172 "wrong register, expected "
173 "%x\n",
174 rev->reg.register_address,
175 rev->reg.u.reg_data, ri->reg);
176 break;
177 }
178 mddi->reg_read = NULL;
179 ri->status = 0;
180 ri->result = rev->reg.u.reg_data;
181 complete(&ri->done);
182 break;
183 default:
184 printk(KERN_INFO "rev: unknown reverse packet: "
185 "len=%04x type=%04x CURR_REV_PTR=%x\n",
186 rev->hdr.length, rev->hdr.type,
187 mddi_readl(CURR_REV_PTR));
188 for (i = 0; i < rev->hdr.length + 2; i++) {
189 if ((i % 16) == 0)
190 printk(KERN_INFO "\n");
191 printk(KERN_INFO " %02x", rev->raw[i]);
192 }
193 printk(KERN_INFO "\n");
194 mddi_reset_rev_encap_ptr(mddi);
195 }
196 } else {
197 printk(KERN_INFO "bad rev length, %d, CURR_REV_PTR %x\n",
198 rev->hdr.length, mddi_readl(CURR_REV_PTR));
199 mddi_reset_rev_encap_ptr(mddi);
200 }
201 }
202
203 static void mddi_wait_interrupt(struct mddi_info *mddi, uint32_t intmask);
204
205 static void mddi_handle_rev_data_avail(struct mddi_info *mddi)
206 {
207 union mddi_rev *rev = mddi->rev_data;
208 uint32_t rev_data_count;
209 uint32_t rev_crc_err_count;
210 int i;
211 struct reg_read_info *ri;
212 size_t prev_offset;
213 uint16_t length;
214
215 union mddi_rev *crev = mddi->rev_data + mddi->rev_data_curr;
216
217 /* clear the interrupt */
218 mddi_writel(MDDI_INT_REV_DATA_AVAIL, INT);
219 rev_data_count = mddi_readl(REV_PKT_CNT);
220 rev_crc_err_count = mddi_readl(REV_CRC_ERR);
221 if (rev_data_count > 1)
222 printk(KERN_INFO "rev_data_count %d\n", rev_data_count);
223 /* printk(KERN_INFO "rev_data_count %d, INT %x\n", rev_data_count,
224 * mddi_readl(INT)); */
225
226 if (rev_crc_err_count) {
227 printk(KERN_INFO "rev_crc_err_count %d, INT %x\n",
228 rev_crc_err_count, mddi_readl(INT));
229 ri = mddi->reg_read;
230 if (ri == 0) {
231 printk(KERN_INFO "rev: got crc error without pending "
232 "read\n");
233 } else {
234 mddi->reg_read = NULL;
235 ri->status = -EIO;
236 ri->result = -1;
237 complete(&ri->done);
238 }
239 }
240
241 if (rev_data_count == 0)
242 return;
243
244 if (mddi_debug_flags & 1) {
245 printk(KERN_INFO "INT %x, STAT %x, CURR_REV_PTR %x\n",
246 mddi_readl(INT), mddi_readl(STAT),
247 mddi_readl(CURR_REV_PTR));
248 for (i = 0; i < MDDI_REV_BUFFER_SIZE; i++) {
249 if ((i % 16) == 0)
250 printk(KERN_INFO "\n");
251 printk(KERN_INFO " %02x", rev->raw[i]);
252 }
253 printk(KERN_INFO "\n");
254 }
255
256 /* printk(KERN_INFO "rev_data_curr %d + %d\n", mddi->rev_data_curr,
257 * crev->hdr.length); */
258 prev_offset = mddi->rev_data_curr;
259
260 length = *((uint8_t *)mddi->rev_data + mddi->rev_data_curr);
261 mddi->rev_data_curr++;
262 if (mddi->rev_data_curr == MDDI_REV_BUFFER_SIZE)
263 mddi->rev_data_curr = 0;
264 length += *((uint8_t *)mddi->rev_data + mddi->rev_data_curr) << 8;
265 mddi->rev_data_curr += 1 + length;
266 if (mddi->rev_data_curr >= MDDI_REV_BUFFER_SIZE)
267 mddi->rev_data_curr =
268 mddi->rev_data_curr % MDDI_REV_BUFFER_SIZE;
269
270 if (length > MDDI_REV_BUFFER_SIZE - 2) {
271 printk(KERN_INFO "mddi: rev data length greater than buffer"
272 "size\n");
273 mddi_reset_rev_encap_ptr(mddi);
274 return;
275 }
276
277 if (prev_offset + 2 + length >= MDDI_REV_BUFFER_SIZE) {
278 union mddi_rev tmprev;
279 size_t rem = MDDI_REV_BUFFER_SIZE - prev_offset;
280 memcpy(&tmprev.raw[0], mddi->rev_data + prev_offset, rem);
281 memcpy(&tmprev.raw[rem], mddi->rev_data, 2 + length - rem);
282 mddi_handle_rev_data(mddi, &tmprev);
283 if (mddi_debug_flags & 2) {
284 memset(mddi->rev_data + prev_offset, 0xee, rem);
285 memset(mddi->rev_data, 0xee, mddi->rev_data_curr);
286 }
287 } else {
288 mddi_handle_rev_data(mddi, crev);
289 if (mddi_debug_flags & 2)
290 memset(mddi->rev_data + prev_offset, 0xee,
291 mddi->rev_data_curr - prev_offset);
292 }
293
294 /* if(mddi->rev_data_curr + MDDI_MAX_REV_PKT_SIZE >=
295 * MDDI_REV_BUFFER_SIZE) { */
296 if (prev_offset < MDDI_REV_BUFFER_SIZE / 2 &&
297 mddi->rev_data_curr >= MDDI_REV_BUFFER_SIZE / 2) {
298 /* printk(KERN_INFO "passed buffer half full: rev_data_curr
299 * %d\n", mddi->rev_data_curr); */
300 mddi_writel(mddi->rev_addr, REV_PTR);
301 }
302 }
303
304 static irqreturn_t mddi_isr(int irq, void *data)
305 {
306 struct msm_mddi_client_data *cdata = data;
307 struct mddi_info *mddi = container_of(cdata, struct mddi_info,
308 client_data);
309 uint32_t active, status;
310
311 spin_lock(&mddi->int_lock);
312
313 active = mddi_readl(INT);
314 status = mddi_readl(STAT);
315
316 mddi_writel(active, INT);
317
318 /* printk(KERN_INFO "%s: isr a=%08x e=%08x s=%08x\n",
319 mddi->name, active, mddi->int_enable, status); */
320
321 /* ignore any interrupts we have disabled */
322 active &= mddi->int_enable;
323
324 mddi->got_int |= active;
325 wake_up(&mddi->int_wait);
326
327 if (active & MDDI_INT_PRI_LINK_LIST_DONE) {
328 mddi->int_enable &= (~MDDI_INT_PRI_LINK_LIST_DONE);
329 mddi_handle_link_list_done(mddi);
330 }
331 if (active & MDDI_INT_REV_DATA_AVAIL)
332 mddi_handle_rev_data_avail(mddi);
333
334 if (active & ~MDDI_INT_NEED_CLEAR)
335 mddi->int_enable &= ~(active & ~MDDI_INT_NEED_CLEAR);
336
337 if (active & MDDI_INT_LINK_ACTIVE) {
338 mddi->int_enable &= (~MDDI_INT_LINK_ACTIVE);
339 mddi->int_enable |= MDDI_INT_IN_HIBERNATION;
340 wake_lock(&mddi->link_active_idle_lock);
341 }
342
343 if (active & MDDI_INT_IN_HIBERNATION) {
344 mddi->int_enable &= (~MDDI_INT_IN_HIBERNATION);
345 mddi->int_enable |= MDDI_INT_LINK_ACTIVE;
346 wake_unlock(&mddi->link_active_idle_lock);
347 }
348
349 mddi_writel(mddi->int_enable, INTEN);
350 spin_unlock(&mddi->int_lock);
351
352 return IRQ_HANDLED;
353 }
354
355 static long mddi_wait_interrupt_timeout(struct mddi_info *mddi,
356 uint32_t intmask, int timeout)
357 {
358 unsigned long irq_flags;
359
360 spin_lock_irqsave(&mddi->int_lock, irq_flags);
361 mddi->got_int &= ~intmask;
362 mddi->int_enable |= intmask;
363 mddi_writel(mddi->int_enable, INTEN);
364 spin_unlock_irqrestore(&mddi->int_lock, irq_flags);
365 return wait_event_timeout(mddi->int_wait, mddi->got_int & intmask,
366 timeout);
367 }
368
369 static void mddi_wait_interrupt(struct mddi_info *mddi, uint32_t intmask)
370 {
371 if (mddi_wait_interrupt_timeout(mddi, intmask, HZ/10) == 0)
372 printk(KERN_INFO KERN_ERR "mddi_wait_interrupt %d, timeout "
373 "waiting for %x, INT = %x, STAT = %x gotint = %x\n",
374 current->pid, intmask, mddi_readl(INT), mddi_readl(STAT),
375 mddi->got_int);
376 }
377
378 static void mddi_init_rev_encap(struct mddi_info *mddi)
379 {
380 memset(mddi->rev_data, 0xee, MDDI_REV_BUFFER_SIZE);
381 mddi_writel(mddi->rev_addr, REV_PTR);
382 mddi_writel(MDDI_CMD_FORCE_NEW_REV_PTR, CMD);
383 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
384 }
385
386 void mddi_set_auto_hibernate(struct msm_mddi_client_data *cdata, int on)
387 {
388 struct mddi_info *mddi = container_of(cdata, struct mddi_info,
389 client_data);
390 mddi_writel(MDDI_CMD_POWERDOWN, CMD);
391 mddi_wait_interrupt(mddi, MDDI_INT_IN_HIBERNATION);
392 mddi_writel(MDDI_CMD_HIBERNATE | !!on, CMD);
393 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
394 }
395
396
397 static uint16_t mddi_init_registers(struct mddi_info *mddi)
398 {
399 mddi_writel(0x0001, VERSION);
400 mddi_writel(MDDI_HOST_BYTES_PER_SUBFRAME, BPS);
401 mddi_writel(0x0003, SPM); /* subframes per media */
402 mddi_writel(0x0005, TA1_LEN);
403 mddi_writel(MDDI_HOST_TA2_LEN, TA2_LEN);
404 mddi_writel(0x003C, DISP_WAKE); /* wakeup counter */
405 mddi_writel(MDDI_HOST_REV_RATE_DIV, REV_RATE_DIV);
406
407 mddi_writel(MDDI_REV_BUFFER_SIZE, REV_SIZE);
408 mddi_writel(MDDI_MAX_REV_PKT_SIZE, REV_ENCAP_SZ);
409
410 /* disable periodic rev encap */
411 mddi_writel(MDDI_CMD_PERIODIC_REV_ENCAP, CMD);
412 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
413
414 if (mddi_readl(PAD_CTL) == 0) {
415 /* If we are turning on band gap, need to wait 5us before
416 * turning on the rest of the PAD */
417 mddi_writel(0x08000, PAD_CTL);
418 udelay(5);
419 }
420
421 /* Recommendation from PAD hw team */
422 if (mddi->type == MSM_MDP_MDDI_TYPE_II)
423 mddi_writel(0x402a850f, PAD_CTL);
424 else
425 mddi_writel(0xa850f, PAD_CTL);
426
427 #if defined (CONFIG_ARCH_QSD8X50) || defined (CONFIG_ARCH_MSM7X30)
428 /* Only for novatek driver IC*/
429 mddi_writel(0x00C8, DRIVE_HI);
430 /* 0x32 normal, 0x50 for Toshiba display */
431 mddi_writel(0x0050, DRIVE_LO);
432 mddi_writel(0x00320000, PAD_IO_CTL);
433 if (mddi->type == MSM_MDP_MDDI_TYPE_II)
434 mddi_writel(0x40884020, PAD_CAL);
435 else
436 mddi_writel(0x00220020, PAD_CAL);
437 #else
438 mddi_writel(0x0096, DRIVE_HI);
439 /* 0x32 normal, 0x50 for Toshiba display */
440 mddi_writel(0x0050, DRIVE_LO);
441 #endif
442
443 /* Need an even number for counts */
444 mddi_writel(0x60006, DRIVER_START_CNT);
445
446 mddi_set_auto_hibernate(&mddi->client_data, 0);
447
448 #if 1 /* ignore listen */
449 mddi_writel(MDDI_CMD_DISP_IGNORE, CMD);
450 #else
451 mddi_writel(MDDI_CMD_DISP_LISTEN, CMD);
452 #endif
453 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
454
455 mddi_init_rev_encap(mddi);
456 return mddi_readl(CORE_VER) & 0xffff;
457 }
458
459 static void mddi_suspend(struct msm_mddi_client_data *cdata)
460 {
461 struct mddi_info *mddi = container_of(cdata, struct mddi_info,
462 client_data);
463 wake_lock(&mddi->idle_lock);
464 /* turn off the client */
465 if (mddi->power_client)
466 mddi->power_client(&mddi->client_data, 0);
467 /* turn off the link */
468 mddi_writel(MDDI_CMD_RESET, CMD);
469 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
470 /* turn off the clock */
471 clk_disable(mddi->clk);
472 #if CONFIG_MSM_MDP40
473 clk_disable(mdp_clk);
474 #endif
475 wake_unlock(&mddi->idle_lock);
476 }
477
478 static void mddi_resume(struct msm_mddi_client_data *cdata)
479 {
480 struct mddi_info *mddi = container_of(cdata, struct mddi_info,
481 client_data);
482 wake_lock(&mddi->idle_lock);
483 mddi_set_auto_hibernate(&mddi->client_data, 0);
484 /* turn on the client */
485 if (mddi->power_client)
486 mddi->power_client(&mddi->client_data, 1);
487 #if CONFIG_MSM_MDP40
488 clk_enable(mdp_clk);
489 #endif
490 /* turn on the clock */
491 clk_enable(mddi->clk);
492 /* set up the local registers */
493 mddi->rev_data_curr = 0;
494 mddi_init_registers(mddi);
495 /* FIXME: Workaround for Novatek
496 if (mddi->type == MSM_MDP_MDDI_TYPE_II)
497 mddi_skew_calibration(mddi);
498 */
499 mddi_writel(mddi->int_enable, INTEN);
500 mddi_writel(MDDI_CMD_LINK_ACTIVE, CMD);
501 mddi_writel(MDDI_CMD_SEND_RTD, CMD);
502 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
503 mddi_set_auto_hibernate(&mddi->client_data, 1);
504 wake_unlock(&mddi->idle_lock);
505 }
506
507 static int __init mddi_get_client_caps(struct mddi_info *mddi)
508 {
509 int i, j;
510
511 /* clear any stale interrupts */
512 mddi_writel(0xffffffff, INT);
513
514 mddi->int_enable = MDDI_INT_LINK_ACTIVE |
515 MDDI_INT_IN_HIBERNATION |
516 MDDI_INT_PRI_LINK_LIST_DONE |
517 MDDI_INT_REV_DATA_AVAIL |
518 MDDI_INT_REV_OVERFLOW |
519 MDDI_INT_REV_OVERWRITE |
520 MDDI_INT_RTD_FAILURE;
521 mddi_writel(mddi->int_enable, INTEN);
522
523 mddi_writel(MDDI_CMD_LINK_ACTIVE, CMD);
524 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
525 /*FIXME: mddi host can't get caps on MDDI type 2*/
526 if (mddi->type == MSM_MDP_MDDI_TYPE_I) {
527 for (j = 0; j < 3; j++) {
528 /* the toshiba vga panel does not respond to get
529 * caps unless you SEND_RTD, but the first SEND_RTD
530 * will fail...
531 */
532 for (i = 0; i < 4; i++) {
533 uint32_t stat;
534
535 mddi_writel(MDDI_CMD_SEND_RTD, CMD);
536 mdelay(1);
537 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
538 stat = mddi_readl(STAT);
539 printk(KERN_INFO "mddi cmd send rtd: int %x, stat %x, "
540 "rtd val %x\n", mddi_readl(INT), stat,
541 mddi_readl(RTD_VAL));
542 if ((stat & MDDI_STAT_RTD_MEAS_FAIL) == 0) {
543 mdelay(1);
544 break;
545 }
546 msleep(1);
547 }
548
549 mddi_writel(CMD_GET_CLIENT_CAP, CMD);
550 mdelay(1);
551 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
552 wait_event_timeout(mddi->int_wait, mddi->flags & FLAG_HAVE_CAPS,
553 HZ / 100);
554
555 if (mddi->flags & FLAG_HAVE_CAPS)
556 break;
557 printk(KERN_INFO KERN_ERR "mddi_init, timeout waiting for "
558 "caps\n");
559 }
560 return (mddi->flags & FLAG_HAVE_CAPS);
561 } else
562 return 1;
563 }
564
565 /* link must be active when this is called */
566 int mddi_check_status(struct mddi_info *mddi)
567 {
568 int ret = -1, retry = 3;
569 mutex_lock(&mddi->reg_read_lock);
570 mddi_writel(MDDI_CMD_PERIODIC_REV_ENCAP | 1, CMD);
571 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
572
573 do {
574 mddi->flags &= ~FLAG_HAVE_STATUS;
575 mddi_writel(CMD_GET_CLIENT_STATUS, CMD);
576 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
577 wait_event_timeout(mddi->int_wait,
578 mddi->flags & FLAG_HAVE_STATUS,
579 HZ / 100);
580
581 if (mddi->flags & FLAG_HAVE_STATUS) {
582 if (mddi->status.crc_error_count)
583 printk(KERN_INFO "mddi status: crc_error "
584 "count: %d\n",
585 mddi->status.crc_error_count);
586 else
587 ret = 0;
588 break;
589 } else
590 printk(KERN_INFO "mddi status: failed to get client "
591 "status\n");
592 mddi_writel(MDDI_CMD_SEND_RTD, CMD);
593 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
594 } while (--retry);
595
596 mddi_writel(MDDI_CMD_PERIODIC_REV_ENCAP | 0, CMD);
597 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
598 mutex_unlock(&mddi->reg_read_lock);
599 return ret;
600 }
601
602
603 /*
604 * mddi_remote_write_vals - send the register access packet
605 *
606 * @cdata: mddi layer dedicated structure, holding info needed by mddi
607 * @val : parameters
608 * @reg : cmd
609 * @nr_bytes: size of parameters in bytes
610 *
611 * jay, Nov 13, 08'
612 * extend the single parameter to multiple.
613 */
614 void mddi_remote_write_vals(struct msm_mddi_client_data *cdata, uint8_t * val,
615 uint32_t reg, unsigned int nr_bytes)
616 {
617 struct mddi_info *mddi = container_of(cdata, struct mddi_info,
618 client_data);
619 struct mddi_llentry *ll;
620 struct mddi_register_access *ra;
621 dma_addr_t bus_addr = 0;
622
623 mutex_lock(&mddi->reg_write_lock);
624
625 ll = mddi->reg_write_data;
626
627 ra = &(ll->u.r);
628 ra->length = 14 + nr_bytes;
629 ra->type = TYPE_REGISTER_ACCESS;
630 ra->client_id = 0;
631 ra->read_write_info = MDDI_WRITE | (nr_bytes / 4);
632 ra->crc16 = 0;
633
634 ra->register_address = reg;
635
636 ll->flags = 1;
637 /* register access packet header occupies 14 bytes */
638 ll->header_count = 14;
639 ll->data_count = nr_bytes; /* num of bytes in the data field */
640
641 if (nr_bytes == 4) {
642 uint32_t *prm = (uint32_t *)val;
643
644 ll->data = mddi->reg_write_addr +
645 offsetof(struct mddi_llentry, u.r.u.reg_data);
646 ra->u.reg_data = *prm;
647 } else {
648 int dma_retry = 5;
649
650 while (dma_retry--) {
651 bus_addr = dma_map_single(NULL, (void *)val, nr_bytes,
652 DMA_TO_DEVICE);
653 if (dma_mapping_error(NULL, bus_addr) == 0)
654 break;
655 msleep(1);
656 }
657 if (dma_retry == 0) {
658 printk(KERN_ERR "%s: dma map fail!\n", __func__);
659 return;
660 }
661
662 ll->data = bus_addr;
663 ra->u.reg_data_list = (uint32_t *)bus_addr;
664 }
665 ll->next = 0;
666 ll->reserved = 0;
667
668 /* inform mddi to start */
669 mddi_writel(mddi->reg_write_addr, PRI_PTR);
670 mddi_wait_interrupt(mddi, MDDI_INT_PRI_LINK_LIST_DONE);
671 if (bus_addr)
672 dma_unmap_single(NULL, bus_addr, nr_bytes, DMA_TO_DEVICE);
673 mutex_unlock(&mddi->reg_write_lock);
674 }
675
676 void mddi_remote_write(struct msm_mddi_client_data *cdata, uint32_t val,
677 uint32_t reg)
678 {
679 uint8_t * p = (uint8_t *)&val;
680 mddi_remote_write_vals(cdata, p, reg, 4);
681 }
682
683 uint32_t mddi_remote_read(struct msm_mddi_client_data *cdata, uint32_t reg)
684 {
685 struct mddi_info *mddi = container_of(cdata, struct mddi_info,
686 client_data);
687 struct mddi_llentry *ll;
688 struct mddi_register_access *ra;
689 struct reg_read_info ri;
690 unsigned s;
691 int retry_count = 2;
692 unsigned long irq_flags;
693
694 mutex_lock(&mddi->reg_read_lock);
695
696 ll = mddi->reg_read_data;
697
698 ra = &(ll->u.r);
699 ra->length = 14;
700 ra->type = TYPE_REGISTER_ACCESS;
701 ra->client_id = 0;
702 ra->read_write_info = MDDI_READ | 1;
703 ra->crc16 = 0;
704
705 ra->register_address = reg;
706
707 ll->flags = 0x11;
708 ll->header_count = 14;
709 ll->data_count = 0;
710 ll->data = 0;
711 ll->next = 0;
712 ll->reserved = 0;
713
714 s = mddi_readl(STAT);
715 /* printk(KERN_INFO "mddi_remote_read(%x), stat = %x\n", reg, s); */
716
717 ri.reg = reg;
718 ri.status = -1;
719 ri.result = -1;
720
721 do {
722 init_completion(&ri.done);
723 mddi->reg_read = &ri;
724 mddi_writel(mddi->reg_read_addr, PRI_PTR);
725
726 mddi_wait_interrupt(mddi, MDDI_INT_PRI_LINK_LIST_DONE);
727 /* s = mddi_readl(STAT); */
728 /* printk(KERN_INFO "mddi_remote_read(%x) sent, stat = %x\n",
729 * reg, s); */
730
731 /* s = mddi_readl(STAT); */
732 /* while((s & MDDI_STAT_PRI_LINK_LIST_DONE) == 0){ */
733 /* s = mddi_readl(STAT); */
734 /* } */
735
736 /* Enable Periodic Reverse Encapsulation. */
737 mddi_writel(MDDI_CMD_PERIODIC_REV_ENCAP | 1, CMD);
738 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
739 if (wait_for_completion_timeout(&ri.done, HZ/10) == 0 &&
740 !ri.done.done) {
741 printk(KERN_INFO "mddi_remote_read(%x) timeout "
742 "(%d %d %d)\n",
743 reg, ri.status, ri.result, ri.done.done);
744 spin_lock_irqsave(&mddi->int_lock, irq_flags);
745 mddi->reg_read = NULL;
746 spin_unlock_irqrestore(&mddi->int_lock, irq_flags);
747 ri.status = -1;
748 ri.result = -1;
749 }
750 if (ri.status == 0)
751 break;
752
753 /* printk(KERN_INFO "mddi_remote_read: failed, sent
754 * MDDI_CMD_SEND_RTD: int %x, stat %x, rtd val %x\n",
755 * mddi_readl(INT), mddi_readl(STAT), mddi_readl(RTD_VAL)); */
756 mddi_writel(MDDI_CMD_SEND_RTD, CMD);
757 mddi_writel(MDDI_CMD_LINK_ACTIVE, CMD);
758 /* printk(KERN_INFO "mddi_remote_read: failed, sent
759 * MDDI_CMD_SEND_RTD: int %x, stat %x, rtd val %x\n",
760 * mddi_readl(INT), mddi_readl(STAT), mddi_readl(RTD_VAL)); */
761 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
762 printk(KERN_INFO "mddi_remote_read: failed, sent "
763 "MDDI_CMD_SEND_RTD: int %x, stat %x, rtd val %x "
764 "curr_rev_ptr %x\n", mddi_readl(INT), mddi_readl(STAT),
765 mddi_readl(RTD_VAL), mddi_readl(CURR_REV_PTR));
766 } while (retry_count-- > 0);
767 /* Disable Periodic Reverse Encapsulation. */
768 mddi_writel(MDDI_CMD_PERIODIC_REV_ENCAP | 0, CMD);
769 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
770 /* printk(KERN_INFO "mddi_remote_read(%x) done, stat = %x,
771 * return %x\n", reg, s, ri.result); */
772 mddi->reg_read = NULL;
773 mutex_unlock(&mddi->reg_read_lock);
774 return ri.result;
775 }
776
777 static struct mddi_info mddi_info[2];
778
779 static int __init mddi_clk_setup(struct platform_device *pdev,
780 struct mddi_info *mddi,
781 unsigned long clk_rate)
782 {
783 int ret;
784 #ifdef CONFIG_MSM_MDP40
785 mdp_clk = clk_get(&pdev->dev, "mdp_clk");
786 if (IS_ERR(mdp_clk)) {
787 printk(KERN_INFO "mddi: failed to get mdp clk");
788 return PTR_ERR(mdp_clk);
789 }
790 ret = clk_enable(mdp_clk);
791 if (ret)
792 goto fail;
793 #endif
794 /* set up the clocks */
795 mddi->clk = clk_get(&pdev->dev, "mddi_clk");
796 if (IS_ERR(mddi->clk)) {
797 printk(KERN_INFO "mddi: failed to get clock\n");
798 return PTR_ERR(mddi->clk);
799 }
800 ret = clk_enable(mddi->clk);
801 if (ret)
802 goto fail;
803 ret = clk_set_rate(mddi->clk, clk_rate);
804 if (ret)
805 goto fail;
806 printk(KERN_DEBUG "mddi runs at %ld\n", clk_get_rate(mddi->clk));
807 return 0;
808
809 fail:
810 clk_put(mddi->clk);
811 return ret;
812 }
813
814 static int __init mddi_rev_data_setup(struct mddi_info *mddi)
815 {
816 void *dma;
817 dma_addr_t dma_addr;
818
819 /* set up dma buffer */
820 dma = dma_alloc_coherent(NULL, 0x1000, &dma_addr, GFP_KERNEL);
821 if (dma == 0)
822 return -ENOMEM;
823 mddi->rev_data = dma;
824 mddi->rev_data_curr = 0;
825 mddi->rev_addr = dma_addr;
826 mddi->reg_write_data = dma + MDDI_REV_BUFFER_SIZE;
827 mddi->reg_write_addr = dma_addr + MDDI_REV_BUFFER_SIZE;
828 mddi->reg_read_data = mddi->reg_write_data + 1;
829 mddi->reg_read_addr = mddi->reg_write_addr +
830 sizeof(*mddi->reg_write_data);
831 return 0;
832 }
833
834 static void mddi_skew_calibration(struct mddi_info *mddi)
835 {
836 struct msm_mddi_platform_data *pdata = mddi->client_pdev.dev.platform_data;
837
838 clk_set_rate( mddi->clk, 50000000);
839 mdelay(1);
840 mddi_writel(MDDI_CMD_SKEW_CALIBRATION, CMD);
841 mdelay(1);
842 clk_set_rate( mddi->clk, pdata->clk_rate);
843 mdelay(1);
844 }
845
846 static int __init mddi_probe(struct platform_device *pdev)
847 {
848 struct msm_mddi_platform_data *pdata = pdev->dev.platform_data;
849 struct mddi_info *mddi = &mddi_info[pdev->id];
850 struct resource *resource;
851 int ret, i;
852
853 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
854 if (!resource) {
855 printk(KERN_ERR "mddi: no associated mem resource!\n");
856 return -ENOMEM;
857 }
858 mddi->base = ioremap(resource->start, resource->end - resource->start);
859 if (!mddi->base) {
860 printk(KERN_ERR "mddi: failed to remap base!\n");
861 ret = -EINVAL;
862 goto error_ioremap;
863 }
864 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
865 if (!resource) {
866 printk(KERN_ERR "mddi: no associated irq resource!\n");
867 ret = -EINVAL;
868 goto error_get_irq_resource;
869 }
870 mddi->irq = resource->start;
871 printk(KERN_INFO "mddi: init() base=0x%p irq=%d\n", mddi->base,
872 mddi->irq);
873 mddi->power_client = pdata->power_client;
874 if (pdata->type != NULL)
875 mddi->type = pdata->type;
876
877 mutex_init(&mddi->reg_write_lock);
878 mutex_init(&mddi->reg_read_lock);
879 spin_lock_init(&mddi->int_lock);
880 init_waitqueue_head(&mddi->int_wait);
881
882 wake_lock_init(&mddi->idle_lock, WAKE_LOCK_IDLE, "mddi_idle_lock");
883 wake_lock_init(&mddi->link_active_idle_lock, WAKE_LOCK_IDLE,
884 "mddi_link_active_idle_lock");
885
886 ret = mddi_clk_setup(pdev, mddi, pdata->clk_rate);
887 if (ret) {
888 printk(KERN_ERR "mddi: failed to setup clock!\n");
889 goto error_clk_setup;
890 }
891
892 ret = mddi_rev_data_setup(mddi);
893 if (ret) {
894 printk(KERN_ERR "mddi: failed to setup rev data!\n");
895 goto error_rev_data;
896 }
897
898 mddi->int_enable = 0;
899 mddi_writel(mddi->int_enable, INTEN);
900 ret = request_irq(mddi->irq, mddi_isr, IRQF_DISABLED, "mddi",
901 &mddi->client_data);
902 if (ret) {
903 printk(KERN_ERR "mddi: failed to request enable irq!\n");
904 goto error_request_irq;
905 }
906
907 /* turn on the mddi client bridge chip */
908 #if 0 /*advised by SKY*/
909 if (mddi->power_client)
910 mddi->power_client(&mddi->client_data, 1);
911 #endif
912 /* initialize the mddi registers */
913 mddi_set_auto_hibernate(&mddi->client_data, 0);
914 mddi_writel(MDDI_CMD_RESET, CMD);
915 mddi_wait_interrupt(mddi, MDDI_INT_NO_CMD_PKTS_PEND);
916 mddi->version = mddi_init_registers(mddi);
917 if (mddi->version < 0x20) {
918 printk(KERN_ERR "mddi: unsupported version 0x%x\n",
919 mddi->version);
920 ret = -ENODEV;
921 goto error_mddi_version;
922 }
923
924 /* read the capabilities off the client */
925 if (!mddi_get_client_caps(mddi)) {
926 printk(KERN_INFO "mddi: no client found\n");
927 /* power down the panel */
928 mddi_writel(MDDI_CMD_POWERDOWN, CMD);
929 printk(KERN_INFO "mddi powerdown: stat %x\n", mddi_readl(STAT));
930 msleep(100);
931 printk(KERN_INFO "mddi powerdown: stat %x\n", mddi_readl(STAT));
932 goto dummy_client;
933 }
934
935 mddi_set_auto_hibernate(&mddi->client_data, 1);
936
937 /*
938 * FIXME: User kernel defconfig to link dedicated mddi client driver.
939 */
940 #if 0
941 if ( mddi->caps.Mfr_Name == 0 && mddi->caps.Product_Code == 0)
942 #else
943 if (mddi->caps.Mfr_Name == 0 )
944 #endif
945 pdata->fixup(&mddi->caps.Mfr_Name, &mddi->caps.Product_Code);
946
947 mddi->client_pdev.id = 0;
948 for (i = 0; i < pdata->num_clients; i++) {
949 if (pdata->client_platform_data[i].product_id ==
950 (mddi->caps.Mfr_Name << 16 | mddi->caps.Product_Code)) {
951 mddi->client_data.private_client_data =
952 pdata->client_platform_data[i].client_data;
953 mddi->client_pdev.name =
954 pdata->client_platform_data[i].name;
955 mddi->client_pdev.id =
956 pdata->client_platform_data[i].id;
957 /* XXX: possibly set clock */
958 break;
959 }
960 }
961
962 if (i >= pdata->num_clients) {
963 dummy_client:
964 mddi->client_data.private_client_data =
965 pdata->client_platform_data[0].client_data;
966 mddi->client_pdev.name =
967 pdata->client_platform_data[0].name;
968 mddi->client_pdev.id =
969 pdata->client_platform_data[0].id;
970 mddi->client_pdev.name = "mddi_c_dummy";
971 clk_disable(mddi->clk);
972 }
973 printk(KERN_INFO "mddi: registering panel %s\n",
974 mddi->client_pdev.name);
975
976 mddi->client_data.suspend = mddi_suspend;
977 mddi->client_data.resume = mddi_resume;
978 mddi->client_data.activate_link = mddi_activate_link;
979 mddi->client_data.remote_write = mddi_remote_write;
980 mddi->client_data.remote_write_vals = mddi_remote_write_vals;
981 mddi->client_data.remote_read = mddi_remote_read;
982 mddi->client_data.auto_hibernate = mddi_set_auto_hibernate;
983 mddi->client_data.fb_resource = pdata->fb_resource;
984 if (pdev->id == 0)
985 mddi->client_data.interface_type = MSM_MDDI_PMDH_INTERFACE;
986 else if (pdev->id == 1)
987 mddi->client_data.interface_type = MSM_MDDI_EMDH_INTERFACE;
988 else {
989 printk(KERN_ERR "mddi: can not determine interface %d!\n",
990 pdev->id);
991 ret = -EINVAL;
992 goto error_mddi_interface;
993 }
994
995 mddi->client_pdev.dev.platform_data = &mddi->client_data;
996 printk(KERN_INFO "mddi: publish: %s\n", mddi->client_name);
997 platform_device_register(&mddi->client_pdev);
998 return 0;
999
1000 error_mddi_interface:
1001 error_mddi_version:
1002 free_irq(mddi->irq, 0);
1003 error_request_irq:
1004 dma_free_coherent(NULL, 0x1000, mddi->rev_data, mddi->rev_addr);
1005 error_rev_data:
1006 error_clk_setup:
1007 wake_lock_destroy(&mddi->idle_lock);
1008 wake_lock_destroy(&mddi->link_active_idle_lock);
1009 error_get_irq_resource:
1010 iounmap(mddi->base);
1011 error_ioremap:
1012
1013 printk(KERN_INFO "mddi: mddi_init() failed (%d)\n", ret);
1014 return ret;
1015 }
1016
1017 #if 0 /* read/write mddi registers from userspace */
1018 module_param_named(debug, mddi_debug_flags, uint, 0644);
1019
1020 static uint32_t selected_register;
1021 module_param_named(reg, selected_register, uint, 0644);
1022
1023 static int set_reg(const char *val, struct kernel_param *kp)
1024 {
1025 char *endp;
1026 uint32_t l;
1027
1028 if (!val)
1029 return -EINVAL;
1030 l = simple_strtoul(val, &endp, 0);
1031 if (endp == val || ((uint32_t)l != l))
1032 return -EINVAL;
1033 mddi_remote_write(kp->arg, l, selected_register);
1034 return 0;
1035 }
1036
1037 static int get_reg(char *buffer, struct kernel_param *kp)
1038 {
1039 int val;
1040 val = mddi_remote_read(kp->arg, selected_register);
1041 return sprintf(buffer, "%x", val);
1042 }
1043
1044 module_param_call(pmdh_val, set_reg, get_reg, &mddi_info[0], 0644);
1045 module_param_call(emdh_val, set_reg, get_reg, &mddi_info[1], 0644);
1046
1047 #endif
1048
1049 static struct platform_driver mddi_driver = {
1050 .probe = mddi_probe,
1051 .driver = { .name = "msm_mddi" },
1052 };
1053
1054 static int __init _mddi_init(void)
1055 {
1056 return platform_driver_register(&mddi_driver);
1057 }
1058
1059 module_init(_mddi_init);
kernels