drivers/i2c/busses/i2c-pnx.c

   1 /*
   2  * Provides I2C support for Philips PNX010x/PNX4008 boards.
   3  *
   4  * Authors: Dennis Kovalev <dkovalev@ru.mvista.com>
   5  *          Vitaly Wool <vwool@ru.mvista.com>
   6  *
   7  * 2004-2006 (c) MontaVista Software, Inc. This file is licensed under
   8  * the terms of the GNU General Public License version 2. This program
   9  * is licensed "as is" without any warranty of any kind, whether express
  10  * or implied.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/ioport.h>
  16 #include <linux/delay.h>
  17 #include <linux/i2c.h>
  18 #include <linux/timer.h>
  19 #include <linux/completion.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/i2c-pnx.h>
  22 #include <linux/io.h>
  23 #include <mach/hardware.h>
  24 #include <mach/i2c.h>
  25 #include <asm/irq.h>
  26 #include <asm/uaccess.h>
  27
  28 #define I2C_PNX_TIMEOUT         10 /* msec */
  29 #define I2C_PNX_SPEED_KHZ       100
  30 #define I2C_PNX_REGION_SIZE     0x100
  31 #define PNX_DEFAULT_FREQ        13 /* MHz */
  32
  33 static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
  34 {
  35         while (timeout > 0 &&
  36                         (ioread32(I2C_REG_STS(data)) & mstatus_active)) {
  37                 mdelay(1);
  38                 timeout--;
  39         }
  40         return (timeout <= 0);
  41 }
  42
  43 static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)
  44 {
  45         while (timeout > 0 &&
  46                         (ioread32(I2C_REG_CTL(data)) & mcntrl_reset)) {
  47                 mdelay(1);
  48                 timeout--;
  49         }
  50         return (timeout <= 0);
  51 }
  52
  53 static inline void i2c_pnx_arm_timer(struct i2c_adapter *adap)
  54 {
  55         struct i2c_pnx_algo_data *data = adap->algo_data;
  56         struct timer_list *timer = &data->mif.timer;
  57         int expires = I2C_PNX_TIMEOUT / (1000 / HZ);
  58
  59         if (expires <= 1)
  60                 expires = 2;
  61
  62         del_timer_sync(timer);
  63
  64         dev_dbg(&adap->dev, "Timer armed at %lu plus %u jiffies.\n",
  65                 jiffies, expires);
  66
  67         timer->expires = jiffies + expires;
  68         timer->data = (unsigned long)adap;
  69
  70         add_timer(timer);
  71 }
  72
  73 /**
  74  * i2c_pnx_start - start a device
  75  * @slave_addr:         slave address
  76  * @adap:               pointer to adapter structure
  77  *
  78  * Generate a START signal in the desired mode.
  79  */
  80 static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap)
  81 {
  82         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
  83
  84         dev_dbg(&adap->dev, "%s(): addr 0x%x mode %d\n", __func__,
  85                 slave_addr, alg_data->mif.mode);
  86
  87         /* Check for 7 bit slave addresses only */
  88         if (slave_addr & ~0x7f) {
  89                 dev_err(&adap->dev, "%s: Invalid slave address %x. "
  90                        "Only 7-bit addresses are supported\n",
  91                        adap->name, slave_addr);
  92                 return -EINVAL;
  93         }
  94
  95         /* First, make sure bus is idle */
  96         if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {
  97                 /* Somebody else is monopolizing the bus */
  98                 dev_err(&adap->dev, "%s: Bus busy. Slave addr = %02x, "
  99                        "cntrl = %x, stat = %x\n",
 100                        adap->name, slave_addr,
 101                        ioread32(I2C_REG_CTL(alg_data)),
 102                        ioread32(I2C_REG_STS(alg_data)));
 103                 return -EBUSY;
 104         } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {
 105                 /* Sorry, we lost the bus */
 106                 dev_err(&adap->dev, "%s: Arbitration failure. "
 107                        "Slave addr = %02x\n", adap->name, slave_addr);
 108                 return -EIO;
 109         }
 110
 111         /*
 112          * OK, I2C is enabled and we have the bus.
 113          * Clear the current TDI and AFI status flags.
 114          */
 115         iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,
 116                   I2C_REG_STS(alg_data));
 117
 118         dev_dbg(&adap->dev, "%s(): sending %#x\n", __func__,
 119                 (slave_addr << 1) | start_bit | alg_data->mif.mode);
 120
 121         /* Write the slave address, START bit and R/W bit */
 122         iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,
 123                   I2C_REG_TX(alg_data));
 124
 125         dev_dbg(&adap->dev, "%s(): exit\n", __func__);
 126
 127         return 0;
 128 }
 129
 130 /**
 131  * i2c_pnx_stop - stop a device
 132  * @adap:               pointer to I2C adapter structure
 133  *
 134  * Generate a STOP signal to terminate the master transaction.
 135  */
 136 static void i2c_pnx_stop(struct i2c_adapter *adap)
 137 {
 138         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 139         /* Only 1 msec max timeout due to interrupt context */
 140         long timeout = 1000;
 141
 142         dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
 143                 __func__, ioread32(I2C_REG_STS(alg_data)));
 144
 145         /* Write a STOP bit to TX FIFO */
 146         iowrite32(0xff | stop_bit, I2C_REG_TX(alg_data));
 147
 148         /* Wait until the STOP is seen. */
 149         while (timeout > 0 &&
 150                (ioread32(I2C_REG_STS(alg_data)) & mstatus_active)) {
 151                 /* may be called from interrupt context */
 152                 udelay(1);
 153                 timeout--;
 154         }
 155
 156         dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
 157                 __func__, ioread32(I2C_REG_STS(alg_data)));
 158 }
 159
 160 /**
 161  * i2c_pnx_master_xmit - transmit data to slave
 162  * @adap:               pointer to I2C adapter structure
 163  *
 164  * Sends one byte of data to the slave
 165  */
 166 static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
 167 {
 168         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 169         u32 val;
 170
 171         dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
 172                 __func__, ioread32(I2C_REG_STS(alg_data)));
 173
 174         if (alg_data->mif.len > 0) {
 175                 /* We still have something to talk about... */
 176                 val = *alg_data->mif.buf++;
 177
 178                 if (alg_data->mif.len == 1) {
 179                         val |= stop_bit;
 180                         if (!alg_data->last)
 181                                 val |= start_bit;
 182                 }
 183
 184                 alg_data->mif.len--;
 185                 iowrite32(val, I2C_REG_TX(alg_data));
 186
 187                 dev_dbg(&adap->dev, "%s(): xmit %#x [%d]\n", __func__,
 188                         val, alg_data->mif.len + 1);
 189
 190                 if (alg_data->mif.len == 0) {
 191                         if (alg_data->last) {
 192                                 /* Wait until the STOP is seen. */
 193                                 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
 194                                         dev_err(&adap->dev, "The bus is still "
 195                                                 "active after timeout\n");
 196                         }
 197                         /* Disable master interrupts */
 198                         iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
 199                                 ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
 200                                   I2C_REG_CTL(alg_data));
 201
 202                         del_timer_sync(&alg_data->mif.timer);
 203
 204                         dev_dbg(&adap->dev, "%s(): Waking up xfer routine.\n",
 205                                 __func__);
 206
 207                         complete(&alg_data->mif.complete);
 208                 }
 209         } else if (alg_data->mif.len == 0) {
 210                 /* zero-sized transfer */
 211                 i2c_pnx_stop(adap);
 212
 213                 /* Disable master interrupts. */
 214                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
 215                         ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
 216                           I2C_REG_CTL(alg_data));
 217
 218                 /* Stop timer. */
 219                 del_timer_sync(&alg_data->mif.timer);
 220                 dev_dbg(&adap->dev, "%s(): Waking up xfer routine after "
 221                         "zero-xfer.\n", __func__);
 222
 223                 complete(&alg_data->mif.complete);
 224         }
 225
 226         dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
 227                 __func__, ioread32(I2C_REG_STS(alg_data)));
 228
 229         return 0;
 230 }
 231
 232 /**
 233  * i2c_pnx_master_rcv - receive data from slave
 234  * @adap:               pointer to I2C adapter structure
 235  *
 236  * Reads one byte data from the slave
 237  */
 238 static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
 239 {
 240         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 241         unsigned int val = 0;
 242         u32 ctl = 0;
 243
 244         dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
 245                 __func__, ioread32(I2C_REG_STS(alg_data)));
 246
 247         /* Check, whether there is already data,
 248          * or we didn't 'ask' for it yet.
 249          */
 250         if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
 251                 dev_dbg(&adap->dev, "%s(): Write dummy data to fill "
 252                         "Rx-fifo...\n", __func__);
 253
 254                 if (alg_data->mif.len == 1) {
 255                         /* Last byte, do not acknowledge next rcv. */
 256                         val |= stop_bit;
 257                         if (!alg_data->last)
 258                                 val |= start_bit;
 259
 260                         /*
 261                          * Enable interrupt RFDAIE (data in Rx fifo),
 262                          * and disable DRMIE (need data for Tx)
 263                          */
 264                         ctl = ioread32(I2C_REG_CTL(alg_data));
 265                         ctl |= mcntrl_rffie | mcntrl_daie;
 266                         ctl &= ~mcntrl_drmie;
 267                         iowrite32(ctl, I2C_REG_CTL(alg_data));
 268                 }
 269
 270                 /*
 271                  * Now we'll 'ask' for data:
 272                  * For each byte we want to receive, we must
 273                  * write a (dummy) byte to the Tx-FIFO.
 274                  */
 275                 iowrite32(val, I2C_REG_TX(alg_data));
 276
 277                 return 0;
 278         }
 279
 280         /* Handle data. */
 281         if (alg_data->mif.len > 0) {
 282                 val = ioread32(I2C_REG_RX(alg_data));
 283                 *alg_data->mif.buf++ = (u8) (val & 0xff);
 284                 dev_dbg(&adap->dev, "%s(): rcv 0x%x [%d]\n", __func__, val,
 285                         alg_data->mif.len);
 286
 287                 alg_data->mif.len--;
 288                 if (alg_data->mif.len == 0) {
 289                         if (alg_data->last)
 290                                 /* Wait until the STOP is seen. */
 291                                 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
 292                                         dev_err(&adap->dev, "The bus is still "
 293                                                 "active after timeout\n");
 294
 295                         /* Disable master interrupts */
 296                         ctl = ioread32(I2C_REG_CTL(alg_data));
 297                         ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
 298                                  mcntrl_drmie | mcntrl_daie);
 299                         iowrite32(ctl, I2C_REG_CTL(alg_data));
 300
 301                         /* Kill timer. */
 302                         del_timer_sync(&alg_data->mif.timer);
 303                         complete(&alg_data->mif.complete);
 304                 }
 305         }
 306
 307         dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
 308                 __func__, ioread32(I2C_REG_STS(alg_data)));
 309
 310         return 0;
 311 }
 312
 313 static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
 314 {
 315         u32 stat, ctl;
 316         struct i2c_adapter *adap = dev_id;
 317         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 318
 319         dev_dbg(&adap->dev, "%s(): mstat = %x mctrl = %x, mode = %d\n",
 320                 __func__,
 321                 ioread32(I2C_REG_STS(alg_data)),
 322                 ioread32(I2C_REG_CTL(alg_data)),
 323                 alg_data->mif.mode);
 324         stat = ioread32(I2C_REG_STS(alg_data));
 325
 326         /* let's see what kind of event this is */
 327         if (stat & mstatus_afi) {
 328                 /* We lost arbitration in the midst of a transfer */
 329                 alg_data->mif.ret = -EIO;
 330
 331                 /* Disable master interrupts. */
 332                 ctl = ioread32(I2C_REG_CTL(alg_data));
 333                 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
 334                          mcntrl_drmie);
 335                 iowrite32(ctl, I2C_REG_CTL(alg_data));
 336
 337                 /* Stop timer, to prevent timeout. */
 338                 del_timer_sync(&alg_data->mif.timer);
 339                 complete(&alg_data->mif.complete);
 340         } else if (stat & mstatus_nai) {
 341                 /* Slave did not acknowledge, generate a STOP */
 342                 dev_dbg(&adap->dev, "%s(): "
 343                         "Slave did not acknowledge, generating a STOP.\n",
 344                         __func__);
 345                 i2c_pnx_stop(adap);
 346
 347                 /* Disable master interrupts. */
 348                 ctl = ioread32(I2C_REG_CTL(alg_data));
 349                 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
 350                          mcntrl_drmie);
 351                 iowrite32(ctl, I2C_REG_CTL(alg_data));
 352
 353                 /* Our return value. */
 354                 alg_data->mif.ret = -EIO;
 355
 356                 /* Stop timer, to prevent timeout. */
 357                 del_timer_sync(&alg_data->mif.timer);
 358                 complete(&alg_data->mif.complete);
 359         } else {
 360                 /*
 361                  * Two options:
 362                  * - Master Tx needs data.
 363                  * - There is data in the Rx-fifo
 364                  * The latter is only the case if we have requested for data,
 365                  * via a dummy write. (See 'i2c_pnx_master_rcv'.)
 366                  * We therefore check, as a sanity check, whether that interrupt
 367                  * has been enabled.
 368                  */
 369                 if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) {
 370                         if (alg_data->mif.mode == I2C_SMBUS_WRITE) {
 371                                 i2c_pnx_master_xmit(adap);
 372                         } else if (alg_data->mif.mode == I2C_SMBUS_READ) {
 373                                 i2c_pnx_master_rcv(adap);
 374                         }
 375                 }
 376         }
 377
 378         /* Clear TDI and AFI bits */
 379         stat = ioread32(I2C_REG_STS(alg_data));
 380         iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));
 381
 382         dev_dbg(&adap->dev, "%s(): exiting, stat = %x ctrl = %x.\n",
 383                  __func__, ioread32(I2C_REG_STS(alg_data)),
 384                  ioread32(I2C_REG_CTL(alg_data)));
 385
 386         return IRQ_HANDLED;
 387 }
 388
 389 static void i2c_pnx_timeout(unsigned long data)
 390 {
 391         struct i2c_adapter *adap = (struct i2c_adapter *)data;
 392         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 393         u32 ctl;
 394
 395         dev_err(&adap->dev, "Master timed out. stat = %04x, cntrl = %04x. "
 396                "Resetting master...\n",
 397                ioread32(I2C_REG_STS(alg_data)),
 398                ioread32(I2C_REG_CTL(alg_data)));
 399
 400         /* Reset master and disable interrupts */
 401         ctl = ioread32(I2C_REG_CTL(alg_data));
 402         ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie | mcntrl_drmie);
 403         iowrite32(ctl, I2C_REG_CTL(alg_data));
 404
 405         ctl |= mcntrl_reset;
 406         iowrite32(ctl, I2C_REG_CTL(alg_data));
 407         wait_reset(I2C_PNX_TIMEOUT, alg_data);
 408         alg_data->mif.ret = -EIO;
 409         complete(&alg_data->mif.complete);
 410 }
 411
 412 static inline void bus_reset_if_active(struct i2c_adapter *adap)
 413 {
 414         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 415         u32 stat;
 416
 417         if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) {
 418                 dev_err(&adap->dev,
 419                         "%s: Bus is still active after xfer. Reset it...\n",
 420                        adap->name);
 421                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
 422                           I2C_REG_CTL(alg_data));
 423                 wait_reset(I2C_PNX_TIMEOUT, alg_data);
 424         } else if (!(stat & mstatus_rfe) || !(stat & mstatus_tfe)) {
 425                 /* If there is data in the fifo's after transfer,
 426                  * flush fifo's by reset.
 427                  */
 428                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
 429                           I2C_REG_CTL(alg_data));
 430                 wait_reset(I2C_PNX_TIMEOUT, alg_data);
 431         } else if (stat & mstatus_nai) {
 432                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
 433                           I2C_REG_CTL(alg_data));
 434                 wait_reset(I2C_PNX_TIMEOUT, alg_data);
 435         }
 436 }
 437
 438 /**
 439  * i2c_pnx_xfer - generic transfer entry point
 440  * @adap:               pointer to I2C adapter structure
 441  * @msgs:               array of messages
 442  * @num:                number of messages
 443  *
 444  * Initiates the transfer
 445  */
 446 static int
 447 i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
 448 {
 449         struct i2c_msg *pmsg;
 450         int rc = 0, completed = 0, i;
 451         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 452         u32 stat = ioread32(I2C_REG_STS(alg_data));
 453
 454         dev_dbg(&adap->dev, "%s(): entering: %d messages, stat = %04x.\n",
 455                 __func__, num, ioread32(I2C_REG_STS(alg_data)));
 456
 457         bus_reset_if_active(adap);
 458
 459         /* Process transactions in a loop. */
 460         for (i = 0; rc >= 0 && i < num; i++) {
 461                 u8 addr;
 462
 463                 pmsg = &msgs[i];
 464                 addr = pmsg->addr;
 465
 466                 if (pmsg->flags & I2C_M_TEN) {
 467                         dev_err(&adap->dev,
 468                                 "%s: 10 bits addr not supported!\n",
 469                                 adap->name);
 470                         rc = -EINVAL;
 471                         break;
 472                 }
 473
 474                 alg_data->mif.buf = pmsg->buf;
 475                 alg_data->mif.len = pmsg->len;
 476                 alg_data->mif.mode = (pmsg->flags & I2C_M_RD) ?
 477                         I2C_SMBUS_READ : I2C_SMBUS_WRITE;
 478                 alg_data->mif.ret = 0;
 479                 alg_data->last = (i == num - 1);
 480
 481                 dev_dbg(&adap->dev, "%s(): mode %d, %d bytes\n", __func__,
 482                         alg_data->mif.mode,
 483                         alg_data->mif.len);
 484
 485                 i2c_pnx_arm_timer(adap);
 486
 487                 /* initialize the completion var */
 488                 init_completion(&alg_data->mif.complete);
 489
 490                 /* Enable master interrupt */
 491                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_afie |
 492                                 mcntrl_naie | mcntrl_drmie,
 493                           I2C_REG_CTL(alg_data));
 494
 495                 /* Put start-code and slave-address on the bus. */
 496                 rc = i2c_pnx_start(addr, adap);
 497                 if (rc < 0)
 498                         break;
 499
 500                 /* Wait for completion */
 501                 wait_for_completion(&alg_data->mif.complete);
 502
 503                 if (!(rc = alg_data->mif.ret))
 504                         completed++;
 505                 dev_dbg(&adap->dev, "%s(): Complete, return code = %d.\n",
 506                         __func__, rc);
 507
 508                 /* Clear TDI and AFI bits in case they are set. */
 509                 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {
 510                         dev_dbg(&adap->dev,
 511                                 "%s: TDI still set... clearing now.\n",
 512                                adap->name);
 513                         iowrite32(stat, I2C_REG_STS(alg_data));
 514                 }
 515                 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) {
 516                         dev_dbg(&adap->dev,
 517                                 "%s: AFI still set... clearing now.\n",
 518                                adap->name);
 519                         iowrite32(stat, I2C_REG_STS(alg_data));
 520                 }
 521         }
 522
 523         bus_reset_if_active(adap);
 524
 525         /* Cleanup to be sure... */
 526         alg_data->mif.buf = NULL;
 527         alg_data->mif.len = 0;
 528
 529         dev_dbg(&adap->dev, "%s(): exiting, stat = %x\n",
 530                 __func__, ioread32(I2C_REG_STS(alg_data)));
 531
 532         if (completed != num)
 533                 return ((rc < 0) ? rc : -EREMOTEIO);
 534
 535         return num;
 536 }
 537
 538 static u32 i2c_pnx_func(struct i2c_adapter *adapter)
 539 {
 540         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 541 }
 542
 543 static struct i2c_algorithm pnx_algorithm = {
 544         .master_xfer = i2c_pnx_xfer,
 545         .functionality = i2c_pnx_func,
 546 };
 547
 548 static int i2c_pnx_controller_suspend(struct platform_device *pdev,
 549                                       pm_message_t state)
 550 {
 551         struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
 552         return i2c_pnx->suspend(pdev, state);
 553 }
 554
 555 static int i2c_pnx_controller_resume(struct platform_device *pdev)
 556 {
 557         struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
 558         return i2c_pnx->resume(pdev);
 559 }
 560
 561 static int __devinit i2c_pnx_probe(struct platform_device *pdev)
 562 {
 563         unsigned long tmp;
 564         int ret = 0;
 565         struct i2c_pnx_algo_data *alg_data;
 566         int freq_mhz;
 567         struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
 568
 569         if (!i2c_pnx || !i2c_pnx->adapter) {
 570                 dev_err(&pdev->dev, "%s: no platform data supplied\n",
 571                        __func__);
 572                 ret = -EINVAL;
 573                 goto out;
 574         }
 575
 576         platform_set_drvdata(pdev, i2c_pnx);
 577
 578         if (i2c_pnx->calculate_input_freq)
 579                 freq_mhz = i2c_pnx->calculate_input_freq(pdev);
 580         else {
 581                 freq_mhz = PNX_DEFAULT_FREQ;
 582                 dev_info(&pdev->dev, "Setting bus frequency to default value: "
 583                        "%d MHz\n", freq_mhz);
 584         }
 585
 586         i2c_pnx->adapter->algo = &pnx_algorithm;
 587
 588         alg_data = i2c_pnx->adapter->algo_data;
 589         init_timer(&alg_data->mif.timer);
 590         alg_data->mif.timer.function = i2c_pnx_timeout;
 591         alg_data->mif.timer.data = (unsigned long)i2c_pnx->adapter;
 592
 593         /* Register I/O resource */
 594         if (!request_mem_region(alg_data->base, I2C_PNX_REGION_SIZE,
 595                                 pdev->name)) {
 596                 dev_err(&pdev->dev,
 597                        "I/O region 0x%08x for I2C already in use.\n",
 598                        alg_data->base);
 599                 ret = -ENODEV;
 600                 goto out_drvdata;
 601         }
 602
 603         if (!(alg_data->ioaddr =
 604                         (u32)ioremap(alg_data->base, I2C_PNX_REGION_SIZE))) {
 605                 dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
 606                 ret = -ENOMEM;
 607                 goto out_release;
 608         }
 609
 610         i2c_pnx->set_clock_run(pdev);
 611
 612         /*
 613          * Clock Divisor High This value is the number of system clocks
 614          * the serial clock (SCL) will be high.
 615          * For example, if the system clock period is 50 ns and the maximum
 616          * desired serial period is 10000 ns (100 kHz), then CLKHI would be
 617          * set to 0.5*(f_sys/f_i2c)-2=0.5*(20e6/100e3)-2=98. The actual value
 618          * programmed into CLKHI will vary from this slightly due to
 619          * variations in the output pad's rise and fall times as well as
 620          * the deglitching filter length.
 621          */
 622
 623         tmp = ((freq_mhz * 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
 624         iowrite32(tmp, I2C_REG_CKH(alg_data));
 625         iowrite32(tmp, I2C_REG_CKL(alg_data));
 626
 627         iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
 628         if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
 629                 ret = -ENODEV;
 630                 goto out_unmap;
 631         }
 632         init_completion(&alg_data->mif.complete);
 633
 634         ret = request_irq(alg_data->irq, i2c_pnx_interrupt,
 635                         0, pdev->name, i2c_pnx->adapter);
 636         if (ret)
 637                 goto out_clock;
 638
 639         /* Register this adapter with the I2C subsystem */
 640         i2c_pnx->adapter->dev.parent = &pdev->dev;
 641         ret = i2c_add_adapter(i2c_pnx->adapter);
 642         if (ret < 0) {
 643                 dev_err(&pdev->dev, "I2C: Failed to add bus\n");
 644                 goto out_irq;
 645         }
 646
 647         dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
 648                i2c_pnx->adapter->name, alg_data->base, alg_data->irq);
 649
 650         return 0;
 651
 652 out_irq:
 653         free_irq(alg_data->irq, i2c_pnx->adapter);
 654 out_clock:
 655         i2c_pnx->set_clock_stop(pdev);
 656 out_unmap:
 657         iounmap((void *)alg_data->ioaddr);
 658 out_release:
 659         release_mem_region(alg_data->base, I2C_PNX_REGION_SIZE);
 660 out_drvdata:
 661         platform_set_drvdata(pdev, NULL);
 662 out:
 663         return ret;
 664 }
 665
 666 static int __devexit i2c_pnx_remove(struct platform_device *pdev)
 667 {
 668         struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
 669         struct i2c_adapter *adap = i2c_pnx->adapter;
 670         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 671
 672         free_irq(alg_data->irq, i2c_pnx->adapter);
 673         i2c_del_adapter(adap);
 674         i2c_pnx->set_clock_stop(pdev);
 675         iounmap((void *)alg_data->ioaddr);
 676         release_mem_region(alg_data->base, I2C_PNX_REGION_SIZE);
 677         platform_set_drvdata(pdev, NULL);
 678
 679         return 0;
 680 }
 681
 682 static struct platform_driver i2c_pnx_driver = {
 683         .driver = {
 684                 .name = "pnx-i2c",
 685                 .owner = THIS_MODULE,
 686         },
 687         .probe = i2c_pnx_probe,
 688         .remove = __devexit_p(i2c_pnx_remove),
 689         .suspend = i2c_pnx_controller_suspend,
 690         .resume = i2c_pnx_controller_resume,
 691 };
 692
 693 static int __init i2c_adap_pnx_init(void)
 694 {
 695         return platform_driver_register(&i2c_pnx_driver);
 696 }
 697
 698 static void __exit i2c_adap_pnx_exit(void)
 699 {
 700         platform_driver_unregister(&i2c_pnx_driver);
 701 }
 702
 703 MODULE_AUTHOR("Vitaly Wool, Dennis Kovalev <source@mvista.com>");
 704 MODULE_DESCRIPTION("I2C driver for Philips IP3204-based I2C busses");
 705 MODULE_LICENSE("GPL");
 706 MODULE_ALIAS("platform:pnx-i2c");
 707
 708 /* We need to make sure I2C is initialized before USB */
 709 subsys_initcall(i2c_adap_pnx_init);
 710 module_exit(i2c_adap_pnx_exit);