nss/ipldev/entry.s

   1 /*
   2  * (C) Copyright 2007-2010  Josef 'Jeff' Sipek <jeffpc@josefsipek.net>
   3  *
   4  * This file is released under the GPLv2.  See the COPYING file for more
   5  * details.
   6  */
   7
   8         #
   9         # We are guaranteed the following:
  10         #
  11         # 1) we are located at 16M
  12         # 2) we are running in ESA/390
  13         # 3) we are in 31-bit addressing mode
  14         # 4) the guest registers are saved at GUEST_IPL_REGSAVE
  15         # 5) R1 contains the subchannel #
  16         # 6) R2 contains the device #
  17         #
  18         # Register usage:
  19         #
  20         #   R1  = subchannel number
  21         #   R2  = device number
  22         #   R3  = temp
  23         #   R12 = base for this code
  24         #
  25
  26         # Nice register names
  27 .equ    r0,0
  28 .equ    r1,1
  29 .equ    r2,2
  30 .equ    r3,3
  31 .equ    r12,12
  32 .equ    r15,15
  33
  34         # new IO interruption PSW address
  35 .equ    PSANEWIO,120
  36
  37 ###############################################################################
  38 # Code begins here                                                            #
  39 ###############################################################################
  40 .text
  41
  42 .globl START
  43         .type   START, @function
  44 START:
  45         LARL    r12,START
  46
  47         STSCH   SCHIB(r12)                      # get the SCHIB
  48         BNZ     ERROR(r12)
  49
  50         OI      SCHIB+5(r12),0x80               # enable the subchannel
  51
  52         MSCH    SCHIB(r12)                      # load up the SCHIB
  53         BNZ     ERROR(r12)
  54
  55         # got a functioning subchannel, let's set up the new IO psw
  56
  57         MVC     PSANEWIO(8,r0),IOPSW(r12)
  58
  59         L       r3,PSANEWIO+4(r0,r0)
  60         LA      r3,IO(r3,r12)                   # calculate the address of
  61         ST      r3,PSANEWIO+4(r0,r0)            # the IO handler
  62
  63         # let's set up a CCW + an ORB, start the IO, and wait
  64
  65         MVC     0(8,r0),INITCCW(r12)            # set up the initial CCW
  66         OI      ORB+6(r12),0xff                 # set the LPM in the ORB
  67
  68         SSCH    ORB(r12)                        # start the IO
  69         BNZ     ERROR(r12)
  70
  71         LPSW    ENABLEDWAIT(r12)                # wait for IO interruptions
  72
  73 .equ    IO,(.-START)
  74         # this is the IO interrupt handler
  75
  76         B       DONE(r12)
  77
  78 .equ    ERROR,(.-START)
  79         # an error occured, return an error
  80
  81         LM      r0,r15,REGSAVE(r12)
  82         DIAG    r0,r0,1                         # return to hypervisor
  83
  84 .equ    DONE,(.-START)
  85         # we were successful!
  86
  87         LM      r0,r15,REGSAVE(r12)
  88         DIAG    r0,r0,0                         # return to hypervisor
  89
  90 ###############################################################################
  91 # Data begins here                                                            #
  92 ###############################################################################
  93 .equ    DISABLEDWAIT,(.-START)
  94         .long   0x000c0000
  95         .long   0x80000000                      # disabled wait PSW; signal
  96                                                 # return to hypervisor
  97 .equ    ENABLEDWAIT,(.-START)
  98         .long   0x020c0000
  99         .long   0x80000000                      # enabled wait PSW; wait for IO
 100
 101 .equ    IOPSW,(.-START)
 102         .long   0x00080000
 103         .long   0x80000000                      # new IO psw
 104
 105 .equ    INITCCW,(.-START)
 106         .long   0x02000000
 107         .long   0x60000018                      # fmt0, read 24 bytes to addr 0
 108
 109         .align 4
 110 .equ    ORB,(.-START)
 111         .skip   (8*4),0                         # the ORB is BIG
 112
 113         .align 4
 114 .equ    SCHIB,(.-START)
 115         .skip   (13*4),0                        # the SCHIB is BIG
 116
 117         .align 4
 118 .globl GUEST_IPL_REGSAVE
 119         .type   GUEST_IPL_REGSAVE, @function
 120 GUEST_IPL_REGSAVE:
 121 .equ    REGSAVE,(.-START)                       # register save area