lib/main/STM32_USB_OTG_Driver/src/usb_otg.c

   1 /**
   2   ******************************************************************************
   3   * @file    usb_otg.c
   4   * @author  MCD Application Team
   5   * @version V2.2.0
   6   * @date    09-November-2015
   7   * @brief   OTG Core Layer
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
  12   *
  13   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  14   * You may not use this file except in compliance with the License.
  15   * You may obtain a copy of the License at:
  16   *
  17   *        http://www.st.com/software_license_agreement_liberty_v2
  18   *
  19   * Unless required by applicable law or agreed to in writing, software
  20   * distributed under the License is distributed on an "AS IS" BASIS,
  21   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  22   * See the License for the specific language governing permissions and
  23   * limitations under the License.
  24   *
  25   ******************************************************************************
  26   */
  27
  28 /* Includes ------------------------------------------------------------------*/
  29 #include "usb_defines.h"
  30 #include "usb_regs.h"
  31 #include "usb_core.h"
  32 #include "usb_otg.h"
  33
  34 /** @addtogroup USB_OTG_DRIVER
  35   * @{
  36   */
  37
  38 /** @defgroup USB_OTG
  39   * @brief This file is the interface between EFSL ans Host mass-storage class
  40   * @{
  41   */
  42
  43
  44 /** @defgroup USB_OTG_Private_Defines
  45   * @{
  46   */
  47 /**
  48   * @}
  49   */
  50
  51
  52 /** @defgroup USB_OTG_Private_TypesDefinitions
  53   * @{
  54   */
  55 /**
  56   * @}
  57   */
  58
  59
  60
  61 /** @defgroup USB_OTG_Private_Macros
  62   * @{
  63   */
  64 /**
  65   * @}
  66   */
  67
  68
  69 /** @defgroup USB_OTG_Private_Variables
  70   * @{
  71   */
  72 /**
  73   * @}
  74   */
  75
  76
  77 /** @defgroup USB_OTG_Private_FunctionPrototypes
  78   * @{
  79   */
  80
  81 uint32_t USB_OTG_HandleOTG_ISR(USB_OTG_CORE_HANDLE *pdev);
  82
  83 static uint32_t USB_OTG_HandleConnectorIDStatusChange_ISR(USB_OTG_CORE_HANDLE *pdev);
  84 static uint32_t USB_OTG_HandleSessionRequest_ISR(USB_OTG_CORE_HANDLE *pdev);
  85 static uint32_t USB_OTG_Read_itr(USB_OTG_CORE_HANDLE *pdev);
  86
  87 /**
  88   * @}
  89   */
  90
  91
  92 /** @defgroup USB_OTG_Private_Functions
  93   * @{
  94   */
  95
  96
  97 /*                           OTG Interrupt Handler                         */
  98
  99
 100 /**
 101   * @brief  STM32_USBO_OTG_ISR_Handler
 102   *
 103   * @param  None
 104   * @retval : None
 105   */
 106 uint32_t STM32_USBO_OTG_ISR_Handler(USB_OTG_CORE_HANDLE *pdev)
 107 {
 108   uint32_t retval = 0;
 109   USB_OTG_GINTSTS_TypeDef  gintsts ;
 110   gintsts.d32 = 0;
 111
 112   gintsts.d32 = USB_OTG_Read_itr(pdev);
 113   if (gintsts.d32 == 0)
 114   {
 115     return 0;
 116   }
 117   if (gintsts.b.otgintr)
 118   {
 119     retval |= USB_OTG_HandleOTG_ISR(pdev);
 120   }
 121   if (gintsts.b.conidstschng)
 122   {
 123     retval |= USB_OTG_HandleConnectorIDStatusChange_ISR(pdev);
 124   }
 125   if (gintsts.b.sessreqintr)
 126   {
 127     retval |= USB_OTG_HandleSessionRequest_ISR(pdev);
 128   }
 129   return retval;
 130 }
 131
 132
 133 /**
 134   * @brief  USB_OTG_Read_itr
 135   *         returns the Core Interrupt register
 136   * @param  None
 137   * @retval : status
 138   */
 139 static uint32_t USB_OTG_Read_itr(USB_OTG_CORE_HANDLE *pdev)
 140 {
 141   USB_OTG_GINTSTS_TypeDef  gintsts;
 142   USB_OTG_GINTMSK_TypeDef  gintmsk;
 143   USB_OTG_GINTMSK_TypeDef  gintmsk_common;
 144
 145
 146   gintsts.d32 = 0;
 147   gintmsk.d32 = 0;
 148   gintmsk_common.d32 = 0;
 149
 150   /* OTG interrupts */
 151   gintmsk_common.b.sessreqintr = 1;
 152   gintmsk_common.b.conidstschng = 1;
 153   gintmsk_common.b.otgintr = 1;
 154
 155   gintsts.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GINTSTS);
 156   gintmsk.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GINTMSK);
 157   return ((gintsts.d32 & gintmsk.d32 ) & gintmsk_common.d32);
 158 }
 159
 160
 161 /**
 162   * @brief  USB_OTG_HandleOTG_ISR
 163   *         handles the OTG Interrupts
 164   * @param  None
 165   * @retval : status
 166   */
 167 static uint32_t USB_OTG_HandleOTG_ISR(USB_OTG_CORE_HANDLE *pdev)
 168 {
 169   USB_OTG_GOTGINT_TypeDef  gotgint;
 170   USB_OTG_GOTGCTL_TypeDef  gotgctl;
 171
 172
 173   gotgint.d32 = 0;
 174   gotgctl.d32 = 0;
 175
 176   gotgint.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGINT);
 177   gotgctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGCTL);
 178
 179   if (gotgint.b.sesenddet)
 180   {
 181     gotgctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGCTL);
 182
 183
 184     if (USB_OTG_IsDeviceMode(pdev))
 185     {
 186
 187     }
 188     else if (USB_OTG_IsHostMode(pdev))
 189     {
 190
 191     }
 192   }
 193
 194   /* ----> SRP SUCCESS or FAILURE INTERRUPT <---- */
 195   if (gotgint.b.sesreqsucstschng)
 196   {
 197     gotgctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGCTL);
 198     if (gotgctl.b.sesreqscs) /* Session request success                                          */
 199     {
 200       if (USB_OTG_IsDeviceMode(pdev))
 201       {
 202
 203       }
 204       /* Clear Session Request */
 205       gotgctl.d32 = 0;
 206       gotgctl.b.sesreq = 1;
 207       USB_OTG_MODIFY_REG32(&pdev->regs.GREGS->GOTGCTL, gotgctl.d32, 0);
 208     }
 209     else /* Session request failure                                          */
 210     {
 211       if (USB_OTG_IsDeviceMode(pdev))
 212       {
 213
 214       }
 215     }
 216   }
 217   /* ----> HNP SUCCESS or FAILURE INTERRUPT <---- */
 218   if (gotgint.b.hstnegsucstschng)
 219   {
 220     gotgctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGCTL);
 221
 222     if (gotgctl.b.hstnegscs)                                    /* Host negotiation success                                         */
 223     {
 224       if (USB_OTG_IsHostMode(pdev))                              /* The core AUTOMATICALLY sets the Host mode                        */
 225       {
 226
 227       }
 228     }
 229     else                                                        /* Host negotiation failure */
 230     {
 231
 232     }
 233     gotgint.b.hstnegsucstschng = 1;                             /* Ack "Host Negotiation Success Status Change" interrupt.          */
 234   }
 235   /* ----> HOST NEGOTIATION DETECTED INTERRUPT <---- */
 236   if (gotgint.b.hstnegdet)
 237   {
 238     if (USB_OTG_IsDeviceMode(pdev))                              /* The core AUTOMATICALLY sets the Host mode                        */
 239     {
 240
 241     }
 242     else
 243     {
 244
 245     }
 246   }
 247   if (gotgint.b.adevtoutchng)
 248   {}
 249   if (gotgint.b.debdone)
 250   {
 251     USB_OTG_ResetPort(pdev);
 252   }
 253   /* Clear OTG INT */
 254   USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GOTGINT, gotgint.d32);
 255   return 1;
 256 }
 257
 258
 259 /**
 260   * @brief  USB_OTG_HandleConnectorIDStatusChange_ISR
 261   *         handles the Connector ID Status Change Interrupt
 262   * @param  None
 263   * @retval : status
 264   */
 265 static uint32_t USB_OTG_HandleConnectorIDStatusChange_ISR(USB_OTG_CORE_HANDLE *pdev)
 266 {
 267   USB_OTG_GINTMSK_TypeDef  gintmsk;
 268   USB_OTG_GOTGCTL_TypeDef   gotgctl;
 269   USB_OTG_GINTSTS_TypeDef  gintsts;
 270
 271   gintsts.d32 = 0 ;
 272   gintmsk.d32 = 0 ;
 273   gotgctl.d32 = 0 ;
 274   gintmsk.b.sofintr = 1;
 275
 276   USB_OTG_MODIFY_REG32(&pdev->regs.GREGS->GINTMSK, gintmsk.d32, 0);
 277   gotgctl.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GOTGCTL);
 278
 279   /* B-Device connector (Device Mode) */
 280   if (gotgctl.b.conidsts)
 281   {
 282     USB_OTG_DisableGlobalInt(pdev);
 283     USB_OTG_CoreInitDev(pdev);
 284     USB_OTG_EnableGlobalInt(pdev);
 285     pdev->otg.OTG_State = B_PERIPHERAL;
 286   }
 287   else
 288   {
 289     USB_OTG_DisableGlobalInt(pdev);
 290     USB_OTG_CoreInitHost(pdev);
 291     USB_OTG_EnableGlobalInt(pdev);
 292     pdev->otg.OTG_State = A_HOST;
 293   }
 294   /* Set flag and clear interrupt */
 295   gintsts.b.conidstschng = 1;
 296   USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GINTSTS, gintsts.d32);
 297   return 1;
 298 }
 299
 300
 301 /**
 302   * @brief  USB_OTG_HandleSessionRequest_ISR
 303   *           Initiating the Session Request Protocol
 304   * @param  None
 305   * @retval : status
 306   */
 307 static uint32_t USB_OTG_HandleSessionRequest_ISR(USB_OTG_CORE_HANDLE *pdev)
 308 {
 309   USB_OTG_GINTSTS_TypeDef  gintsts;
 310   USB_OTG_GOTGCTL_TypeDef   gotgctl;
 311
 312
 313   gotgctl.d32 = 0;
 314   gintsts.d32 = 0;
 315
 316   gotgctl.d32 = USB_OTG_READ_REG32( &pdev->regs.GREGS->GOTGCTL );
 317   if (USB_OTG_IsDeviceMode(pdev) && (gotgctl.b.bsesvld))
 318   {
 319
 320   }
 321   else if (gotgctl.b.asesvld)
 322   {
 323   }
 324   /* Clear interrupt */
 325   gintsts.d32 = 0;
 326   gintsts.b.sessreqintr = 1;
 327   USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GINTSTS, gintsts.d32);
 328   return 1;
 329 }
 330
 331
 332 /**
 333   * @brief  USB_OTG_InitiateSRP
 334   *         Initiate an srp session
 335   * @param  None
 336   * @retval : None
 337   */
 338 void USB_OTG_InitiateSRP(USB_OTG_CORE_HANDLE *pdev)
 339 {
 340   USB_OTG_GOTGCTL_TypeDef  otgctl;
 341
 342   otgctl.d32 = 0;
 343
 344   otgctl.d32 = USB_OTG_READ_REG32( &pdev->regs.GREGS->GOTGCTL );
 345   if (otgctl.b.sesreq)
 346   {
 347     return; /* SRP in progress */
 348   }
 349   otgctl.b.sesreq = 1;
 350   USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GOTGCTL, otgctl.d32);
 351 }
 352
 353
 354 /**
 355   * @brief  USB_OTG_InitiateHNP
 356   *         Initiate HNP
 357   * @param  None
 358   * @retval : None
 359   */
 360 void USB_OTG_InitiateHNP(USB_OTG_CORE_HANDLE *pdev , uint8_t state, uint8_t mode)
 361 {
 362   USB_OTG_GOTGCTL_TypeDef   otgctl;
 363   USB_OTG_HPRT0_TypeDef    hprt0;
 364
 365   otgctl.d32 = 0;
 366   hprt0.d32  = 0;
 367
 368   otgctl.d32 = USB_OTG_READ_REG32( &pdev->regs.GREGS->GOTGCTL );
 369   if (mode)
 370   { /* Device mode */
 371     if (state)
 372     {
 373
 374       otgctl.b.devhnpen = 1; /* B-Dev has been enabled to perform HNP         */
 375       otgctl.b.hnpreq   = 1; /* Initiate an HNP req. to the connected USB host*/
 376       USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GOTGCTL, otgctl.d32);
 377     }
 378   }
 379   else
 380   { /* Host mode */
 381     if (state)
 382     {
 383       otgctl.b.hstsethnpen = 1; /* A-Dev has enabled B-device for HNP       */
 384       USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GOTGCTL, otgctl.d32);
 385       /* Suspend the bus so that B-dev will disconnect indicating the initial condition for HNP to DWC_Core */
 386       hprt0.d32  = USB_OTG_ReadHPRT0(pdev);
 387       hprt0.b.prtsusp = 1; /* The core clear this bit when disconnect interrupt generated (GINTSTS.DisconnInt = '1') */
 388       USB_OTG_WRITE_REG32(pdev->regs.HPRT0, hprt0.d32);
 389     }
 390   }
 391 }
 392
 393
 394 /**
 395   * @brief  USB_OTG_GetCurrentState
 396   *         Return current OTG State
 397   * @param  None
 398   * @retval : None
 399   */
 400 uint32_t USB_OTG_GetCurrentState (USB_OTG_CORE_HANDLE *pdev)
 401 {
 402   return pdev->otg.OTG_State;
 403 }
 404
 405
 406 /**
 407 * @}
 408 */
 409
 410 /**
 411 * @}
 412 */
 413
 414 /**
 415 * @}
 416 */
 417
 418 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/