2 ******************************************************************************
4 * @author MCD Application Team
6 * @date 09-November-2015
7 * @brief Header of the Core Layer
8 ******************************************************************************
11 * <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
13 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
14 * You may not use this file except in compliance with the License.
15 * You may obtain a copy of the License at:
17 * http://www.st.com/software_license_agreement_liberty_v2
19 * Unless required by applicable law or agreed to in writing, software
20 * distributed under the License is distributed on an "AS IS" BASIS,
21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the License for the specific language governing permissions and
23 * limitations under the License.
25 ******************************************************************************
28 /* Define to prevent recursive inclusion -------------------------------------*/
32 /* Includes ------------------------------------------------------------------*/
35 /** @addtogroup USB_OTG_DRIVER
39 /** @defgroup USB_DEFINES
40 * @brief This file is the
45 /** @defgroup USB_DEFINES_Exported_Defines
53 /** @defgroup _CORE_DEFINES_
57 #define USB_OTG_SPEED_PARAM_HIGH 0
58 #define USB_OTG_SPEED_PARAM_HIGH_IN_FULL 1
59 #define USB_OTG_SPEED_PARAM_FULL 3
61 #define USB_OTG_SPEED_HIGH 0
62 #define USB_OTG_SPEED_FULL 1
64 #define USB_OTG_ULPI_PHY 1
65 #define USB_OTG_EMBEDDED_PHY 2
72 /** @defgroup _GLOBAL_DEFINES_
75 #define GAHBCFG_TXFEMPTYLVL_EMPTY 1
76 #define GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0
77 #define GAHBCFG_GLBINT_ENABLE 1
78 #define GAHBCFG_INT_DMA_BURST_SINGLE 0
79 #define GAHBCFG_INT_DMA_BURST_INCR 1
80 #define GAHBCFG_INT_DMA_BURST_INCR4 3
81 #define GAHBCFG_INT_DMA_BURST_INCR8 5
82 #define GAHBCFG_INT_DMA_BURST_INCR16 7
83 #define GAHBCFG_DMAENABLE 1
84 #define GAHBCFG_TXFEMPTYLVL_EMPTY 1
85 #define GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0
86 #define GRXSTS_PKTSTS_IN 2
87 #define GRXSTS_PKTSTS_IN_XFER_COMP 3
88 #define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5
89 #define GRXSTS_PKTSTS_CH_HALTED 7
95 /** @defgroup _OnTheGo_DEFINES_
98 #define MODE_HNP_SRP_CAPABLE 0
99 #define MODE_SRP_ONLY_CAPABLE 1
100 #define MODE_NO_HNP_SRP_CAPABLE 2
101 #define MODE_SRP_CAPABLE_DEVICE 3
102 #define MODE_NO_SRP_CAPABLE_DEVICE 4
103 #define MODE_SRP_CAPABLE_HOST 5
104 #define MODE_NO_SRP_CAPABLE_HOST 6
107 #define A_PERIPHERAL 3
108 #define B_PERIPHERAL 4
110 #define DEVICE_MODE 0
118 /** @defgroup __DEVICE_DEFINES_
121 #define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ 0
122 #define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ 1
123 #define DSTS_ENUMSPD_LS_PHY_6MHZ 2
124 #define DSTS_ENUMSPD_FS_PHY_48MHZ 3
126 #define DCFG_FRAME_INTERVAL_80 0
127 #define DCFG_FRAME_INTERVAL_85 1
128 #define DCFG_FRAME_INTERVAL_90 2
129 #define DCFG_FRAME_INTERVAL_95 3
131 #define DEP0CTL_MPS_64 0
132 #define DEP0CTL_MPS_32 1
133 #define DEP0CTL_MPS_16 2
134 #define DEP0CTL_MPS_8 3
136 #define EP_SPEED_LOW 0
137 #define EP_SPEED_FULL 1
138 #define EP_SPEED_HIGH 2
140 #define EP_TYPE_CTRL 0
141 #define EP_TYPE_ISOC 1
142 #define EP_TYPE_BULK 2
143 #define EP_TYPE_INTR 3
144 #define EP_TYPE_MSK 3
146 #define STS_GOUT_NAK 1
147 #define STS_DATA_UPDT 2
148 #define STS_XFER_COMP 3
149 #define STS_SETUP_COMP 4
150 #define STS_SETUP_UPDT 6
156 /** @defgroup __HOST_DEFINES_
159 #define HC_PID_DATA0 0
160 #define HC_PID_DATA2 1
161 #define HC_PID_DATA1 2
162 #define HC_PID_SETUP 3
164 #define HPRT0_PRTSPD_HIGH_SPEED 0
165 #define HPRT0_PRTSPD_FULL_SPEED 1
166 #define HPRT0_PRTSPD_LOW_SPEED 2
168 #define HCFG_30_60_MHZ 0
169 #define HCFG_48_MHZ 1
172 #define HCCHAR_CTRL 0
173 #define HCCHAR_ISOC 1
174 #define HCCHAR_BULK 2
175 #define HCCHAR_INTR 3
178 #define MIN(a, b) (((a) < (b)) ? (a) : (b))
186 /** @defgroup USB_DEFINES_Exported_Types
192 USB_OTG_HS_CORE_ID
= 0,
193 USB_OTG_FS_CORE_ID
= 1
194 }USB_OTG_CORE_ID_TypeDef
;
200 /** @defgroup USB_DEFINES_Exported_Macros
207 /** @defgroup USB_DEFINES_Exported_Variables
214 /** @defgroup USB_DEFINES_Exported_FunctionsPrototype
222 /** @defgroup Internal_Macro's
225 #define USB_OTG_READ_REG32(reg) (*(__IO uint32_t *)(reg))
226 #define USB_OTG_WRITE_REG32(reg,value) (*(__IO uint32_t *)(reg) = (value))
227 #define USB_OTG_MODIFY_REG32(reg,clear_mask,set_mask) \
228 USB_OTG_WRITE_REG32((reg), (((USB_OTG_READ_REG32(reg)) & ~(clear_mask)) | (set_mask)) )
230 /********************************************************************************
232 ********************************************************************************/
234 USB_SPEED_UNKNOWN
= 0,
240 #endif /* __USB_DEFINES__H__ */
250 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/