Merge branch 'master' into abo_stats_pages_auto_swap
[inav.git] / src / main / startup / startup_stm32f3_debug_hardfault_handler.S
blobc77b1acd734885b0e9f5606e5996dc72608feea3
1 /**
2   ******************************************************************************
3   * @file      startup_stm32f30x.s
4   * @author    MCD Application Team
5   * @version   V1.0.0
6   * @date      04-Spetember-2012
7   * @brief     STM32F30x Devices vector table for RIDE7 toolchain.
8   *            This module performs:
9   *                - Set the initial SP
10   *                - Set the initial PC == Reset_Handler,
11   *                - Set the vector table entries with the exceptions ISR address
12   *                - Configure the clock system and the external SRAM mounted on
13   *                  STM3230C-EVAL board to be used as data memory (optional,
14   *                  to be enabled by user)
15   *                - Branches to main in the C library (which eventually
16   *                  calls main()).
17   *            After Reset the Cortex-M4 processor is in Thread mode,
18   *            priority is Privileged, and the Stack is set to Main.
19   ******************************************************************************
20   * @attention
21   *
22   * <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
23   *
24   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
25   * You may not use this file except in compliance with the License.
26   * You may obtain a copy of the License at:
27   *
28   *        http://www.st.com/software_license_agreement_liberty_v2
29   *
30   * Unless required by applicable law or agreed to in writing, software
31   * distributed under the License is distributed on an "AS IS" BASIS,
32   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
33   * See the License for the specific language governing permissions and
34   * limitations under the License.
35   *
36   ******************************************************************************
37   */
39   .syntax unified
40   .cpu cortex-m4
41   .fpu softvfp
42   .thumb
44 .global  g_pfnVectors
45 .global  Default_Handler
47 .global HardFault_Handler
48 .extern hard_fault_handler_c
50 /* start address for the initialization values of the .data section.
51 defined in linker script */
52 .word  _sidata
53 /* start address for the .data section. defined in linker script */
54 .word  _sdata
55 /* end address for the .data section. defined in linker script */
56 .word  _edata
57 /* start address for the .bss section. defined in linker script */
58 .word  _sbss
59 /* end address for the .bss section. defined in linker script */
60 .word  _ebss
61 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
63 /**
64  * @brief  This is the code that gets called when the processor first
65  *          starts execution following a reset event. Only the absolutely
66  *          necessary set is performed, after which the application
67  *          supplied main() routine is called.
68  * @param  None
69  * @retval : None
72     .section  .text.Reset_Handler
73   .weak  Reset_Handler
74   .type  Reset_Handler, %function
75 Reset_Handler:
76   ldr r0, =0x20009FFC         // HJI 11/9/2012
77   ldr r1, =0xDEADBEEF         // HJI 11/9/2012
78   ldr r2, [r0, #0]            // HJI 11/9/2012
79   str r0, [r0, #0]            // HJI 11/9/2012
80   cmp r2, r1                  // HJI 11/9/2012
81   beq Reboot_Loader           // HJI 11/9/2012
83 /* Copy the data segment initializers from flash to SRAM */
84   movs  r1, #0
85   b  LoopCopyDataInit
87 CopyDataInit:
88   ldr  r3, =_sidata
89   ldr  r3, [r3, r1]
90   str  r3, [r0, r1]
91   adds  r1, r1, #4
93 LoopCopyDataInit:
94   ldr  r0, =_sdata
95   ldr  r3, =_edata
96   adds  r2, r0, r1
97   cmp  r2, r3
98   bcc  CopyDataInit
99   ldr  r2, =_sbss
100   b  LoopFillZerobss
101 /* Zero fill the bss segment. */
102 FillZerobss:
103   movs  r3, #0
104   str  r3, [r2], #4
106 LoopFillZerobss:
107   ldr  r3, = _ebss
108   cmp  r2, r3
109   bcc  FillZerobss
111 /* Zero fill FASTRAM */ 
112   ldr  r2, =__fastram_bss_start__
113   b  LoopFillZeroFASTRAM
115 FillZeroFASTRAM:
116   movs  r3, #0
117   str  r3, [r2], #4
118    
119 LoopFillZeroFASTRAM:
120   ldr  r3, = __fastram_bss_end__
121   cmp  r2, r3
122   bcc  FillZeroFASTRAM
124 /* Mark the heap and stack */
125     ldr r2, =_heap_stack_begin
126     b   LoopMarkHeapStack
128 MarkHeapStack:
129         movs    r3, 0xa5a5a5a5
130         str     r3, [r2], #4
132 LoopMarkHeapStack:
133         ldr     r3, = _heap_stack_end
134         cmp     r2, r3
135         bcc     MarkHeapStack
137 /* Call the clock system intitialization function.*/
138   bl  SystemInit
139 /* Call the application's entry point.*/
140   bl  main
141   bx  lr
143 LoopForever:
144   b LoopForever
146 Reboot_Loader:                // HJI 11/9/2012
148   // Reboot to ROM            // HJI 11/9/2012
149   ldr     r0, =0x1FFFD800     // HJI 4/26/2013
150   ldr     sp,[r0, #0]         // HJI 11/9/2012
151   ldr     r0,[r0, #4]         // HJI 11/9/2012
152   bx      r0                  // HJI 11/9/2012
154 .size  Reset_Handler, .-Reset_Handler
156 .section  .text.Reset_Handler
157 .weak  HardFault_Handler
158 .type  HardFault_Handler, %function
159 HardFault_Handler:
160   movs r0,#4
161   movs r1, lr
162   tst r0, r1
163   beq _MSP
164   mrs r0, psp
165   b _HALT
166 _MSP:
167   mrs r0, msp
168 _HALT:
169   ldr r1,[r0,#20]
170   b hard_fault_handler_c
171   bkpt #0
173 .size  HardFault_Handler, .-HardFault_Handler
176  * @brief  This is the code that gets called when the processor receives an
177  *         unexpected interrupt.  This simply enters an infinite loop, preserving
178  *         the system state for examination by a debugger.
179  * @param  None
180  * @retval None
182     .section  .text.Default_Handler,"ax",%progbits
183 Default_Handler:
184 Infinite_Loop:
185   b  Infinite_Loop
186   .size  Default_Handler, .-Default_Handler
187 /******************************************************************************
189 * The minimal vector table for a Cortex M4. Note that the proper constructs
190 * must be placed on this to ensure that it ends up at physical address
191 * 0x0000.0000.
193 *******************************************************************************/
194    .section  .isr_vector,"a",%progbits
195   .type  g_pfnVectors, %object
196   .size  g_pfnVectors, .-g_pfnVectors
198 g_pfnVectors:
199         .word   _estack
200         .word   Reset_Handler
201         .word   NMI_Handler
202         .word   HardFault_Handler
203         .word   MemManage_Handler
204         .word   BusFault_Handler
205         .word   UsageFault_Handler
206         .word   0
207         .word   0
208         .word   0
209         .word   0
210         .word   SVC_Handler
211         .word   DebugMon_Handler
212         .word   0
213         .word   PendSV_Handler
214         .word   SysTick_Handler
215         .word   WWDG_IRQHandler
216         .word   PVD_IRQHandler
217         .word   TAMPER_STAMP_IRQHandler
218         .word   RTC_WKUP_IRQHandler
219         .word   FLASH_IRQHandler
220         .word   RCC_IRQHandler
221         .word   EXTI0_IRQHandler
222         .word   EXTI1_IRQHandler
223         .word   EXTI2_TS_IRQHandler
224         .word   EXTI3_IRQHandler
225         .word   EXTI4_IRQHandler
226         .word   DMA1_Channel1_IRQHandler
227         .word   DMA1_Channel2_IRQHandler
228         .word   DMA1_Channel3_IRQHandler
229         .word   DMA1_Channel4_IRQHandler
230         .word   DMA1_Channel5_IRQHandler
231         .word   DMA1_Channel6_IRQHandler
232         .word   DMA1_Channel7_IRQHandler
233         .word   ADC1_2_IRQHandler
234         .word   USB_HP_CAN1_TX_IRQHandler
235         .word   USB_LP_CAN1_RX0_IRQHandler
236         .word   CAN1_RX1_IRQHandler
237         .word   CAN1_SCE_IRQHandler
238         .word   EXTI9_5_IRQHandler
239         .word   TIM1_BRK_TIM15_IRQHandler
240         .word   TIM1_UP_TIM16_IRQHandler
241         .word   TIM1_TRG_COM_TIM17_IRQHandler
242         .word   TIM1_CC_IRQHandler
243         .word   TIM2_IRQHandler
244         .word   TIM3_IRQHandler
245         .word   TIM4_IRQHandler
246         .word   I2C1_EV_IRQHandler
247         .word   I2C1_ER_IRQHandler
248         .word   I2C2_EV_IRQHandler
249         .word   I2C2_ER_IRQHandler
250         .word   SPI1_IRQHandler
251         .word   SPI2_IRQHandler
252         .word   USART1_IRQHandler
253         .word   USART2_IRQHandler
254         .word   USART3_IRQHandler
255         .word   EXTI15_10_IRQHandler
256         .word   RTC_Alarm_IRQHandler
257         .word   USBWakeUp_IRQHandler
258         .word   TIM8_BRK_IRQHandler
259         .word   TIM8_UP_IRQHandler
260         .word   TIM8_TRG_COM_IRQHandler
261         .word   TIM8_CC_IRQHandler
262         .word   ADC3_IRQHandler
263         .word   0
264         .word   0
265         .word   0
266         .word   SPI3_IRQHandler
267         .word   UART4_IRQHandler
268         .word   UART5_IRQHandler
269         .word   TIM6_DAC_IRQHandler
270         .word   TIM7_IRQHandler
271         .word   DMA2_Channel1_IRQHandler
272         .word   DMA2_Channel2_IRQHandler
273         .word   DMA2_Channel3_IRQHandler
274         .word   DMA2_Channel4_IRQHandler
275         .word   DMA2_Channel5_IRQHandler
276         .word   ADC4_IRQHandler
277         .word   0
278         .word   0
279         .word   COMP1_2_3_IRQHandler
280         .word   COMP4_5_6_IRQHandler
281         .word   COMP7_IRQHandler
282         .word   0
283         .word   0
284         .word   0
285         .word   0
286         .word   0
287         .word   0
288         .word   0
289         .word   USB_HP_IRQHandler
290         .word   USB_LP_IRQHandler
291         .word   USBWakeUp_RMP_IRQHandler
292         .word   0
293         .word   0
294         .word   0
295         .word   0
296         .word   FPU_IRQHandler
298 /*******************************************************************************
300 * Provide weak aliases for each Exception handler to the Default_Handler.
301 * As they are weak aliases, any function with the same name will override
302 * this definition.
304 *******************************************************************************/
306   .weak NMI_Handler
307         .thumb_set NMI_Handler,Default_Handler
309   .weak MemManage_Handler
310         .thumb_set MemManage_Handler,Default_Handler
312   .weak BusFault_Handler
313         .thumb_set BusFault_Handler,Default_Handler
315         .weak   UsageFault_Handler
316         .thumb_set UsageFault_Handler,Default_Handler
318         .weak   SVC_Handler
319         .thumb_set SVC_Handler,Default_Handler
321         .weak   DebugMon_Handler
322         .thumb_set DebugMon_Handler,Default_Handler
324         .weak   PendSV_Handler
325         .thumb_set PendSV_Handler,Default_Handler
327         .weak   SysTick_Handler
328         .thumb_set SysTick_Handler,Default_Handler
330         .weak   WWDG_IRQHandler
331         .thumb_set WWDG_IRQHandler,Default_Handler
333         .weak   PVD_IRQHandler
334         .thumb_set PVD_IRQHandler,Default_Handler
336         .weak   TAMPER_STAMP_IRQHandler
337         .thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
339         .weak   RTC_WKUP_IRQHandler
340         .thumb_set RTC_WKUP_IRQHandler,Default_Handler
342         .weak   FLASH_IRQHandler
343         .thumb_set FLASH_IRQHandler,Default_Handler
345         .weak   RCC_IRQHandler
346         .thumb_set RCC_IRQHandler,Default_Handler
348         .weak   EXTI0_IRQHandler
349         .thumb_set EXTI0_IRQHandler,Default_Handler
351         .weak   EXTI1_IRQHandler
352         .thumb_set EXTI1_IRQHandler,Default_Handler
354         .weak   EXTI2_TS_IRQHandler
355         .thumb_set EXTI2_TS_IRQHandler,Default_Handler
357         .weak   EXTI3_IRQHandler
358         .thumb_set EXTI3_IRQHandler,Default_Handler
360         .weak   EXTI4_IRQHandler
361         .thumb_set EXTI4_IRQHandler,Default_Handler
363         .weak   DMA1_Channel1_IRQHandler
364         .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
366         .weak   DMA1_Channel2_IRQHandler
367         .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
369         .weak   DMA1_Channel3_IRQHandler
370         .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
372         .weak   DMA1_Channel4_IRQHandler
373         .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
375         .weak   DMA1_Channel5_IRQHandler
376         .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
378         .weak   DMA1_Channel6_IRQHandler
379         .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
381         .weak   DMA1_Channel7_IRQHandler
382         .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
384         .weak   ADC1_2_IRQHandler
385         .thumb_set ADC1_2_IRQHandler,Default_Handler
387         .weak   USB_HP_CAN1_TX_IRQHandler
388         .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
390         .weak   USB_LP_CAN1_RX0_IRQHandler
391         .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
393         .weak   CAN1_RX1_IRQHandler
394         .thumb_set CAN1_RX1_IRQHandler,Default_Handler
396         .weak   CAN1_SCE_IRQHandler
397         .thumb_set CAN1_SCE_IRQHandler,Default_Handler
399         .weak   EXTI9_5_IRQHandler
400         .thumb_set EXTI9_5_IRQHandler,Default_Handler
402         .weak   TIM1_BRK_TIM15_IRQHandler
403         .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
405         .weak   TIM1_UP_TIM16_IRQHandler
406         .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
408         .weak   TIM1_TRG_COM_TIM17_IRQHandler
409         .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
411         .weak   TIM1_CC_IRQHandler
412         .thumb_set TIM1_CC_IRQHandler,Default_Handler
414         .weak   TIM2_IRQHandler
415         .thumb_set TIM2_IRQHandler,Default_Handler
417         .weak   TIM3_IRQHandler
418         .thumb_set TIM3_IRQHandler,Default_Handler
420         .weak   TIM4_IRQHandler
421         .thumb_set TIM4_IRQHandler,Default_Handler
423         .weak   I2C1_EV_IRQHandler
424         .thumb_set I2C1_EV_IRQHandler,Default_Handler
426         .weak   I2C1_ER_IRQHandler
427         .thumb_set I2C1_ER_IRQHandler,Default_Handler
429         .weak   I2C2_EV_IRQHandler
430         .thumb_set I2C2_EV_IRQHandler,Default_Handler
432         .weak   I2C2_ER_IRQHandler
433         .thumb_set I2C2_ER_IRQHandler,Default_Handler
435         .weak   SPI1_IRQHandler
436         .thumb_set SPI1_IRQHandler,Default_Handler
438         .weak   SPI2_IRQHandler
439         .thumb_set SPI2_IRQHandler,Default_Handler
441         .weak   USART1_IRQHandler
442         .thumb_set USART1_IRQHandler,Default_Handler
444         .weak   USART2_IRQHandler
445         .thumb_set USART2_IRQHandler,Default_Handler
447         .weak   USART3_IRQHandler
448         .thumb_set USART3_IRQHandler,Default_Handler
450         .weak   EXTI15_10_IRQHandler
451         .thumb_set EXTI15_10_IRQHandler,Default_Handler
453         .weak   RTC_Alarm_IRQHandler
454         .thumb_set RTC_Alarm_IRQHandler,Default_Handler
456         .weak   USBWakeUp_IRQHandler
457         .thumb_set USBWakeUp_IRQHandler,Default_Handler
459         .weak   TIM8_BRK_IRQHandler
460         .thumb_set TIM8_BRK_IRQHandler,Default_Handler
462         .weak   TIM8_UP_IRQHandler
463         .thumb_set TIM8_UP_IRQHandler,Default_Handler
465         .weak   TIM8_TRG_COM_IRQHandler
466         .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
468         .weak   TIM8_CC_IRQHandler
469         .thumb_set TIM8_CC_IRQHandler,Default_Handler
471         .weak   ADC3_IRQHandler
472         .thumb_set ADC3_IRQHandler,Default_Handler
474         .weak   SPI3_IRQHandler
475         .thumb_set SPI3_IRQHandler,Default_Handler
477         .weak   UART4_IRQHandler
478         .thumb_set UART4_IRQHandler,Default_Handler
480         .weak   UART5_IRQHandler
481         .thumb_set UART5_IRQHandler,Default_Handler
483         .weak   TIM6_DAC_IRQHandler
484         .thumb_set TIM6_DAC_IRQHandler,Default_Handler
486         .weak   TIM7_IRQHandler
487         .thumb_set TIM7_IRQHandler,Default_Handler
489         .weak   DMA2_Channel1_IRQHandler
490         .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
492         .weak   DMA2_Channel2_IRQHandler
493         .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
495         .weak   DMA2_Channel3_IRQHandler
496         .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
498         .weak   DMA2_Channel4_IRQHandler
499         .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
501         .weak   DMA2_Channel5_IRQHandler
502         .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
504         .weak   ADC4_IRQHandler
505         .thumb_set ADC4_IRQHandler,Default_Handler
507         .weak   COMP1_2_3_IRQHandler
508         .thumb_set COMP1_2_3_IRQHandler,Default_Handler
510         .weak   COMP4_5_6_IRQHandler
511         .thumb_set COMP4_5_6_IRQHandler,Default_Handler
513         .weak   COMP7_IRQHandler
514         .thumb_set COMP7_IRQHandler,Default_Handler
516         .weak   USB_HP_IRQHandler
517         .thumb_set USB_HP_IRQHandler,Default_Handler
519         .weak   USB_LP_IRQHandler
520         .thumb_set USB_LP_IRQHandler,Default_Handler
522         .weak   USBWakeUp_RMP_IRQHandler
523         .thumb_set USBWakeUp_RMP_IRQHandler,Default_Handler
525         .weak   FPU_IRQHandler
526         .thumb_set FPU_IRQHandler,Default_Handler
527 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/