Include SD defines to support DJI module
[inav.git] / dev / svd / STM32F303.svd
blob9c2909c9ef8f824ca857ee78a21a823ddbc474f5
1 <?xml version="1.0" encoding="utf-8" standalone="no"?>
2 <device schemaVersion="1.1"
3 xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"
4 xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd">
5 <name>STM32F303</name>
6 <version>1.4</version>
7 <description>STM32F303</description>
8 <!-- details about the cpu embedded in the device -->
9 <cpu>
10 <name>CM4</name>
11 <revision>r1p0</revision>
12 <endian>little</endian>
13 <mpuPresent>false</mpuPresent>
14 <fpuPresent>false</fpuPresent>
15 <nvicPrioBits>3</nvicPrioBits>
16 <vendorSystickConfig>false</vendorSystickConfig>
17 </cpu>
18 <!--Bus Interface Properties-->
19 <!--Cortex-M4 is byte addressable-->
20 <addressUnitBits>8</addressUnitBits>
21 <!--the maximum data bit width accessible within a single transfer-->
22 <width>32</width>
23 <!--Register Default Properties-->
24 <size>0x20</size>
25 <resetValue>0x0</resetValue>
26 <resetMask>0xFFFFFFFF</resetMask>
27 <peripherals>
28 <peripheral>
29 <name>GPIOA</name>
30 <description>General-purpose I/Os</description>
31 <groupName>GPIO</groupName>
32 <baseAddress>0x48000000</baseAddress>
33 <addressBlock>
34 <offset>0x0</offset>
35 <size>0x400</size>
36 <usage>registers</usage>
37 </addressBlock>
38 <registers>
39 <register>
40 <name>MODER</name>
41 <displayName>MODER</displayName>
42 <description>GPIO port mode register</description>
43 <addressOffset>0x0</addressOffset>
44 <size>0x20</size>
45 <access>read-write</access>
46 <resetValue>0x28000000</resetValue>
47 <fields>
48 <field>
49 <name>MODER15</name>
50 <description>Port x configuration bits (y =
51 0..15)</description>
52 <bitOffset>30</bitOffset>
53 <bitWidth>2</bitWidth>
54 </field>
55 <field>
56 <name>MODER14</name>
57 <description>Port x configuration bits (y =
58 0..15)</description>
59 <bitOffset>28</bitOffset>
60 <bitWidth>2</bitWidth>
61 </field>
62 <field>
63 <name>MODER13</name>
64 <description>Port x configuration bits (y =
65 0..15)</description>
66 <bitOffset>26</bitOffset>
67 <bitWidth>2</bitWidth>
68 </field>
69 <field>
70 <name>MODER12</name>
71 <description>Port x configuration bits (y =
72 0..15)</description>
73 <bitOffset>24</bitOffset>
74 <bitWidth>2</bitWidth>
75 </field>
76 <field>
77 <name>MODER11</name>
78 <description>Port x configuration bits (y =
79 0..15)</description>
80 <bitOffset>22</bitOffset>
81 <bitWidth>2</bitWidth>
82 </field>
83 <field>
84 <name>MODER10</name>
85 <description>Port x configuration bits (y =
86 0..15)</description>
87 <bitOffset>20</bitOffset>
88 <bitWidth>2</bitWidth>
89 </field>
90 <field>
91 <name>MODER9</name>
92 <description>Port x configuration bits (y =
93 0..15)</description>
94 <bitOffset>18</bitOffset>
95 <bitWidth>2</bitWidth>
96 </field>
97 <field>
98 <name>MODER8</name>
99 <description>Port x configuration bits (y =
100 0..15)</description>
101 <bitOffset>16</bitOffset>
102 <bitWidth>2</bitWidth>
103 </field>
104 <field>
105 <name>MODER7</name>
106 <description>Port x configuration bits (y =
107 0..15)</description>
108 <bitOffset>14</bitOffset>
109 <bitWidth>2</bitWidth>
110 </field>
111 <field>
112 <name>MODER6</name>
113 <description>Port x configuration bits (y =
114 0..15)</description>
115 <bitOffset>12</bitOffset>
116 <bitWidth>2</bitWidth>
117 </field>
118 <field>
119 <name>MODER5</name>
120 <description>Port x configuration bits (y =
121 0..15)</description>
122 <bitOffset>10</bitOffset>
123 <bitWidth>2</bitWidth>
124 </field>
125 <field>
126 <name>MODER4</name>
127 <description>Port x configuration bits (y =
128 0..15)</description>
129 <bitOffset>8</bitOffset>
130 <bitWidth>2</bitWidth>
131 </field>
132 <field>
133 <name>MODER3</name>
134 <description>Port x configuration bits (y =
135 0..15)</description>
136 <bitOffset>6</bitOffset>
137 <bitWidth>2</bitWidth>
138 </field>
139 <field>
140 <name>MODER2</name>
141 <description>Port x configuration bits (y =
142 0..15)</description>
143 <bitOffset>4</bitOffset>
144 <bitWidth>2</bitWidth>
145 </field>
146 <field>
147 <name>MODER1</name>
148 <description>Port x configuration bits (y =
149 0..15)</description>
150 <bitOffset>2</bitOffset>
151 <bitWidth>2</bitWidth>
152 </field>
153 <field>
154 <name>MODER0</name>
155 <description>Port x configuration bits (y =
156 0..15)</description>
157 <bitOffset>0</bitOffset>
158 <bitWidth>2</bitWidth>
159 </field>
160 </fields>
161 </register>
162 <register>
163 <name>OTYPER</name>
164 <displayName>OTYPER</displayName>
165 <description>GPIO port output type register</description>
166 <addressOffset>0x4</addressOffset>
167 <size>0x20</size>
168 <access>read-write</access>
169 <resetValue>0x00000000</resetValue>
170 <fields>
171 <field>
172 <name>OT15</name>
173 <description>Port x configuration bits (y =
174 0..15)</description>
175 <bitOffset>15</bitOffset>
176 <bitWidth>1</bitWidth>
177 </field>
178 <field>
179 <name>OT14</name>
180 <description>Port x configuration bits (y =
181 0..15)</description>
182 <bitOffset>14</bitOffset>
183 <bitWidth>1</bitWidth>
184 </field>
185 <field>
186 <name>OT13</name>
187 <description>Port x configuration bits (y =
188 0..15)</description>
189 <bitOffset>13</bitOffset>
190 <bitWidth>1</bitWidth>
191 </field>
192 <field>
193 <name>OT12</name>
194 <description>Port x configuration bits (y =
195 0..15)</description>
196 <bitOffset>12</bitOffset>
197 <bitWidth>1</bitWidth>
198 </field>
199 <field>
200 <name>OT11</name>
201 <description>Port x configuration bits (y =
202 0..15)</description>
203 <bitOffset>11</bitOffset>
204 <bitWidth>1</bitWidth>
205 </field>
206 <field>
207 <name>OT10</name>
208 <description>Port x configuration bits (y =
209 0..15)</description>
210 <bitOffset>10</bitOffset>
211 <bitWidth>1</bitWidth>
212 </field>
213 <field>
214 <name>OT9</name>
215 <description>Port x configuration bits (y =
216 0..15)</description>
217 <bitOffset>9</bitOffset>
218 <bitWidth>1</bitWidth>
219 </field>
220 <field>
221 <name>OT8</name>
222 <description>Port x configuration bits (y =
223 0..15)</description>
224 <bitOffset>8</bitOffset>
225 <bitWidth>1</bitWidth>
226 </field>
227 <field>
228 <name>OT7</name>
229 <description>Port x configuration bits (y =
230 0..15)</description>
231 <bitOffset>7</bitOffset>
232 <bitWidth>1</bitWidth>
233 </field>
234 <field>
235 <name>OT6</name>
236 <description>Port x configuration bits (y =
237 0..15)</description>
238 <bitOffset>6</bitOffset>
239 <bitWidth>1</bitWidth>
240 </field>
241 <field>
242 <name>OT5</name>
243 <description>Port x configuration bits (y =
244 0..15)</description>
245 <bitOffset>5</bitOffset>
246 <bitWidth>1</bitWidth>
247 </field>
248 <field>
249 <name>OT4</name>
250 <description>Port x configuration bits (y =
251 0..15)</description>
252 <bitOffset>4</bitOffset>
253 <bitWidth>1</bitWidth>
254 </field>
255 <field>
256 <name>OT3</name>
257 <description>Port x configuration bits (y =
258 0..15)</description>
259 <bitOffset>3</bitOffset>
260 <bitWidth>1</bitWidth>
261 </field>
262 <field>
263 <name>OT2</name>
264 <description>Port x configuration bits (y =
265 0..15)</description>
266 <bitOffset>2</bitOffset>
267 <bitWidth>1</bitWidth>
268 </field>
269 <field>
270 <name>OT1</name>
271 <description>Port x configuration bits (y =
272 0..15)</description>
273 <bitOffset>1</bitOffset>
274 <bitWidth>1</bitWidth>
275 </field>
276 <field>
277 <name>OT0</name>
278 <description>Port x configuration bits (y =
279 0..15)</description>
280 <bitOffset>0</bitOffset>
281 <bitWidth>1</bitWidth>
282 </field>
283 </fields>
284 </register>
285 <register>
286 <name>OSPEEDR</name>
287 <displayName>OSPEEDR</displayName>
288 <description>GPIO port output speed
289 register</description>
290 <addressOffset>0x8</addressOffset>
291 <size>0x20</size>
292 <access>read-write</access>
293 <resetValue>0x00000000</resetValue>
294 <fields>
295 <field>
296 <name>OSPEEDR15</name>
297 <description>Port x configuration bits (y =
298 0..15)</description>
299 <bitOffset>30</bitOffset>
300 <bitWidth>2</bitWidth>
301 </field>
302 <field>
303 <name>OSPEEDR14</name>
304 <description>Port x configuration bits (y =
305 0..15)</description>
306 <bitOffset>28</bitOffset>
307 <bitWidth>2</bitWidth>
308 </field>
309 <field>
310 <name>OSPEEDR13</name>
311 <description>Port x configuration bits (y =
312 0..15)</description>
313 <bitOffset>26</bitOffset>
314 <bitWidth>2</bitWidth>
315 </field>
316 <field>
317 <name>OSPEEDR12</name>
318 <description>Port x configuration bits (y =
319 0..15)</description>
320 <bitOffset>24</bitOffset>
321 <bitWidth>2</bitWidth>
322 </field>
323 <field>
324 <name>OSPEEDR11</name>
325 <description>Port x configuration bits (y =
326 0..15)</description>
327 <bitOffset>22</bitOffset>
328 <bitWidth>2</bitWidth>
329 </field>
330 <field>
331 <name>OSPEEDR10</name>
332 <description>Port x configuration bits (y =
333 0..15)</description>
334 <bitOffset>20</bitOffset>
335 <bitWidth>2</bitWidth>
336 </field>
337 <field>
338 <name>OSPEEDR9</name>
339 <description>Port x configuration bits (y =
340 0..15)</description>
341 <bitOffset>18</bitOffset>
342 <bitWidth>2</bitWidth>
343 </field>
344 <field>
345 <name>OSPEEDR8</name>
346 <description>Port x configuration bits (y =
347 0..15)</description>
348 <bitOffset>16</bitOffset>
349 <bitWidth>2</bitWidth>
350 </field>
351 <field>
352 <name>OSPEEDR7</name>
353 <description>Port x configuration bits (y =
354 0..15)</description>
355 <bitOffset>14</bitOffset>
356 <bitWidth>2</bitWidth>
357 </field>
358 <field>
359 <name>OSPEEDR6</name>
360 <description>Port x configuration bits (y =
361 0..15)</description>
362 <bitOffset>12</bitOffset>
363 <bitWidth>2</bitWidth>
364 </field>
365 <field>
366 <name>OSPEEDR5</name>
367 <description>Port x configuration bits (y =
368 0..15)</description>
369 <bitOffset>10</bitOffset>
370 <bitWidth>2</bitWidth>
371 </field>
372 <field>
373 <name>OSPEEDR4</name>
374 <description>Port x configuration bits (y =
375 0..15)</description>
376 <bitOffset>8</bitOffset>
377 <bitWidth>2</bitWidth>
378 </field>
379 <field>
380 <name>OSPEEDR3</name>
381 <description>Port x configuration bits (y =
382 0..15)</description>
383 <bitOffset>6</bitOffset>
384 <bitWidth>2</bitWidth>
385 </field>
386 <field>
387 <name>OSPEEDR2</name>
388 <description>Port x configuration bits (y =
389 0..15)</description>
390 <bitOffset>4</bitOffset>
391 <bitWidth>2</bitWidth>
392 </field>
393 <field>
394 <name>OSPEEDR1</name>
395 <description>Port x configuration bits (y =
396 0..15)</description>
397 <bitOffset>2</bitOffset>
398 <bitWidth>2</bitWidth>
399 </field>
400 <field>
401 <name>OSPEEDR0</name>
402 <description>Port x configuration bits (y =
403 0..15)</description>
404 <bitOffset>0</bitOffset>
405 <bitWidth>2</bitWidth>
406 </field>
407 </fields>
408 </register>
409 <register>
410 <name>PUPDR</name>
411 <displayName>PUPDR</displayName>
412 <description>GPIO port pull-up/pull-down
413 register</description>
414 <addressOffset>0xC</addressOffset>
415 <size>0x20</size>
416 <access>read-write</access>
417 <resetValue>0x24000000</resetValue>
418 <fields>
419 <field>
420 <name>PUPDR15</name>
421 <description>Port x configuration bits (y =
422 0..15)</description>
423 <bitOffset>30</bitOffset>
424 <bitWidth>2</bitWidth>
425 </field>
426 <field>
427 <name>PUPDR14</name>
428 <description>Port x configuration bits (y =
429 0..15)</description>
430 <bitOffset>28</bitOffset>
431 <bitWidth>2</bitWidth>
432 </field>
433 <field>
434 <name>PUPDR13</name>
435 <description>Port x configuration bits (y =
436 0..15)</description>
437 <bitOffset>26</bitOffset>
438 <bitWidth>2</bitWidth>
439 </field>
440 <field>
441 <name>PUPDR12</name>
442 <description>Port x configuration bits (y =
443 0..15)</description>
444 <bitOffset>24</bitOffset>
445 <bitWidth>2</bitWidth>
446 </field>
447 <field>
448 <name>PUPDR11</name>
449 <description>Port x configuration bits (y =
450 0..15)</description>
451 <bitOffset>22</bitOffset>
452 <bitWidth>2</bitWidth>
453 </field>
454 <field>
455 <name>PUPDR10</name>
456 <description>Port x configuration bits (y =
457 0..15)</description>
458 <bitOffset>20</bitOffset>
459 <bitWidth>2</bitWidth>
460 </field>
461 <field>
462 <name>PUPDR9</name>
463 <description>Port x configuration bits (y =
464 0..15)</description>
465 <bitOffset>18</bitOffset>
466 <bitWidth>2</bitWidth>
467 </field>
468 <field>
469 <name>PUPDR8</name>
470 <description>Port x configuration bits (y =
471 0..15)</description>
472 <bitOffset>16</bitOffset>
473 <bitWidth>2</bitWidth>
474 </field>
475 <field>
476 <name>PUPDR7</name>
477 <description>Port x configuration bits (y =
478 0..15)</description>
479 <bitOffset>14</bitOffset>
480 <bitWidth>2</bitWidth>
481 </field>
482 <field>
483 <name>PUPDR6</name>
484 <description>Port x configuration bits (y =
485 0..15)</description>
486 <bitOffset>12</bitOffset>
487 <bitWidth>2</bitWidth>
488 </field>
489 <field>
490 <name>PUPDR5</name>
491 <description>Port x configuration bits (y =
492 0..15)</description>
493 <bitOffset>10</bitOffset>
494 <bitWidth>2</bitWidth>
495 </field>
496 <field>
497 <name>PUPDR4</name>
498 <description>Port x configuration bits (y =
499 0..15)</description>
500 <bitOffset>8</bitOffset>
501 <bitWidth>2</bitWidth>
502 </field>
503 <field>
504 <name>PUPDR3</name>
505 <description>Port x configuration bits (y =
506 0..15)</description>
507 <bitOffset>6</bitOffset>
508 <bitWidth>2</bitWidth>
509 </field>
510 <field>
511 <name>PUPDR2</name>
512 <description>Port x configuration bits (y =
513 0..15)</description>
514 <bitOffset>4</bitOffset>
515 <bitWidth>2</bitWidth>
516 </field>
517 <field>
518 <name>PUPDR1</name>
519 <description>Port x configuration bits (y =
520 0..15)</description>
521 <bitOffset>2</bitOffset>
522 <bitWidth>2</bitWidth>
523 </field>
524 <field>
525 <name>PUPDR0</name>
526 <description>Port x configuration bits (y =
527 0..15)</description>
528 <bitOffset>0</bitOffset>
529 <bitWidth>2</bitWidth>
530 </field>
531 </fields>
532 </register>
533 <register>
534 <name>IDR</name>
535 <displayName>IDR</displayName>
536 <description>GPIO port input data register</description>
537 <addressOffset>0x10</addressOffset>
538 <size>0x20</size>
539 <access>read-only</access>
540 <resetValue>0x00000000</resetValue>
541 <fields>
542 <field>
543 <name>IDR15</name>
544 <description>Port input data (y =
545 0..15)</description>
546 <bitOffset>15</bitOffset>
547 <bitWidth>1</bitWidth>
548 </field>
549 <field>
550 <name>IDR14</name>
551 <description>Port input data (y =
552 0..15)</description>
553 <bitOffset>14</bitOffset>
554 <bitWidth>1</bitWidth>
555 </field>
556 <field>
557 <name>IDR13</name>
558 <description>Port input data (y =
559 0..15)</description>
560 <bitOffset>13</bitOffset>
561 <bitWidth>1</bitWidth>
562 </field>
563 <field>
564 <name>IDR12</name>
565 <description>Port input data (y =
566 0..15)</description>
567 <bitOffset>12</bitOffset>
568 <bitWidth>1</bitWidth>
569 </field>
570 <field>
571 <name>IDR11</name>
572 <description>Port input data (y =
573 0..15)</description>
574 <bitOffset>11</bitOffset>
575 <bitWidth>1</bitWidth>
576 </field>
577 <field>
578 <name>IDR10</name>
579 <description>Port input data (y =
580 0..15)</description>
581 <bitOffset>10</bitOffset>
582 <bitWidth>1</bitWidth>
583 </field>
584 <field>
585 <name>IDR9</name>
586 <description>Port input data (y =
587 0..15)</description>
588 <bitOffset>9</bitOffset>
589 <bitWidth>1</bitWidth>
590 </field>
591 <field>
592 <name>IDR8</name>
593 <description>Port input data (y =
594 0..15)</description>
595 <bitOffset>8</bitOffset>
596 <bitWidth>1</bitWidth>
597 </field>
598 <field>
599 <name>IDR7</name>
600 <description>Port input data (y =
601 0..15)</description>
602 <bitOffset>7</bitOffset>
603 <bitWidth>1</bitWidth>
604 </field>
605 <field>
606 <name>IDR6</name>
607 <description>Port input data (y =
608 0..15)</description>
609 <bitOffset>6</bitOffset>
610 <bitWidth>1</bitWidth>
611 </field>
612 <field>
613 <name>IDR5</name>
614 <description>Port input data (y =
615 0..15)</description>
616 <bitOffset>5</bitOffset>
617 <bitWidth>1</bitWidth>
618 </field>
619 <field>
620 <name>IDR4</name>
621 <description>Port input data (y =
622 0..15)</description>
623 <bitOffset>4</bitOffset>
624 <bitWidth>1</bitWidth>
625 </field>
626 <field>
627 <name>IDR3</name>
628 <description>Port input data (y =
629 0..15)</description>
630 <bitOffset>3</bitOffset>
631 <bitWidth>1</bitWidth>
632 </field>
633 <field>
634 <name>IDR2</name>
635 <description>Port input data (y =
636 0..15)</description>
637 <bitOffset>2</bitOffset>
638 <bitWidth>1</bitWidth>
639 </field>
640 <field>
641 <name>IDR1</name>
642 <description>Port input data (y =
643 0..15)</description>
644 <bitOffset>1</bitOffset>
645 <bitWidth>1</bitWidth>
646 </field>
647 <field>
648 <name>IDR0</name>
649 <description>Port input data (y =
650 0..15)</description>
651 <bitOffset>0</bitOffset>
652 <bitWidth>1</bitWidth>
653 </field>
654 </fields>
655 </register>
656 <register>
657 <name>ODR</name>
658 <displayName>ODR</displayName>
659 <description>GPIO port output data register</description>
660 <addressOffset>0x14</addressOffset>
661 <size>0x20</size>
662 <access>read-write</access>
663 <resetValue>0x00000000</resetValue>
664 <fields>
665 <field>
666 <name>ODR15</name>
667 <description>Port output data (y =
668 0..15)</description>
669 <bitOffset>15</bitOffset>
670 <bitWidth>1</bitWidth>
671 </field>
672 <field>
673 <name>ODR14</name>
674 <description>Port output data (y =
675 0..15)</description>
676 <bitOffset>14</bitOffset>
677 <bitWidth>1</bitWidth>
678 </field>
679 <field>
680 <name>ODR13</name>
681 <description>Port output data (y =
682 0..15)</description>
683 <bitOffset>13</bitOffset>
684 <bitWidth>1</bitWidth>
685 </field>
686 <field>
687 <name>ODR12</name>
688 <description>Port output data (y =
689 0..15)</description>
690 <bitOffset>12</bitOffset>
691 <bitWidth>1</bitWidth>
692 </field>
693 <field>
694 <name>ODR11</name>
695 <description>Port output data (y =
696 0..15)</description>
697 <bitOffset>11</bitOffset>
698 <bitWidth>1</bitWidth>
699 </field>
700 <field>
701 <name>ODR10</name>
702 <description>Port output data (y =
703 0..15)</description>
704 <bitOffset>10</bitOffset>
705 <bitWidth>1</bitWidth>
706 </field>
707 <field>
708 <name>ODR9</name>
709 <description>Port output data (y =
710 0..15)</description>
711 <bitOffset>9</bitOffset>
712 <bitWidth>1</bitWidth>
713 </field>
714 <field>
715 <name>ODR8</name>
716 <description>Port output data (y =
717 0..15)</description>
718 <bitOffset>8</bitOffset>
719 <bitWidth>1</bitWidth>
720 </field>
721 <field>
722 <name>ODR7</name>
723 <description>Port output data (y =
724 0..15)</description>
725 <bitOffset>7</bitOffset>
726 <bitWidth>1</bitWidth>
727 </field>
728 <field>
729 <name>ODR6</name>
730 <description>Port output data (y =
731 0..15)</description>
732 <bitOffset>6</bitOffset>
733 <bitWidth>1</bitWidth>
734 </field>
735 <field>
736 <name>ODR5</name>
737 <description>Port output data (y =
738 0..15)</description>
739 <bitOffset>5</bitOffset>
740 <bitWidth>1</bitWidth>
741 </field>
742 <field>
743 <name>ODR4</name>
744 <description>Port output data (y =
745 0..15)</description>
746 <bitOffset>4</bitOffset>
747 <bitWidth>1</bitWidth>
748 </field>
749 <field>
750 <name>ODR3</name>
751 <description>Port output data (y =
752 0..15)</description>
753 <bitOffset>3</bitOffset>
754 <bitWidth>1</bitWidth>
755 </field>
756 <field>
757 <name>ODR2</name>
758 <description>Port output data (y =
759 0..15)</description>
760 <bitOffset>2</bitOffset>
761 <bitWidth>1</bitWidth>
762 </field>
763 <field>
764 <name>ODR1</name>
765 <description>Port output data (y =
766 0..15)</description>
767 <bitOffset>1</bitOffset>
768 <bitWidth>1</bitWidth>
769 </field>
770 <field>
771 <name>ODR0</name>
772 <description>Port output data (y =
773 0..15)</description>
774 <bitOffset>0</bitOffset>
775 <bitWidth>1</bitWidth>
776 </field>
777 </fields>
778 </register>
779 <register>
780 <name>BSRR</name>
781 <displayName>BSRR</displayName>
782 <description>GPIO port bit set/reset
783 register</description>
784 <addressOffset>0x18</addressOffset>
785 <size>0x20</size>
786 <access>write-only</access>
787 <resetValue>0x00000000</resetValue>
788 <fields>
789 <field>
790 <name>BR15</name>
791 <description>Port x reset bit y (y =
792 0..15)</description>
793 <bitOffset>31</bitOffset>
794 <bitWidth>1</bitWidth>
795 </field>
796 <field>
797 <name>BR14</name>
798 <description>Port x reset bit y (y =
799 0..15)</description>
800 <bitOffset>30</bitOffset>
801 <bitWidth>1</bitWidth>
802 </field>
803 <field>
804 <name>BR13</name>
805 <description>Port x reset bit y (y =
806 0..15)</description>
807 <bitOffset>29</bitOffset>
808 <bitWidth>1</bitWidth>
809 </field>
810 <field>
811 <name>BR12</name>
812 <description>Port x reset bit y (y =
813 0..15)</description>
814 <bitOffset>28</bitOffset>
815 <bitWidth>1</bitWidth>
816 </field>
817 <field>
818 <name>BR11</name>
819 <description>Port x reset bit y (y =
820 0..15)</description>
821 <bitOffset>27</bitOffset>
822 <bitWidth>1</bitWidth>
823 </field>
824 <field>
825 <name>BR10</name>
826 <description>Port x reset bit y (y =
827 0..15)</description>
828 <bitOffset>26</bitOffset>
829 <bitWidth>1</bitWidth>
830 </field>
831 <field>
832 <name>BR9</name>
833 <description>Port x reset bit y (y =
834 0..15)</description>
835 <bitOffset>25</bitOffset>
836 <bitWidth>1</bitWidth>
837 </field>
838 <field>
839 <name>BR8</name>
840 <description>Port x reset bit y (y =
841 0..15)</description>
842 <bitOffset>24</bitOffset>
843 <bitWidth>1</bitWidth>
844 </field>
845 <field>
846 <name>BR7</name>
847 <description>Port x reset bit y (y =
848 0..15)</description>
849 <bitOffset>23</bitOffset>
850 <bitWidth>1</bitWidth>
851 </field>
852 <field>
853 <name>BR6</name>
854 <description>Port x reset bit y (y =
855 0..15)</description>
856 <bitOffset>22</bitOffset>
857 <bitWidth>1</bitWidth>
858 </field>
859 <field>
860 <name>BR5</name>
861 <description>Port x reset bit y (y =
862 0..15)</description>
863 <bitOffset>21</bitOffset>
864 <bitWidth>1</bitWidth>
865 </field>
866 <field>
867 <name>BR4</name>
868 <description>Port x reset bit y (y =
869 0..15)</description>
870 <bitOffset>20</bitOffset>
871 <bitWidth>1</bitWidth>
872 </field>
873 <field>
874 <name>BR3</name>
875 <description>Port x reset bit y (y =
876 0..15)</description>
877 <bitOffset>19</bitOffset>
878 <bitWidth>1</bitWidth>
879 </field>
880 <field>
881 <name>BR2</name>
882 <description>Port x reset bit y (y =
883 0..15)</description>
884 <bitOffset>18</bitOffset>
885 <bitWidth>1</bitWidth>
886 </field>
887 <field>
888 <name>BR1</name>
889 <description>Port x reset bit y (y =
890 0..15)</description>
891 <bitOffset>17</bitOffset>
892 <bitWidth>1</bitWidth>
893 </field>
894 <field>
895 <name>BR0</name>
896 <description>Port x set bit y (y=
897 0..15)</description>
898 <bitOffset>16</bitOffset>
899 <bitWidth>1</bitWidth>
900 </field>
901 <field>
902 <name>BS15</name>
903 <description>Port x set bit y (y=
904 0..15)</description>
905 <bitOffset>15</bitOffset>
906 <bitWidth>1</bitWidth>
907 </field>
908 <field>
909 <name>BS14</name>
910 <description>Port x set bit y (y=
911 0..15)</description>
912 <bitOffset>14</bitOffset>
913 <bitWidth>1</bitWidth>
914 </field>
915 <field>
916 <name>BS13</name>
917 <description>Port x set bit y (y=
918 0..15)</description>
919 <bitOffset>13</bitOffset>
920 <bitWidth>1</bitWidth>
921 </field>
922 <field>
923 <name>BS12</name>
924 <description>Port x set bit y (y=
925 0..15)</description>
926 <bitOffset>12</bitOffset>
927 <bitWidth>1</bitWidth>
928 </field>
929 <field>
930 <name>BS11</name>
931 <description>Port x set bit y (y=
932 0..15)</description>
933 <bitOffset>11</bitOffset>
934 <bitWidth>1</bitWidth>
935 </field>
936 <field>
937 <name>BS10</name>
938 <description>Port x set bit y (y=
939 0..15)</description>
940 <bitOffset>10</bitOffset>
941 <bitWidth>1</bitWidth>
942 </field>
943 <field>
944 <name>BS9</name>
945 <description>Port x set bit y (y=
946 0..15)</description>
947 <bitOffset>9</bitOffset>
948 <bitWidth>1</bitWidth>
949 </field>
950 <field>
951 <name>BS8</name>
952 <description>Port x set bit y (y=
953 0..15)</description>
954 <bitOffset>8</bitOffset>
955 <bitWidth>1</bitWidth>
956 </field>
957 <field>
958 <name>BS7</name>
959 <description>Port x set bit y (y=
960 0..15)</description>
961 <bitOffset>7</bitOffset>
962 <bitWidth>1</bitWidth>
963 </field>
964 <field>
965 <name>BS6</name>
966 <description>Port x set bit y (y=
967 0..15)</description>
968 <bitOffset>6</bitOffset>
969 <bitWidth>1</bitWidth>
970 </field>
971 <field>
972 <name>BS5</name>
973 <description>Port x set bit y (y=
974 0..15)</description>
975 <bitOffset>5</bitOffset>
976 <bitWidth>1</bitWidth>
977 </field>
978 <field>
979 <name>BS4</name>
980 <description>Port x set bit y (y=
981 0..15)</description>
982 <bitOffset>4</bitOffset>
983 <bitWidth>1</bitWidth>
984 </field>
985 <field>
986 <name>BS3</name>
987 <description>Port x set bit y (y=
988 0..15)</description>
989 <bitOffset>3</bitOffset>
990 <bitWidth>1</bitWidth>
991 </field>
992 <field>
993 <name>BS2</name>
994 <description>Port x set bit y (y=
995 0..15)</description>
996 <bitOffset>2</bitOffset>
997 <bitWidth>1</bitWidth>
998 </field>
999 <field>
1000 <name>BS1</name>
1001 <description>Port x set bit y (y=
1002 0..15)</description>
1003 <bitOffset>1</bitOffset>
1004 <bitWidth>1</bitWidth>
1005 </field>
1006 <field>
1007 <name>BS0</name>
1008 <description>Port x set bit y (y=
1009 0..15)</description>
1010 <bitOffset>0</bitOffset>
1011 <bitWidth>1</bitWidth>
1012 </field>
1013 </fields>
1014 </register>
1015 <register>
1016 <name>LCKR</name>
1017 <displayName>LCKR</displayName>
1018 <description>GPIO port configuration lock
1019 register</description>
1020 <addressOffset>0x1C</addressOffset>
1021 <size>0x20</size>
1022 <access>read-write</access>
1023 <resetValue>0x00000000</resetValue>
1024 <fields>
1025 <field>
1026 <name>LCKK</name>
1027 <description>Lok Key</description>
1028 <bitOffset>16</bitOffset>
1029 <bitWidth>1</bitWidth>
1030 </field>
1031 <field>
1032 <name>LCK15</name>
1033 <description>Port x lock bit y (y=
1034 0..15)</description>
1035 <bitOffset>15</bitOffset>
1036 <bitWidth>1</bitWidth>
1037 </field>
1038 <field>
1039 <name>LCK14</name>
1040 <description>Port x lock bit y (y=
1041 0..15)</description>
1042 <bitOffset>14</bitOffset>
1043 <bitWidth>1</bitWidth>
1044 </field>
1045 <field>
1046 <name>LCK13</name>
1047 <description>Port x lock bit y (y=
1048 0..15)</description>
1049 <bitOffset>13</bitOffset>
1050 <bitWidth>1</bitWidth>
1051 </field>
1052 <field>
1053 <name>LCK12</name>
1054 <description>Port x lock bit y (y=
1055 0..15)</description>
1056 <bitOffset>12</bitOffset>
1057 <bitWidth>1</bitWidth>
1058 </field>
1059 <field>
1060 <name>LCK11</name>
1061 <description>Port x lock bit y (y=
1062 0..15)</description>
1063 <bitOffset>11</bitOffset>
1064 <bitWidth>1</bitWidth>
1065 </field>
1066 <field>
1067 <name>LCK10</name>
1068 <description>Port x lock bit y (y=
1069 0..15)</description>
1070 <bitOffset>10</bitOffset>
1071 <bitWidth>1</bitWidth>
1072 </field>
1073 <field>
1074 <name>LCK9</name>
1075 <description>Port x lock bit y (y=
1076 0..15)</description>
1077 <bitOffset>9</bitOffset>
1078 <bitWidth>1</bitWidth>
1079 </field>
1080 <field>
1081 <name>LCK8</name>
1082 <description>Port x lock bit y (y=
1083 0..15)</description>
1084 <bitOffset>8</bitOffset>
1085 <bitWidth>1</bitWidth>
1086 </field>
1087 <field>
1088 <name>LCK7</name>
1089 <description>Port x lock bit y (y=
1090 0..15)</description>
1091 <bitOffset>7</bitOffset>
1092 <bitWidth>1</bitWidth>
1093 </field>
1094 <field>
1095 <name>LCK6</name>
1096 <description>Port x lock bit y (y=
1097 0..15)</description>
1098 <bitOffset>6</bitOffset>
1099 <bitWidth>1</bitWidth>
1100 </field>
1101 <field>
1102 <name>LCK5</name>
1103 <description>Port x lock bit y (y=
1104 0..15)</description>
1105 <bitOffset>5</bitOffset>
1106 <bitWidth>1</bitWidth>
1107 </field>
1108 <field>
1109 <name>LCK4</name>
1110 <description>Port x lock bit y (y=
1111 0..15)</description>
1112 <bitOffset>4</bitOffset>
1113 <bitWidth>1</bitWidth>
1114 </field>
1115 <field>
1116 <name>LCK3</name>
1117 <description>Port x lock bit y (y=
1118 0..15)</description>
1119 <bitOffset>3</bitOffset>
1120 <bitWidth>1</bitWidth>
1121 </field>
1122 <field>
1123 <name>LCK2</name>
1124 <description>Port x lock bit y (y=
1125 0..15)</description>
1126 <bitOffset>2</bitOffset>
1127 <bitWidth>1</bitWidth>
1128 </field>
1129 <field>
1130 <name>LCK1</name>
1131 <description>Port x lock bit y (y=
1132 0..15)</description>
1133 <bitOffset>1</bitOffset>
1134 <bitWidth>1</bitWidth>
1135 </field>
1136 <field>
1137 <name>LCK0</name>
1138 <description>Port x lock bit y (y=
1139 0..15)</description>
1140 <bitOffset>0</bitOffset>
1141 <bitWidth>1</bitWidth>
1142 </field>
1143 </fields>
1144 </register>
1145 <register>
1146 <name>AFRL</name>
1147 <displayName>AFRL</displayName>
1148 <description>GPIO alternate function low
1149 register</description>
1150 <addressOffset>0x20</addressOffset>
1151 <size>0x20</size>
1152 <access>read-write</access>
1153 <resetValue>0x00000000</resetValue>
1154 <fields>
1155 <field>
1156 <name>AFRL7</name>
1157 <description>Alternate function selection for port x
1158 bit y (y = 0..7)</description>
1159 <bitOffset>28</bitOffset>
1160 <bitWidth>4</bitWidth>
1161 </field>
1162 <field>
1163 <name>AFRL6</name>
1164 <description>Alternate function selection for port x
1165 bit y (y = 0..7)</description>
1166 <bitOffset>24</bitOffset>
1167 <bitWidth>4</bitWidth>
1168 </field>
1169 <field>
1170 <name>AFRL5</name>
1171 <description>Alternate function selection for port x
1172 bit y (y = 0..7)</description>
1173 <bitOffset>20</bitOffset>
1174 <bitWidth>4</bitWidth>
1175 </field>
1176 <field>
1177 <name>AFRL4</name>
1178 <description>Alternate function selection for port x
1179 bit y (y = 0..7)</description>
1180 <bitOffset>16</bitOffset>
1181 <bitWidth>4</bitWidth>
1182 </field>
1183 <field>
1184 <name>AFRL3</name>
1185 <description>Alternate function selection for port x
1186 bit y (y = 0..7)</description>
1187 <bitOffset>12</bitOffset>
1188 <bitWidth>4</bitWidth>
1189 </field>
1190 <field>
1191 <name>AFRL2</name>
1192 <description>Alternate function selection for port x
1193 bit y (y = 0..7)</description>
1194 <bitOffset>8</bitOffset>
1195 <bitWidth>4</bitWidth>
1196 </field>
1197 <field>
1198 <name>AFRL1</name>
1199 <description>Alternate function selection for port x
1200 bit y (y = 0..7)</description>
1201 <bitOffset>4</bitOffset>
1202 <bitWidth>4</bitWidth>
1203 </field>
1204 <field>
1205 <name>AFRL0</name>
1206 <description>Alternate function selection for port x
1207 bit y (y = 0..7)</description>
1208 <bitOffset>0</bitOffset>
1209 <bitWidth>4</bitWidth>
1210 </field>
1211 </fields>
1212 </register>
1213 <register>
1214 <name>AFRH</name>
1215 <displayName>AFRH</displayName>
1216 <description>GPIO alternate function high
1217 register</description>
1218 <addressOffset>0x24</addressOffset>
1219 <size>0x20</size>
1220 <access>read-write</access>
1221 <resetValue>0x00000000</resetValue>
1222 <fields>
1223 <field>
1224 <name>AFRH15</name>
1225 <description>Alternate function selection for port x
1226 bit y (y = 8..15)</description>
1227 <bitOffset>28</bitOffset>
1228 <bitWidth>4</bitWidth>
1229 </field>
1230 <field>
1231 <name>AFRH14</name>
1232 <description>Alternate function selection for port x
1233 bit y (y = 8..15)</description>
1234 <bitOffset>24</bitOffset>
1235 <bitWidth>4</bitWidth>
1236 </field>
1237 <field>
1238 <name>AFRH13</name>
1239 <description>Alternate function selection for port x
1240 bit y (y = 8..15)</description>
1241 <bitOffset>20</bitOffset>
1242 <bitWidth>4</bitWidth>
1243 </field>
1244 <field>
1245 <name>AFRH12</name>
1246 <description>Alternate function selection for port x
1247 bit y (y = 8..15)</description>
1248 <bitOffset>16</bitOffset>
1249 <bitWidth>4</bitWidth>
1250 </field>
1251 <field>
1252 <name>AFRH11</name>
1253 <description>Alternate function selection for port x
1254 bit y (y = 8..15)</description>
1255 <bitOffset>12</bitOffset>
1256 <bitWidth>4</bitWidth>
1257 </field>
1258 <field>
1259 <name>AFRH10</name>
1260 <description>Alternate function selection for port x
1261 bit y (y = 8..15)</description>
1262 <bitOffset>8</bitOffset>
1263 <bitWidth>4</bitWidth>
1264 </field>
1265 <field>
1266 <name>AFRH9</name>
1267 <description>Alternate function selection for port x
1268 bit y (y = 8..15)</description>
1269 <bitOffset>4</bitOffset>
1270 <bitWidth>4</bitWidth>
1271 </field>
1272 <field>
1273 <name>AFRH8</name>
1274 <description>Alternate function selection for port x
1275 bit y (y = 8..15)</description>
1276 <bitOffset>0</bitOffset>
1277 <bitWidth>4</bitWidth>
1278 </field>
1279 </fields>
1280 </register>
1281 <register>
1282 <name>BRR</name>
1283 <displayName>BRR</displayName>
1284 <description>Port bit reset register</description>
1285 <addressOffset>0x28</addressOffset>
1286 <size>0x20</size>
1287 <access>write-only</access>
1288 <resetValue>0x00000000</resetValue>
1289 <fields>
1290 <field>
1291 <name>BR0</name>
1292 <description>Port x Reset bit y</description>
1293 <bitOffset>0</bitOffset>
1294 <bitWidth>1</bitWidth>
1295 </field>
1296 <field>
1297 <name>BR1</name>
1298 <description>Port x Reset bit y</description>
1299 <bitOffset>1</bitOffset>
1300 <bitWidth>1</bitWidth>
1301 </field>
1302 <field>
1303 <name>BR2</name>
1304 <description>Port x Reset bit y</description>
1305 <bitOffset>2</bitOffset>
1306 <bitWidth>1</bitWidth>
1307 </field>
1308 <field>
1309 <name>BR3</name>
1310 <description>Port x Reset bit y</description>
1311 <bitOffset>3</bitOffset>
1312 <bitWidth>1</bitWidth>
1313 </field>
1314 <field>
1315 <name>BR4</name>
1316 <description>Port x Reset bit y</description>
1317 <bitOffset>4</bitOffset>
1318 <bitWidth>1</bitWidth>
1319 </field>
1320 <field>
1321 <name>BR5</name>
1322 <description>Port x Reset bit y</description>
1323 <bitOffset>5</bitOffset>
1324 <bitWidth>1</bitWidth>
1325 </field>
1326 <field>
1327 <name>BR6</name>
1328 <description>Port x Reset bit y</description>
1329 <bitOffset>6</bitOffset>
1330 <bitWidth>1</bitWidth>
1331 </field>
1332 <field>
1333 <name>BR7</name>
1334 <description>Port x Reset bit y</description>
1335 <bitOffset>7</bitOffset>
1336 <bitWidth>1</bitWidth>
1337 </field>
1338 <field>
1339 <name>BR8</name>
1340 <description>Port x Reset bit y</description>
1341 <bitOffset>8</bitOffset>
1342 <bitWidth>1</bitWidth>
1343 </field>
1344 <field>
1345 <name>BR9</name>
1346 <description>Port x Reset bit y</description>
1347 <bitOffset>9</bitOffset>
1348 <bitWidth>1</bitWidth>
1349 </field>
1350 <field>
1351 <name>BR10</name>
1352 <description>Port x Reset bit y</description>
1353 <bitOffset>10</bitOffset>
1354 <bitWidth>1</bitWidth>
1355 </field>
1356 <field>
1357 <name>BR11</name>
1358 <description>Port x Reset bit y</description>
1359 <bitOffset>11</bitOffset>
1360 <bitWidth>1</bitWidth>
1361 </field>
1362 <field>
1363 <name>BR12</name>
1364 <description>Port x Reset bit y</description>
1365 <bitOffset>12</bitOffset>
1366 <bitWidth>1</bitWidth>
1367 </field>
1368 <field>
1369 <name>BR13</name>
1370 <description>Port x Reset bit y</description>
1371 <bitOffset>13</bitOffset>
1372 <bitWidth>1</bitWidth>
1373 </field>
1374 <field>
1375 <name>BR14</name>
1376 <description>Port x Reset bit y</description>
1377 <bitOffset>14</bitOffset>
1378 <bitWidth>1</bitWidth>
1379 </field>
1380 <field>
1381 <name>BR15</name>
1382 <description>Port x Reset bit y</description>
1383 <bitOffset>15</bitOffset>
1384 <bitWidth>1</bitWidth>
1385 </field>
1386 </fields>
1387 </register>
1388 </registers>
1389 </peripheral>
1390 <peripheral>
1391 <name>GPIOB</name>
1392 <description>General-purpose I/Os</description>
1393 <groupName>GPIO</groupName>
1394 <baseAddress>0x48000400</baseAddress>
1395 <addressBlock>
1396 <offset>0x0</offset>
1397 <size>0x400</size>
1398 <usage>registers</usage>
1399 </addressBlock>
1400 <registers>
1401 <register>
1402 <name>MODER</name>
1403 <displayName>MODER</displayName>
1404 <description>GPIO port mode register</description>
1405 <addressOffset>0x0</addressOffset>
1406 <size>0x20</size>
1407 <access>read-write</access>
1408 <resetValue>0x00000000</resetValue>
1409 <fields>
1410 <field>
1411 <name>MODER15</name>
1412 <description>Port x configuration bits (y =
1413 0..15)</description>
1414 <bitOffset>30</bitOffset>
1415 <bitWidth>2</bitWidth>
1416 </field>
1417 <field>
1418 <name>MODER14</name>
1419 <description>Port x configuration bits (y =
1420 0..15)</description>
1421 <bitOffset>28</bitOffset>
1422 <bitWidth>2</bitWidth>
1423 </field>
1424 <field>
1425 <name>MODER13</name>
1426 <description>Port x configuration bits (y =
1427 0..15)</description>
1428 <bitOffset>26</bitOffset>
1429 <bitWidth>2</bitWidth>
1430 </field>
1431 <field>
1432 <name>MODER12</name>
1433 <description>Port x configuration bits (y =
1434 0..15)</description>
1435 <bitOffset>24</bitOffset>
1436 <bitWidth>2</bitWidth>
1437 </field>
1438 <field>
1439 <name>MODER11</name>
1440 <description>Port x configuration bits (y =
1441 0..15)</description>
1442 <bitOffset>22</bitOffset>
1443 <bitWidth>2</bitWidth>
1444 </field>
1445 <field>
1446 <name>MODER10</name>
1447 <description>Port x configuration bits (y =
1448 0..15)</description>
1449 <bitOffset>20</bitOffset>
1450 <bitWidth>2</bitWidth>
1451 </field>
1452 <field>
1453 <name>MODER9</name>
1454 <description>Port x configuration bits (y =
1455 0..15)</description>
1456 <bitOffset>18</bitOffset>
1457 <bitWidth>2</bitWidth>
1458 </field>
1459 <field>
1460 <name>MODER8</name>
1461 <description>Port x configuration bits (y =
1462 0..15)</description>
1463 <bitOffset>16</bitOffset>
1464 <bitWidth>2</bitWidth>
1465 </field>
1466 <field>
1467 <name>MODER7</name>
1468 <description>Port x configuration bits (y =
1469 0..15)</description>
1470 <bitOffset>14</bitOffset>
1471 <bitWidth>2</bitWidth>
1472 </field>
1473 <field>
1474 <name>MODER6</name>
1475 <description>Port x configuration bits (y =
1476 0..15)</description>
1477 <bitOffset>12</bitOffset>
1478 <bitWidth>2</bitWidth>
1479 </field>
1480 <field>
1481 <name>MODER5</name>
1482 <description>Port x configuration bits (y =
1483 0..15)</description>
1484 <bitOffset>10</bitOffset>
1485 <bitWidth>2</bitWidth>
1486 </field>
1487 <field>
1488 <name>MODER4</name>
1489 <description>Port x configuration bits (y =
1490 0..15)</description>
1491 <bitOffset>8</bitOffset>
1492 <bitWidth>2</bitWidth>
1493 </field>
1494 <field>
1495 <name>MODER3</name>
1496 <description>Port x configuration bits (y =
1497 0..15)</description>
1498 <bitOffset>6</bitOffset>
1499 <bitWidth>2</bitWidth>
1500 </field>
1501 <field>
1502 <name>MODER2</name>
1503 <description>Port x configuration bits (y =
1504 0..15)</description>
1505 <bitOffset>4</bitOffset>
1506 <bitWidth>2</bitWidth>
1507 </field>
1508 <field>
1509 <name>MODER1</name>
1510 <description>Port x configuration bits (y =
1511 0..15)</description>
1512 <bitOffset>2</bitOffset>
1513 <bitWidth>2</bitWidth>
1514 </field>
1515 <field>
1516 <name>MODER0</name>
1517 <description>Port x configuration bits (y =
1518 0..15)</description>
1519 <bitOffset>0</bitOffset>
1520 <bitWidth>2</bitWidth>
1521 </field>
1522 </fields>
1523 </register>
1524 <register>
1525 <name>OTYPER</name>
1526 <displayName>OTYPER</displayName>
1527 <description>GPIO port output type register</description>
1528 <addressOffset>0x4</addressOffset>
1529 <size>0x20</size>
1530 <access>read-write</access>
1531 <resetValue>0x00000000</resetValue>
1532 <fields>
1533 <field>
1534 <name>OT15</name>
1535 <description>Port x configuration bit
1536 15</description>
1537 <bitOffset>15</bitOffset>
1538 <bitWidth>1</bitWidth>
1539 </field>
1540 <field>
1541 <name>OT14</name>
1542 <description>Port x configuration bit
1543 14</description>
1544 <bitOffset>14</bitOffset>
1545 <bitWidth>1</bitWidth>
1546 </field>
1547 <field>
1548 <name>OT13</name>
1549 <description>Port x configuration bit
1550 13</description>
1551 <bitOffset>13</bitOffset>
1552 <bitWidth>1</bitWidth>
1553 </field>
1554 <field>
1555 <name>OT12</name>
1556 <description>Port x configuration bit
1557 12</description>
1558 <bitOffset>12</bitOffset>
1559 <bitWidth>1</bitWidth>
1560 </field>
1561 <field>
1562 <name>OT11</name>
1563 <description>Port x configuration bit
1564 11</description>
1565 <bitOffset>11</bitOffset>
1566 <bitWidth>1</bitWidth>
1567 </field>
1568 <field>
1569 <name>OT10</name>
1570 <description>Port x configuration bit
1571 10</description>
1572 <bitOffset>10</bitOffset>
1573 <bitWidth>1</bitWidth>
1574 </field>
1575 <field>
1576 <name>OT9</name>
1577 <description>Port x configuration bit 9</description>
1578 <bitOffset>9</bitOffset>
1579 <bitWidth>1</bitWidth>
1580 </field>
1581 <field>
1582 <name>OT8</name>
1583 <description>Port x configuration bit 8</description>
1584 <bitOffset>8</bitOffset>
1585 <bitWidth>1</bitWidth>
1586 </field>
1587 <field>
1588 <name>OT7</name>
1589 <description>Port x configuration bit 7</description>
1590 <bitOffset>7</bitOffset>
1591 <bitWidth>1</bitWidth>
1592 </field>
1593 <field>
1594 <name>OT6</name>
1595 <description>Port x configuration bit 6</description>
1596 <bitOffset>6</bitOffset>
1597 <bitWidth>1</bitWidth>
1598 </field>
1599 <field>
1600 <name>OT5</name>
1601 <description>Port x configuration bit 5</description>
1602 <bitOffset>5</bitOffset>
1603 <bitWidth>1</bitWidth>
1604 </field>
1605 <field>
1606 <name>OT4</name>
1607 <description>Port x configuration bit 4</description>
1608 <bitOffset>4</bitOffset>
1609 <bitWidth>1</bitWidth>
1610 </field>
1611 <field>
1612 <name>OT3</name>
1613 <description>Port x configuration bit 3</description>
1614 <bitOffset>3</bitOffset>
1615 <bitWidth>1</bitWidth>
1616 </field>
1617 <field>
1618 <name>OT2</name>
1619 <description>Port x configuration bit 2</description>
1620 <bitOffset>2</bitOffset>
1621 <bitWidth>1</bitWidth>
1622 </field>
1623 <field>
1624 <name>OT1</name>
1625 <description>Port x configuration bit 1</description>
1626 <bitOffset>1</bitOffset>
1627 <bitWidth>1</bitWidth>
1628 </field>
1629 <field>
1630 <name>OT0</name>
1631 <description>Port x configuration bit 0</description>
1632 <bitOffset>0</bitOffset>
1633 <bitWidth>1</bitWidth>
1634 </field>
1635 </fields>
1636 </register>
1637 <register>
1638 <name>OSPEEDR</name>
1639 <displayName>OSPEEDR</displayName>
1640 <description>GPIO port output speed
1641 register</description>
1642 <addressOffset>0x8</addressOffset>
1643 <size>0x20</size>
1644 <access>read-write</access>
1645 <resetValue>0x00000000</resetValue>
1646 <fields>
1647 <field>
1648 <name>OSPEEDR15</name>
1649 <description>Port x configuration bits (y =
1650 0..15)</description>
1651 <bitOffset>30</bitOffset>
1652 <bitWidth>2</bitWidth>
1653 </field>
1654 <field>
1655 <name>OSPEEDR14</name>
1656 <description>Port x configuration bits (y =
1657 0..15)</description>
1658 <bitOffset>28</bitOffset>
1659 <bitWidth>2</bitWidth>
1660 </field>
1661 <field>
1662 <name>OSPEEDR13</name>
1663 <description>Port x configuration bits (y =
1664 0..15)</description>
1665 <bitOffset>26</bitOffset>
1666 <bitWidth>2</bitWidth>
1667 </field>
1668 <field>
1669 <name>OSPEEDR12</name>
1670 <description>Port x configuration bits (y =
1671 0..15)</description>
1672 <bitOffset>24</bitOffset>
1673 <bitWidth>2</bitWidth>
1674 </field>
1675 <field>
1676 <name>OSPEEDR11</name>
1677 <description>Port x configuration bits (y =
1678 0..15)</description>
1679 <bitOffset>22</bitOffset>
1680 <bitWidth>2</bitWidth>
1681 </field>
1682 <field>
1683 <name>OSPEEDR10</name>
1684 <description>Port x configuration bits (y =
1685 0..15)</description>
1686 <bitOffset>20</bitOffset>
1687 <bitWidth>2</bitWidth>
1688 </field>
1689 <field>
1690 <name>OSPEEDR9</name>
1691 <description>Port x configuration bits (y =
1692 0..15)</description>
1693 <bitOffset>18</bitOffset>
1694 <bitWidth>2</bitWidth>
1695 </field>
1696 <field>
1697 <name>OSPEEDR8</name>
1698 <description>Port x configuration bits (y =
1699 0..15)</description>
1700 <bitOffset>16</bitOffset>
1701 <bitWidth>2</bitWidth>
1702 </field>
1703 <field>
1704 <name>OSPEEDR7</name>
1705 <description>Port x configuration bits (y =
1706 0..15)</description>
1707 <bitOffset>14</bitOffset>
1708 <bitWidth>2</bitWidth>
1709 </field>
1710 <field>
1711 <name>OSPEEDR6</name>
1712 <description>Port x configuration bits (y =
1713 0..15)</description>
1714 <bitOffset>12</bitOffset>
1715 <bitWidth>2</bitWidth>
1716 </field>
1717 <field>
1718 <name>OSPEEDR5</name>
1719 <description>Port x configuration bits (y =
1720 0..15)</description>
1721 <bitOffset>10</bitOffset>
1722 <bitWidth>2</bitWidth>
1723 </field>
1724 <field>
1725 <name>OSPEEDR4</name>
1726 <description>Port x configuration bits (y =
1727 0..15)</description>
1728 <bitOffset>8</bitOffset>
1729 <bitWidth>2</bitWidth>
1730 </field>
1731 <field>
1732 <name>OSPEEDR3</name>
1733 <description>Port x configuration bits (y =
1734 0..15)</description>
1735 <bitOffset>6</bitOffset>
1736 <bitWidth>2</bitWidth>
1737 </field>
1738 <field>
1739 <name>OSPEEDR2</name>
1740 <description>Port x configuration bits (y =
1741 0..15)</description>
1742 <bitOffset>4</bitOffset>
1743 <bitWidth>2</bitWidth>
1744 </field>
1745 <field>
1746 <name>OSPEEDR1</name>
1747 <description>Port x configuration bits (y =
1748 0..15)</description>
1749 <bitOffset>2</bitOffset>
1750 <bitWidth>2</bitWidth>
1751 </field>
1752 <field>
1753 <name>OSPEEDR0</name>
1754 <description>Port x configuration bits (y =
1755 0..15)</description>
1756 <bitOffset>0</bitOffset>
1757 <bitWidth>2</bitWidth>
1758 </field>
1759 </fields>
1760 </register>
1761 <register>
1762 <name>PUPDR</name>
1763 <displayName>PUPDR</displayName>
1764 <description>GPIO port pull-up/pull-down
1765 register</description>
1766 <addressOffset>0xC</addressOffset>
1767 <size>0x20</size>
1768 <access>read-write</access>
1769 <resetValue>0x00000000</resetValue>
1770 <fields>
1771 <field>
1772 <name>PUPDR15</name>
1773 <description>Port x configuration bits (y =
1774 0..15)</description>
1775 <bitOffset>30</bitOffset>
1776 <bitWidth>2</bitWidth>
1777 </field>
1778 <field>
1779 <name>PUPDR14</name>
1780 <description>Port x configuration bits (y =
1781 0..15)</description>
1782 <bitOffset>28</bitOffset>
1783 <bitWidth>2</bitWidth>
1784 </field>
1785 <field>
1786 <name>PUPDR13</name>
1787 <description>Port x configuration bits (y =
1788 0..15)</description>
1789 <bitOffset>26</bitOffset>
1790 <bitWidth>2</bitWidth>
1791 </field>
1792 <field>
1793 <name>PUPDR12</name>
1794 <description>Port x configuration bits (y =
1795 0..15)</description>
1796 <bitOffset>24</bitOffset>
1797 <bitWidth>2</bitWidth>
1798 </field>
1799 <field>
1800 <name>PUPDR11</name>
1801 <description>Port x configuration bits (y =
1802 0..15)</description>
1803 <bitOffset>22</bitOffset>
1804 <bitWidth>2</bitWidth>
1805 </field>
1806 <field>
1807 <name>PUPDR10</name>
1808 <description>Port x configuration bits (y =
1809 0..15)</description>
1810 <bitOffset>20</bitOffset>
1811 <bitWidth>2</bitWidth>
1812 </field>
1813 <field>
1814 <name>PUPDR9</name>
1815 <description>Port x configuration bits (y =
1816 0..15)</description>
1817 <bitOffset>18</bitOffset>
1818 <bitWidth>2</bitWidth>
1819 </field>
1820 <field>
1821 <name>PUPDR8</name>
1822 <description>Port x configuration bits (y =
1823 0..15)</description>
1824 <bitOffset>16</bitOffset>
1825 <bitWidth>2</bitWidth>
1826 </field>
1827 <field>
1828 <name>PUPDR7</name>
1829 <description>Port x configuration bits (y =
1830 0..15)</description>
1831 <bitOffset>14</bitOffset>
1832 <bitWidth>2</bitWidth>
1833 </field>
1834 <field>
1835 <name>PUPDR6</name>
1836 <description>Port x configuration bits (y =
1837 0..15)</description>
1838 <bitOffset>12</bitOffset>
1839 <bitWidth>2</bitWidth>
1840 </field>
1841 <field>
1842 <name>PUPDR5</name>
1843 <description>Port x configuration bits (y =
1844 0..15)</description>
1845 <bitOffset>10</bitOffset>
1846 <bitWidth>2</bitWidth>
1847 </field>
1848 <field>
1849 <name>PUPDR4</name>
1850 <description>Port x configuration bits (y =
1851 0..15)</description>
1852 <bitOffset>8</bitOffset>
1853 <bitWidth>2</bitWidth>
1854 </field>
1855 <field>
1856 <name>PUPDR3</name>
1857 <description>Port x configuration bits (y =
1858 0..15)</description>
1859 <bitOffset>6</bitOffset>
1860 <bitWidth>2</bitWidth>
1861 </field>
1862 <field>
1863 <name>PUPDR2</name>
1864 <description>Port x configuration bits (y =
1865 0..15)</description>
1866 <bitOffset>4</bitOffset>
1867 <bitWidth>2</bitWidth>
1868 </field>
1869 <field>
1870 <name>PUPDR1</name>
1871 <description>Port x configuration bits (y =
1872 0..15)</description>
1873 <bitOffset>2</bitOffset>
1874 <bitWidth>2</bitWidth>
1875 </field>
1876 <field>
1877 <name>PUPDR0</name>
1878 <description>Port x configuration bits (y =
1879 0..15)</description>
1880 <bitOffset>0</bitOffset>
1881 <bitWidth>2</bitWidth>
1882 </field>
1883 </fields>
1884 </register>
1885 <register>
1886 <name>IDR</name>
1887 <displayName>IDR</displayName>
1888 <description>GPIO port input data register</description>
1889 <addressOffset>0x10</addressOffset>
1890 <size>0x20</size>
1891 <access>read-only</access>
1892 <resetValue>0x00000000</resetValue>
1893 <fields>
1894 <field>
1895 <name>IDR15</name>
1896 <description>Port input data (y =
1897 0..15)</description>
1898 <bitOffset>15</bitOffset>
1899 <bitWidth>1</bitWidth>
1900 </field>
1901 <field>
1902 <name>IDR14</name>
1903 <description>Port input data (y =
1904 0..15)</description>
1905 <bitOffset>14</bitOffset>
1906 <bitWidth>1</bitWidth>
1907 </field>
1908 <field>
1909 <name>IDR13</name>
1910 <description>Port input data (y =
1911 0..15)</description>
1912 <bitOffset>13</bitOffset>
1913 <bitWidth>1</bitWidth>
1914 </field>
1915 <field>
1916 <name>IDR12</name>
1917 <description>Port input data (y =
1918 0..15)</description>
1919 <bitOffset>12</bitOffset>
1920 <bitWidth>1</bitWidth>
1921 </field>
1922 <field>
1923 <name>IDR11</name>
1924 <description>Port input data (y =
1925 0..15)</description>
1926 <bitOffset>11</bitOffset>
1927 <bitWidth>1</bitWidth>
1928 </field>
1929 <field>
1930 <name>IDR10</name>
1931 <description>Port input data (y =
1932 0..15)</description>
1933 <bitOffset>10</bitOffset>
1934 <bitWidth>1</bitWidth>
1935 </field>
1936 <field>
1937 <name>IDR9</name>
1938 <description>Port input data (y =
1939 0..15)</description>
1940 <bitOffset>9</bitOffset>
1941 <bitWidth>1</bitWidth>
1942 </field>
1943 <field>
1944 <name>IDR8</name>
1945 <description>Port input data (y =
1946 0..15)</description>
1947 <bitOffset>8</bitOffset>
1948 <bitWidth>1</bitWidth>
1949 </field>
1950 <field>
1951 <name>IDR7</name>
1952 <description>Port input data (y =
1953 0..15)</description>
1954 <bitOffset>7</bitOffset>
1955 <bitWidth>1</bitWidth>
1956 </field>
1957 <field>
1958 <name>IDR6</name>
1959 <description>Port input data (y =
1960 0..15)</description>
1961 <bitOffset>6</bitOffset>
1962 <bitWidth>1</bitWidth>
1963 </field>
1964 <field>
1965 <name>IDR5</name>
1966 <description>Port input data (y =
1967 0..15)</description>
1968 <bitOffset>5</bitOffset>
1969 <bitWidth>1</bitWidth>
1970 </field>
1971 <field>
1972 <name>IDR4</name>
1973 <description>Port input data (y =
1974 0..15)</description>
1975 <bitOffset>4</bitOffset>
1976 <bitWidth>1</bitWidth>
1977 </field>
1978 <field>
1979 <name>IDR3</name>
1980 <description>Port input data (y =
1981 0..15)</description>
1982 <bitOffset>3</bitOffset>
1983 <bitWidth>1</bitWidth>
1984 </field>
1985 <field>
1986 <name>IDR2</name>
1987 <description>Port input data (y =
1988 0..15)</description>
1989 <bitOffset>2</bitOffset>
1990 <bitWidth>1</bitWidth>
1991 </field>
1992 <field>
1993 <name>IDR1</name>
1994 <description>Port input data (y =
1995 0..15)</description>
1996 <bitOffset>1</bitOffset>
1997 <bitWidth>1</bitWidth>
1998 </field>
1999 <field>
2000 <name>IDR0</name>
2001 <description>Port input data (y =
2002 0..15)</description>
2003 <bitOffset>0</bitOffset>
2004 <bitWidth>1</bitWidth>
2005 </field>
2006 </fields>
2007 </register>
2008 <register>
2009 <name>ODR</name>
2010 <displayName>ODR</displayName>
2011 <description>GPIO port output data register</description>
2012 <addressOffset>0x14</addressOffset>
2013 <size>0x20</size>
2014 <access>read-write</access>
2015 <resetValue>0x00000000</resetValue>
2016 <fields>
2017 <field>
2018 <name>ODR15</name>
2019 <description>Port output data (y =
2020 0..15)</description>
2021 <bitOffset>15</bitOffset>
2022 <bitWidth>1</bitWidth>
2023 </field>
2024 <field>
2025 <name>ODR14</name>
2026 <description>Port output data (y =
2027 0..15)</description>
2028 <bitOffset>14</bitOffset>
2029 <bitWidth>1</bitWidth>
2030 </field>
2031 <field>
2032 <name>ODR13</name>
2033 <description>Port output data (y =
2034 0..15)</description>
2035 <bitOffset>13</bitOffset>
2036 <bitWidth>1</bitWidth>
2037 </field>
2038 <field>
2039 <name>ODR12</name>
2040 <description>Port output data (y =
2041 0..15)</description>
2042 <bitOffset>12</bitOffset>
2043 <bitWidth>1</bitWidth>
2044 </field>
2045 <field>
2046 <name>ODR11</name>
2047 <description>Port output data (y =
2048 0..15)</description>
2049 <bitOffset>11</bitOffset>
2050 <bitWidth>1</bitWidth>
2051 </field>
2052 <field>
2053 <name>ODR10</name>
2054 <description>Port output data (y =
2055 0..15)</description>
2056 <bitOffset>10</bitOffset>
2057 <bitWidth>1</bitWidth>
2058 </field>
2059 <field>
2060 <name>ODR9</name>
2061 <description>Port output data (y =
2062 0..15)</description>
2063 <bitOffset>9</bitOffset>
2064 <bitWidth>1</bitWidth>
2065 </field>
2066 <field>
2067 <name>ODR8</name>
2068 <description>Port output data (y =
2069 0..15)</description>
2070 <bitOffset>8</bitOffset>
2071 <bitWidth>1</bitWidth>
2072 </field>
2073 <field>
2074 <name>ODR7</name>
2075 <description>Port output data (y =
2076 0..15)</description>
2077 <bitOffset>7</bitOffset>
2078 <bitWidth>1</bitWidth>
2079 </field>
2080 <field>
2081 <name>ODR6</name>
2082 <description>Port output data (y =
2083 0..15)</description>
2084 <bitOffset>6</bitOffset>
2085 <bitWidth>1</bitWidth>
2086 </field>
2087 <field>
2088 <name>ODR5</name>
2089 <description>Port output data (y =
2090 0..15)</description>
2091 <bitOffset>5</bitOffset>
2092 <bitWidth>1</bitWidth>
2093 </field>
2094 <field>
2095 <name>ODR4</name>
2096 <description>Port output data (y =
2097 0..15)</description>
2098 <bitOffset>4</bitOffset>
2099 <bitWidth>1</bitWidth>
2100 </field>
2101 <field>
2102 <name>ODR3</name>
2103 <description>Port output data (y =
2104 0..15)</description>
2105 <bitOffset>3</bitOffset>
2106 <bitWidth>1</bitWidth>
2107 </field>
2108 <field>
2109 <name>ODR2</name>
2110 <description>Port output data (y =
2111 0..15)</description>
2112 <bitOffset>2</bitOffset>
2113 <bitWidth>1</bitWidth>
2114 </field>
2115 <field>
2116 <name>ODR1</name>
2117 <description>Port output data (y =
2118 0..15)</description>
2119 <bitOffset>1</bitOffset>
2120 <bitWidth>1</bitWidth>
2121 </field>
2122 <field>
2123 <name>ODR0</name>
2124 <description>Port output data (y =
2125 0..15)</description>
2126 <bitOffset>0</bitOffset>
2127 <bitWidth>1</bitWidth>
2128 </field>
2129 </fields>
2130 </register>
2131 <register>
2132 <name>BSRR</name>
2133 <displayName>BSRR</displayName>
2134 <description>GPIO port bit set/reset
2135 register</description>
2136 <addressOffset>0x18</addressOffset>
2137 <size>0x20</size>
2138 <access>write-only</access>
2139 <resetValue>0x00000000</resetValue>
2140 <fields>
2141 <field>
2142 <name>BR15</name>
2143 <description>Port x reset bit y (y =
2144 0..15)</description>
2145 <bitOffset>31</bitOffset>
2146 <bitWidth>1</bitWidth>
2147 </field>
2148 <field>
2149 <name>BR14</name>
2150 <description>Port x reset bit y (y =
2151 0..15)</description>
2152 <bitOffset>30</bitOffset>
2153 <bitWidth>1</bitWidth>
2154 </field>
2155 <field>
2156 <name>BR13</name>
2157 <description>Port x reset bit y (y =
2158 0..15)</description>
2159 <bitOffset>29</bitOffset>
2160 <bitWidth>1</bitWidth>
2161 </field>
2162 <field>
2163 <name>BR12</name>
2164 <description>Port x reset bit y (y =
2165 0..15)</description>
2166 <bitOffset>28</bitOffset>
2167 <bitWidth>1</bitWidth>
2168 </field>
2169 <field>
2170 <name>BR11</name>
2171 <description>Port x reset bit y (y =
2172 0..15)</description>
2173 <bitOffset>27</bitOffset>
2174 <bitWidth>1</bitWidth>
2175 </field>
2176 <field>
2177 <name>BR10</name>
2178 <description>Port x reset bit y (y =
2179 0..15)</description>
2180 <bitOffset>26</bitOffset>
2181 <bitWidth>1</bitWidth>
2182 </field>
2183 <field>
2184 <name>BR9</name>
2185 <description>Port x reset bit y (y =
2186 0..15)</description>
2187 <bitOffset>25</bitOffset>
2188 <bitWidth>1</bitWidth>
2189 </field>
2190 <field>
2191 <name>BR8</name>
2192 <description>Port x reset bit y (y =
2193 0..15)</description>
2194 <bitOffset>24</bitOffset>
2195 <bitWidth>1</bitWidth>
2196 </field>
2197 <field>
2198 <name>BR7</name>
2199 <description>Port x reset bit y (y =
2200 0..15)</description>
2201 <bitOffset>23</bitOffset>
2202 <bitWidth>1</bitWidth>
2203 </field>
2204 <field>
2205 <name>BR6</name>
2206 <description>Port x reset bit y (y =
2207 0..15)</description>
2208 <bitOffset>22</bitOffset>
2209 <bitWidth>1</bitWidth>
2210 </field>
2211 <field>
2212 <name>BR5</name>
2213 <description>Port x reset bit y (y =
2214 0..15)</description>
2215 <bitOffset>21</bitOffset>
2216 <bitWidth>1</bitWidth>
2217 </field>
2218 <field>
2219 <name>BR4</name>
2220 <description>Port x reset bit y (y =
2221 0..15)</description>
2222 <bitOffset>20</bitOffset>
2223 <bitWidth>1</bitWidth>
2224 </field>
2225 <field>
2226 <name>BR3</name>
2227 <description>Port x reset bit y (y =
2228 0..15)</description>
2229 <bitOffset>19</bitOffset>
2230 <bitWidth>1</bitWidth>
2231 </field>
2232 <field>
2233 <name>BR2</name>
2234 <description>Port x reset bit y (y =
2235 0..15)</description>
2236 <bitOffset>18</bitOffset>
2237 <bitWidth>1</bitWidth>
2238 </field>
2239 <field>
2240 <name>BR1</name>
2241 <description>Port x reset bit y (y =
2242 0..15)</description>
2243 <bitOffset>17</bitOffset>
2244 <bitWidth>1</bitWidth>
2245 </field>
2246 <field>
2247 <name>BR0</name>
2248 <description>Port x set bit y (y=
2249 0..15)</description>
2250 <bitOffset>16</bitOffset>
2251 <bitWidth>1</bitWidth>
2252 </field>
2253 <field>
2254 <name>BS15</name>
2255 <description>Port x set bit y (y=
2256 0..15)</description>
2257 <bitOffset>15</bitOffset>
2258 <bitWidth>1</bitWidth>
2259 </field>
2260 <field>
2261 <name>BS14</name>
2262 <description>Port x set bit y (y=
2263 0..15)</description>
2264 <bitOffset>14</bitOffset>
2265 <bitWidth>1</bitWidth>
2266 </field>
2267 <field>
2268 <name>BS13</name>
2269 <description>Port x set bit y (y=
2270 0..15)</description>
2271 <bitOffset>13</bitOffset>
2272 <bitWidth>1</bitWidth>
2273 </field>
2274 <field>
2275 <name>BS12</name>
2276 <description>Port x set bit y (y=
2277 0..15)</description>
2278 <bitOffset>12</bitOffset>
2279 <bitWidth>1</bitWidth>
2280 </field>
2281 <field>
2282 <name>BS11</name>
2283 <description>Port x set bit y (y=
2284 0..15)</description>
2285 <bitOffset>11</bitOffset>
2286 <bitWidth>1</bitWidth>
2287 </field>
2288 <field>
2289 <name>BS10</name>
2290 <description>Port x set bit y (y=
2291 0..15)</description>
2292 <bitOffset>10</bitOffset>
2293 <bitWidth>1</bitWidth>
2294 </field>
2295 <field>
2296 <name>BS9</name>
2297 <description>Port x set bit y (y=
2298 0..15)</description>
2299 <bitOffset>9</bitOffset>
2300 <bitWidth>1</bitWidth>
2301 </field>
2302 <field>
2303 <name>BS8</name>
2304 <description>Port x set bit y (y=
2305 0..15)</description>
2306 <bitOffset>8</bitOffset>
2307 <bitWidth>1</bitWidth>
2308 </field>
2309 <field>
2310 <name>BS7</name>
2311 <description>Port x set bit y (y=
2312 0..15)</description>
2313 <bitOffset>7</bitOffset>
2314 <bitWidth>1</bitWidth>
2315 </field>
2316 <field>
2317 <name>BS6</name>
2318 <description>Port x set bit y (y=
2319 0..15)</description>
2320 <bitOffset>6</bitOffset>
2321 <bitWidth>1</bitWidth>
2322 </field>
2323 <field>
2324 <name>BS5</name>
2325 <description>Port x set bit y (y=
2326 0..15)</description>
2327 <bitOffset>5</bitOffset>
2328 <bitWidth>1</bitWidth>
2329 </field>
2330 <field>
2331 <name>BS4</name>
2332 <description>Port x set bit y (y=
2333 0..15)</description>
2334 <bitOffset>4</bitOffset>
2335 <bitWidth>1</bitWidth>
2336 </field>
2337 <field>
2338 <name>BS3</name>
2339 <description>Port x set bit y (y=
2340 0..15)</description>
2341 <bitOffset>3</bitOffset>
2342 <bitWidth>1</bitWidth>
2343 </field>
2344 <field>
2345 <name>BS2</name>
2346 <description>Port x set bit y (y=
2347 0..15)</description>
2348 <bitOffset>2</bitOffset>
2349 <bitWidth>1</bitWidth>
2350 </field>
2351 <field>
2352 <name>BS1</name>
2353 <description>Port x set bit y (y=
2354 0..15)</description>
2355 <bitOffset>1</bitOffset>
2356 <bitWidth>1</bitWidth>
2357 </field>
2358 <field>
2359 <name>BS0</name>
2360 <description>Port x set bit y (y=
2361 0..15)</description>
2362 <bitOffset>0</bitOffset>
2363 <bitWidth>1</bitWidth>
2364 </field>
2365 </fields>
2366 </register>
2367 <register>
2368 <name>LCKR</name>
2369 <displayName>LCKR</displayName>
2370 <description>GPIO port configuration lock
2371 register</description>
2372 <addressOffset>0x1C</addressOffset>
2373 <size>0x20</size>
2374 <access>read-write</access>
2375 <resetValue>0x00000000</resetValue>
2376 <fields>
2377 <field>
2378 <name>LCKK</name>
2379 <description>Lok Key</description>
2380 <bitOffset>16</bitOffset>
2381 <bitWidth>1</bitWidth>
2382 </field>
2383 <field>
2384 <name>LCK15</name>
2385 <description>Port x lock bit y (y=
2386 0..15)</description>
2387 <bitOffset>15</bitOffset>
2388 <bitWidth>1</bitWidth>
2389 </field>
2390 <field>
2391 <name>LCK14</name>
2392 <description>Port x lock bit y (y=
2393 0..15)</description>
2394 <bitOffset>14</bitOffset>
2395 <bitWidth>1</bitWidth>
2396 </field>
2397 <field>
2398 <name>LCK13</name>
2399 <description>Port x lock bit y (y=
2400 0..15)</description>
2401 <bitOffset>13</bitOffset>
2402 <bitWidth>1</bitWidth>
2403 </field>
2404 <field>
2405 <name>LCK12</name>
2406 <description>Port x lock bit y (y=
2407 0..15)</description>
2408 <bitOffset>12</bitOffset>
2409 <bitWidth>1</bitWidth>
2410 </field>
2411 <field>
2412 <name>LCK11</name>
2413 <description>Port x lock bit y (y=
2414 0..15)</description>
2415 <bitOffset>11</bitOffset>
2416 <bitWidth>1</bitWidth>
2417 </field>
2418 <field>
2419 <name>LCK10</name>
2420 <description>Port x lock bit y (y=
2421 0..15)</description>
2422 <bitOffset>10</bitOffset>
2423 <bitWidth>1</bitWidth>
2424 </field>
2425 <field>
2426 <name>LCK9</name>
2427 <description>Port x lock bit y (y=
2428 0..15)</description>
2429 <bitOffset>9</bitOffset>
2430 <bitWidth>1</bitWidth>
2431 </field>
2432 <field>
2433 <name>LCK8</name>
2434 <description>Port x lock bit y (y=
2435 0..15)</description>
2436 <bitOffset>8</bitOffset>
2437 <bitWidth>1</bitWidth>
2438 </field>
2439 <field>
2440 <name>LCK7</name>
2441 <description>Port x lock bit y (y=
2442 0..15)</description>
2443 <bitOffset>7</bitOffset>
2444 <bitWidth>1</bitWidth>
2445 </field>
2446 <field>
2447 <name>LCK6</name>
2448 <description>Port x lock bit y (y=
2449 0..15)</description>
2450 <bitOffset>6</bitOffset>
2451 <bitWidth>1</bitWidth>
2452 </field>
2453 <field>
2454 <name>LCK5</name>
2455 <description>Port x lock bit y (y=
2456 0..15)</description>
2457 <bitOffset>5</bitOffset>
2458 <bitWidth>1</bitWidth>
2459 </field>
2460 <field>
2461 <name>LCK4</name>
2462 <description>Port x lock bit y (y=
2463 0..15)</description>
2464 <bitOffset>4</bitOffset>
2465 <bitWidth>1</bitWidth>
2466 </field>
2467 <field>
2468 <name>LCK3</name>
2469 <description>Port x lock bit y (y=
2470 0..15)</description>
2471 <bitOffset>3</bitOffset>
2472 <bitWidth>1</bitWidth>
2473 </field>
2474 <field>
2475 <name>LCK2</name>
2476 <description>Port x lock bit y (y=
2477 0..15)</description>
2478 <bitOffset>2</bitOffset>
2479 <bitWidth>1</bitWidth>
2480 </field>
2481 <field>
2482 <name>LCK1</name>
2483 <description>Port x lock bit y (y=
2484 0..15)</description>
2485 <bitOffset>1</bitOffset>
2486 <bitWidth>1</bitWidth>
2487 </field>
2488 <field>
2489 <name>LCK0</name>
2490 <description>Port x lock bit y (y=
2491 0..15)</description>
2492 <bitOffset>0</bitOffset>
2493 <bitWidth>1</bitWidth>
2494 </field>
2495 </fields>
2496 </register>
2497 <register>
2498 <name>AFRL</name>
2499 <displayName>AFRL</displayName>
2500 <description>GPIO alternate function low
2501 register</description>
2502 <addressOffset>0x20</addressOffset>
2503 <size>0x20</size>
2504 <access>read-write</access>
2505 <resetValue>0x00000000</resetValue>
2506 <fields>
2507 <field>
2508 <name>AFRL7</name>
2509 <description>Alternate function selection for port x
2510 bit y (y = 0..7)</description>
2511 <bitOffset>28</bitOffset>
2512 <bitWidth>4</bitWidth>
2513 </field>
2514 <field>
2515 <name>AFRL6</name>
2516 <description>Alternate function selection for port x
2517 bit y (y = 0..7)</description>
2518 <bitOffset>24</bitOffset>
2519 <bitWidth>4</bitWidth>
2520 </field>
2521 <field>
2522 <name>AFRL5</name>
2523 <description>Alternate function selection for port x
2524 bit y (y = 0..7)</description>
2525 <bitOffset>20</bitOffset>
2526 <bitWidth>4</bitWidth>
2527 </field>
2528 <field>
2529 <name>AFRL4</name>
2530 <description>Alternate function selection for port x
2531 bit y (y = 0..7)</description>
2532 <bitOffset>16</bitOffset>
2533 <bitWidth>4</bitWidth>
2534 </field>
2535 <field>
2536 <name>AFRL3</name>
2537 <description>Alternate function selection for port x
2538 bit y (y = 0..7)</description>
2539 <bitOffset>12</bitOffset>
2540 <bitWidth>4</bitWidth>
2541 </field>
2542 <field>
2543 <name>AFRL2</name>
2544 <description>Alternate function selection for port x
2545 bit y (y = 0..7)</description>
2546 <bitOffset>8</bitOffset>
2547 <bitWidth>4</bitWidth>
2548 </field>
2549 <field>
2550 <name>AFRL1</name>
2551 <description>Alternate function selection for port x
2552 bit y (y = 0..7)</description>
2553 <bitOffset>4</bitOffset>
2554 <bitWidth>4</bitWidth>
2555 </field>
2556 <field>
2557 <name>AFRL0</name>
2558 <description>Alternate function selection for port x
2559 bit y (y = 0..7)</description>
2560 <bitOffset>0</bitOffset>
2561 <bitWidth>4</bitWidth>
2562 </field>
2563 </fields>
2564 </register>
2565 <register>
2566 <name>AFRH</name>
2567 <displayName>AFRH</displayName>
2568 <description>GPIO alternate function high
2569 register</description>
2570 <addressOffset>0x24</addressOffset>
2571 <size>0x20</size>
2572 <access>read-write</access>
2573 <resetValue>0x00000000</resetValue>
2574 <fields>
2575 <field>
2576 <name>AFRH15</name>
2577 <description>Alternate function selection for port x
2578 bit y (y = 8..15)</description>
2579 <bitOffset>28</bitOffset>
2580 <bitWidth>4</bitWidth>
2581 </field>
2582 <field>
2583 <name>AFRH14</name>
2584 <description>Alternate function selection for port x
2585 bit y (y = 8..15)</description>
2586 <bitOffset>24</bitOffset>
2587 <bitWidth>4</bitWidth>
2588 </field>
2589 <field>
2590 <name>AFRH13</name>
2591 <description>Alternate function selection for port x
2592 bit y (y = 8..15)</description>
2593 <bitOffset>20</bitOffset>
2594 <bitWidth>4</bitWidth>
2595 </field>
2596 <field>
2597 <name>AFRH12</name>
2598 <description>Alternate function selection for port x
2599 bit y (y = 8..15)</description>
2600 <bitOffset>16</bitOffset>
2601 <bitWidth>4</bitWidth>
2602 </field>
2603 <field>
2604 <name>AFRH11</name>
2605 <description>Alternate function selection for port x
2606 bit y (y = 8..15)</description>
2607 <bitOffset>12</bitOffset>
2608 <bitWidth>4</bitWidth>
2609 </field>
2610 <field>
2611 <name>AFRH10</name>
2612 <description>Alternate function selection for port x
2613 bit y (y = 8..15)</description>
2614 <bitOffset>8</bitOffset>
2615 <bitWidth>4</bitWidth>
2616 </field>
2617 <field>
2618 <name>AFRH9</name>
2619 <description>Alternate function selection for port x
2620 bit y (y = 8..15)</description>
2621 <bitOffset>4</bitOffset>
2622 <bitWidth>4</bitWidth>
2623 </field>
2624 <field>
2625 <name>AFRH8</name>
2626 <description>Alternate function selection for port x
2627 bit y (y = 8..15)</description>
2628 <bitOffset>0</bitOffset>
2629 <bitWidth>4</bitWidth>
2630 </field>
2631 </fields>
2632 </register>
2633 <register>
2634 <name>BRR</name>
2635 <displayName>BRR</displayName>
2636 <description>Port bit reset register</description>
2637 <addressOffset>0x28</addressOffset>
2638 <size>0x20</size>
2639 <access>write-only</access>
2640 <resetValue>0x00000000</resetValue>
2641 <fields>
2642 <field>
2643 <name>BR0</name>
2644 <description>Port x Reset bit y</description>
2645 <bitOffset>0</bitOffset>
2646 <bitWidth>1</bitWidth>
2647 </field>
2648 <field>
2649 <name>BR1</name>
2650 <description>Port x Reset bit y</description>
2651 <bitOffset>1</bitOffset>
2652 <bitWidth>1</bitWidth>
2653 </field>
2654 <field>
2655 <name>BR2</name>
2656 <description>Port x Reset bit y</description>
2657 <bitOffset>2</bitOffset>
2658 <bitWidth>1</bitWidth>
2659 </field>
2660 <field>
2661 <name>BR3</name>
2662 <description>Port x Reset bit y</description>
2663 <bitOffset>3</bitOffset>
2664 <bitWidth>1</bitWidth>
2665 </field>
2666 <field>
2667 <name>BR4</name>
2668 <description>Port x Reset bit y</description>
2669 <bitOffset>4</bitOffset>
2670 <bitWidth>1</bitWidth>
2671 </field>
2672 <field>
2673 <name>BR5</name>
2674 <description>Port x Reset bit y</description>
2675 <bitOffset>5</bitOffset>
2676 <bitWidth>1</bitWidth>
2677 </field>
2678 <field>
2679 <name>BR6</name>
2680 <description>Port x Reset bit y</description>
2681 <bitOffset>6</bitOffset>
2682 <bitWidth>1</bitWidth>
2683 </field>
2684 <field>
2685 <name>BR7</name>
2686 <description>Port x Reset bit y</description>
2687 <bitOffset>7</bitOffset>
2688 <bitWidth>1</bitWidth>
2689 </field>
2690 <field>
2691 <name>BR8</name>
2692 <description>Port x Reset bit y</description>
2693 <bitOffset>8</bitOffset>
2694 <bitWidth>1</bitWidth>
2695 </field>
2696 <field>
2697 <name>BR9</name>
2698 <description>Port x Reset bit y</description>
2699 <bitOffset>9</bitOffset>
2700 <bitWidth>1</bitWidth>
2701 </field>
2702 <field>
2703 <name>BR10</name>
2704 <description>Port x Reset bit y</description>
2705 <bitOffset>10</bitOffset>
2706 <bitWidth>1</bitWidth>
2707 </field>
2708 <field>
2709 <name>BR11</name>
2710 <description>Port x Reset bit y</description>
2711 <bitOffset>11</bitOffset>
2712 <bitWidth>1</bitWidth>
2713 </field>
2714 <field>
2715 <name>BR12</name>
2716 <description>Port x Reset bit y</description>
2717 <bitOffset>12</bitOffset>
2718 <bitWidth>1</bitWidth>
2719 </field>
2720 <field>
2721 <name>BR13</name>
2722 <description>Port x Reset bit y</description>
2723 <bitOffset>13</bitOffset>
2724 <bitWidth>1</bitWidth>
2725 </field>
2726 <field>
2727 <name>BR14</name>
2728 <description>Port x Reset bit y</description>
2729 <bitOffset>14</bitOffset>
2730 <bitWidth>1</bitWidth>
2731 </field>
2732 <field>
2733 <name>BR15</name>
2734 <description>Port x Reset bit y</description>
2735 <bitOffset>15</bitOffset>
2736 <bitWidth>1</bitWidth>
2737 </field>
2738 </fields>
2739 </register>
2740 </registers>
2741 </peripheral>
2742 <peripheral derivedFrom="GPIOB">
2743 <name>GPIOC</name>
2744 <baseAddress>0x48000800</baseAddress>
2745 </peripheral>
2746 <peripheral derivedFrom="GPIOB">
2747 <name>GPIOD</name>
2748 <baseAddress>0x48000C00</baseAddress>
2749 </peripheral>
2750 <peripheral derivedFrom="GPIOB">
2751 <name>GPIOE</name>
2752 <baseAddress>0x48001000</baseAddress>
2753 </peripheral>
2754 <peripheral derivedFrom="GPIOB">
2755 <name>GPIOF</name>
2756 <baseAddress>0x48001400</baseAddress>
2757 </peripheral>
2758 <peripheral derivedFrom="GPIOB">
2759 <name>GPIOG</name>
2760 <baseAddress>0x48001800</baseAddress>
2761 </peripheral>
2762 <peripheral derivedFrom="GPIOB">
2763 <name>GPIOH</name>
2764 <baseAddress>0x48001C00</baseAddress>
2765 </peripheral>
2766 <peripheral>
2767 <name>TSC</name>
2768 <description>Touch sensing controller</description>
2769 <groupName>TSC</groupName>
2770 <baseAddress>0x40024000</baseAddress>
2771 <addressBlock>
2772 <offset>0x0</offset>
2773 <size>0x400</size>
2774 <usage>registers</usage>
2775 </addressBlock>
2776 <interrupt>
2777 <name>EXTI2_TSC</name>
2778 <description>EXTI Line2 and Touch sensing
2779 interrupts</description>
2780 <value>8</value>
2781 </interrupt>
2782 <registers>
2783 <register>
2784 <name>CR</name>
2785 <displayName>CR</displayName>
2786 <description>control register</description>
2787 <addressOffset>0x0</addressOffset>
2788 <size>0x20</size>
2789 <access>read-write</access>
2790 <resetValue>0x00000000</resetValue>
2791 <fields>
2792 <field>
2793 <name>CTPH</name>
2794 <description>Charge transfer pulse high</description>
2795 <bitOffset>28</bitOffset>
2796 <bitWidth>4</bitWidth>
2797 </field>
2798 <field>
2799 <name>CTPL</name>
2800 <description>Charge transfer pulse low</description>
2801 <bitOffset>24</bitOffset>
2802 <bitWidth>4</bitWidth>
2803 </field>
2804 <field>
2805 <name>SSD</name>
2806 <description>Spread spectrum deviation</description>
2807 <bitOffset>17</bitOffset>
2808 <bitWidth>7</bitWidth>
2809 </field>
2810 <field>
2811 <name>SSE</name>
2812 <description>Spread spectrum enable</description>
2813 <bitOffset>16</bitOffset>
2814 <bitWidth>1</bitWidth>
2815 </field>
2816 <field>
2817 <name>SSPSC</name>
2818 <description>Spread spectrum prescaler</description>
2819 <bitOffset>15</bitOffset>
2820 <bitWidth>1</bitWidth>
2821 </field>
2822 <field>
2823 <name>PGPSC</name>
2824 <description>pulse generator prescaler</description>
2825 <bitOffset>12</bitOffset>
2826 <bitWidth>3</bitWidth>
2827 </field>
2828 <field>
2829 <name>MCV</name>
2830 <description>Max count value</description>
2831 <bitOffset>5</bitOffset>
2832 <bitWidth>3</bitWidth>
2833 </field>
2834 <field>
2835 <name>IODEF</name>
2836 <description>I/O Default mode</description>
2837 <bitOffset>4</bitOffset>
2838 <bitWidth>1</bitWidth>
2839 </field>
2840 <field>
2841 <name>SYNCPOL</name>
2842 <description>Synchronization pin
2843 polarity</description>
2844 <bitOffset>3</bitOffset>
2845 <bitWidth>1</bitWidth>
2846 </field>
2847 <field>
2848 <name>AM</name>
2849 <description>Acquisition mode</description>
2850 <bitOffset>2</bitOffset>
2851 <bitWidth>1</bitWidth>
2852 </field>
2853 <field>
2854 <name>START</name>
2855 <description>Start a new acquisition</description>
2856 <bitOffset>1</bitOffset>
2857 <bitWidth>1</bitWidth>
2858 </field>
2859 <field>
2860 <name>TSCE</name>
2861 <description>Touch sensing controller
2862 enable</description>
2863 <bitOffset>0</bitOffset>
2864 <bitWidth>1</bitWidth>
2865 </field>
2866 </fields>
2867 </register>
2868 <register>
2869 <name>IER</name>
2870 <displayName>IER</displayName>
2871 <description>interrupt enable register</description>
2872 <addressOffset>0x4</addressOffset>
2873 <size>0x20</size>
2874 <access>read-write</access>
2875 <resetValue>0x00000000</resetValue>
2876 <fields>
2877 <field>
2878 <name>MCEIE</name>
2879 <description>Max count error interrupt
2880 enable</description>
2881 <bitOffset>1</bitOffset>
2882 <bitWidth>1</bitWidth>
2883 </field>
2884 <field>
2885 <name>EOAIE</name>
2886 <description>End of acquisition interrupt
2887 enable</description>
2888 <bitOffset>0</bitOffset>
2889 <bitWidth>1</bitWidth>
2890 </field>
2891 </fields>
2892 </register>
2893 <register>
2894 <name>ICR</name>
2895 <displayName>ICR</displayName>
2896 <description>interrupt clear register</description>
2897 <addressOffset>0x8</addressOffset>
2898 <size>0x20</size>
2899 <access>read-write</access>
2900 <resetValue>0x00000000</resetValue>
2901 <fields>
2902 <field>
2903 <name>MCEIC</name>
2904 <description>Max count error interrupt
2905 clear</description>
2906 <bitOffset>1</bitOffset>
2907 <bitWidth>1</bitWidth>
2908 </field>
2909 <field>
2910 <name>EOAIC</name>
2911 <description>End of acquisition interrupt
2912 clear</description>
2913 <bitOffset>0</bitOffset>
2914 <bitWidth>1</bitWidth>
2915 </field>
2916 </fields>
2917 </register>
2918 <register>
2919 <name>ISR</name>
2920 <displayName>ISR</displayName>
2921 <description>interrupt status register</description>
2922 <addressOffset>0xC</addressOffset>
2923 <size>0x20</size>
2924 <access>read-write</access>
2925 <resetValue>0x00000000</resetValue>
2926 <fields>
2927 <field>
2928 <name>MCEF</name>
2929 <description>Max count error flag</description>
2930 <bitOffset>1</bitOffset>
2931 <bitWidth>1</bitWidth>
2932 </field>
2933 <field>
2934 <name>EOAF</name>
2935 <description>End of acquisition flag</description>
2936 <bitOffset>0</bitOffset>
2937 <bitWidth>1</bitWidth>
2938 </field>
2939 </fields>
2940 </register>
2941 <register>
2942 <name>IOHCR</name>
2943 <displayName>IOHCR</displayName>
2944 <description>I/O hysteresis control
2945 register</description>
2946 <addressOffset>0x10</addressOffset>
2947 <size>0x20</size>
2948 <access>read-write</access>
2949 <resetValue>0xFFFFFFFF</resetValue>
2950 <fields>
2951 <field>
2952 <name>G1_IO1</name>
2953 <description>G1_IO1 Schmitt trigger hysteresis
2954 mode</description>
2955 <bitOffset>0</bitOffset>
2956 <bitWidth>1</bitWidth>
2957 </field>
2958 <field>
2959 <name>G1_IO2</name>
2960 <description>G1_IO2 Schmitt trigger hysteresis
2961 mode</description>
2962 <bitOffset>1</bitOffset>
2963 <bitWidth>1</bitWidth>
2964 </field>
2965 <field>
2966 <name>G1_IO3</name>
2967 <description>G1_IO3 Schmitt trigger hysteresis
2968 mode</description>
2969 <bitOffset>2</bitOffset>
2970 <bitWidth>1</bitWidth>
2971 </field>
2972 <field>
2973 <name>G1_IO4</name>
2974 <description>G1_IO4 Schmitt trigger hysteresis
2975 mode</description>
2976 <bitOffset>3</bitOffset>
2977 <bitWidth>1</bitWidth>
2978 </field>
2979 <field>
2980 <name>G2_IO1</name>
2981 <description>G2_IO1 Schmitt trigger hysteresis
2982 mode</description>
2983 <bitOffset>4</bitOffset>
2984 <bitWidth>1</bitWidth>
2985 </field>
2986 <field>
2987 <name>G2_IO2</name>
2988 <description>G2_IO2 Schmitt trigger hysteresis
2989 mode</description>
2990 <bitOffset>5</bitOffset>
2991 <bitWidth>1</bitWidth>
2992 </field>
2993 <field>
2994 <name>G2_IO3</name>
2995 <description>G2_IO3 Schmitt trigger hysteresis
2996 mode</description>
2997 <bitOffset>6</bitOffset>
2998 <bitWidth>1</bitWidth>
2999 </field>
3000 <field>
3001 <name>G2_IO4</name>
3002 <description>G2_IO4 Schmitt trigger hysteresis
3003 mode</description>
3004 <bitOffset>7</bitOffset>
3005 <bitWidth>1</bitWidth>
3006 </field>
3007 <field>
3008 <name>G3_IO1</name>
3009 <description>G3_IO1 Schmitt trigger hysteresis
3010 mode</description>
3011 <bitOffset>8</bitOffset>
3012 <bitWidth>1</bitWidth>
3013 </field>
3014 <field>
3015 <name>G3_IO2</name>
3016 <description>G3_IO2 Schmitt trigger hysteresis
3017 mode</description>
3018 <bitOffset>9</bitOffset>
3019 <bitWidth>1</bitWidth>
3020 </field>
3021 <field>
3022 <name>G3_IO3</name>
3023 <description>G3_IO3 Schmitt trigger hysteresis
3024 mode</description>
3025 <bitOffset>10</bitOffset>
3026 <bitWidth>1</bitWidth>
3027 </field>
3028 <field>
3029 <name>G3_IO4</name>
3030 <description>G3_IO4 Schmitt trigger hysteresis
3031 mode</description>
3032 <bitOffset>11</bitOffset>
3033 <bitWidth>1</bitWidth>
3034 </field>
3035 <field>
3036 <name>G4_IO1</name>
3037 <description>G4_IO1 Schmitt trigger hysteresis
3038 mode</description>
3039 <bitOffset>12</bitOffset>
3040 <bitWidth>1</bitWidth>
3041 </field>
3042 <field>
3043 <name>G4_IO2</name>
3044 <description>G4_IO2 Schmitt trigger hysteresis
3045 mode</description>
3046 <bitOffset>13</bitOffset>
3047 <bitWidth>1</bitWidth>
3048 </field>
3049 <field>
3050 <name>G4_IO3</name>
3051 <description>G4_IO3 Schmitt trigger hysteresis
3052 mode</description>
3053 <bitOffset>14</bitOffset>
3054 <bitWidth>1</bitWidth>
3055 </field>
3056 <field>
3057 <name>G4_IO4</name>
3058 <description>G4_IO4 Schmitt trigger hysteresis
3059 mode</description>
3060 <bitOffset>15</bitOffset>
3061 <bitWidth>1</bitWidth>
3062 </field>
3063 <field>
3064 <name>G5_IO1</name>
3065 <description>G5_IO1 Schmitt trigger hysteresis
3066 mode</description>
3067 <bitOffset>16</bitOffset>
3068 <bitWidth>1</bitWidth>
3069 </field>
3070 <field>
3071 <name>G5_IO2</name>
3072 <description>G5_IO2 Schmitt trigger hysteresis
3073 mode</description>
3074 <bitOffset>17</bitOffset>
3075 <bitWidth>1</bitWidth>
3076 </field>
3077 <field>
3078 <name>G5_IO3</name>
3079 <description>G5_IO3 Schmitt trigger hysteresis
3080 mode</description>
3081 <bitOffset>18</bitOffset>
3082 <bitWidth>1</bitWidth>
3083 </field>
3084 <field>
3085 <name>G5_IO4</name>
3086 <description>G5_IO4 Schmitt trigger hysteresis
3087 mode</description>
3088 <bitOffset>19</bitOffset>
3089 <bitWidth>1</bitWidth>
3090 </field>
3091 <field>
3092 <name>G6_IO1</name>
3093 <description>G6_IO1 Schmitt trigger hysteresis
3094 mode</description>
3095 <bitOffset>20</bitOffset>
3096 <bitWidth>1</bitWidth>
3097 </field>
3098 <field>
3099 <name>G6_IO2</name>
3100 <description>G6_IO2 Schmitt trigger hysteresis
3101 mode</description>
3102 <bitOffset>21</bitOffset>
3103 <bitWidth>1</bitWidth>
3104 </field>
3105 <field>
3106 <name>G6_IO3</name>
3107 <description>G6_IO3 Schmitt trigger hysteresis
3108 mode</description>
3109 <bitOffset>22</bitOffset>
3110 <bitWidth>1</bitWidth>
3111 </field>
3112 <field>
3113 <name>G6_IO4</name>
3114 <description>G6_IO4 Schmitt trigger hysteresis
3115 mode</description>
3116 <bitOffset>23</bitOffset>
3117 <bitWidth>1</bitWidth>
3118 </field>
3119 <field>
3120 <name>G7_IO1</name>
3121 <description>G7_IO1 Schmitt trigger hysteresis
3122 mode</description>
3123 <bitOffset>24</bitOffset>
3124 <bitWidth>1</bitWidth>
3125 </field>
3126 <field>
3127 <name>G7_IO2</name>
3128 <description>G7_IO2 Schmitt trigger hysteresis
3129 mode</description>
3130 <bitOffset>25</bitOffset>
3131 <bitWidth>1</bitWidth>
3132 </field>
3133 <field>
3134 <name>G7_IO3</name>
3135 <description>G7_IO3 Schmitt trigger hysteresis
3136 mode</description>
3137 <bitOffset>26</bitOffset>
3138 <bitWidth>1</bitWidth>
3139 </field>
3140 <field>
3141 <name>G7_IO4</name>
3142 <description>G7_IO4 Schmitt trigger hysteresis
3143 mode</description>
3144 <bitOffset>27</bitOffset>
3145 <bitWidth>1</bitWidth>
3146 </field>
3147 <field>
3148 <name>G8_IO1</name>
3149 <description>G8_IO1 Schmitt trigger hysteresis
3150 mode</description>
3151 <bitOffset>28</bitOffset>
3152 <bitWidth>1</bitWidth>
3153 </field>
3154 <field>
3155 <name>G8_IO2</name>
3156 <description>G8_IO2 Schmitt trigger hysteresis
3157 mode</description>
3158 <bitOffset>29</bitOffset>
3159 <bitWidth>1</bitWidth>
3160 </field>
3161 <field>
3162 <name>G8_IO3</name>
3163 <description>G8_IO3 Schmitt trigger hysteresis
3164 mode</description>
3165 <bitOffset>30</bitOffset>
3166 <bitWidth>1</bitWidth>
3167 </field>
3168 <field>
3169 <name>G8_IO4</name>
3170 <description>G8_IO4 Schmitt trigger hysteresis
3171 mode</description>
3172 <bitOffset>31</bitOffset>
3173 <bitWidth>1</bitWidth>
3174 </field>
3175 </fields>
3176 </register>
3177 <register>
3178 <name>IOASCR</name>
3179 <displayName>IOASCR</displayName>
3180 <description>I/O analog switch control
3181 register</description>
3182 <addressOffset>0x18</addressOffset>
3183 <size>0x20</size>
3184 <access>read-write</access>
3185 <resetValue>0x00000000</resetValue>
3186 <fields>
3187 <field>
3188 <name>G1_IO1</name>
3189 <description>G1_IO1 analog switch
3190 enable</description>
3191 <bitOffset>0</bitOffset>
3192 <bitWidth>1</bitWidth>
3193 </field>
3194 <field>
3195 <name>G1_IO2</name>
3196 <description>G1_IO2 analog switch
3197 enable</description>
3198 <bitOffset>1</bitOffset>
3199 <bitWidth>1</bitWidth>
3200 </field>
3201 <field>
3202 <name>G1_IO3</name>
3203 <description>G1_IO3 analog switch
3204 enable</description>
3205 <bitOffset>2</bitOffset>
3206 <bitWidth>1</bitWidth>
3207 </field>
3208 <field>
3209 <name>G1_IO4</name>
3210 <description>G1_IO4 analog switch
3211 enable</description>
3212 <bitOffset>3</bitOffset>
3213 <bitWidth>1</bitWidth>
3214 </field>
3215 <field>
3216 <name>G2_IO1</name>
3217 <description>G2_IO1 analog switch
3218 enable</description>
3219 <bitOffset>4</bitOffset>
3220 <bitWidth>1</bitWidth>
3221 </field>
3222 <field>
3223 <name>G2_IO2</name>
3224 <description>G2_IO2 analog switch
3225 enable</description>
3226 <bitOffset>5</bitOffset>
3227 <bitWidth>1</bitWidth>
3228 </field>
3229 <field>
3230 <name>G2_IO3</name>
3231 <description>G2_IO3 analog switch
3232 enable</description>
3233 <bitOffset>6</bitOffset>
3234 <bitWidth>1</bitWidth>
3235 </field>
3236 <field>
3237 <name>G2_IO4</name>
3238 <description>G2_IO4 analog switch
3239 enable</description>
3240 <bitOffset>7</bitOffset>
3241 <bitWidth>1</bitWidth>
3242 </field>
3243 <field>
3244 <name>G3_IO1</name>
3245 <description>G3_IO1 analog switch
3246 enable</description>
3247 <bitOffset>8</bitOffset>
3248 <bitWidth>1</bitWidth>
3249 </field>
3250 <field>
3251 <name>G3_IO2</name>
3252 <description>G3_IO2 analog switch
3253 enable</description>
3254 <bitOffset>9</bitOffset>
3255 <bitWidth>1</bitWidth>
3256 </field>
3257 <field>
3258 <name>G3_IO3</name>
3259 <description>G3_IO3 analog switch
3260 enable</description>
3261 <bitOffset>10</bitOffset>
3262 <bitWidth>1</bitWidth>
3263 </field>
3264 <field>
3265 <name>G3_IO4</name>
3266 <description>G3_IO4 analog switch
3267 enable</description>
3268 <bitOffset>11</bitOffset>
3269 <bitWidth>1</bitWidth>
3270 </field>
3271 <field>
3272 <name>G4_IO1</name>
3273 <description>G4_IO1 analog switch
3274 enable</description>
3275 <bitOffset>12</bitOffset>
3276 <bitWidth>1</bitWidth>
3277 </field>
3278 <field>
3279 <name>G4_IO2</name>
3280 <description>G4_IO2 analog switch
3281 enable</description>
3282 <bitOffset>13</bitOffset>
3283 <bitWidth>1</bitWidth>
3284 </field>
3285 <field>
3286 <name>G4_IO3</name>
3287 <description>G4_IO3 analog switch
3288 enable</description>
3289 <bitOffset>14</bitOffset>
3290 <bitWidth>1</bitWidth>
3291 </field>
3292 <field>
3293 <name>G4_IO4</name>
3294 <description>G4_IO4 analog switch
3295 enable</description>
3296 <bitOffset>15</bitOffset>
3297 <bitWidth>1</bitWidth>
3298 </field>
3299 <field>
3300 <name>G5_IO1</name>
3301 <description>G5_IO1 analog switch
3302 enable</description>
3303 <bitOffset>16</bitOffset>
3304 <bitWidth>1</bitWidth>
3305 </field>
3306 <field>
3307 <name>G5_IO2</name>
3308 <description>G5_IO2 analog switch
3309 enable</description>
3310 <bitOffset>17</bitOffset>
3311 <bitWidth>1</bitWidth>
3312 </field>
3313 <field>
3314 <name>G5_IO3</name>
3315 <description>G5_IO3 analog switch
3316 enable</description>
3317 <bitOffset>18</bitOffset>
3318 <bitWidth>1</bitWidth>
3319 </field>
3320 <field>
3321 <name>G5_IO4</name>
3322 <description>G5_IO4 analog switch
3323 enable</description>
3324 <bitOffset>19</bitOffset>
3325 <bitWidth>1</bitWidth>
3326 </field>
3327 <field>
3328 <name>G6_IO1</name>
3329 <description>G6_IO1 analog switch
3330 enable</description>
3331 <bitOffset>20</bitOffset>
3332 <bitWidth>1</bitWidth>
3333 </field>
3334 <field>
3335 <name>G6_IO2</name>
3336 <description>G6_IO2 analog switch
3337 enable</description>
3338 <bitOffset>21</bitOffset>
3339 <bitWidth>1</bitWidth>
3340 </field>
3341 <field>
3342 <name>G6_IO3</name>
3343 <description>G6_IO3 analog switch
3344 enable</description>
3345 <bitOffset>22</bitOffset>
3346 <bitWidth>1</bitWidth>
3347 </field>
3348 <field>
3349 <name>G6_IO4</name>
3350 <description>G6_IO4 analog switch
3351 enable</description>
3352 <bitOffset>23</bitOffset>
3353 <bitWidth>1</bitWidth>
3354 </field>
3355 <field>
3356 <name>G7_IO1</name>
3357 <description>G7_IO1 analog switch
3358 enable</description>
3359 <bitOffset>24</bitOffset>
3360 <bitWidth>1</bitWidth>
3361 </field>
3362 <field>
3363 <name>G7_IO2</name>
3364 <description>G7_IO2 analog switch
3365 enable</description>
3366 <bitOffset>25</bitOffset>
3367 <bitWidth>1</bitWidth>
3368 </field>
3369 <field>
3370 <name>G7_IO3</name>
3371 <description>G7_IO3 analog switch
3372 enable</description>
3373 <bitOffset>26</bitOffset>
3374 <bitWidth>1</bitWidth>
3375 </field>
3376 <field>
3377 <name>G7_IO4</name>
3378 <description>G7_IO4 analog switch
3379 enable</description>
3380 <bitOffset>27</bitOffset>
3381 <bitWidth>1</bitWidth>
3382 </field>
3383 <field>
3384 <name>G8_IO1</name>
3385 <description>G8_IO1 analog switch
3386 enable</description>
3387 <bitOffset>28</bitOffset>
3388 <bitWidth>1</bitWidth>
3389 </field>
3390 <field>
3391 <name>G8_IO2</name>
3392 <description>G8_IO2 analog switch
3393 enable</description>
3394 <bitOffset>29</bitOffset>
3395 <bitWidth>1</bitWidth>
3396 </field>
3397 <field>
3398 <name>G8_IO3</name>
3399 <description>G8_IO3 analog switch
3400 enable</description>
3401 <bitOffset>30</bitOffset>
3402 <bitWidth>1</bitWidth>
3403 </field>
3404 <field>
3405 <name>G8_IO4</name>
3406 <description>G8_IO4 analog switch
3407 enable</description>
3408 <bitOffset>31</bitOffset>
3409 <bitWidth>1</bitWidth>
3410 </field>
3411 </fields>
3412 </register>
3413 <register>
3414 <name>IOSCR</name>
3415 <displayName>IOSCR</displayName>
3416 <description>I/O sampling control register</description>
3417 <addressOffset>0x20</addressOffset>
3418 <size>0x20</size>
3419 <access>read-write</access>
3420 <resetValue>0x00000000</resetValue>
3421 <fields>
3422 <field>
3423 <name>G1_IO1</name>
3424 <description>G1_IO1 sampling mode</description>
3425 <bitOffset>0</bitOffset>
3426 <bitWidth>1</bitWidth>
3427 </field>
3428 <field>
3429 <name>G1_IO2</name>
3430 <description>G1_IO2 sampling mode</description>
3431 <bitOffset>1</bitOffset>
3432 <bitWidth>1</bitWidth>
3433 </field>
3434 <field>
3435 <name>G1_IO3</name>
3436 <description>G1_IO3 sampling mode</description>
3437 <bitOffset>2</bitOffset>
3438 <bitWidth>1</bitWidth>
3439 </field>
3440 <field>
3441 <name>G1_IO4</name>
3442 <description>G1_IO4 sampling mode</description>
3443 <bitOffset>3</bitOffset>
3444 <bitWidth>1</bitWidth>
3445 </field>
3446 <field>
3447 <name>G2_IO1</name>
3448 <description>G2_IO1 sampling mode</description>
3449 <bitOffset>4</bitOffset>
3450 <bitWidth>1</bitWidth>
3451 </field>
3452 <field>
3453 <name>G2_IO2</name>
3454 <description>G2_IO2 sampling mode</description>
3455 <bitOffset>5</bitOffset>
3456 <bitWidth>1</bitWidth>
3457 </field>
3458 <field>
3459 <name>G2_IO3</name>
3460 <description>G2_IO3 sampling mode</description>
3461 <bitOffset>6</bitOffset>
3462 <bitWidth>1</bitWidth>
3463 </field>
3464 <field>
3465 <name>G2_IO4</name>
3466 <description>G2_IO4 sampling mode</description>
3467 <bitOffset>7</bitOffset>
3468 <bitWidth>1</bitWidth>
3469 </field>
3470 <field>
3471 <name>G3_IO1</name>
3472 <description>G3_IO1 sampling mode</description>
3473 <bitOffset>8</bitOffset>
3474 <bitWidth>1</bitWidth>
3475 </field>
3476 <field>
3477 <name>G3_IO2</name>
3478 <description>G3_IO2 sampling mode</description>
3479 <bitOffset>9</bitOffset>
3480 <bitWidth>1</bitWidth>
3481 </field>
3482 <field>
3483 <name>G3_IO3</name>
3484 <description>G3_IO3 sampling mode</description>
3485 <bitOffset>10</bitOffset>
3486 <bitWidth>1</bitWidth>
3487 </field>
3488 <field>
3489 <name>G3_IO4</name>
3490 <description>G3_IO4 sampling mode</description>
3491 <bitOffset>11</bitOffset>
3492 <bitWidth>1</bitWidth>
3493 </field>
3494 <field>
3495 <name>G4_IO1</name>
3496 <description>G4_IO1 sampling mode</description>
3497 <bitOffset>12</bitOffset>
3498 <bitWidth>1</bitWidth>
3499 </field>
3500 <field>
3501 <name>G4_IO2</name>
3502 <description>G4_IO2 sampling mode</description>
3503 <bitOffset>13</bitOffset>
3504 <bitWidth>1</bitWidth>
3505 </field>
3506 <field>
3507 <name>G4_IO3</name>
3508 <description>G4_IO3 sampling mode</description>
3509 <bitOffset>14</bitOffset>
3510 <bitWidth>1</bitWidth>
3511 </field>
3512 <field>
3513 <name>G4_IO4</name>
3514 <description>G4_IO4 sampling mode</description>
3515 <bitOffset>15</bitOffset>
3516 <bitWidth>1</bitWidth>
3517 </field>
3518 <field>
3519 <name>G5_IO1</name>
3520 <description>G5_IO1 sampling mode</description>
3521 <bitOffset>16</bitOffset>
3522 <bitWidth>1</bitWidth>
3523 </field>
3524 <field>
3525 <name>G5_IO2</name>
3526 <description>G5_IO2 sampling mode</description>
3527 <bitOffset>17</bitOffset>
3528 <bitWidth>1</bitWidth>
3529 </field>
3530 <field>
3531 <name>G5_IO3</name>
3532 <description>G5_IO3 sampling mode</description>
3533 <bitOffset>18</bitOffset>
3534 <bitWidth>1</bitWidth>
3535 </field>
3536 <field>
3537 <name>G5_IO4</name>
3538 <description>G5_IO4 sampling mode</description>
3539 <bitOffset>19</bitOffset>
3540 <bitWidth>1</bitWidth>
3541 </field>
3542 <field>
3543 <name>G6_IO1</name>
3544 <description>G6_IO1 sampling mode</description>
3545 <bitOffset>20</bitOffset>
3546 <bitWidth>1</bitWidth>
3547 </field>
3548 <field>
3549 <name>G6_IO2</name>
3550 <description>G6_IO2 sampling mode</description>
3551 <bitOffset>21</bitOffset>
3552 <bitWidth>1</bitWidth>
3553 </field>
3554 <field>
3555 <name>G6_IO3</name>
3556 <description>G6_IO3 sampling mode</description>
3557 <bitOffset>22</bitOffset>
3558 <bitWidth>1</bitWidth>
3559 </field>
3560 <field>
3561 <name>G6_IO4</name>
3562 <description>G6_IO4 sampling mode</description>
3563 <bitOffset>23</bitOffset>
3564 <bitWidth>1</bitWidth>
3565 </field>
3566 <field>
3567 <name>G7_IO1</name>
3568 <description>G7_IO1 sampling mode</description>
3569 <bitOffset>24</bitOffset>
3570 <bitWidth>1</bitWidth>
3571 </field>
3572 <field>
3573 <name>G7_IO2</name>
3574 <description>G7_IO2 sampling mode</description>
3575 <bitOffset>25</bitOffset>
3576 <bitWidth>1</bitWidth>
3577 </field>
3578 <field>
3579 <name>G7_IO3</name>
3580 <description>G7_IO3 sampling mode</description>
3581 <bitOffset>26</bitOffset>
3582 <bitWidth>1</bitWidth>
3583 </field>
3584 <field>
3585 <name>G7_IO4</name>
3586 <description>G7_IO4 sampling mode</description>
3587 <bitOffset>27</bitOffset>
3588 <bitWidth>1</bitWidth>
3589 </field>
3590 <field>
3591 <name>G8_IO1</name>
3592 <description>G8_IO1 sampling mode</description>
3593 <bitOffset>28</bitOffset>
3594 <bitWidth>1</bitWidth>
3595 </field>
3596 <field>
3597 <name>G8_IO2</name>
3598 <description>G8_IO2 sampling mode</description>
3599 <bitOffset>29</bitOffset>
3600 <bitWidth>1</bitWidth>
3601 </field>
3602 <field>
3603 <name>G8_IO3</name>
3604 <description>G8_IO3 sampling mode</description>
3605 <bitOffset>30</bitOffset>
3606 <bitWidth>1</bitWidth>
3607 </field>
3608 <field>
3609 <name>G8_IO4</name>
3610 <description>G8_IO4 sampling mode</description>
3611 <bitOffset>31</bitOffset>
3612 <bitWidth>1</bitWidth>
3613 </field>
3614 </fields>
3615 </register>
3616 <register>
3617 <name>IOCCR</name>
3618 <displayName>IOCCR</displayName>
3619 <description>I/O channel control register</description>
3620 <addressOffset>0x28</addressOffset>
3621 <size>0x20</size>
3622 <access>read-write</access>
3623 <resetValue>0x00000000</resetValue>
3624 <fields>
3625 <field>
3626 <name>G1_IO1</name>
3627 <description>G1_IO1 channel mode</description>
3628 <bitOffset>0</bitOffset>
3629 <bitWidth>1</bitWidth>
3630 </field>
3631 <field>
3632 <name>G1_IO2</name>
3633 <description>G1_IO2 channel mode</description>
3634 <bitOffset>1</bitOffset>
3635 <bitWidth>1</bitWidth>
3636 </field>
3637 <field>
3638 <name>G1_IO3</name>
3639 <description>G1_IO3 channel mode</description>
3640 <bitOffset>2</bitOffset>
3641 <bitWidth>1</bitWidth>
3642 </field>
3643 <field>
3644 <name>G1_IO4</name>
3645 <description>G1_IO4 channel mode</description>
3646 <bitOffset>3</bitOffset>
3647 <bitWidth>1</bitWidth>
3648 </field>
3649 <field>
3650 <name>G2_IO1</name>
3651 <description>G2_IO1 channel mode</description>
3652 <bitOffset>4</bitOffset>
3653 <bitWidth>1</bitWidth>
3654 </field>
3655 <field>
3656 <name>G2_IO2</name>
3657 <description>G2_IO2 channel mode</description>
3658 <bitOffset>5</bitOffset>
3659 <bitWidth>1</bitWidth>
3660 </field>
3661 <field>
3662 <name>G2_IO3</name>
3663 <description>G2_IO3 channel mode</description>
3664 <bitOffset>6</bitOffset>
3665 <bitWidth>1</bitWidth>
3666 </field>
3667 <field>
3668 <name>G2_IO4</name>
3669 <description>G2_IO4 channel mode</description>
3670 <bitOffset>7</bitOffset>
3671 <bitWidth>1</bitWidth>
3672 </field>
3673 <field>
3674 <name>G3_IO1</name>
3675 <description>G3_IO1 channel mode</description>
3676 <bitOffset>8</bitOffset>
3677 <bitWidth>1</bitWidth>
3678 </field>
3679 <field>
3680 <name>G3_IO2</name>
3681 <description>G3_IO2 channel mode</description>
3682 <bitOffset>9</bitOffset>
3683 <bitWidth>1</bitWidth>
3684 </field>
3685 <field>
3686 <name>G3_IO3</name>
3687 <description>G3_IO3 channel mode</description>
3688 <bitOffset>10</bitOffset>
3689 <bitWidth>1</bitWidth>
3690 </field>
3691 <field>
3692 <name>G3_IO4</name>
3693 <description>G3_IO4 channel mode</description>
3694 <bitOffset>11</bitOffset>
3695 <bitWidth>1</bitWidth>
3696 </field>
3697 <field>
3698 <name>G4_IO1</name>
3699 <description>G4_IO1 channel mode</description>
3700 <bitOffset>12</bitOffset>
3701 <bitWidth>1</bitWidth>
3702 </field>
3703 <field>
3704 <name>G4_IO2</name>
3705 <description>G4_IO2 channel mode</description>
3706 <bitOffset>13</bitOffset>
3707 <bitWidth>1</bitWidth>
3708 </field>
3709 <field>
3710 <name>G4_IO3</name>
3711 <description>G4_IO3 channel mode</description>
3712 <bitOffset>14</bitOffset>
3713 <bitWidth>1</bitWidth>
3714 </field>
3715 <field>
3716 <name>G4_IO4</name>
3717 <description>G4_IO4 channel mode</description>
3718 <bitOffset>15</bitOffset>
3719 <bitWidth>1</bitWidth>
3720 </field>
3721 <field>
3722 <name>G5_IO1</name>
3723 <description>G5_IO1 channel mode</description>
3724 <bitOffset>16</bitOffset>
3725 <bitWidth>1</bitWidth>
3726 </field>
3727 <field>
3728 <name>G5_IO2</name>
3729 <description>G5_IO2 channel mode</description>
3730 <bitOffset>17</bitOffset>
3731 <bitWidth>1</bitWidth>
3732 </field>
3733 <field>
3734 <name>G5_IO3</name>
3735 <description>G5_IO3 channel mode</description>
3736 <bitOffset>18</bitOffset>
3737 <bitWidth>1</bitWidth>
3738 </field>
3739 <field>
3740 <name>G5_IO4</name>
3741 <description>G5_IO4 channel mode</description>
3742 <bitOffset>19</bitOffset>
3743 <bitWidth>1</bitWidth>
3744 </field>
3745 <field>
3746 <name>G6_IO1</name>
3747 <description>G6_IO1 channel mode</description>
3748 <bitOffset>20</bitOffset>
3749 <bitWidth>1</bitWidth>
3750 </field>
3751 <field>
3752 <name>G6_IO2</name>
3753 <description>G6_IO2 channel mode</description>
3754 <bitOffset>21</bitOffset>
3755 <bitWidth>1</bitWidth>
3756 </field>
3757 <field>
3758 <name>G6_IO3</name>
3759 <description>G6_IO3 channel mode</description>
3760 <bitOffset>22</bitOffset>
3761 <bitWidth>1</bitWidth>
3762 </field>
3763 <field>
3764 <name>G6_IO4</name>
3765 <description>G6_IO4 channel mode</description>
3766 <bitOffset>23</bitOffset>
3767 <bitWidth>1</bitWidth>
3768 </field>
3769 <field>
3770 <name>G7_IO1</name>
3771 <description>G7_IO1 channel mode</description>
3772 <bitOffset>24</bitOffset>
3773 <bitWidth>1</bitWidth>
3774 </field>
3775 <field>
3776 <name>G7_IO2</name>
3777 <description>G7_IO2 channel mode</description>
3778 <bitOffset>25</bitOffset>
3779 <bitWidth>1</bitWidth>
3780 </field>
3781 <field>
3782 <name>G7_IO3</name>
3783 <description>G7_IO3 channel mode</description>
3784 <bitOffset>26</bitOffset>
3785 <bitWidth>1</bitWidth>
3786 </field>
3787 <field>
3788 <name>G7_IO4</name>
3789 <description>G7_IO4 channel mode</description>
3790 <bitOffset>27</bitOffset>
3791 <bitWidth>1</bitWidth>
3792 </field>
3793 <field>
3794 <name>G8_IO1</name>
3795 <description>G8_IO1 channel mode</description>
3796 <bitOffset>28</bitOffset>
3797 <bitWidth>1</bitWidth>
3798 </field>
3799 <field>
3800 <name>G8_IO2</name>
3801 <description>G8_IO2 channel mode</description>
3802 <bitOffset>29</bitOffset>
3803 <bitWidth>1</bitWidth>
3804 </field>
3805 <field>
3806 <name>G8_IO3</name>
3807 <description>G8_IO3 channel mode</description>
3808 <bitOffset>30</bitOffset>
3809 <bitWidth>1</bitWidth>
3810 </field>
3811 <field>
3812 <name>G8_IO4</name>
3813 <description>G8_IO4 channel mode</description>
3814 <bitOffset>31</bitOffset>
3815 <bitWidth>1</bitWidth>
3816 </field>
3817 </fields>
3818 </register>
3819 <register>
3820 <name>IOGCSR</name>
3821 <displayName>IOGCSR</displayName>
3822 <description>I/O group control status
3823 register</description>
3824 <addressOffset>0x30</addressOffset>
3825 <size>0x20</size>
3826 <resetValue>0x00000000</resetValue>
3827 <fields>
3828 <field>
3829 <name>G8S</name>
3830 <description>Analog I/O group x status</description>
3831 <bitOffset>23</bitOffset>
3832 <bitWidth>1</bitWidth>
3833 <access>read-write</access>
3834 </field>
3835 <field>
3836 <name>G7S</name>
3837 <description>Analog I/O group x status</description>
3838 <bitOffset>22</bitOffset>
3839 <bitWidth>1</bitWidth>
3840 <access>read-write</access>
3841 </field>
3842 <field>
3843 <name>G6S</name>
3844 <description>Analog I/O group x status</description>
3845 <bitOffset>21</bitOffset>
3846 <bitWidth>1</bitWidth>
3847 <access>read-only</access>
3848 </field>
3849 <field>
3850 <name>G5S</name>
3851 <description>Analog I/O group x status</description>
3852 <bitOffset>20</bitOffset>
3853 <bitWidth>1</bitWidth>
3854 <access>read-only</access>
3855 </field>
3856 <field>
3857 <name>G4S</name>
3858 <description>Analog I/O group x status</description>
3859 <bitOffset>19</bitOffset>
3860 <bitWidth>1</bitWidth>
3861 <access>read-only</access>
3862 </field>
3863 <field>
3864 <name>G3S</name>
3865 <description>Analog I/O group x status</description>
3866 <bitOffset>18</bitOffset>
3867 <bitWidth>1</bitWidth>
3868 <access>read-only</access>
3869 </field>
3870 <field>
3871 <name>G2S</name>
3872 <description>Analog I/O group x status</description>
3873 <bitOffset>17</bitOffset>
3874 <bitWidth>1</bitWidth>
3875 <access>read-only</access>
3876 </field>
3877 <field>
3878 <name>G1S</name>
3879 <description>Analog I/O group x status</description>
3880 <bitOffset>16</bitOffset>
3881 <bitWidth>1</bitWidth>
3882 <access>read-only</access>
3883 </field>
3884 <field>
3885 <name>G8E</name>
3886 <description>Analog I/O group x enable</description>
3887 <bitOffset>7</bitOffset>
3888 <bitWidth>1</bitWidth>
3889 <access>read-write</access>
3890 </field>
3891 <field>
3892 <name>G7E</name>
3893 <description>Analog I/O group x enable</description>
3894 <bitOffset>6</bitOffset>
3895 <bitWidth>1</bitWidth>
3896 <access>read-write</access>
3897 </field>
3898 <field>
3899 <name>G6E</name>
3900 <description>Analog I/O group x enable</description>
3901 <bitOffset>5</bitOffset>
3902 <bitWidth>1</bitWidth>
3903 <access>read-write</access>
3904 </field>
3905 <field>
3906 <name>G5E</name>
3907 <description>Analog I/O group x enable</description>
3908 <bitOffset>4</bitOffset>
3909 <bitWidth>1</bitWidth>
3910 <access>read-write</access>
3911 </field>
3912 <field>
3913 <name>G4E</name>
3914 <description>Analog I/O group x enable</description>
3915 <bitOffset>3</bitOffset>
3916 <bitWidth>1</bitWidth>
3917 <access>read-write</access>
3918 </field>
3919 <field>
3920 <name>G3E</name>
3921 <description>Analog I/O group x enable</description>
3922 <bitOffset>2</bitOffset>
3923 <bitWidth>1</bitWidth>
3924 <access>read-write</access>
3925 </field>
3926 <field>
3927 <name>G2E</name>
3928 <description>Analog I/O group x enable</description>
3929 <bitOffset>1</bitOffset>
3930 <bitWidth>1</bitWidth>
3931 <access>read-write</access>
3932 </field>
3933 <field>
3934 <name>G1E</name>
3935 <description>Analog I/O group x enable</description>
3936 <bitOffset>0</bitOffset>
3937 <bitWidth>1</bitWidth>
3938 <access>read-write</access>
3939 </field>
3940 </fields>
3941 </register>
3942 <register>
3943 <name>IOG1CR</name>
3944 <displayName>IOG1CR</displayName>
3945 <description>I/O group x counter register</description>
3946 <addressOffset>0x34</addressOffset>
3947 <size>0x20</size>
3948 <access>read-only</access>
3949 <resetValue>0x00000000</resetValue>
3950 <fields>
3951 <field>
3952 <name>CNT</name>
3953 <description>Counter value</description>
3954 <bitOffset>0</bitOffset>
3955 <bitWidth>14</bitWidth>
3956 </field>
3957 </fields>
3958 </register>
3959 <register>
3960 <name>IOG2CR</name>
3961 <displayName>IOG2CR</displayName>
3962 <description>I/O group x counter register</description>
3963 <addressOffset>0x38</addressOffset>
3964 <size>0x20</size>
3965 <access>read-only</access>
3966 <resetValue>0x00000000</resetValue>
3967 <fields>
3968 <field>
3969 <name>CNT</name>
3970 <description>Counter value</description>
3971 <bitOffset>0</bitOffset>
3972 <bitWidth>14</bitWidth>
3973 </field>
3974 </fields>
3975 </register>
3976 <register>
3977 <name>IOG3CR</name>
3978 <displayName>IOG3CR</displayName>
3979 <description>I/O group x counter register</description>
3980 <addressOffset>0x3C</addressOffset>
3981 <size>0x20</size>
3982 <access>read-only</access>
3983 <resetValue>0x00000000</resetValue>
3984 <fields>
3985 <field>
3986 <name>CNT</name>
3987 <description>Counter value</description>
3988 <bitOffset>0</bitOffset>
3989 <bitWidth>14</bitWidth>
3990 </field>
3991 </fields>
3992 </register>
3993 <register>
3994 <name>IOG4CR</name>
3995 <displayName>IOG4CR</displayName>
3996 <description>I/O group x counter register</description>
3997 <addressOffset>0x40</addressOffset>
3998 <size>0x20</size>
3999 <access>read-only</access>
4000 <resetValue>0x00000000</resetValue>
4001 <fields>
4002 <field>
4003 <name>CNT</name>
4004 <description>Counter value</description>
4005 <bitOffset>0</bitOffset>
4006 <bitWidth>14</bitWidth>
4007 </field>
4008 </fields>
4009 </register>
4010 <register>
4011 <name>IOG5CR</name>
4012 <displayName>IOG5CR</displayName>
4013 <description>I/O group x counter register</description>
4014 <addressOffset>0x44</addressOffset>
4015 <size>0x20</size>
4016 <access>read-only</access>
4017 <resetValue>0x00000000</resetValue>
4018 <fields>
4019 <field>
4020 <name>CNT</name>
4021 <description>Counter value</description>
4022 <bitOffset>0</bitOffset>
4023 <bitWidth>14</bitWidth>
4024 </field>
4025 </fields>
4026 </register>
4027 <register>
4028 <name>IOG6CR</name>
4029 <displayName>IOG6CR</displayName>
4030 <description>I/O group x counter register</description>
4031 <addressOffset>0x48</addressOffset>
4032 <size>0x20</size>
4033 <access>read-only</access>
4034 <resetValue>0x00000000</resetValue>
4035 <fields>
4036 <field>
4037 <name>CNT</name>
4038 <description>Counter value</description>
4039 <bitOffset>0</bitOffset>
4040 <bitWidth>14</bitWidth>
4041 </field>
4042 </fields>
4043 </register>
4044 <register>
4045 <name>IOG7CR</name>
4046 <displayName>IOG7CR</displayName>
4047 <description>I/O group x counter register</description>
4048 <addressOffset>0x4C</addressOffset>
4049 <size>0x20</size>
4050 <access>read-only</access>
4051 <resetValue>0x00000000</resetValue>
4052 <fields>
4053 <field>
4054 <name>CNT</name>
4055 <description>Counter value</description>
4056 <bitOffset>0</bitOffset>
4057 <bitWidth>14</bitWidth>
4058 </field>
4059 </fields>
4060 </register>
4061 <register>
4062 <name>IOG8CR</name>
4063 <displayName>IOG8CR</displayName>
4064 <description>I/O group x counter register</description>
4065 <addressOffset>0x50</addressOffset>
4066 <size>0x20</size>
4067 <access>read-only</access>
4068 <resetValue>0x00000000</resetValue>
4069 <fields>
4070 <field>
4071 <name>CNT</name>
4072 <description>Counter value</description>
4073 <bitOffset>0</bitOffset>
4074 <bitWidth>14</bitWidth>
4075 </field>
4076 </fields>
4077 </register>
4078 </registers>
4079 </peripheral>
4080 <peripheral>
4081 <name>CRC</name>
4082 <description>cyclic redundancy check calculation
4083 unit</description>
4084 <groupName>CRC</groupName>
4085 <baseAddress>0x40023000</baseAddress>
4086 <addressBlock>
4087 <offset>0x0</offset>
4088 <size>0x400</size>
4089 <usage>registers</usage>
4090 </addressBlock>
4091 <registers>
4092 <register>
4093 <name>DR</name>
4094 <displayName>DR</displayName>
4095 <description>Data register</description>
4096 <addressOffset>0x0</addressOffset>
4097 <size>0x20</size>
4098 <access>read-write</access>
4099 <resetValue>0xFFFFFFFF</resetValue>
4100 <fields>
4101 <field>
4102 <name>DR</name>
4103 <description>Data register bits</description>
4104 <bitOffset>0</bitOffset>
4105 <bitWidth>32</bitWidth>
4106 </field>
4107 </fields>
4108 </register>
4109 <register>
4110 <name>IDR</name>
4111 <displayName>IDR</displayName>
4112 <description>Independent data register</description>
4113 <addressOffset>0x4</addressOffset>
4114 <size>0x20</size>
4115 <access>read-write</access>
4116 <resetValue>0x00000000</resetValue>
4117 <fields>
4118 <field>
4119 <name>IDR</name>
4120 <description>General-purpose 8-bit data register
4121 bits</description>
4122 <bitOffset>0</bitOffset>
4123 <bitWidth>8</bitWidth>
4124 </field>
4125 </fields>
4126 </register>
4127 <register>
4128 <name>CR</name>
4129 <displayName>CR</displayName>
4130 <description>Control register</description>
4131 <addressOffset>0x8</addressOffset>
4132 <size>0x20</size>
4133 <access>read-write</access>
4134 <resetValue>0x00000000</resetValue>
4135 <fields>
4136 <field>
4137 <name>RESET</name>
4138 <description>reset bit</description>
4139 <bitOffset>0</bitOffset>
4140 <bitWidth>1</bitWidth>
4141 </field>
4142 <field>
4143 <name>POLYSIZE</name>
4144 <description>Polynomial size</description>
4145 <bitOffset>3</bitOffset>
4146 <bitWidth>2</bitWidth>
4147 </field>
4148 <field>
4149 <name>REV_IN</name>
4150 <description>Reverse input data</description>
4151 <bitOffset>5</bitOffset>
4152 <bitWidth>2</bitWidth>
4153 </field>
4154 <field>
4155 <name>REV_OUT</name>
4156 <description>Reverse output data</description>
4157 <bitOffset>7</bitOffset>
4158 <bitWidth>1</bitWidth>
4159 </field>
4160 </fields>
4161 </register>
4162 <register>
4163 <name>INIT</name>
4164 <displayName>INIT</displayName>
4165 <description>Initial CRC value</description>
4166 <addressOffset>0x10</addressOffset>
4167 <size>0x20</size>
4168 <access>read-write</access>
4169 <resetValue>0xFFFFFFFF</resetValue>
4170 <fields>
4171 <field>
4172 <name>INIT</name>
4173 <description>Programmable initial CRC
4174 value</description>
4175 <bitOffset>0</bitOffset>
4176 <bitWidth>32</bitWidth>
4177 </field>
4178 </fields>
4179 </register>
4180 <register>
4181 <name>POL</name>
4182 <displayName>POL</displayName>
4183 <description>CRC polynomial</description>
4184 <addressOffset>0x14</addressOffset>
4185 <size>0x20</size>
4186 <access>read-write</access>
4187 <resetValue>0x04C11DB7</resetValue>
4188 <fields>
4189 <field>
4190 <name>POL</name>
4191 <description>Programmable polynomial</description>
4192 <bitOffset>0</bitOffset>
4193 <bitWidth>32</bitWidth>
4194 </field>
4195 </fields>
4196 </register>
4197 </registers>
4198 </peripheral>
4199 <peripheral>
4200 <name>Flash</name>
4201 <description>Flash</description>
4202 <groupName>Flash</groupName>
4203 <baseAddress>0x40022000</baseAddress>
4204 <addressBlock>
4205 <offset>0x0</offset>
4206 <size>0x400</size>
4207 <usage>registers</usage>
4208 </addressBlock>
4209 <interrupt>
4210 <name>FLASH</name>
4211 <description>Flash global interrupt</description>
4212 <value>4</value>
4213 </interrupt>
4214 <registers>
4215 <register>
4216 <name>ACR</name>
4217 <displayName>ACR</displayName>
4218 <description>Flash access control register</description>
4219 <addressOffset>0x0</addressOffset>
4220 <size>0x20</size>
4221 <resetValue>0x00000030</resetValue>
4222 <fields>
4223 <field>
4224 <name>LATENCY</name>
4225 <description>LATENCY</description>
4226 <bitOffset>0</bitOffset>
4227 <bitWidth>3</bitWidth>
4228 <access>read-write</access>
4229 </field>
4230 <field>
4231 <name>PRFTBE</name>
4232 <description>PRFTBE</description>
4233 <bitOffset>4</bitOffset>
4234 <bitWidth>1</bitWidth>
4235 <access>read-write</access>
4236 </field>
4237 <field>
4238 <name>PRFTBS</name>
4239 <description>PRFTBS</description>
4240 <bitOffset>5</bitOffset>
4241 <bitWidth>1</bitWidth>
4242 <access>read-only</access>
4243 </field>
4244 </fields>
4245 </register>
4246 <register>
4247 <name>KEYR</name>
4248 <displayName>KEYR</displayName>
4249 <description>Flash key register</description>
4250 <addressOffset>0x4</addressOffset>
4251 <size>0x20</size>
4252 <access>write-only</access>
4253 <resetValue>0x00000000</resetValue>
4254 <fields>
4255 <field>
4256 <name>FKEYR</name>
4257 <description>Flash Key</description>
4258 <bitOffset>0</bitOffset>
4259 <bitWidth>32</bitWidth>
4260 </field>
4261 </fields>
4262 </register>
4263 <register>
4264 <name>OPTKEYR</name>
4265 <displayName>OPTKEYR</displayName>
4266 <description>Flash option key register</description>
4267 <addressOffset>0x8</addressOffset>
4268 <size>0x20</size>
4269 <access>write-only</access>
4270 <resetValue>0x00000000</resetValue>
4271 <fields>
4272 <field>
4273 <name>OPTKEYR</name>
4274 <description>Option byte key</description>
4275 <bitOffset>0</bitOffset>
4276 <bitWidth>32</bitWidth>
4277 </field>
4278 </fields>
4279 </register>
4280 <register>
4281 <name>SR</name>
4282 <displayName>SR</displayName>
4283 <description>Flash status register</description>
4284 <addressOffset>0xC</addressOffset>
4285 <size>0x20</size>
4286 <resetValue>0x00000000</resetValue>
4287 <fields>
4288 <field>
4289 <name>EOP</name>
4290 <description>End of operation</description>
4291 <bitOffset>5</bitOffset>
4292 <bitWidth>1</bitWidth>
4293 <access>read-write</access>
4294 </field>
4295 <field>
4296 <name>WRPRT</name>
4297 <description>Write protection error</description>
4298 <bitOffset>4</bitOffset>
4299 <bitWidth>1</bitWidth>
4300 <access>read-write</access>
4301 </field>
4302 <field>
4303 <name>PGERR</name>
4304 <description>Programming error</description>
4305 <bitOffset>2</bitOffset>
4306 <bitWidth>1</bitWidth>
4307 <access>read-write</access>
4308 </field>
4309 <field>
4310 <name>BSY</name>
4311 <description>Busy</description>
4312 <bitOffset>0</bitOffset>
4313 <bitWidth>1</bitWidth>
4314 <access>read-only</access>
4315 </field>
4316 </fields>
4317 </register>
4318 <register>
4319 <name>CR</name>
4320 <displayName>CR</displayName>
4321 <description>Flash control register</description>
4322 <addressOffset>0x10</addressOffset>
4323 <size>0x20</size>
4324 <access>read-write</access>
4325 <resetValue>0x00000080</resetValue>
4326 <fields>
4327 <field>
4328 <name>FORCE_OPTLOAD</name>
4329 <description>Force option byte loading</description>
4330 <bitOffset>13</bitOffset>
4331 <bitWidth>1</bitWidth>
4332 </field>
4333 <field>
4334 <name>EOPIE</name>
4335 <description>End of operation interrupt
4336 enable</description>
4337 <bitOffset>12</bitOffset>
4338 <bitWidth>1</bitWidth>
4339 </field>
4340 <field>
4341 <name>ERRIE</name>
4342 <description>Error interrupt enable</description>
4343 <bitOffset>10</bitOffset>
4344 <bitWidth>1</bitWidth>
4345 </field>
4346 <field>
4347 <name>OPTWRE</name>
4348 <description>Option bytes write enable</description>
4349 <bitOffset>9</bitOffset>
4350 <bitWidth>1</bitWidth>
4351 </field>
4352 <field>
4353 <name>LOCK</name>
4354 <description>Lock</description>
4355 <bitOffset>7</bitOffset>
4356 <bitWidth>1</bitWidth>
4357 </field>
4358 <field>
4359 <name>STRT</name>
4360 <description>Start</description>
4361 <bitOffset>6</bitOffset>
4362 <bitWidth>1</bitWidth>
4363 </field>
4364 <field>
4365 <name>OPTER</name>
4366 <description>Option byte erase</description>
4367 <bitOffset>5</bitOffset>
4368 <bitWidth>1</bitWidth>
4369 </field>
4370 <field>
4371 <name>OPTPG</name>
4372 <description>Option byte programming</description>
4373 <bitOffset>4</bitOffset>
4374 <bitWidth>1</bitWidth>
4375 </field>
4376 <field>
4377 <name>MER</name>
4378 <description>Mass erase</description>
4379 <bitOffset>2</bitOffset>
4380 <bitWidth>1</bitWidth>
4381 </field>
4382 <field>
4383 <name>PER</name>
4384 <description>Page erase</description>
4385 <bitOffset>1</bitOffset>
4386 <bitWidth>1</bitWidth>
4387 </field>
4388 <field>
4389 <name>PG</name>
4390 <description>Programming</description>
4391 <bitOffset>0</bitOffset>
4392 <bitWidth>1</bitWidth>
4393 </field>
4394 </fields>
4395 </register>
4396 <register>
4397 <name>AR</name>
4398 <displayName>AR</displayName>
4399 <description>Flash address register</description>
4400 <addressOffset>0x14</addressOffset>
4401 <size>0x20</size>
4402 <access>write-only</access>
4403 <resetValue>0x00000000</resetValue>
4404 <fields>
4405 <field>
4406 <name>FAR</name>
4407 <description>Flash address</description>
4408 <bitOffset>0</bitOffset>
4409 <bitWidth>32</bitWidth>
4410 </field>
4411 </fields>
4412 </register>
4413 <register>
4414 <name>OBR</name>
4415 <displayName>OBR</displayName>
4416 <description>Option byte register</description>
4417 <addressOffset>0x1C</addressOffset>
4418 <size>0x20</size>
4419 <access>read-only</access>
4420 <resetValue>0xFFFFFF02</resetValue>
4421 <fields>
4422 <field>
4423 <name>OPTERR</name>
4424 <description>Option byte error</description>
4425 <bitOffset>0</bitOffset>
4426 <bitWidth>1</bitWidth>
4427 </field>
4428 <field>
4429 <name>LEVEL1_PROT</name>
4430 <description>Level 1 protection status</description>
4431 <bitOffset>1</bitOffset>
4432 <bitWidth>1</bitWidth>
4433 </field>
4434 <field>
4435 <name>LEVEL2_PROT</name>
4436 <description>Level 2 protection status</description>
4437 <bitOffset>2</bitOffset>
4438 <bitWidth>1</bitWidth>
4439 </field>
4440 <field>
4441 <name>WDG_SW</name>
4442 <description>WDG_SW</description>
4443 <bitOffset>8</bitOffset>
4444 <bitWidth>1</bitWidth>
4445 </field>
4446 <field>
4447 <name>nRST_STOP</name>
4448 <description>nRST_STOP</description>
4449 <bitOffset>9</bitOffset>
4450 <bitWidth>1</bitWidth>
4451 </field>
4452 <field>
4453 <name>nRST_STDBY</name>
4454 <description>nRST_STDBY</description>
4455 <bitOffset>10</bitOffset>
4456 <bitWidth>1</bitWidth>
4457 </field>
4458 <field>
4459 <name>BOOT1</name>
4460 <description>BOOT1</description>
4461 <bitOffset>12</bitOffset>
4462 <bitWidth>1</bitWidth>
4463 </field>
4464 <field>
4465 <name>VDDA_MONITOR</name>
4466 <description>VDDA_MONITOR</description>
4467 <bitOffset>13</bitOffset>
4468 <bitWidth>1</bitWidth>
4469 </field>
4470 <field>
4471 <name>SRAM_PARITY_CHECK</name>
4472 <description>SRAM_PARITY_CHECK</description>
4473 <bitOffset>14</bitOffset>
4474 <bitWidth>1</bitWidth>
4475 </field>
4476 <field>
4477 <name>Data0</name>
4478 <description>Data0</description>
4479 <bitOffset>16</bitOffset>
4480 <bitWidth>8</bitWidth>
4481 </field>
4482 <field>
4483 <name>Data1</name>
4484 <description>Data1</description>
4485 <bitOffset>24</bitOffset>
4486 <bitWidth>8</bitWidth>
4487 </field>
4488 </fields>
4489 </register>
4490 <register>
4491 <name>WRPR</name>
4492 <displayName>WRPR</displayName>
4493 <description>Write protection register</description>
4494 <addressOffset>0x20</addressOffset>
4495 <size>0x20</size>
4496 <access>read-only</access>
4497 <resetValue>0xFFFFFFFF</resetValue>
4498 <fields>
4499 <field>
4500 <name>WRP</name>
4501 <description>Write protect</description>
4502 <bitOffset>0</bitOffset>
4503 <bitWidth>32</bitWidth>
4504 </field>
4505 </fields>
4506 </register>
4507 </registers>
4508 </peripheral>
4509 <peripheral>
4510 <name>RCC</name>
4511 <description>Reset and clock control</description>
4512 <groupName>RCC</groupName>
4513 <baseAddress>0x40021000</baseAddress>
4514 <addressBlock>
4515 <offset>0x0</offset>
4516 <size>0x400</size>
4517 <usage>registers</usage>
4518 </addressBlock>
4519 <interrupt>
4520 <name>RCC</name>
4521 <description>RCC global interrupt</description>
4522 <value>5</value>
4523 </interrupt>
4524 <registers>
4525 <register>
4526 <name>CR</name>
4527 <displayName>CR</displayName>
4528 <description>Clock control register</description>
4529 <addressOffset>0x0</addressOffset>
4530 <size>0x20</size>
4531 <resetValue>0x00000083</resetValue>
4532 <fields>
4533 <field>
4534 <name>HSION</name>
4535 <description>Internal High Speed clock
4536 enable</description>
4537 <bitOffset>0</bitOffset>
4538 <bitWidth>1</bitWidth>
4539 <access>read-write</access>
4540 </field>
4541 <field>
4542 <name>HSIRDY</name>
4543 <description>Internal High Speed clock ready
4544 flag</description>
4545 <bitOffset>1</bitOffset>
4546 <bitWidth>1</bitWidth>
4547 <access>read-only</access>
4548 </field>
4549 <field>
4550 <name>HSITRIM</name>
4551 <description>Internal High Speed clock
4552 trimming</description>
4553 <bitOffset>3</bitOffset>
4554 <bitWidth>5</bitWidth>
4555 <access>read-write</access>
4556 </field>
4557 <field>
4558 <name>HSICAL</name>
4559 <description>Internal High Speed clock
4560 Calibration</description>
4561 <bitOffset>8</bitOffset>
4562 <bitWidth>8</bitWidth>
4563 <access>read-only</access>
4564 </field>
4565 <field>
4566 <name>HSEON</name>
4567 <description>External High Speed clock
4568 enable</description>
4569 <bitOffset>16</bitOffset>
4570 <bitWidth>1</bitWidth>
4571 <access>read-write</access>
4572 </field>
4573 <field>
4574 <name>HSERDY</name>
4575 <description>External High Speed clock ready
4576 flag</description>
4577 <bitOffset>17</bitOffset>
4578 <bitWidth>1</bitWidth>
4579 <access>read-only</access>
4580 </field>
4581 <field>
4582 <name>HSEBYP</name>
4583 <description>External High Speed clock
4584 Bypass</description>
4585 <bitOffset>18</bitOffset>
4586 <bitWidth>1</bitWidth>
4587 <access>read-write</access>
4588 </field>
4589 <field>
4590 <name>CSSON</name>
4591 <description>Clock Security System
4592 enable</description>
4593 <bitOffset>19</bitOffset>
4594 <bitWidth>1</bitWidth>
4595 <access>read-write</access>
4596 </field>
4597 <field>
4598 <name>PLLON</name>
4599 <description>PLL enable</description>
4600 <bitOffset>24</bitOffset>
4601 <bitWidth>1</bitWidth>
4602 <access>read-write</access>
4603 </field>
4604 <field>
4605 <name>PLLRDY</name>
4606 <description>PLL clock ready flag</description>
4607 <bitOffset>25</bitOffset>
4608 <bitWidth>1</bitWidth>
4609 <access>read-only</access>
4610 </field>
4611 </fields>
4612 </register>
4613 <register>
4614 <name>CFGR</name>
4615 <displayName>CFGR</displayName>
4616 <description>Clock configuration register
4617 (RCC_CFGR)</description>
4618 <addressOffset>0x4</addressOffset>
4619 <size>0x20</size>
4620 <resetValue>0x00000000</resetValue>
4621 <fields>
4622 <field>
4623 <name>SW</name>
4624 <description>System clock Switch</description>
4625 <bitOffset>0</bitOffset>
4626 <bitWidth>2</bitWidth>
4627 <access>read-write</access>
4628 </field>
4629 <field>
4630 <name>SWS</name>
4631 <description>System Clock Switch Status</description>
4632 <bitOffset>2</bitOffset>
4633 <bitWidth>2</bitWidth>
4634 <access>read-only</access>
4635 </field>
4636 <field>
4637 <name>HPRE</name>
4638 <description>AHB prescaler</description>
4639 <bitOffset>4</bitOffset>
4640 <bitWidth>4</bitWidth>
4641 <access>read-write</access>
4642 </field>
4643 <field>
4644 <name>PPRE1</name>
4645 <description>APB Low speed prescaler
4646 (APB1)</description>
4647 <bitOffset>8</bitOffset>
4648 <bitWidth>3</bitWidth>
4649 <access>read-write</access>
4650 </field>
4651 <field>
4652 <name>PPRE2</name>
4653 <description>APB high speed prescaler
4654 (APB2)</description>
4655 <bitOffset>11</bitOffset>
4656 <bitWidth>3</bitWidth>
4657 <access>read-write</access>
4658 </field>
4659 <field>
4660 <name>PLLSRC</name>
4661 <description>PLL entry clock source</description>
4662 <bitOffset>15</bitOffset>
4663 <bitWidth>2</bitWidth>
4664 <access>read-write</access>
4665 </field>
4666 <field>
4667 <name>PLLXTPRE</name>
4668 <description>HSE divider for PLL entry</description>
4669 <bitOffset>17</bitOffset>
4670 <bitWidth>1</bitWidth>
4671 <access>read-write</access>
4672 </field>
4673 <field>
4674 <name>PLLMUL</name>
4675 <description>PLL Multiplication Factor</description>
4676 <bitOffset>18</bitOffset>
4677 <bitWidth>4</bitWidth>
4678 <access>read-write</access>
4679 </field>
4680 <field>
4681 <name>USBPRES</name>
4682 <description>USB prescaler</description>
4683 <bitOffset>22</bitOffset>
4684 <bitWidth>1</bitWidth>
4685 <access>read-write</access>
4686 </field>
4687 <field>
4688 <name>MCO</name>
4689 <description>Microcontroller clock
4690 output</description>
4691 <bitOffset>24</bitOffset>
4692 <bitWidth>3</bitWidth>
4693 <access>read-write</access>
4694 </field>
4695 <field>
4696 <name>MCOF</name>
4697 <description>Microcontroller Clock Output
4698 Flag</description>
4699 <bitOffset>28</bitOffset>
4700 <bitWidth>1</bitWidth>
4701 <access>read-only</access>
4702 </field>
4703 <field>
4704 <name>I2SSRC</name>
4705 <description>I2S external clock source
4706 selection</description>
4707 <bitOffset>23</bitOffset>
4708 <bitWidth>1</bitWidth>
4709 <access>read-write</access>
4710 </field>
4711 </fields>
4712 </register>
4713 <register>
4714 <name>CIR</name>
4715 <displayName>CIR</displayName>
4716 <description>Clock interrupt register
4717 (RCC_CIR)</description>
4718 <addressOffset>0x8</addressOffset>
4719 <size>0x20</size>
4720 <resetValue>0x00000000</resetValue>
4721 <fields>
4722 <field>
4723 <name>LSIRDYF</name>
4724 <description>LSI Ready Interrupt flag</description>
4725 <bitOffset>0</bitOffset>
4726 <bitWidth>1</bitWidth>
4727 <access>read-only</access>
4728 </field>
4729 <field>
4730 <name>LSERDYF</name>
4731 <description>LSE Ready Interrupt flag</description>
4732 <bitOffset>1</bitOffset>
4733 <bitWidth>1</bitWidth>
4734 <access>read-only</access>
4735 </field>
4736 <field>
4737 <name>HSIRDYF</name>
4738 <description>HSI Ready Interrupt flag</description>
4739 <bitOffset>2</bitOffset>
4740 <bitWidth>1</bitWidth>
4741 <access>read-only</access>
4742 </field>
4743 <field>
4744 <name>HSERDYF</name>
4745 <description>HSE Ready Interrupt flag</description>
4746 <bitOffset>3</bitOffset>
4747 <bitWidth>1</bitWidth>
4748 <access>read-only</access>
4749 </field>
4750 <field>
4751 <name>PLLRDYF</name>
4752 <description>PLL Ready Interrupt flag</description>
4753 <bitOffset>4</bitOffset>
4754 <bitWidth>1</bitWidth>
4755 <access>read-only</access>
4756 </field>
4757 <field>
4758 <name>CSSF</name>
4759 <description>Clock Security System Interrupt
4760 flag</description>
4761 <bitOffset>7</bitOffset>
4762 <bitWidth>1</bitWidth>
4763 <access>read-only</access>
4764 </field>
4765 <field>
4766 <name>LSIRDYIE</name>
4767 <description>LSI Ready Interrupt Enable</description>
4768 <bitOffset>8</bitOffset>
4769 <bitWidth>1</bitWidth>
4770 <access>read-write</access>
4771 </field>
4772 <field>
4773 <name>LSERDYIE</name>
4774 <description>LSE Ready Interrupt Enable</description>
4775 <bitOffset>9</bitOffset>
4776 <bitWidth>1</bitWidth>
4777 <access>read-write</access>
4778 </field>
4779 <field>
4780 <name>HSIRDYIE</name>
4781 <description>HSI Ready Interrupt Enable</description>
4782 <bitOffset>10</bitOffset>
4783 <bitWidth>1</bitWidth>
4784 <access>read-write</access>
4785 </field>
4786 <field>
4787 <name>HSERDYIE</name>
4788 <description>HSE Ready Interrupt Enable</description>
4789 <bitOffset>11</bitOffset>
4790 <bitWidth>1</bitWidth>
4791 <access>read-write</access>
4792 </field>
4793 <field>
4794 <name>PLLRDYIE</name>
4795 <description>PLL Ready Interrupt Enable</description>
4796 <bitOffset>12</bitOffset>
4797 <bitWidth>1</bitWidth>
4798 <access>read-write</access>
4799 </field>
4800 <field>
4801 <name>LSIRDYC</name>
4802 <description>LSI Ready Interrupt Clear</description>
4803 <bitOffset>16</bitOffset>
4804 <bitWidth>1</bitWidth>
4805 <access>write-only</access>
4806 </field>
4807 <field>
4808 <name>LSERDYC</name>
4809 <description>LSE Ready Interrupt Clear</description>
4810 <bitOffset>17</bitOffset>
4811 <bitWidth>1</bitWidth>
4812 <access>write-only</access>
4813 </field>
4814 <field>
4815 <name>HSIRDYC</name>
4816 <description>HSI Ready Interrupt Clear</description>
4817 <bitOffset>18</bitOffset>
4818 <bitWidth>1</bitWidth>
4819 <access>write-only</access>
4820 </field>
4821 <field>
4822 <name>HSERDYC</name>
4823 <description>HSE Ready Interrupt Clear</description>
4824 <bitOffset>19</bitOffset>
4825 <bitWidth>1</bitWidth>
4826 <access>write-only</access>
4827 </field>
4828 <field>
4829 <name>PLLRDYC</name>
4830 <description>PLL Ready Interrupt Clear</description>
4831 <bitOffset>20</bitOffset>
4832 <bitWidth>1</bitWidth>
4833 <access>write-only</access>
4834 </field>
4835 <field>
4836 <name>CSSC</name>
4837 <description>Clock security system interrupt
4838 clear</description>
4839 <bitOffset>23</bitOffset>
4840 <bitWidth>1</bitWidth>
4841 <access>write-only</access>
4842 </field>
4843 </fields>
4844 </register>
4845 <register>
4846 <name>APB2RSTR</name>
4847 <displayName>APB2RSTR</displayName>
4848 <description>APB2 peripheral reset register
4849 (RCC_APB2RSTR)</description>
4850 <addressOffset>0xC</addressOffset>
4851 <size>0x20</size>
4852 <access>read-write</access>
4853 <resetValue>0x00000000</resetValue>
4854 <fields>
4855 <field>
4856 <name>SYSCFGRST</name>
4857 <description>SYSCFG and COMP reset</description>
4858 <bitOffset>0</bitOffset>
4859 <bitWidth>1</bitWidth>
4860 </field>
4861 <field>
4862 <name>TIM1RST</name>
4863 <description>TIM1 timer reset</description>
4864 <bitOffset>11</bitOffset>
4865 <bitWidth>1</bitWidth>
4866 </field>
4867 <field>
4868 <name>SPI1RST</name>
4869 <description>SPI 1 reset</description>
4870 <bitOffset>12</bitOffset>
4871 <bitWidth>1</bitWidth>
4872 </field>
4873 <field>
4874 <name>TIM8RST</name>
4875 <description>TIM8 timer reset</description>
4876 <bitOffset>13</bitOffset>
4877 <bitWidth>1</bitWidth>
4878 </field>
4879 <field>
4880 <name>USART1RST</name>
4881 <description>USART1 reset</description>
4882 <bitOffset>14</bitOffset>
4883 <bitWidth>1</bitWidth>
4884 </field>
4885 <field>
4886 <name>TIM15RST</name>
4887 <description>TIM15 timer reset</description>
4888 <bitOffset>16</bitOffset>
4889 <bitWidth>1</bitWidth>
4890 </field>
4891 <field>
4892 <name>TIM16RST</name>
4893 <description>TIM16 timer reset</description>
4894 <bitOffset>17</bitOffset>
4895 <bitWidth>1</bitWidth>
4896 </field>
4897 <field>
4898 <name>TIM17RST</name>
4899 <description>TIM17 timer reset</description>
4900 <bitOffset>18</bitOffset>
4901 <bitWidth>1</bitWidth>
4902 </field>
4903 </fields>
4904 </register>
4905 <register>
4906 <name>APB1RSTR</name>
4907 <displayName>APB1RSTR</displayName>
4908 <description>APB1 peripheral reset register
4909 (RCC_APB1RSTR)</description>
4910 <addressOffset>0x10</addressOffset>
4911 <size>0x20</size>
4912 <access>read-write</access>
4913 <resetValue>0x00000000</resetValue>
4914 <fields>
4915 <field>
4916 <name>TIM2RST</name>
4917 <description>Timer 2 reset</description>
4918 <bitOffset>0</bitOffset>
4919 <bitWidth>1</bitWidth>
4920 </field>
4921 <field>
4922 <name>TIM3RST</name>
4923 <description>Timer 3 reset</description>
4924 <bitOffset>1</bitOffset>
4925 <bitWidth>1</bitWidth>
4926 </field>
4927 <field>
4928 <name>TIM4RST</name>
4929 <description>Timer 14 reset</description>
4930 <bitOffset>2</bitOffset>
4931 <bitWidth>1</bitWidth>
4932 </field>
4933 <field>
4934 <name>TIM6RST</name>
4935 <description>Timer 6 reset</description>
4936 <bitOffset>4</bitOffset>
4937 <bitWidth>1</bitWidth>
4938 </field>
4939 <field>
4940 <name>TIM7RST</name>
4941 <description>Timer 7 reset</description>
4942 <bitOffset>5</bitOffset>
4943 <bitWidth>1</bitWidth>
4944 </field>
4945 <field>
4946 <name>WWDGRST</name>
4947 <description>Window watchdog reset</description>
4948 <bitOffset>11</bitOffset>
4949 <bitWidth>1</bitWidth>
4950 </field>
4951 <field>
4952 <name>SPI2RST</name>
4953 <description>SPI2 reset</description>
4954 <bitOffset>14</bitOffset>
4955 <bitWidth>1</bitWidth>
4956 </field>
4957 <field>
4958 <name>SPI3RST</name>
4959 <description>SPI3 reset</description>
4960 <bitOffset>15</bitOffset>
4961 <bitWidth>1</bitWidth>
4962 </field>
4963 <field>
4964 <name>USART2RST</name>
4965 <description>USART 2 reset</description>
4966 <bitOffset>17</bitOffset>
4967 <bitWidth>1</bitWidth>
4968 </field>
4969 <field>
4970 <name>USART3RST</name>
4971 <description>USART3 reset</description>
4972 <bitOffset>18</bitOffset>
4973 <bitWidth>1</bitWidth>
4974 </field>
4975 <field>
4976 <name>UART4RST</name>
4977 <description>UART 4 reset</description>
4978 <bitOffset>19</bitOffset>
4979 <bitWidth>1</bitWidth>
4980 </field>
4981 <field>
4982 <name>UART5RST</name>
4983 <description>UART 5 reset</description>
4984 <bitOffset>20</bitOffset>
4985 <bitWidth>1</bitWidth>
4986 </field>
4987 <field>
4988 <name>I2C1RST</name>
4989 <description>I2C1 reset</description>
4990 <bitOffset>21</bitOffset>
4991 <bitWidth>1</bitWidth>
4992 </field>
4993 <field>
4994 <name>I2C2RST</name>
4995 <description>I2C2 reset</description>
4996 <bitOffset>22</bitOffset>
4997 <bitWidth>1</bitWidth>
4998 </field>
4999 <field>
5000 <name>USBRST</name>
5001 <description>USB reset</description>
5002 <bitOffset>23</bitOffset>
5003 <bitWidth>1</bitWidth>
5004 </field>
5005 <field>
5006 <name>CANRST</name>
5007 <description>CAN reset</description>
5008 <bitOffset>25</bitOffset>
5009 <bitWidth>1</bitWidth>
5010 </field>
5011 <field>
5012 <name>PWRRST</name>
5013 <description>Power interface reset</description>
5014 <bitOffset>28</bitOffset>
5015 <bitWidth>1</bitWidth>
5016 </field>
5017 <field>
5018 <name>DACRST</name>
5019 <description>DAC interface reset</description>
5020 <bitOffset>29</bitOffset>
5021 <bitWidth>1</bitWidth>
5022 </field>
5023 <field>
5024 <name>I2C3RST</name>
5025 <description>I2C3 reset</description>
5026 <bitOffset>30</bitOffset>
5027 <bitWidth>1</bitWidth>
5028 </field>
5029 </fields>
5030 </register>
5031 <register>
5032 <name>AHBENR</name>
5033 <displayName>AHBENR</displayName>
5034 <description>AHB Peripheral Clock enable register
5035 (RCC_AHBENR)</description>
5036 <addressOffset>0x14</addressOffset>
5037 <size>0x20</size>
5038 <access>read-write</access>
5039 <resetValue>0x00000014</resetValue>
5040 <fields>
5041 <field>
5042 <name>DMAEN</name>
5043 <description>DMA1 clock enable</description>
5044 <bitOffset>0</bitOffset>
5045 <bitWidth>1</bitWidth>
5046 </field>
5047 <field>
5048 <name>DMA2EN</name>
5049 <description>DMA2 clock enable</description>
5050 <bitOffset>1</bitOffset>
5051 <bitWidth>1</bitWidth>
5052 </field>
5053 <field>
5054 <name>SRAMEN</name>
5055 <description>SRAM interface clock
5056 enable</description>
5057 <bitOffset>2</bitOffset>
5058 <bitWidth>1</bitWidth>
5059 </field>
5060 <field>
5061 <name>FLITFEN</name>
5062 <description>FLITF clock enable</description>
5063 <bitOffset>4</bitOffset>
5064 <bitWidth>1</bitWidth>
5065 </field>
5066 <field>
5067 <name>FMCEN</name>
5068 <description>FMC clock enable</description>
5069 <bitOffset>5</bitOffset>
5070 <bitWidth>1</bitWidth>
5071 </field>
5072 <field>
5073 <name>CRCEN</name>
5074 <description>CRC clock enable</description>
5075 <bitOffset>6</bitOffset>
5076 <bitWidth>1</bitWidth>
5077 </field>
5078 <field>
5079 <name>IOPHEN</name>
5080 <description>IO port H clock enable</description>
5081 <bitOffset>16</bitOffset>
5082 <bitWidth>1</bitWidth>
5083 </field>
5084 <field>
5085 <name>IOPAEN</name>
5086 <description>I/O port A clock enable</description>
5087 <bitOffset>17</bitOffset>
5088 <bitWidth>1</bitWidth>
5089 </field>
5090 <field>
5091 <name>IOPBEN</name>
5092 <description>I/O port B clock enable</description>
5093 <bitOffset>18</bitOffset>
5094 <bitWidth>1</bitWidth>
5095 </field>
5096 <field>
5097 <name>IOPCEN</name>
5098 <description>I/O port C clock enable</description>
5099 <bitOffset>19</bitOffset>
5100 <bitWidth>1</bitWidth>
5101 </field>
5102 <field>
5103 <name>IOPDEN</name>
5104 <description>I/O port D clock enable</description>
5105 <bitOffset>20</bitOffset>
5106 <bitWidth>1</bitWidth>
5107 </field>
5108 <field>
5109 <name>IOPEEN</name>
5110 <description>I/O port E clock enable</description>
5111 <bitOffset>21</bitOffset>
5112 <bitWidth>1</bitWidth>
5113 </field>
5114 <field>
5115 <name>IOPFEN</name>
5116 <description>I/O port F clock enable</description>
5117 <bitOffset>22</bitOffset>
5118 <bitWidth>1</bitWidth>
5119 </field>
5120 <field>
5121 <name>IOPGEN</name>
5122 <description>I/O port G clock enable</description>
5123 <bitOffset>23</bitOffset>
5124 <bitWidth>1</bitWidth>
5125 </field>
5126 <field>
5127 <name>TSCEN</name>
5128 <description>Touch sensing controller clock
5129 enable</description>
5130 <bitOffset>24</bitOffset>
5131 <bitWidth>1</bitWidth>
5132 </field>
5133 <field>
5134 <name>ADC12EN</name>
5135 <description>ADC1 and ADC2 clock enable</description>
5136 <bitOffset>28</bitOffset>
5137 <bitWidth>1</bitWidth>
5138 </field>
5139 <field>
5140 <name>ADC34EN</name>
5141 <description>ADC3 and ADC4 clock enable</description>
5142 <bitOffset>29</bitOffset>
5143 <bitWidth>1</bitWidth>
5144 </field>
5145 </fields>
5146 </register>
5147 <register>
5148 <name>APB2ENR</name>
5149 <displayName>APB2ENR</displayName>
5150 <description>APB2 peripheral clock enable register
5151 (RCC_APB2ENR)</description>
5152 <addressOffset>0x18</addressOffset>
5153 <size>0x20</size>
5154 <access>read-write</access>
5155 <resetValue>0x00000000</resetValue>
5156 <fields>
5157 <field>
5158 <name>SYSCFGEN</name>
5159 <description>SYSCFG clock enable</description>
5160 <bitOffset>0</bitOffset>
5161 <bitWidth>1</bitWidth>
5162 </field>
5163 <field>
5164 <name>TIM1EN</name>
5165 <description>TIM1 Timer clock enable</description>
5166 <bitOffset>11</bitOffset>
5167 <bitWidth>1</bitWidth>
5168 </field>
5169 <field>
5170 <name>SPI1EN</name>
5171 <description>SPI 1 clock enable</description>
5172 <bitOffset>12</bitOffset>
5173 <bitWidth>1</bitWidth>
5174 </field>
5175 <field>
5176 <name>TIM8EN</name>
5177 <description>TIM8 Timer clock enable</description>
5178 <bitOffset>13</bitOffset>
5179 <bitWidth>1</bitWidth>
5180 </field>
5181 <field>
5182 <name>USART1EN</name>
5183 <description>USART1 clock enable</description>
5184 <bitOffset>14</bitOffset>
5185 <bitWidth>1</bitWidth>
5186 </field>
5187 <field>
5188 <name>TIM15EN</name>
5189 <description>TIM15 timer clock enable</description>
5190 <bitOffset>16</bitOffset>
5191 <bitWidth>1</bitWidth>
5192 </field>
5193 <field>
5194 <name>TIM16EN</name>
5195 <description>TIM16 timer clock enable</description>
5196 <bitOffset>17</bitOffset>
5197 <bitWidth>1</bitWidth>
5198 </field>
5199 <field>
5200 <name>TIM17EN</name>
5201 <description>TIM17 timer clock enable</description>
5202 <bitOffset>18</bitOffset>
5203 <bitWidth>1</bitWidth>
5204 </field>
5205 </fields>
5206 </register>
5207 <register>
5208 <name>APB1ENR</name>
5209 <displayName>APB1ENR</displayName>
5210 <description>APB1 peripheral clock enable register
5211 (RCC_APB1ENR)</description>
5212 <addressOffset>0x1C</addressOffset>
5213 <size>0x20</size>
5214 <access>read-write</access>
5215 <resetValue>0x00000000</resetValue>
5216 <fields>
5217 <field>
5218 <name>TIM2EN</name>
5219 <description>Timer 2 clock enable</description>
5220 <bitOffset>0</bitOffset>
5221 <bitWidth>1</bitWidth>
5222 </field>
5223 <field>
5224 <name>TIM3EN</name>
5225 <description>Timer 3 clock enable</description>
5226 <bitOffset>1</bitOffset>
5227 <bitWidth>1</bitWidth>
5228 </field>
5229 <field>
5230 <name>TIM4EN</name>
5231 <description>Timer 4 clock enable</description>
5232 <bitOffset>2</bitOffset>
5233 <bitWidth>1</bitWidth>
5234 </field>
5235 <field>
5236 <name>TIM6EN</name>
5237 <description>Timer 6 clock enable</description>
5238 <bitOffset>4</bitOffset>
5239 <bitWidth>1</bitWidth>
5240 </field>
5241 <field>
5242 <name>TIM7EN</name>
5243 <description>Timer 7 clock enable</description>
5244 <bitOffset>5</bitOffset>
5245 <bitWidth>1</bitWidth>
5246 </field>
5247 <field>
5248 <name>WWDGEN</name>
5249 <description>Window watchdog clock
5250 enable</description>
5251 <bitOffset>11</bitOffset>
5252 <bitWidth>1</bitWidth>
5253 </field>
5254 <field>
5255 <name>SPI2EN</name>
5256 <description>SPI 2 clock enable</description>
5257 <bitOffset>14</bitOffset>
5258 <bitWidth>1</bitWidth>
5259 </field>
5260 <field>
5261 <name>SPI3EN</name>
5262 <description>SPI 3 clock enable</description>
5263 <bitOffset>15</bitOffset>
5264 <bitWidth>1</bitWidth>
5265 </field>
5266 <field>
5267 <name>USART2EN</name>
5268 <description>USART 2 clock enable</description>
5269 <bitOffset>17</bitOffset>
5270 <bitWidth>1</bitWidth>
5271 </field>
5272 <field>
5273 <name>USART3EN</name>
5274 <description>USART 3 clock enable</description>
5275 <bitOffset>18</bitOffset>
5276 <bitWidth>1</bitWidth>
5277 </field>
5278 <field>
5279 <name>USART4EN</name>
5280 <description>USART 4 clock enable</description>
5281 <bitOffset>19</bitOffset>
5282 <bitWidth>1</bitWidth>
5283 </field>
5284 <field>
5285 <name>USART5EN</name>
5286 <description>USART 5 clock enable</description>
5287 <bitOffset>20</bitOffset>
5288 <bitWidth>1</bitWidth>
5289 </field>
5290 <field>
5291 <name>I2C1EN</name>
5292 <description>I2C 1 clock enable</description>
5293 <bitOffset>21</bitOffset>
5294 <bitWidth>1</bitWidth>
5295 </field>
5296 <field>
5297 <name>I2C2EN</name>
5298 <description>I2C 2 clock enable</description>
5299 <bitOffset>22</bitOffset>
5300 <bitWidth>1</bitWidth>
5301 </field>
5302 <field>
5303 <name>USBEN</name>
5304 <description>USB clock enable</description>
5305 <bitOffset>23</bitOffset>
5306 <bitWidth>1</bitWidth>
5307 </field>
5308 <field>
5309 <name>CANEN</name>
5310 <description>CAN clock enable</description>
5311 <bitOffset>25</bitOffset>
5312 <bitWidth>1</bitWidth>
5313 </field>
5314 <field>
5315 <name>DAC2EN</name>
5316 <description>DAC2 interface clock
5317 enable</description>
5318 <bitOffset>26</bitOffset>
5319 <bitWidth>1</bitWidth>
5320 </field>
5321 <field>
5322 <name>PWREN</name>
5323 <description>Power interface clock
5324 enable</description>
5325 <bitOffset>28</bitOffset>
5326 <bitWidth>1</bitWidth>
5327 </field>
5328 <field>
5329 <name>DACEN</name>
5330 <description>DAC interface clock enable</description>
5331 <bitOffset>29</bitOffset>
5332 <bitWidth>1</bitWidth>
5333 </field>
5334 <field>
5335 <name>I2C3EN</name>
5336 <description>I2C3 clock enable</description>
5337 <bitOffset>30</bitOffset>
5338 <bitWidth>1</bitWidth>
5339 </field>
5340 </fields>
5341 </register>
5342 <register>
5343 <name>BDCR</name>
5344 <displayName>BDCR</displayName>
5345 <description>Backup domain control register
5346 (RCC_BDCR)</description>
5347 <addressOffset>0x20</addressOffset>
5348 <size>0x20</size>
5349 <resetValue>0x00000000</resetValue>
5350 <fields>
5351 <field>
5352 <name>LSEON</name>
5353 <description>External Low Speed oscillator
5354 enable</description>
5355 <bitOffset>0</bitOffset>
5356 <bitWidth>1</bitWidth>
5357 <access>read-write</access>
5358 </field>
5359 <field>
5360 <name>LSERDY</name>
5361 <description>External Low Speed oscillator
5362 ready</description>
5363 <bitOffset>1</bitOffset>
5364 <bitWidth>1</bitWidth>
5365 <access>read-only</access>
5366 </field>
5367 <field>
5368 <name>LSEBYP</name>
5369 <description>External Low Speed oscillator
5370 bypass</description>
5371 <bitOffset>2</bitOffset>
5372 <bitWidth>1</bitWidth>
5373 <access>read-write</access>
5374 </field>
5375 <field>
5376 <name>LSEDRV</name>
5377 <description>LSE oscillator drive
5378 capability</description>
5379 <bitOffset>3</bitOffset>
5380 <bitWidth>2</bitWidth>
5381 <access>read-write</access>
5382 </field>
5383 <field>
5384 <name>RTCSEL</name>
5385 <description>RTC clock source selection</description>
5386 <bitOffset>8</bitOffset>
5387 <bitWidth>2</bitWidth>
5388 <access>read-write</access>
5389 </field>
5390 <field>
5391 <name>RTCEN</name>
5392 <description>RTC clock enable</description>
5393 <bitOffset>15</bitOffset>
5394 <bitWidth>1</bitWidth>
5395 <access>read-write</access>
5396 </field>
5397 <field>
5398 <name>BDRST</name>
5399 <description>Backup domain software
5400 reset</description>
5401 <bitOffset>16</bitOffset>
5402 <bitWidth>1</bitWidth>
5403 <access>read-write</access>
5404 </field>
5405 </fields>
5406 </register>
5407 <register>
5408 <name>CSR</name>
5409 <displayName>CSR</displayName>
5410 <description>Control/status register
5411 (RCC_CSR)</description>
5412 <addressOffset>0x24</addressOffset>
5413 <size>0x20</size>
5414 <resetValue>0x0C000000</resetValue>
5415 <fields>
5416 <field>
5417 <name>LSION</name>
5418 <description>Internal low speed oscillator
5419 enable</description>
5420 <bitOffset>0</bitOffset>
5421 <bitWidth>1</bitWidth>
5422 <access>read-write</access>
5423 </field>
5424 <field>
5425 <name>LSIRDY</name>
5426 <description>Internal low speed oscillator
5427 ready</description>
5428 <bitOffset>1</bitOffset>
5429 <bitWidth>1</bitWidth>
5430 <access>read-only</access>
5431 </field>
5432 <field>
5433 <name>RMVF</name>
5434 <description>Remove reset flag</description>
5435 <bitOffset>24</bitOffset>
5436 <bitWidth>1</bitWidth>
5437 <access>read-write</access>
5438 </field>
5439 <field>
5440 <name>OBLRSTF</name>
5441 <description>Option byte loader reset
5442 flag</description>
5443 <bitOffset>25</bitOffset>
5444 <bitWidth>1</bitWidth>
5445 <access>read-write</access>
5446 </field>
5447 <field>
5448 <name>PINRSTF</name>
5449 <description>PIN reset flag</description>
5450 <bitOffset>26</bitOffset>
5451 <bitWidth>1</bitWidth>
5452 <access>read-write</access>
5453 </field>
5454 <field>
5455 <name>PORRSTF</name>
5456 <description>POR/PDR reset flag</description>
5457 <bitOffset>27</bitOffset>
5458 <bitWidth>1</bitWidth>
5459 <access>read-write</access>
5460 </field>
5461 <field>
5462 <name>SFTRSTF</name>
5463 <description>Software reset flag</description>
5464 <bitOffset>28</bitOffset>
5465 <bitWidth>1</bitWidth>
5466 <access>read-write</access>
5467 </field>
5468 <field>
5469 <name>IWDGRSTF</name>
5470 <description>Independent watchdog reset
5471 flag</description>
5472 <bitOffset>29</bitOffset>
5473 <bitWidth>1</bitWidth>
5474 <access>read-write</access>
5475 </field>
5476 <field>
5477 <name>WWDGRSTF</name>
5478 <description>Window watchdog reset flag</description>
5479 <bitOffset>30</bitOffset>
5480 <bitWidth>1</bitWidth>
5481 <access>read-write</access>
5482 </field>
5483 <field>
5484 <name>LPWRRSTF</name>
5485 <description>Low-power reset flag</description>
5486 <bitOffset>31</bitOffset>
5487 <bitWidth>1</bitWidth>
5488 <access>read-write</access>
5489 </field>
5490 </fields>
5491 </register>
5492 <register>
5493 <name>AHBRSTR</name>
5494 <displayName>AHBRSTR</displayName>
5495 <description>AHB peripheral reset register</description>
5496 <addressOffset>0x28</addressOffset>
5497 <size>0x20</size>
5498 <access>read-write</access>
5499 <resetValue>0x00000000</resetValue>
5500 <fields>
5501 <field>
5502 <name>FMCRST</name>
5503 <description>FMC reset</description>
5504 <bitOffset>5</bitOffset>
5505 <bitWidth>1</bitWidth>
5506 </field>
5507 <field>
5508 <name>IOPHRST</name>
5509 <description>I/O port H reset</description>
5510 <bitOffset>16</bitOffset>
5511 <bitWidth>1</bitWidth>
5512 </field>
5513 <field>
5514 <name>IOPARST</name>
5515 <description>I/O port A reset</description>
5516 <bitOffset>17</bitOffset>
5517 <bitWidth>1</bitWidth>
5518 </field>
5519 <field>
5520 <name>IOPBRST</name>
5521 <description>I/O port B reset</description>
5522 <bitOffset>18</bitOffset>
5523 <bitWidth>1</bitWidth>
5524 </field>
5525 <field>
5526 <name>IOPCRST</name>
5527 <description>I/O port C reset</description>
5528 <bitOffset>19</bitOffset>
5529 <bitWidth>1</bitWidth>
5530 </field>
5531 <field>
5532 <name>IOPDRST</name>
5533 <description>I/O port D reset</description>
5534 <bitOffset>20</bitOffset>
5535 <bitWidth>1</bitWidth>
5536 </field>
5537 <field>
5538 <name>IOPERST</name>
5539 <description>I/O port E reset</description>
5540 <bitOffset>21</bitOffset>
5541 <bitWidth>1</bitWidth>
5542 </field>
5543 <field>
5544 <name>IOPFRST</name>
5545 <description>I/O port F reset</description>
5546 <bitOffset>22</bitOffset>
5547 <bitWidth>1</bitWidth>
5548 </field>
5549 <field>
5550 <name>IOPGRST</name>
5551 <description>Touch sensing controller
5552 reset</description>
5553 <bitOffset>23</bitOffset>
5554 <bitWidth>1</bitWidth>
5555 </field>
5556 <field>
5557 <name>TSCRST</name>
5558 <description>Touch sensing controller
5559 reset</description>
5560 <bitOffset>24</bitOffset>
5561 <bitWidth>1</bitWidth>
5562 </field>
5563 <field>
5564 <name>ADC12RST</name>
5565 <description>ADC1 and ADC2 reset</description>
5566 <bitOffset>28</bitOffset>
5567 <bitWidth>1</bitWidth>
5568 </field>
5569 <field>
5570 <name>ADC34RST</name>
5571 <description>ADC3 and ADC4 reset</description>
5572 <bitOffset>29</bitOffset>
5573 <bitWidth>1</bitWidth>
5574 </field>
5575 </fields>
5576 </register>
5577 <register>
5578 <name>CFGR2</name>
5579 <displayName>CFGR2</displayName>
5580 <description>Clock configuration register 2</description>
5581 <addressOffset>0x2C</addressOffset>
5582 <size>0x20</size>
5583 <access>read-write</access>
5584 <resetValue>0x00000000</resetValue>
5585 <fields>
5586 <field>
5587 <name>PREDIV</name>
5588 <description>PREDIV division factor</description>
5589 <bitOffset>0</bitOffset>
5590 <bitWidth>4</bitWidth>
5591 </field>
5592 <field>
5593 <name>ADC12PRES</name>
5594 <description>ADC1 and ADC2 prescaler</description>
5595 <bitOffset>4</bitOffset>
5596 <bitWidth>5</bitWidth>
5597 </field>
5598 <field>
5599 <name>ADC34PRES</name>
5600 <description>ADC3 and ADC4 prescaler</description>
5601 <bitOffset>9</bitOffset>
5602 <bitWidth>5</bitWidth>
5603 </field>
5604 </fields>
5605 </register>
5606 <register>
5607 <name>CFGR3</name>
5608 <displayName>CFGR3</displayName>
5609 <description>Clock configuration register 3</description>
5610 <addressOffset>0x30</addressOffset>
5611 <size>0x20</size>
5612 <access>read-write</access>
5613 <resetValue>0x00000000</resetValue>
5614 <fields>
5615 <field>
5616 <name>USART1SW</name>
5617 <description>USART1 clock source
5618 selection</description>
5619 <bitOffset>0</bitOffset>
5620 <bitWidth>2</bitWidth>
5621 </field>
5622 <field>
5623 <name>I2C1SW</name>
5624 <description>I2C1 clock source
5625 selection</description>
5626 <bitOffset>4</bitOffset>
5627 <bitWidth>1</bitWidth>
5628 </field>
5629 <field>
5630 <name>I2C2SW</name>
5631 <description>I2C2 clock source
5632 selection</description>
5633 <bitOffset>5</bitOffset>
5634 <bitWidth>1</bitWidth>
5635 </field>
5636 <field>
5637 <name>I2C3SW</name>
5638 <description>I2C3 clock source
5639 selection</description>
5640 <bitOffset>6</bitOffset>
5641 <bitWidth>1</bitWidth>
5642 </field>
5643 <field>
5644 <name>USART2SW</name>
5645 <description>USART2 clock source
5646 selection</description>
5647 <bitOffset>16</bitOffset>
5648 <bitWidth>2</bitWidth>
5649 </field>
5650 <field>
5651 <name>USART3SW</name>
5652 <description>USART3 clock source
5653 selection</description>
5654 <bitOffset>18</bitOffset>
5655 <bitWidth>2</bitWidth>
5656 </field>
5657 <field>
5658 <name>TIM1SW</name>
5659 <description>Timer1 clock source
5660 selection</description>
5661 <bitOffset>8</bitOffset>
5662 <bitWidth>1</bitWidth>
5663 </field>
5664 <field>
5665 <name>TIM8SW</name>
5666 <description>Timer8 clock source
5667 selection</description>
5668 <bitOffset>9</bitOffset>
5669 <bitWidth>1</bitWidth>
5670 </field>
5671 <field>
5672 <name>UART4SW</name>
5673 <description>UART4 clock source
5674 selection</description>
5675 <bitOffset>20</bitOffset>
5676 <bitWidth>2</bitWidth>
5677 </field>
5678 <field>
5679 <name>UART5SW</name>
5680 <description>UART5 clock source
5681 selection</description>
5682 <bitOffset>22</bitOffset>
5683 <bitWidth>2</bitWidth>
5684 </field>
5685 </fields>
5686 </register>
5687 </registers>
5688 </peripheral>
5689 <peripheral>
5690 <name>DMA1</name>
5691 <description>DMA controller 1</description>
5692 <groupName>DMA</groupName>
5693 <baseAddress>0x40020000</baseAddress>
5694 <addressBlock>
5695 <offset>0x0</offset>
5696 <size>0x400</size>
5697 <usage>registers</usage>
5698 </addressBlock>
5699 <interrupt>
5700 <name>DMA1_CH1</name>
5701 <description>DMA1 channel 1 interrupt</description>
5702 <value>11</value>
5703 </interrupt>
5704 <interrupt>
5705 <name>DMA1_CH2</name>
5706 <description>DMA1 channel 2 interrupt</description>
5707 <value>12</value>
5708 </interrupt>
5709 <interrupt>
5710 <name>DMA1_CH3</name>
5711 <description>DMA1 channel 3 interrupt</description>
5712 <value>13</value>
5713 </interrupt>
5714 <interrupt>
5715 <name>DMA1_CH4</name>
5716 <description>DMA1 channel 4 interrupt</description>
5717 <value>14</value>
5718 </interrupt>
5719 <interrupt>
5720 <name>DMA1_CH5</name>
5721 <description>DMA1 channel 5 interrupt</description>
5722 <value>15</value>
5723 </interrupt>
5724 <interrupt>
5725 <name>DMA1_CH6</name>
5726 <description>DMA1 channel 6 interrupt</description>
5727 <value>16</value>
5728 </interrupt>
5729 <interrupt>
5730 <name>DMA1_CH7</name>
5731 <description>DMA1 channel 7interrupt</description>
5732 <value>17</value>
5733 </interrupt>
5734 <registers>
5735 <register>
5736 <name>ISR</name>
5737 <displayName>ISR</displayName>
5738 <description>DMA interrupt status register
5739 (DMA_ISR)</description>
5740 <addressOffset>0x0</addressOffset>
5741 <size>0x20</size>
5742 <access>read-only</access>
5743 <resetValue>0x00000000</resetValue>
5744 <fields>
5745 <field>
5746 <name>GIF1</name>
5747 <description>Channel 1 Global interrupt
5748 flag</description>
5749 <bitOffset>0</bitOffset>
5750 <bitWidth>1</bitWidth>
5751 </field>
5752 <field>
5753 <name>TCIF1</name>
5754 <description>Channel 1 Transfer Complete
5755 flag</description>
5756 <bitOffset>1</bitOffset>
5757 <bitWidth>1</bitWidth>
5758 </field>
5759 <field>
5760 <name>HTIF1</name>
5761 <description>Channel 1 Half Transfer Complete
5762 flag</description>
5763 <bitOffset>2</bitOffset>
5764 <bitWidth>1</bitWidth>
5765 </field>
5766 <field>
5767 <name>TEIF1</name>
5768 <description>Channel 1 Transfer Error
5769 flag</description>
5770 <bitOffset>3</bitOffset>
5771 <bitWidth>1</bitWidth>
5772 </field>
5773 <field>
5774 <name>GIF2</name>
5775 <description>Channel 2 Global interrupt
5776 flag</description>
5777 <bitOffset>4</bitOffset>
5778 <bitWidth>1</bitWidth>
5779 </field>
5780 <field>
5781 <name>TCIF2</name>
5782 <description>Channel 2 Transfer Complete
5783 flag</description>
5784 <bitOffset>5</bitOffset>
5785 <bitWidth>1</bitWidth>
5786 </field>
5787 <field>
5788 <name>HTIF2</name>
5789 <description>Channel 2 Half Transfer Complete
5790 flag</description>
5791 <bitOffset>6</bitOffset>
5792 <bitWidth>1</bitWidth>
5793 </field>
5794 <field>
5795 <name>TEIF2</name>
5796 <description>Channel 2 Transfer Error
5797 flag</description>
5798 <bitOffset>7</bitOffset>
5799 <bitWidth>1</bitWidth>
5800 </field>
5801 <field>
5802 <name>GIF3</name>
5803 <description>Channel 3 Global interrupt
5804 flag</description>
5805 <bitOffset>8</bitOffset>
5806 <bitWidth>1</bitWidth>
5807 </field>
5808 <field>
5809 <name>TCIF3</name>
5810 <description>Channel 3 Transfer Complete
5811 flag</description>
5812 <bitOffset>9</bitOffset>
5813 <bitWidth>1</bitWidth>
5814 </field>
5815 <field>
5816 <name>HTIF3</name>
5817 <description>Channel 3 Half Transfer Complete
5818 flag</description>
5819 <bitOffset>10</bitOffset>
5820 <bitWidth>1</bitWidth>
5821 </field>
5822 <field>
5823 <name>TEIF3</name>
5824 <description>Channel 3 Transfer Error
5825 flag</description>
5826 <bitOffset>11</bitOffset>
5827 <bitWidth>1</bitWidth>
5828 </field>
5829 <field>
5830 <name>GIF4</name>
5831 <description>Channel 4 Global interrupt
5832 flag</description>
5833 <bitOffset>12</bitOffset>
5834 <bitWidth>1</bitWidth>
5835 </field>
5836 <field>
5837 <name>TCIF4</name>
5838 <description>Channel 4 Transfer Complete
5839 flag</description>
5840 <bitOffset>13</bitOffset>
5841 <bitWidth>1</bitWidth>
5842 </field>
5843 <field>
5844 <name>HTIF4</name>
5845 <description>Channel 4 Half Transfer Complete
5846 flag</description>
5847 <bitOffset>14</bitOffset>
5848 <bitWidth>1</bitWidth>
5849 </field>
5850 <field>
5851 <name>TEIF4</name>
5852 <description>Channel 4 Transfer Error
5853 flag</description>
5854 <bitOffset>15</bitOffset>
5855 <bitWidth>1</bitWidth>
5856 </field>
5857 <field>
5858 <name>GIF5</name>
5859 <description>Channel 5 Global interrupt
5860 flag</description>
5861 <bitOffset>16</bitOffset>
5862 <bitWidth>1</bitWidth>
5863 </field>
5864 <field>
5865 <name>TCIF5</name>
5866 <description>Channel 5 Transfer Complete
5867 flag</description>
5868 <bitOffset>17</bitOffset>
5869 <bitWidth>1</bitWidth>
5870 </field>
5871 <field>
5872 <name>HTIF5</name>
5873 <description>Channel 5 Half Transfer Complete
5874 flag</description>
5875 <bitOffset>18</bitOffset>
5876 <bitWidth>1</bitWidth>
5877 </field>
5878 <field>
5879 <name>TEIF5</name>
5880 <description>Channel 5 Transfer Error
5881 flag</description>
5882 <bitOffset>19</bitOffset>
5883 <bitWidth>1</bitWidth>
5884 </field>
5885 <field>
5886 <name>GIF6</name>
5887 <description>Channel 6 Global interrupt
5888 flag</description>
5889 <bitOffset>20</bitOffset>
5890 <bitWidth>1</bitWidth>
5891 </field>
5892 <field>
5893 <name>TCIF6</name>
5894 <description>Channel 6 Transfer Complete
5895 flag</description>
5896 <bitOffset>21</bitOffset>
5897 <bitWidth>1</bitWidth>
5898 </field>
5899 <field>
5900 <name>HTIF6</name>
5901 <description>Channel 6 Half Transfer Complete
5902 flag</description>
5903 <bitOffset>22</bitOffset>
5904 <bitWidth>1</bitWidth>
5905 </field>
5906 <field>
5907 <name>TEIF6</name>
5908 <description>Channel 6 Transfer Error
5909 flag</description>
5910 <bitOffset>23</bitOffset>
5911 <bitWidth>1</bitWidth>
5912 </field>
5913 <field>
5914 <name>GIF7</name>
5915 <description>Channel 7 Global interrupt
5916 flag</description>
5917 <bitOffset>24</bitOffset>
5918 <bitWidth>1</bitWidth>
5919 </field>
5920 <field>
5921 <name>TCIF7</name>
5922 <description>Channel 7 Transfer Complete
5923 flag</description>
5924 <bitOffset>25</bitOffset>
5925 <bitWidth>1</bitWidth>
5926 </field>
5927 <field>
5928 <name>HTIF7</name>
5929 <description>Channel 7 Half Transfer Complete
5930 flag</description>
5931 <bitOffset>26</bitOffset>
5932 <bitWidth>1</bitWidth>
5933 </field>
5934 <field>
5935 <name>TEIF7</name>
5936 <description>Channel 7 Transfer Error
5937 flag</description>
5938 <bitOffset>27</bitOffset>
5939 <bitWidth>1</bitWidth>
5940 </field>
5941 </fields>
5942 </register>
5943 <register>
5944 <name>IFCR</name>
5945 <displayName>IFCR</displayName>
5946 <description>DMA interrupt flag clear register
5947 (DMA_IFCR)</description>
5948 <addressOffset>0x4</addressOffset>
5949 <size>0x20</size>
5950 <access>write-only</access>
5951 <resetValue>0x00000000</resetValue>
5952 <fields>
5953 <field>
5954 <name>CGIF1</name>
5955 <description>Channel 1 Global interrupt
5956 clear</description>
5957 <bitOffset>0</bitOffset>
5958 <bitWidth>1</bitWidth>
5959 </field>
5960 <field>
5961 <name>CTCIF1</name>
5962 <description>Channel 1 Transfer Complete
5963 clear</description>
5964 <bitOffset>1</bitOffset>
5965 <bitWidth>1</bitWidth>
5966 </field>
5967 <field>
5968 <name>CHTIF1</name>
5969 <description>Channel 1 Half Transfer
5970 clear</description>
5971 <bitOffset>2</bitOffset>
5972 <bitWidth>1</bitWidth>
5973 </field>
5974 <field>
5975 <name>CTEIF1</name>
5976 <description>Channel 1 Transfer Error
5977 clear</description>
5978 <bitOffset>3</bitOffset>
5979 <bitWidth>1</bitWidth>
5980 </field>
5981 <field>
5982 <name>CGIF2</name>
5983 <description>Channel 2 Global interrupt
5984 clear</description>
5985 <bitOffset>4</bitOffset>
5986 <bitWidth>1</bitWidth>
5987 </field>
5988 <field>
5989 <name>CTCIF2</name>
5990 <description>Channel 2 Transfer Complete
5991 clear</description>
5992 <bitOffset>5</bitOffset>
5993 <bitWidth>1</bitWidth>
5994 </field>
5995 <field>
5996 <name>CHTIF2</name>
5997 <description>Channel 2 Half Transfer
5998 clear</description>
5999 <bitOffset>6</bitOffset>
6000 <bitWidth>1</bitWidth>
6001 </field>
6002 <field>
6003 <name>CTEIF2</name>
6004 <description>Channel 2 Transfer Error
6005 clear</description>
6006 <bitOffset>7</bitOffset>
6007 <bitWidth>1</bitWidth>
6008 </field>
6009 <field>
6010 <name>CGIF3</name>
6011 <description>Channel 3 Global interrupt
6012 clear</description>
6013 <bitOffset>8</bitOffset>
6014 <bitWidth>1</bitWidth>
6015 </field>
6016 <field>
6017 <name>CTCIF3</name>
6018 <description>Channel 3 Transfer Complete
6019 clear</description>
6020 <bitOffset>9</bitOffset>
6021 <bitWidth>1</bitWidth>
6022 </field>
6023 <field>
6024 <name>CHTIF3</name>
6025 <description>Channel 3 Half Transfer
6026 clear</description>
6027 <bitOffset>10</bitOffset>
6028 <bitWidth>1</bitWidth>
6029 </field>
6030 <field>
6031 <name>CTEIF3</name>
6032 <description>Channel 3 Transfer Error
6033 clear</description>
6034 <bitOffset>11</bitOffset>
6035 <bitWidth>1</bitWidth>
6036 </field>
6037 <field>
6038 <name>CGIF4</name>
6039 <description>Channel 4 Global interrupt
6040 clear</description>
6041 <bitOffset>12</bitOffset>
6042 <bitWidth>1</bitWidth>
6043 </field>
6044 <field>
6045 <name>CTCIF4</name>
6046 <description>Channel 4 Transfer Complete
6047 clear</description>
6048 <bitOffset>13</bitOffset>
6049 <bitWidth>1</bitWidth>
6050 </field>
6051 <field>
6052 <name>CHTIF4</name>
6053 <description>Channel 4 Half Transfer
6054 clear</description>
6055 <bitOffset>14</bitOffset>
6056 <bitWidth>1</bitWidth>
6057 </field>
6058 <field>
6059 <name>CTEIF4</name>
6060 <description>Channel 4 Transfer Error
6061 clear</description>
6062 <bitOffset>15</bitOffset>
6063 <bitWidth>1</bitWidth>
6064 </field>
6065 <field>
6066 <name>CGIF5</name>
6067 <description>Channel 5 Global interrupt
6068 clear</description>
6069 <bitOffset>16</bitOffset>
6070 <bitWidth>1</bitWidth>
6071 </field>
6072 <field>
6073 <name>CTCIF5</name>
6074 <description>Channel 5 Transfer Complete
6075 clear</description>
6076 <bitOffset>17</bitOffset>
6077 <bitWidth>1</bitWidth>
6078 </field>
6079 <field>
6080 <name>CHTIF5</name>
6081 <description>Channel 5 Half Transfer
6082 clear</description>
6083 <bitOffset>18</bitOffset>
6084 <bitWidth>1</bitWidth>
6085 </field>
6086 <field>
6087 <name>CTEIF5</name>
6088 <description>Channel 5 Transfer Error
6089 clear</description>
6090 <bitOffset>19</bitOffset>
6091 <bitWidth>1</bitWidth>
6092 </field>
6093 <field>
6094 <name>CGIF6</name>
6095 <description>Channel 6 Global interrupt
6096 clear</description>
6097 <bitOffset>20</bitOffset>
6098 <bitWidth>1</bitWidth>
6099 </field>
6100 <field>
6101 <name>CTCIF6</name>
6102 <description>Channel 6 Transfer Complete
6103 clear</description>
6104 <bitOffset>21</bitOffset>
6105 <bitWidth>1</bitWidth>
6106 </field>
6107 <field>
6108 <name>CHTIF6</name>
6109 <description>Channel 6 Half Transfer
6110 clear</description>
6111 <bitOffset>22</bitOffset>
6112 <bitWidth>1</bitWidth>
6113 </field>
6114 <field>
6115 <name>CTEIF6</name>
6116 <description>Channel 6 Transfer Error
6117 clear</description>
6118 <bitOffset>23</bitOffset>
6119 <bitWidth>1</bitWidth>
6120 </field>
6121 <field>
6122 <name>CGIF7</name>
6123 <description>Channel 7 Global interrupt
6124 clear</description>
6125 <bitOffset>24</bitOffset>
6126 <bitWidth>1</bitWidth>
6127 </field>
6128 <field>
6129 <name>CTCIF7</name>
6130 <description>Channel 7 Transfer Complete
6131 clear</description>
6132 <bitOffset>25</bitOffset>
6133 <bitWidth>1</bitWidth>
6134 </field>
6135 <field>
6136 <name>CHTIF7</name>
6137 <description>Channel 7 Half Transfer
6138 clear</description>
6139 <bitOffset>26</bitOffset>
6140 <bitWidth>1</bitWidth>
6141 </field>
6142 <field>
6143 <name>CTEIF7</name>
6144 <description>Channel 7 Transfer Error
6145 clear</description>
6146 <bitOffset>27</bitOffset>
6147 <bitWidth>1</bitWidth>
6148 </field>
6149 </fields>
6150 </register>
6151 <register>
6152 <name>CCR1</name>
6153 <displayName>CCR1</displayName>
6154 <description>DMA channel configuration register
6155 (DMA_CCR)</description>
6156 <addressOffset>0x8</addressOffset>
6157 <size>0x20</size>
6158 <access>read-write</access>
6159 <resetValue>0x00000000</resetValue>
6160 <fields>
6161 <field>
6162 <name>EN</name>
6163 <description>Channel enable</description>
6164 <bitOffset>0</bitOffset>
6165 <bitWidth>1</bitWidth>
6166 </field>
6167 <field>
6168 <name>TCIE</name>
6169 <description>Transfer complete interrupt
6170 enable</description>
6171 <bitOffset>1</bitOffset>
6172 <bitWidth>1</bitWidth>
6173 </field>
6174 <field>
6175 <name>HTIE</name>
6176 <description>Half Transfer interrupt
6177 enable</description>
6178 <bitOffset>2</bitOffset>
6179 <bitWidth>1</bitWidth>
6180 </field>
6181 <field>
6182 <name>TEIE</name>
6183 <description>Transfer error interrupt
6184 enable</description>
6185 <bitOffset>3</bitOffset>
6186 <bitWidth>1</bitWidth>
6187 </field>
6188 <field>
6189 <name>DIR</name>
6190 <description>Data transfer direction</description>
6191 <bitOffset>4</bitOffset>
6192 <bitWidth>1</bitWidth>
6193 </field>
6194 <field>
6195 <name>CIRC</name>
6196 <description>Circular mode</description>
6197 <bitOffset>5</bitOffset>
6198 <bitWidth>1</bitWidth>
6199 </field>
6200 <field>
6201 <name>PINC</name>
6202 <description>Peripheral increment mode</description>
6203 <bitOffset>6</bitOffset>
6204 <bitWidth>1</bitWidth>
6205 </field>
6206 <field>
6207 <name>MINC</name>
6208 <description>Memory increment mode</description>
6209 <bitOffset>7</bitOffset>
6210 <bitWidth>1</bitWidth>
6211 </field>
6212 <field>
6213 <name>PSIZE</name>
6214 <description>Peripheral size</description>
6215 <bitOffset>8</bitOffset>
6216 <bitWidth>2</bitWidth>
6217 </field>
6218 <field>
6219 <name>MSIZE</name>
6220 <description>Memory size</description>
6221 <bitOffset>10</bitOffset>
6222 <bitWidth>2</bitWidth>
6223 </field>
6224 <field>
6225 <name>PL</name>
6226 <description>Channel Priority level</description>
6227 <bitOffset>12</bitOffset>
6228 <bitWidth>2</bitWidth>
6229 </field>
6230 <field>
6231 <name>MEM2MEM</name>
6232 <description>Memory to memory mode</description>
6233 <bitOffset>14</bitOffset>
6234 <bitWidth>1</bitWidth>
6235 </field>
6236 </fields>
6237 </register>
6238 <register>
6239 <name>CNDTR1</name>
6240 <displayName>CNDTR1</displayName>
6241 <description>DMA channel 1 number of data
6242 register</description>
6243 <addressOffset>0xC</addressOffset>
6244 <size>0x20</size>
6245 <access>read-write</access>
6246 <resetValue>0x00000000</resetValue>
6247 <fields>
6248 <field>
6249 <name>NDT</name>
6250 <description>Number of data to transfer</description>
6251 <bitOffset>0</bitOffset>
6252 <bitWidth>16</bitWidth>
6253 </field>
6254 </fields>
6255 </register>
6256 <register>
6257 <name>CPAR1</name>
6258 <displayName>CPAR1</displayName>
6259 <description>DMA channel 1 peripheral address
6260 register</description>
6261 <addressOffset>0x10</addressOffset>
6262 <size>0x20</size>
6263 <access>read-write</access>
6264 <resetValue>0x00000000</resetValue>
6265 <fields>
6266 <field>
6267 <name>PA</name>
6268 <description>Peripheral address</description>
6269 <bitOffset>0</bitOffset>
6270 <bitWidth>32</bitWidth>
6271 </field>
6272 </fields>
6273 </register>
6274 <register>
6275 <name>CMAR1</name>
6276 <displayName>CMAR1</displayName>
6277 <description>DMA channel 1 memory address
6278 register</description>
6279 <addressOffset>0x14</addressOffset>
6280 <size>0x20</size>
6281 <access>read-write</access>
6282 <resetValue>0x00000000</resetValue>
6283 <fields>
6284 <field>
6285 <name>MA</name>
6286 <description>Memory address</description>
6287 <bitOffset>0</bitOffset>
6288 <bitWidth>32</bitWidth>
6289 </field>
6290 </fields>
6291 </register>
6292 <register>
6293 <name>CCR2</name>
6294 <displayName>CCR2</displayName>
6295 <description>DMA channel configuration register
6296 (DMA_CCR)</description>
6297 <addressOffset>0x1C</addressOffset>
6298 <size>0x20</size>
6299 <access>read-write</access>
6300 <resetValue>0x00000000</resetValue>
6301 <fields>
6302 <field>
6303 <name>EN</name>
6304 <description>Channel enable</description>
6305 <bitOffset>0</bitOffset>
6306 <bitWidth>1</bitWidth>
6307 </field>
6308 <field>
6309 <name>TCIE</name>
6310 <description>Transfer complete interrupt
6311 enable</description>
6312 <bitOffset>1</bitOffset>
6313 <bitWidth>1</bitWidth>
6314 </field>
6315 <field>
6316 <name>HTIE</name>
6317 <description>Half Transfer interrupt
6318 enable</description>
6319 <bitOffset>2</bitOffset>
6320 <bitWidth>1</bitWidth>
6321 </field>
6322 <field>
6323 <name>TEIE</name>
6324 <description>Transfer error interrupt
6325 enable</description>
6326 <bitOffset>3</bitOffset>
6327 <bitWidth>1</bitWidth>
6328 </field>
6329 <field>
6330 <name>DIR</name>
6331 <description>Data transfer direction</description>
6332 <bitOffset>4</bitOffset>
6333 <bitWidth>1</bitWidth>
6334 </field>
6335 <field>
6336 <name>CIRC</name>
6337 <description>Circular mode</description>
6338 <bitOffset>5</bitOffset>
6339 <bitWidth>1</bitWidth>
6340 </field>
6341 <field>
6342 <name>PINC</name>
6343 <description>Peripheral increment mode</description>
6344 <bitOffset>6</bitOffset>
6345 <bitWidth>1</bitWidth>
6346 </field>
6347 <field>
6348 <name>MINC</name>
6349 <description>Memory increment mode</description>
6350 <bitOffset>7</bitOffset>
6351 <bitWidth>1</bitWidth>
6352 </field>
6353 <field>
6354 <name>PSIZE</name>
6355 <description>Peripheral size</description>
6356 <bitOffset>8</bitOffset>
6357 <bitWidth>2</bitWidth>
6358 </field>
6359 <field>
6360 <name>MSIZE</name>
6361 <description>Memory size</description>
6362 <bitOffset>10</bitOffset>
6363 <bitWidth>2</bitWidth>
6364 </field>
6365 <field>
6366 <name>PL</name>
6367 <description>Channel Priority level</description>
6368 <bitOffset>12</bitOffset>
6369 <bitWidth>2</bitWidth>
6370 </field>
6371 <field>
6372 <name>MEM2MEM</name>
6373 <description>Memory to memory mode</description>
6374 <bitOffset>14</bitOffset>
6375 <bitWidth>1</bitWidth>
6376 </field>
6377 </fields>
6378 </register>
6379 <register>
6380 <name>CNDTR2</name>
6381 <displayName>CNDTR2</displayName>
6382 <description>DMA channel 2 number of data
6383 register</description>
6384 <addressOffset>0x20</addressOffset>
6385 <size>0x20</size>
6386 <access>read-write</access>
6387 <resetValue>0x00000000</resetValue>
6388 <fields>
6389 <field>
6390 <name>NDT</name>
6391 <description>Number of data to transfer</description>
6392 <bitOffset>0</bitOffset>
6393 <bitWidth>16</bitWidth>
6394 </field>
6395 </fields>
6396 </register>
6397 <register>
6398 <name>CPAR2</name>
6399 <displayName>CPAR2</displayName>
6400 <description>DMA channel 2 peripheral address
6401 register</description>
6402 <addressOffset>0x24</addressOffset>
6403 <size>0x20</size>
6404 <access>read-write</access>
6405 <resetValue>0x00000000</resetValue>
6406 <fields>
6407 <field>
6408 <name>PA</name>
6409 <description>Peripheral address</description>
6410 <bitOffset>0</bitOffset>
6411 <bitWidth>32</bitWidth>
6412 </field>
6413 </fields>
6414 </register>
6415 <register>
6416 <name>CMAR2</name>
6417 <displayName>CMAR2</displayName>
6418 <description>DMA channel 2 memory address
6419 register</description>
6420 <addressOffset>0x28</addressOffset>
6421 <size>0x20</size>
6422 <access>read-write</access>
6423 <resetValue>0x00000000</resetValue>
6424 <fields>
6425 <field>
6426 <name>MA</name>
6427 <description>Memory address</description>
6428 <bitOffset>0</bitOffset>
6429 <bitWidth>32</bitWidth>
6430 </field>
6431 </fields>
6432 </register>
6433 <register>
6434 <name>CCR3</name>
6435 <displayName>CCR3</displayName>
6436 <description>DMA channel configuration register
6437 (DMA_CCR)</description>
6438 <addressOffset>0x30</addressOffset>
6439 <size>0x20</size>
6440 <access>read-write</access>
6441 <resetValue>0x00000000</resetValue>
6442 <fields>
6443 <field>
6444 <name>EN</name>
6445 <description>Channel enable</description>
6446 <bitOffset>0</bitOffset>
6447 <bitWidth>1</bitWidth>
6448 </field>
6449 <field>
6450 <name>TCIE</name>
6451 <description>Transfer complete interrupt
6452 enable</description>
6453 <bitOffset>1</bitOffset>
6454 <bitWidth>1</bitWidth>
6455 </field>
6456 <field>
6457 <name>HTIE</name>
6458 <description>Half Transfer interrupt
6459 enable</description>
6460 <bitOffset>2</bitOffset>
6461 <bitWidth>1</bitWidth>
6462 </field>
6463 <field>
6464 <name>TEIE</name>
6465 <description>Transfer error interrupt
6466 enable</description>
6467 <bitOffset>3</bitOffset>
6468 <bitWidth>1</bitWidth>
6469 </field>
6470 <field>
6471 <name>DIR</name>
6472 <description>Data transfer direction</description>
6473 <bitOffset>4</bitOffset>
6474 <bitWidth>1</bitWidth>
6475 </field>
6476 <field>
6477 <name>CIRC</name>
6478 <description>Circular mode</description>
6479 <bitOffset>5</bitOffset>
6480 <bitWidth>1</bitWidth>
6481 </field>
6482 <field>
6483 <name>PINC</name>
6484 <description>Peripheral increment mode</description>
6485 <bitOffset>6</bitOffset>
6486 <bitWidth>1</bitWidth>
6487 </field>
6488 <field>
6489 <name>MINC</name>
6490 <description>Memory increment mode</description>
6491 <bitOffset>7</bitOffset>
6492 <bitWidth>1</bitWidth>
6493 </field>
6494 <field>
6495 <name>PSIZE</name>
6496 <description>Peripheral size</description>
6497 <bitOffset>8</bitOffset>
6498 <bitWidth>2</bitWidth>
6499 </field>
6500 <field>
6501 <name>MSIZE</name>
6502 <description>Memory size</description>
6503 <bitOffset>10</bitOffset>
6504 <bitWidth>2</bitWidth>
6505 </field>
6506 <field>
6507 <name>PL</name>
6508 <description>Channel Priority level</description>
6509 <bitOffset>12</bitOffset>
6510 <bitWidth>2</bitWidth>
6511 </field>
6512 <field>
6513 <name>MEM2MEM</name>
6514 <description>Memory to memory mode</description>
6515 <bitOffset>14</bitOffset>
6516 <bitWidth>1</bitWidth>
6517 </field>
6518 </fields>
6519 </register>
6520 <register>
6521 <name>CNDTR3</name>
6522 <displayName>CNDTR3</displayName>
6523 <description>DMA channel 3 number of data
6524 register</description>
6525 <addressOffset>0x34</addressOffset>
6526 <size>0x20</size>
6527 <access>read-write</access>
6528 <resetValue>0x00000000</resetValue>
6529 <fields>
6530 <field>
6531 <name>NDT</name>
6532 <description>Number of data to transfer</description>
6533 <bitOffset>0</bitOffset>
6534 <bitWidth>16</bitWidth>
6535 </field>
6536 </fields>
6537 </register>
6538 <register>
6539 <name>CPAR3</name>
6540 <displayName>CPAR3</displayName>
6541 <description>DMA channel 3 peripheral address
6542 register</description>
6543 <addressOffset>0x38</addressOffset>
6544 <size>0x20</size>
6545 <access>read-write</access>
6546 <resetValue>0x00000000</resetValue>
6547 <fields>
6548 <field>
6549 <name>PA</name>
6550 <description>Peripheral address</description>
6551 <bitOffset>0</bitOffset>
6552 <bitWidth>32</bitWidth>
6553 </field>
6554 </fields>
6555 </register>
6556 <register>
6557 <name>CMAR3</name>
6558 <displayName>CMAR3</displayName>
6559 <description>DMA channel 3 memory address
6560 register</description>
6561 <addressOffset>0x3C</addressOffset>
6562 <size>0x20</size>
6563 <access>read-write</access>
6564 <resetValue>0x00000000</resetValue>
6565 <fields>
6566 <field>
6567 <name>MA</name>
6568 <description>Memory address</description>
6569 <bitOffset>0</bitOffset>
6570 <bitWidth>32</bitWidth>
6571 </field>
6572 </fields>
6573 </register>
6574 <register>
6575 <name>CCR4</name>
6576 <displayName>CCR4</displayName>
6577 <description>DMA channel configuration register
6578 (DMA_CCR)</description>
6579 <addressOffset>0x44</addressOffset>
6580 <size>0x20</size>
6581 <access>read-write</access>
6582 <resetValue>0x00000000</resetValue>
6583 <fields>
6584 <field>
6585 <name>EN</name>
6586 <description>Channel enable</description>
6587 <bitOffset>0</bitOffset>
6588 <bitWidth>1</bitWidth>
6589 </field>
6590 <field>
6591 <name>TCIE</name>
6592 <description>Transfer complete interrupt
6593 enable</description>
6594 <bitOffset>1</bitOffset>
6595 <bitWidth>1</bitWidth>
6596 </field>
6597 <field>
6598 <name>HTIE</name>
6599 <description>Half Transfer interrupt
6600 enable</description>
6601 <bitOffset>2</bitOffset>
6602 <bitWidth>1</bitWidth>
6603 </field>
6604 <field>
6605 <name>TEIE</name>
6606 <description>Transfer error interrupt
6607 enable</description>
6608 <bitOffset>3</bitOffset>
6609 <bitWidth>1</bitWidth>
6610 </field>
6611 <field>
6612 <name>DIR</name>
6613 <description>Data transfer direction</description>
6614 <bitOffset>4</bitOffset>
6615 <bitWidth>1</bitWidth>
6616 </field>
6617 <field>
6618 <name>CIRC</name>
6619 <description>Circular mode</description>
6620 <bitOffset>5</bitOffset>
6621 <bitWidth>1</bitWidth>
6622 </field>
6623 <field>
6624 <name>PINC</name>
6625 <description>Peripheral increment mode</description>
6626 <bitOffset>6</bitOffset>
6627 <bitWidth>1</bitWidth>
6628 </field>
6629 <field>
6630 <name>MINC</name>
6631 <description>Memory increment mode</description>
6632 <bitOffset>7</bitOffset>
6633 <bitWidth>1</bitWidth>
6634 </field>
6635 <field>
6636 <name>PSIZE</name>
6637 <description>Peripheral size</description>
6638 <bitOffset>8</bitOffset>
6639 <bitWidth>2</bitWidth>
6640 </field>
6641 <field>
6642 <name>MSIZE</name>
6643 <description>Memory size</description>
6644 <bitOffset>10</bitOffset>
6645 <bitWidth>2</bitWidth>
6646 </field>
6647 <field>
6648 <name>PL</name>
6649 <description>Channel Priority level</description>
6650 <bitOffset>12</bitOffset>
6651 <bitWidth>2</bitWidth>
6652 </field>
6653 <field>
6654 <name>MEM2MEM</name>
6655 <description>Memory to memory mode</description>
6656 <bitOffset>14</bitOffset>
6657 <bitWidth>1</bitWidth>
6658 </field>
6659 </fields>
6660 </register>
6661 <register>
6662 <name>CNDTR4</name>
6663 <displayName>CNDTR4</displayName>
6664 <description>DMA channel 4 number of data
6665 register</description>
6666 <addressOffset>0x48</addressOffset>
6667 <size>0x20</size>
6668 <access>read-write</access>
6669 <resetValue>0x00000000</resetValue>
6670 <fields>
6671 <field>
6672 <name>NDT</name>
6673 <description>Number of data to transfer</description>
6674 <bitOffset>0</bitOffset>
6675 <bitWidth>16</bitWidth>
6676 </field>
6677 </fields>
6678 </register>
6679 <register>
6680 <name>CPAR4</name>
6681 <displayName>CPAR4</displayName>
6682 <description>DMA channel 4 peripheral address
6683 register</description>
6684 <addressOffset>0x4C</addressOffset>
6685 <size>0x20</size>
6686 <access>read-write</access>
6687 <resetValue>0x00000000</resetValue>
6688 <fields>
6689 <field>
6690 <name>PA</name>
6691 <description>Peripheral address</description>
6692 <bitOffset>0</bitOffset>
6693 <bitWidth>32</bitWidth>
6694 </field>
6695 </fields>
6696 </register>
6697 <register>
6698 <name>CMAR4</name>
6699 <displayName>CMAR4</displayName>
6700 <description>DMA channel 4 memory address
6701 register</description>
6702 <addressOffset>0x50</addressOffset>
6703 <size>0x20</size>
6704 <access>read-write</access>
6705 <resetValue>0x00000000</resetValue>
6706 <fields>
6707 <field>
6708 <name>MA</name>
6709 <description>Memory address</description>
6710 <bitOffset>0</bitOffset>
6711 <bitWidth>32</bitWidth>
6712 </field>
6713 </fields>
6714 </register>
6715 <register>
6716 <name>CCR5</name>
6717 <displayName>CCR5</displayName>
6718 <description>DMA channel configuration register
6719 (DMA_CCR)</description>
6720 <addressOffset>0x58</addressOffset>
6721 <size>0x20</size>
6722 <access>read-write</access>
6723 <resetValue>0x00000000</resetValue>
6724 <fields>
6725 <field>
6726 <name>EN</name>
6727 <description>Channel enable</description>
6728 <bitOffset>0</bitOffset>
6729 <bitWidth>1</bitWidth>
6730 </field>
6731 <field>
6732 <name>TCIE</name>
6733 <description>Transfer complete interrupt
6734 enable</description>
6735 <bitOffset>1</bitOffset>
6736 <bitWidth>1</bitWidth>
6737 </field>
6738 <field>
6739 <name>HTIE</name>
6740 <description>Half Transfer interrupt
6741 enable</description>
6742 <bitOffset>2</bitOffset>
6743 <bitWidth>1</bitWidth>
6744 </field>
6745 <field>
6746 <name>TEIE</name>
6747 <description>Transfer error interrupt
6748 enable</description>
6749 <bitOffset>3</bitOffset>
6750 <bitWidth>1</bitWidth>
6751 </field>
6752 <field>
6753 <name>DIR</name>
6754 <description>Data transfer direction</description>
6755 <bitOffset>4</bitOffset>
6756 <bitWidth>1</bitWidth>
6757 </field>
6758 <field>
6759 <name>CIRC</name>
6760 <description>Circular mode</description>
6761 <bitOffset>5</bitOffset>
6762 <bitWidth>1</bitWidth>
6763 </field>
6764 <field>
6765 <name>PINC</name>
6766 <description>Peripheral increment mode</description>
6767 <bitOffset>6</bitOffset>
6768 <bitWidth>1</bitWidth>
6769 </field>
6770 <field>
6771 <name>MINC</name>
6772 <description>Memory increment mode</description>
6773 <bitOffset>7</bitOffset>
6774 <bitWidth>1</bitWidth>
6775 </field>
6776 <field>
6777 <name>PSIZE</name>
6778 <description>Peripheral size</description>
6779 <bitOffset>8</bitOffset>
6780 <bitWidth>2</bitWidth>
6781 </field>
6782 <field>
6783 <name>MSIZE</name>
6784 <description>Memory size</description>
6785 <bitOffset>10</bitOffset>
6786 <bitWidth>2</bitWidth>
6787 </field>
6788 <field>
6789 <name>PL</name>
6790 <description>Channel Priority level</description>
6791 <bitOffset>12</bitOffset>
6792 <bitWidth>2</bitWidth>
6793 </field>
6794 <field>
6795 <name>MEM2MEM</name>
6796 <description>Memory to memory mode</description>
6797 <bitOffset>14</bitOffset>
6798 <bitWidth>1</bitWidth>
6799 </field>
6800 </fields>
6801 </register>
6802 <register>
6803 <name>CNDTR5</name>
6804 <displayName>CNDTR5</displayName>
6805 <description>DMA channel 5 number of data
6806 register</description>
6807 <addressOffset>0x5C</addressOffset>
6808 <size>0x20</size>
6809 <access>read-write</access>
6810 <resetValue>0x00000000</resetValue>
6811 <fields>
6812 <field>
6813 <name>NDT</name>
6814 <description>Number of data to transfer</description>
6815 <bitOffset>0</bitOffset>
6816 <bitWidth>16</bitWidth>
6817 </field>
6818 </fields>
6819 </register>
6820 <register>
6821 <name>CPAR5</name>
6822 <displayName>CPAR5</displayName>
6823 <description>DMA channel 5 peripheral address
6824 register</description>
6825 <addressOffset>0x60</addressOffset>
6826 <size>0x20</size>
6827 <access>read-write</access>
6828 <resetValue>0x00000000</resetValue>
6829 <fields>
6830 <field>
6831 <name>PA</name>
6832 <description>Peripheral address</description>
6833 <bitOffset>0</bitOffset>
6834 <bitWidth>32</bitWidth>
6835 </field>
6836 </fields>
6837 </register>
6838 <register>
6839 <name>CMAR5</name>
6840 <displayName>CMAR5</displayName>
6841 <description>DMA channel 5 memory address
6842 register</description>
6843 <addressOffset>0x64</addressOffset>
6844 <size>0x20</size>
6845 <access>read-write</access>
6846 <resetValue>0x00000000</resetValue>
6847 <fields>
6848 <field>
6849 <name>MA</name>
6850 <description>Memory address</description>
6851 <bitOffset>0</bitOffset>
6852 <bitWidth>32</bitWidth>
6853 </field>
6854 </fields>
6855 </register>
6856 <register>
6857 <name>CCR6</name>
6858 <displayName>CCR6</displayName>
6859 <description>DMA channel configuration register
6860 (DMA_CCR)</description>
6861 <addressOffset>0x6C</addressOffset>
6862 <size>0x20</size>
6863 <access>read-write</access>
6864 <resetValue>0x00000000</resetValue>
6865 <fields>
6866 <field>
6867 <name>EN</name>
6868 <description>Channel enable</description>
6869 <bitOffset>0</bitOffset>
6870 <bitWidth>1</bitWidth>
6871 </field>
6872 <field>
6873 <name>TCIE</name>
6874 <description>Transfer complete interrupt
6875 enable</description>
6876 <bitOffset>1</bitOffset>
6877 <bitWidth>1</bitWidth>
6878 </field>
6879 <field>
6880 <name>HTIE</name>
6881 <description>Half Transfer interrupt
6882 enable</description>
6883 <bitOffset>2</bitOffset>
6884 <bitWidth>1</bitWidth>
6885 </field>
6886 <field>
6887 <name>TEIE</name>
6888 <description>Transfer error interrupt
6889 enable</description>
6890 <bitOffset>3</bitOffset>
6891 <bitWidth>1</bitWidth>
6892 </field>
6893 <field>
6894 <name>DIR</name>
6895 <description>Data transfer direction</description>
6896 <bitOffset>4</bitOffset>
6897 <bitWidth>1</bitWidth>
6898 </field>
6899 <field>
6900 <name>CIRC</name>
6901 <description>Circular mode</description>
6902 <bitOffset>5</bitOffset>
6903 <bitWidth>1</bitWidth>
6904 </field>
6905 <field>
6906 <name>PINC</name>
6907 <description>Peripheral increment mode</description>
6908 <bitOffset>6</bitOffset>
6909 <bitWidth>1</bitWidth>
6910 </field>
6911 <field>
6912 <name>MINC</name>
6913 <description>Memory increment mode</description>
6914 <bitOffset>7</bitOffset>
6915 <bitWidth>1</bitWidth>
6916 </field>
6917 <field>
6918 <name>PSIZE</name>
6919 <description>Peripheral size</description>
6920 <bitOffset>8</bitOffset>
6921 <bitWidth>2</bitWidth>
6922 </field>
6923 <field>
6924 <name>MSIZE</name>
6925 <description>Memory size</description>
6926 <bitOffset>10</bitOffset>
6927 <bitWidth>2</bitWidth>
6928 </field>
6929 <field>
6930 <name>PL</name>
6931 <description>Channel Priority level</description>
6932 <bitOffset>12</bitOffset>
6933 <bitWidth>2</bitWidth>
6934 </field>
6935 <field>
6936 <name>MEM2MEM</name>
6937 <description>Memory to memory mode</description>
6938 <bitOffset>14</bitOffset>
6939 <bitWidth>1</bitWidth>
6940 </field>
6941 </fields>
6942 </register>
6943 <register>
6944 <name>CNDTR6</name>
6945 <displayName>CNDTR6</displayName>
6946 <description>DMA channel 6 number of data
6947 register</description>
6948 <addressOffset>0x70</addressOffset>
6949 <size>0x20</size>
6950 <access>read-write</access>
6951 <resetValue>0x00000000</resetValue>
6952 <fields>
6953 <field>
6954 <name>NDT</name>
6955 <description>Number of data to transfer</description>
6956 <bitOffset>0</bitOffset>
6957 <bitWidth>16</bitWidth>
6958 </field>
6959 </fields>
6960 </register>
6961 <register>
6962 <name>CPAR6</name>
6963 <displayName>CPAR6</displayName>
6964 <description>DMA channel 6 peripheral address
6965 register</description>
6966 <addressOffset>0x74</addressOffset>
6967 <size>0x20</size>
6968 <access>read-write</access>
6969 <resetValue>0x00000000</resetValue>
6970 <fields>
6971 <field>
6972 <name>PA</name>
6973 <description>Peripheral address</description>
6974 <bitOffset>0</bitOffset>
6975 <bitWidth>32</bitWidth>
6976 </field>
6977 </fields>
6978 </register>
6979 <register>
6980 <name>CMAR6</name>
6981 <displayName>CMAR6</displayName>
6982 <description>DMA channel 6 memory address
6983 register</description>
6984 <addressOffset>0x78</addressOffset>
6985 <size>0x20</size>
6986 <access>read-write</access>
6987 <resetValue>0x00000000</resetValue>
6988 <fields>
6989 <field>
6990 <name>MA</name>
6991 <description>Memory address</description>
6992 <bitOffset>0</bitOffset>
6993 <bitWidth>32</bitWidth>
6994 </field>
6995 </fields>
6996 </register>
6997 <register>
6998 <name>CCR7</name>
6999 <displayName>CCR7</displayName>
7000 <description>DMA channel configuration register
7001 (DMA_CCR)</description>
7002 <addressOffset>0x80</addressOffset>
7003 <size>0x20</size>
7004 <access>read-write</access>
7005 <resetValue>0x00000000</resetValue>
7006 <fields>
7007 <field>
7008 <name>EN</name>
7009 <description>Channel enable</description>
7010 <bitOffset>0</bitOffset>
7011 <bitWidth>1</bitWidth>
7012 </field>
7013 <field>
7014 <name>TCIE</name>
7015 <description>Transfer complete interrupt
7016 enable</description>
7017 <bitOffset>1</bitOffset>
7018 <bitWidth>1</bitWidth>
7019 </field>
7020 <field>
7021 <name>HTIE</name>
7022 <description>Half Transfer interrupt
7023 enable</description>
7024 <bitOffset>2</bitOffset>
7025 <bitWidth>1</bitWidth>
7026 </field>
7027 <field>
7028 <name>TEIE</name>
7029 <description>Transfer error interrupt
7030 enable</description>
7031 <bitOffset>3</bitOffset>
7032 <bitWidth>1</bitWidth>
7033 </field>
7034 <field>
7035 <name>DIR</name>
7036 <description>Data transfer direction</description>
7037 <bitOffset>4</bitOffset>
7038 <bitWidth>1</bitWidth>
7039 </field>
7040 <field>
7041 <name>CIRC</name>
7042 <description>Circular mode</description>
7043 <bitOffset>5</bitOffset>
7044 <bitWidth>1</bitWidth>
7045 </field>
7046 <field>
7047 <name>PINC</name>
7048 <description>Peripheral increment mode</description>
7049 <bitOffset>6</bitOffset>
7050 <bitWidth>1</bitWidth>
7051 </field>
7052 <field>
7053 <name>MINC</name>
7054 <description>Memory increment mode</description>
7055 <bitOffset>7</bitOffset>
7056 <bitWidth>1</bitWidth>
7057 </field>
7058 <field>
7059 <name>PSIZE</name>
7060 <description>Peripheral size</description>
7061 <bitOffset>8</bitOffset>
7062 <bitWidth>2</bitWidth>
7063 </field>
7064 <field>
7065 <name>MSIZE</name>
7066 <description>Memory size</description>
7067 <bitOffset>10</bitOffset>
7068 <bitWidth>2</bitWidth>
7069 </field>
7070 <field>
7071 <name>PL</name>
7072 <description>Channel Priority level</description>
7073 <bitOffset>12</bitOffset>
7074 <bitWidth>2</bitWidth>
7075 </field>
7076 <field>
7077 <name>MEM2MEM</name>
7078 <description>Memory to memory mode</description>
7079 <bitOffset>14</bitOffset>
7080 <bitWidth>1</bitWidth>
7081 </field>
7082 </fields>
7083 </register>
7084 <register>
7085 <name>CNDTR7</name>
7086 <displayName>CNDTR7</displayName>
7087 <description>DMA channel 7 number of data
7088 register</description>
7089 <addressOffset>0x84</addressOffset>
7090 <size>0x20</size>
7091 <access>read-write</access>
7092 <resetValue>0x00000000</resetValue>
7093 <fields>
7094 <field>
7095 <name>NDT</name>
7096 <description>Number of data to transfer</description>
7097 <bitOffset>0</bitOffset>
7098 <bitWidth>16</bitWidth>
7099 </field>
7100 </fields>
7101 </register>
7102 <register>
7103 <name>CPAR7</name>
7104 <displayName>CPAR7</displayName>
7105 <description>DMA channel 7 peripheral address
7106 register</description>
7107 <addressOffset>0x88</addressOffset>
7108 <size>0x20</size>
7109 <access>read-write</access>
7110 <resetValue>0x00000000</resetValue>
7111 <fields>
7112 <field>
7113 <name>PA</name>
7114 <description>Peripheral address</description>
7115 <bitOffset>0</bitOffset>
7116 <bitWidth>32</bitWidth>
7117 </field>
7118 </fields>
7119 </register>
7120 <register>
7121 <name>CMAR7</name>
7122 <displayName>CMAR7</displayName>
7123 <description>DMA channel 7 memory address
7124 register</description>
7125 <addressOffset>0x8C</addressOffset>
7126 <size>0x20</size>
7127 <access>read-write</access>
7128 <resetValue>0x00000000</resetValue>
7129 <fields>
7130 <field>
7131 <name>MA</name>
7132 <description>Memory address</description>
7133 <bitOffset>0</bitOffset>
7134 <bitWidth>32</bitWidth>
7135 </field>
7136 </fields>
7137 </register>
7138 </registers>
7139 </peripheral>
7140 <peripheral derivedFrom="DMA1">
7141 <name>DMA2</name>
7142 <baseAddress>0x40020400</baseAddress>
7143 <interrupt>
7144 <name>DMA2_CH1</name>
7145 <description>DMA2 channel1 global interrupt</description>
7146 <value>56</value>
7147 </interrupt>
7148 <interrupt>
7149 <name>DMA2_CH2</name>
7150 <description>DMA2 channel2 global interrupt</description>
7151 <value>57</value>
7152 </interrupt>
7153 <interrupt>
7154 <name>DMA2_CH3</name>
7155 <description>DMA2 channel3 global interrupt</description>
7156 <value>58</value>
7157 </interrupt>
7158 <interrupt>
7159 <name>DMA2_CH4</name>
7160 <description>DMA2 channel4 global interrupt</description>
7161 <value>59</value>
7162 </interrupt>
7163 <interrupt>
7164 <name>DMA2_CH5</name>
7165 <description>DMA2 channel5 global interrupt</description>
7166 <value>60</value>
7167 </interrupt>
7168 </peripheral>
7169 <peripheral>
7170 <name>TIM2</name>
7171 <description>General purpose timer</description>
7172 <groupName>TIMs</groupName>
7173 <baseAddress>0x40000000</baseAddress>
7174 <addressBlock>
7175 <offset>0x0</offset>
7176 <size>0x400</size>
7177 <usage>registers</usage>
7178 </addressBlock>
7179 <interrupt>
7180 <name>TIM2</name>
7181 <description>TIM2 global interrupt</description>
7182 <value>28</value>
7183 </interrupt>
7184 <registers>
7185 <register>
7186 <name>CR1</name>
7187 <displayName>CR1</displayName>
7188 <description>control register 1</description>
7189 <addressOffset>0x0</addressOffset>
7190 <size>0x20</size>
7191 <access>read-write</access>
7192 <resetValue>0x0000</resetValue>
7193 <fields>
7194 <field>
7195 <name>CEN</name>
7196 <description>Counter enable</description>
7197 <bitOffset>0</bitOffset>
7198 <bitWidth>1</bitWidth>
7199 </field>
7200 <field>
7201 <name>UDIS</name>
7202 <description>Update disable</description>
7203 <bitOffset>1</bitOffset>
7204 <bitWidth>1</bitWidth>
7205 </field>
7206 <field>
7207 <name>URS</name>
7208 <description>Update request source</description>
7209 <bitOffset>2</bitOffset>
7210 <bitWidth>1</bitWidth>
7211 </field>
7212 <field>
7213 <name>OPM</name>
7214 <description>One-pulse mode</description>
7215 <bitOffset>3</bitOffset>
7216 <bitWidth>1</bitWidth>
7217 </field>
7218 <field>
7219 <name>DIR</name>
7220 <description>Direction</description>
7221 <bitOffset>4</bitOffset>
7222 <bitWidth>1</bitWidth>
7223 </field>
7224 <field>
7225 <name>CMS</name>
7226 <description>Center-aligned mode
7227 selection</description>
7228 <bitOffset>5</bitOffset>
7229 <bitWidth>2</bitWidth>
7230 </field>
7231 <field>
7232 <name>ARPE</name>
7233 <description>Auto-reload preload enable</description>
7234 <bitOffset>7</bitOffset>
7235 <bitWidth>1</bitWidth>
7236 </field>
7237 <field>
7238 <name>CKD</name>
7239 <description>Clock division</description>
7240 <bitOffset>8</bitOffset>
7241 <bitWidth>2</bitWidth>
7242 </field>
7243 <field>
7244 <name>UIFREMAP</name>
7245 <description>UIF status bit remapping</description>
7246 <bitOffset>11</bitOffset>
7247 <bitWidth>1</bitWidth>
7248 </field>
7249 </fields>
7250 </register>
7251 <register>
7252 <name>CR2</name>
7253 <displayName>CR2</displayName>
7254 <description>control register 2</description>
7255 <addressOffset>0x4</addressOffset>
7256 <size>0x20</size>
7257 <access>read-write</access>
7258 <resetValue>0x0000</resetValue>
7259 <fields>
7260 <field>
7261 <name>TI1S</name>
7262 <description>TI1 selection</description>
7263 <bitOffset>7</bitOffset>
7264 <bitWidth>1</bitWidth>
7265 </field>
7266 <field>
7267 <name>MMS</name>
7268 <description>Master mode selection</description>
7269 <bitOffset>4</bitOffset>
7270 <bitWidth>3</bitWidth>
7271 </field>
7272 <field>
7273 <name>CCDS</name>
7274 <description>Capture/compare DMA
7275 selection</description>
7276 <bitOffset>3</bitOffset>
7277 <bitWidth>1</bitWidth>
7278 </field>
7279 </fields>
7280 </register>
7281 <register>
7282 <name>SMCR</name>
7283 <displayName>SMCR</displayName>
7284 <description>slave mode control register</description>
7285 <addressOffset>0x8</addressOffset>
7286 <size>0x20</size>
7287 <access>read-write</access>
7288 <resetValue>0x0000</resetValue>
7289 <fields>
7290 <field>
7291 <name>SMS</name>
7292 <description>Slave mode selection</description>
7293 <bitOffset>0</bitOffset>
7294 <bitWidth>3</bitWidth>
7295 </field>
7296 <field>
7297 <name>OCCS</name>
7298 <description>OCREF clear selection</description>
7299 <bitOffset>3</bitOffset>
7300 <bitWidth>1</bitWidth>
7301 </field>
7302 <field>
7303 <name>TS</name>
7304 <description>Trigger selection</description>
7305 <bitOffset>4</bitOffset>
7306 <bitWidth>3</bitWidth>
7307 </field>
7308 <field>
7309 <name>MSM</name>
7310 <description>Master/Slave mode</description>
7311 <bitOffset>7</bitOffset>
7312 <bitWidth>1</bitWidth>
7313 </field>
7314 <field>
7315 <name>ETF</name>
7316 <description>External trigger filter</description>
7317 <bitOffset>8</bitOffset>
7318 <bitWidth>4</bitWidth>
7319 </field>
7320 <field>
7321 <name>ETPS</name>
7322 <description>External trigger prescaler</description>
7323 <bitOffset>12</bitOffset>
7324 <bitWidth>2</bitWidth>
7325 </field>
7326 <field>
7327 <name>ECE</name>
7328 <description>External clock enable</description>
7329 <bitOffset>14</bitOffset>
7330 <bitWidth>1</bitWidth>
7331 </field>
7332 <field>
7333 <name>ETP</name>
7334 <description>External trigger polarity</description>
7335 <bitOffset>15</bitOffset>
7336 <bitWidth>1</bitWidth>
7337 </field>
7338 <field>
7339 <name>SMS_3</name>
7340 <description>Slave mode selection bit3</description>
7341 <bitOffset>16</bitOffset>
7342 <bitWidth>1</bitWidth>
7343 </field>
7344 </fields>
7345 </register>
7346 <register>
7347 <name>DIER</name>
7348 <displayName>DIER</displayName>
7349 <description>DMA/Interrupt enable register</description>
7350 <addressOffset>0xC</addressOffset>
7351 <size>0x20</size>
7352 <access>read-write</access>
7353 <resetValue>0x0000</resetValue>
7354 <fields>
7355 <field>
7356 <name>TDE</name>
7357 <description>Trigger DMA request enable</description>
7358 <bitOffset>14</bitOffset>
7359 <bitWidth>1</bitWidth>
7360 </field>
7361 <field>
7362 <name>CC4DE</name>
7363 <description>Capture/Compare 4 DMA request
7364 enable</description>
7365 <bitOffset>12</bitOffset>
7366 <bitWidth>1</bitWidth>
7367 </field>
7368 <field>
7369 <name>CC3DE</name>
7370 <description>Capture/Compare 3 DMA request
7371 enable</description>
7372 <bitOffset>11</bitOffset>
7373 <bitWidth>1</bitWidth>
7374 </field>
7375 <field>
7376 <name>CC2DE</name>
7377 <description>Capture/Compare 2 DMA request
7378 enable</description>
7379 <bitOffset>10</bitOffset>
7380 <bitWidth>1</bitWidth>
7381 </field>
7382 <field>
7383 <name>CC1DE</name>
7384 <description>Capture/Compare 1 DMA request
7385 enable</description>
7386 <bitOffset>9</bitOffset>
7387 <bitWidth>1</bitWidth>
7388 </field>
7389 <field>
7390 <name>UDE</name>
7391 <description>Update DMA request enable</description>
7392 <bitOffset>8</bitOffset>
7393 <bitWidth>1</bitWidth>
7394 </field>
7395 <field>
7396 <name>TIE</name>
7397 <description>Trigger interrupt enable</description>
7398 <bitOffset>6</bitOffset>
7399 <bitWidth>1</bitWidth>
7400 </field>
7401 <field>
7402 <name>CC4IE</name>
7403 <description>Capture/Compare 4 interrupt
7404 enable</description>
7405 <bitOffset>4</bitOffset>
7406 <bitWidth>1</bitWidth>
7407 </field>
7408 <field>
7409 <name>CC3IE</name>
7410 <description>Capture/Compare 3 interrupt
7411 enable</description>
7412 <bitOffset>3</bitOffset>
7413 <bitWidth>1</bitWidth>
7414 </field>
7415 <field>
7416 <name>CC2IE</name>
7417 <description>Capture/Compare 2 interrupt
7418 enable</description>
7419 <bitOffset>2</bitOffset>
7420 <bitWidth>1</bitWidth>
7421 </field>
7422 <field>
7423 <name>CC1IE</name>
7424 <description>Capture/Compare 1 interrupt
7425 enable</description>
7426 <bitOffset>1</bitOffset>
7427 <bitWidth>1</bitWidth>
7428 </field>
7429 <field>
7430 <name>UIE</name>
7431 <description>Update interrupt enable</description>
7432 <bitOffset>0</bitOffset>
7433 <bitWidth>1</bitWidth>
7434 </field>
7435 </fields>
7436 </register>
7437 <register>
7438 <name>SR</name>
7439 <displayName>SR</displayName>
7440 <description>status register</description>
7441 <addressOffset>0x10</addressOffset>
7442 <size>0x20</size>
7443 <access>read-write</access>
7444 <resetValue>0x0000</resetValue>
7445 <fields>
7446 <field>
7447 <name>CC4OF</name>
7448 <description>Capture/Compare 4 overcapture
7449 flag</description>
7450 <bitOffset>12</bitOffset>
7451 <bitWidth>1</bitWidth>
7452 </field>
7453 <field>
7454 <name>CC3OF</name>
7455 <description>Capture/Compare 3 overcapture
7456 flag</description>
7457 <bitOffset>11</bitOffset>
7458 <bitWidth>1</bitWidth>
7459 </field>
7460 <field>
7461 <name>CC2OF</name>
7462 <description>Capture/compare 2 overcapture
7463 flag</description>
7464 <bitOffset>10</bitOffset>
7465 <bitWidth>1</bitWidth>
7466 </field>
7467 <field>
7468 <name>CC1OF</name>
7469 <description>Capture/Compare 1 overcapture
7470 flag</description>
7471 <bitOffset>9</bitOffset>
7472 <bitWidth>1</bitWidth>
7473 </field>
7474 <field>
7475 <name>TIF</name>
7476 <description>Trigger interrupt flag</description>
7477 <bitOffset>6</bitOffset>
7478 <bitWidth>1</bitWidth>
7479 </field>
7480 <field>
7481 <name>CC4IF</name>
7482 <description>Capture/Compare 4 interrupt
7483 flag</description>
7484 <bitOffset>4</bitOffset>
7485 <bitWidth>1</bitWidth>
7486 </field>
7487 <field>
7488 <name>CC3IF</name>
7489 <description>Capture/Compare 3 interrupt
7490 flag</description>
7491 <bitOffset>3</bitOffset>
7492 <bitWidth>1</bitWidth>
7493 </field>
7494 <field>
7495 <name>CC2IF</name>
7496 <description>Capture/Compare 2 interrupt
7497 flag</description>
7498 <bitOffset>2</bitOffset>
7499 <bitWidth>1</bitWidth>
7500 </field>
7501 <field>
7502 <name>CC1IF</name>
7503 <description>Capture/compare 1 interrupt
7504 flag</description>
7505 <bitOffset>1</bitOffset>
7506 <bitWidth>1</bitWidth>
7507 </field>
7508 <field>
7509 <name>UIF</name>
7510 <description>Update interrupt flag</description>
7511 <bitOffset>0</bitOffset>
7512 <bitWidth>1</bitWidth>
7513 </field>
7514 </fields>
7515 </register>
7516 <register>
7517 <name>EGR</name>
7518 <displayName>EGR</displayName>
7519 <description>event generation register</description>
7520 <addressOffset>0x14</addressOffset>
7521 <size>0x20</size>
7522 <access>write-only</access>
7523 <resetValue>0x0000</resetValue>
7524 <fields>
7525 <field>
7526 <name>TG</name>
7527 <description>Trigger generation</description>
7528 <bitOffset>6</bitOffset>
7529 <bitWidth>1</bitWidth>
7530 </field>
7531 <field>
7532 <name>CC4G</name>
7533 <description>Capture/compare 4
7534 generation</description>
7535 <bitOffset>4</bitOffset>
7536 <bitWidth>1</bitWidth>
7537 </field>
7538 <field>
7539 <name>CC3G</name>
7540 <description>Capture/compare 3
7541 generation</description>
7542 <bitOffset>3</bitOffset>
7543 <bitWidth>1</bitWidth>
7544 </field>
7545 <field>
7546 <name>CC2G</name>
7547 <description>Capture/compare 2
7548 generation</description>
7549 <bitOffset>2</bitOffset>
7550 <bitWidth>1</bitWidth>
7551 </field>
7552 <field>
7553 <name>CC1G</name>
7554 <description>Capture/compare 1
7555 generation</description>
7556 <bitOffset>1</bitOffset>
7557 <bitWidth>1</bitWidth>
7558 </field>
7559 <field>
7560 <name>UG</name>
7561 <description>Update generation</description>
7562 <bitOffset>0</bitOffset>
7563 <bitWidth>1</bitWidth>
7564 </field>
7565 </fields>
7566 </register>
7567 <register>
7568 <name>CCMR1_Output</name>
7569 <displayName>CCMR1_Output</displayName>
7570 <description>capture/compare mode register 1 (output
7571 mode)</description>
7572 <addressOffset>0x18</addressOffset>
7573 <size>0x20</size>
7574 <access>read-write</access>
7575 <resetValue>0x00000000</resetValue>
7576 <fields>
7577 <field>
7578 <name>CC1S</name>
7579 <description>Capture/Compare 1
7580 selection</description>
7581 <bitOffset>0</bitOffset>
7582 <bitWidth>2</bitWidth>
7583 </field>
7584 <field>
7585 <name>OC1FE</name>
7586 <description>Output compare 1 fast
7587 enable</description>
7588 <bitOffset>2</bitOffset>
7589 <bitWidth>1</bitWidth>
7590 </field>
7591 <field>
7592 <name>OC1PE</name>
7593 <description>Output compare 1 preload
7594 enable</description>
7595 <bitOffset>3</bitOffset>
7596 <bitWidth>1</bitWidth>
7597 </field>
7598 <field>
7599 <name>OC1M</name>
7600 <description>Output compare 1 mode</description>
7601 <bitOffset>4</bitOffset>
7602 <bitWidth>3</bitWidth>
7603 </field>
7604 <field>
7605 <name>OC1CE</name>
7606 <description>Output compare 1 clear
7607 enable</description>
7608 <bitOffset>7</bitOffset>
7609 <bitWidth>1</bitWidth>
7610 </field>
7611 <field>
7612 <name>CC2S</name>
7613 <description>Capture/Compare 2
7614 selection</description>
7615 <bitOffset>8</bitOffset>
7616 <bitWidth>2</bitWidth>
7617 </field>
7618 <field>
7619 <name>OC2FE</name>
7620 <description>Output compare 2 fast
7621 enable</description>
7622 <bitOffset>10</bitOffset>
7623 <bitWidth>1</bitWidth>
7624 </field>
7625 <field>
7626 <name>OC2PE</name>
7627 <description>Output compare 2 preload
7628 enable</description>
7629 <bitOffset>11</bitOffset>
7630 <bitWidth>1</bitWidth>
7631 </field>
7632 <field>
7633 <name>OC2M</name>
7634 <description>Output compare 2 mode</description>
7635 <bitOffset>12</bitOffset>
7636 <bitWidth>3</bitWidth>
7637 </field>
7638 <field>
7639 <name>OC2CE</name>
7640 <description>Output compare 2 clear
7641 enable</description>
7642 <bitOffset>15</bitOffset>
7643 <bitWidth>1</bitWidth>
7644 </field>
7645 <field>
7646 <name>OC1M_3</name>
7647 <description>Output compare 1 mode bit
7648 3</description>
7649 <bitOffset>16</bitOffset>
7650 <bitWidth>1</bitWidth>
7651 </field>
7652 <field>
7653 <name>OC2M_3</name>
7654 <description>Output compare 2 mode bit
7655 3</description>
7656 <bitOffset>24</bitOffset>
7657 <bitWidth>1</bitWidth>
7658 </field>
7659 </fields>
7660 </register>
7661 <register>
7662 <name>CCMR1_Input</name>
7663 <displayName>CCMR1_Input</displayName>
7664 <description>capture/compare mode register 1 (input
7665 mode)</description>
7666 <alternateRegister>CCMR1_Output</alternateRegister>
7667 <addressOffset>0x18</addressOffset>
7668 <size>0x20</size>
7669 <access>read-write</access>
7670 <resetValue>0x00000000</resetValue>
7671 <fields>
7672 <field>
7673 <name>IC2F</name>
7674 <description>Input capture 2 filter</description>
7675 <bitOffset>12</bitOffset>
7676 <bitWidth>4</bitWidth>
7677 </field>
7678 <field>
7679 <name>IC2PSC</name>
7680 <description>Input capture 2 prescaler</description>
7681 <bitOffset>10</bitOffset>
7682 <bitWidth>2</bitWidth>
7683 </field>
7684 <field>
7685 <name>CC2S</name>
7686 <description>Capture/compare 2
7687 selection</description>
7688 <bitOffset>8</bitOffset>
7689 <bitWidth>2</bitWidth>
7690 </field>
7691 <field>
7692 <name>IC1F</name>
7693 <description>Input capture 1 filter</description>
7694 <bitOffset>4</bitOffset>
7695 <bitWidth>4</bitWidth>
7696 </field>
7697 <field>
7698 <name>IC1PSC</name>
7699 <description>Input capture 1 prescaler</description>
7700 <bitOffset>2</bitOffset>
7701 <bitWidth>2</bitWidth>
7702 </field>
7703 <field>
7704 <name>CC1S</name>
7705 <description>Capture/Compare 1
7706 selection</description>
7707 <bitOffset>0</bitOffset>
7708 <bitWidth>2</bitWidth>
7709 </field>
7710 </fields>
7711 </register>
7712 <register>
7713 <name>CCMR2_Output</name>
7714 <displayName>CCMR2_Output</displayName>
7715 <description>capture/compare mode register 2 (output
7716 mode)</description>
7717 <addressOffset>0x1C</addressOffset>
7718 <size>0x20</size>
7719 <access>read-write</access>
7720 <resetValue>0x00000000</resetValue>
7721 <fields>
7722 <field>
7723 <name>CC3S</name>
7724 <description>Capture/Compare 3
7725 selection</description>
7726 <bitOffset>0</bitOffset>
7727 <bitWidth>2</bitWidth>
7728 </field>
7729 <field>
7730 <name>OC3FE</name>
7731 <description>Output compare 3 fast
7732 enable</description>
7733 <bitOffset>2</bitOffset>
7734 <bitWidth>1</bitWidth>
7735 </field>
7736 <field>
7737 <name>OC3PE</name>
7738 <description>Output compare 3 preload
7739 enable</description>
7740 <bitOffset>3</bitOffset>
7741 <bitWidth>1</bitWidth>
7742 </field>
7743 <field>
7744 <name>OC3M</name>
7745 <description>Output compare 3 mode</description>
7746 <bitOffset>4</bitOffset>
7747 <bitWidth>3</bitWidth>
7748 </field>
7749 <field>
7750 <name>OC3CE</name>
7751 <description>Output compare 3 clear
7752 enable</description>
7753 <bitOffset>7</bitOffset>
7754 <bitWidth>1</bitWidth>
7755 </field>
7756 <field>
7757 <name>CC4S</name>
7758 <description>Capture/Compare 4
7759 selection</description>
7760 <bitOffset>8</bitOffset>
7761 <bitWidth>2</bitWidth>
7762 </field>
7763 <field>
7764 <name>OC4FE</name>
7765 <description>Output compare 4 fast
7766 enable</description>
7767 <bitOffset>10</bitOffset>
7768 <bitWidth>1</bitWidth>
7769 </field>
7770 <field>
7771 <name>OC4PE</name>
7772 <description>Output compare 4 preload
7773 enable</description>
7774 <bitOffset>11</bitOffset>
7775 <bitWidth>1</bitWidth>
7776 </field>
7777 <field>
7778 <name>OC4M</name>
7779 <description>Output compare 4 mode</description>
7780 <bitOffset>12</bitOffset>
7781 <bitWidth>3</bitWidth>
7782 </field>
7783 <field>
7784 <name>O24CE</name>
7785 <description>Output compare 4 clear
7786 enable</description>
7787 <bitOffset>15</bitOffset>
7788 <bitWidth>1</bitWidth>
7789 </field>
7790 <field>
7791 <name>OC3M_3</name>
7792 <description>Output compare 3 mode bit3</description>
7793 <bitOffset>16</bitOffset>
7794 <bitWidth>1</bitWidth>
7795 </field>
7796 <field>
7797 <name>OC4M_3</name>
7798 <description>Output compare 4 mode bit3</description>
7799 <bitOffset>24</bitOffset>
7800 <bitWidth>1</bitWidth>
7801 </field>
7802 </fields>
7803 </register>
7804 <register>
7805 <name>CCMR2_Input</name>
7806 <displayName>CCMR2_Input</displayName>
7807 <description>capture/compare mode register 2 (input
7808 mode)</description>
7809 <alternateRegister>CCMR2_Output</alternateRegister>
7810 <addressOffset>0x1C</addressOffset>
7811 <size>0x20</size>
7812 <access>read-write</access>
7813 <resetValue>0x00000000</resetValue>
7814 <fields>
7815 <field>
7816 <name>IC4F</name>
7817 <description>Input capture 4 filter</description>
7818 <bitOffset>12</bitOffset>
7819 <bitWidth>4</bitWidth>
7820 </field>
7821 <field>
7822 <name>IC4PSC</name>
7823 <description>Input capture 4 prescaler</description>
7824 <bitOffset>10</bitOffset>
7825 <bitWidth>2</bitWidth>
7826 </field>
7827 <field>
7828 <name>CC4S</name>
7829 <description>Capture/Compare 4
7830 selection</description>
7831 <bitOffset>8</bitOffset>
7832 <bitWidth>2</bitWidth>
7833 </field>
7834 <field>
7835 <name>IC3F</name>
7836 <description>Input capture 3 filter</description>
7837 <bitOffset>4</bitOffset>
7838 <bitWidth>4</bitWidth>
7839 </field>
7840 <field>
7841 <name>IC3PSC</name>
7842 <description>Input capture 3 prescaler</description>
7843 <bitOffset>2</bitOffset>
7844 <bitWidth>2</bitWidth>
7845 </field>
7846 <field>
7847 <name>CC3S</name>
7848 <description>Capture/Compare 3
7849 selection</description>
7850 <bitOffset>0</bitOffset>
7851 <bitWidth>2</bitWidth>
7852 </field>
7853 </fields>
7854 </register>
7855 <register>
7856 <name>CCER</name>
7857 <displayName>CCER</displayName>
7858 <description>capture/compare enable
7859 register</description>
7860 <addressOffset>0x20</addressOffset>
7861 <size>0x20</size>
7862 <access>read-write</access>
7863 <resetValue>0x0000</resetValue>
7864 <fields>
7865 <field>
7866 <name>CC1E</name>
7867 <description>Capture/Compare 1 output
7868 enable</description>
7869 <bitOffset>0</bitOffset>
7870 <bitWidth>1</bitWidth>
7871 </field>
7872 <field>
7873 <name>CC1P</name>
7874 <description>Capture/Compare 1 output
7875 Polarity</description>
7876 <bitOffset>1</bitOffset>
7877 <bitWidth>1</bitWidth>
7878 </field>
7879 <field>
7880 <name>CC1NP</name>
7881 <description>Capture/Compare 1 output
7882 Polarity</description>
7883 <bitOffset>3</bitOffset>
7884 <bitWidth>1</bitWidth>
7885 </field>
7886 <field>
7887 <name>CC2E</name>
7888 <description>Capture/Compare 2 output
7889 enable</description>
7890 <bitOffset>4</bitOffset>
7891 <bitWidth>1</bitWidth>
7892 </field>
7893 <field>
7894 <name>CC2P</name>
7895 <description>Capture/Compare 2 output
7896 Polarity</description>
7897 <bitOffset>5</bitOffset>
7898 <bitWidth>1</bitWidth>
7899 </field>
7900 <field>
7901 <name>CC2NP</name>
7902 <description>Capture/Compare 2 output
7903 Polarity</description>
7904 <bitOffset>7</bitOffset>
7905 <bitWidth>1</bitWidth>
7906 </field>
7907 <field>
7908 <name>CC3E</name>
7909 <description>Capture/Compare 3 output
7910 enable</description>
7911 <bitOffset>8</bitOffset>
7912 <bitWidth>1</bitWidth>
7913 </field>
7914 <field>
7915 <name>CC3P</name>
7916 <description>Capture/Compare 3 output
7917 Polarity</description>
7918 <bitOffset>9</bitOffset>
7919 <bitWidth>1</bitWidth>
7920 </field>
7921 <field>
7922 <name>CC3NP</name>
7923 <description>Capture/Compare 3 output
7924 Polarity</description>
7925 <bitOffset>11</bitOffset>
7926 <bitWidth>1</bitWidth>
7927 </field>
7928 <field>
7929 <name>CC4E</name>
7930 <description>Capture/Compare 4 output
7931 enable</description>
7932 <bitOffset>12</bitOffset>
7933 <bitWidth>1</bitWidth>
7934 </field>
7935 <field>
7936 <name>CC4P</name>
7937 <description>Capture/Compare 3 output
7938 Polarity</description>
7939 <bitOffset>13</bitOffset>
7940 <bitWidth>1</bitWidth>
7941 </field>
7942 <field>
7943 <name>CC4NP</name>
7944 <description>Capture/Compare 3 output
7945 Polarity</description>
7946 <bitOffset>15</bitOffset>
7947 <bitWidth>1</bitWidth>
7948 </field>
7949 </fields>
7950 </register>
7951 <register>
7952 <name>CNT</name>
7953 <displayName>CNT</displayName>
7954 <description>counter</description>
7955 <addressOffset>0x24</addressOffset>
7956 <size>0x20</size>
7957 <access>read-write</access>
7958 <resetValue>0x00000000</resetValue>
7959 <fields>
7960 <field>
7961 <name>CNTL</name>
7962 <description>Low counter value</description>
7963 <bitOffset>0</bitOffset>
7964 <bitWidth>16</bitWidth>
7965 </field>
7966 <field>
7967 <name>CNTH</name>
7968 <description>High counter value</description>
7969 <bitOffset>16</bitOffset>
7970 <bitWidth>15</bitWidth>
7971 </field>
7972 <field>
7973 <name>CNT_or_UIFCPY</name>
7974 <description>if IUFREMAP=0 than CNT with read write
7975 access else UIFCPY with read only
7976 access</description>
7977 <bitOffset>31</bitOffset>
7978 <bitWidth>1</bitWidth>
7979 </field>
7980 </fields>
7981 </register>
7982 <register>
7983 <name>PSC</name>
7984 <displayName>PSC</displayName>
7985 <description>prescaler</description>
7986 <addressOffset>0x28</addressOffset>
7987 <size>0x20</size>
7988 <access>read-write</access>
7989 <resetValue>0x0000</resetValue>
7990 <fields>
7991 <field>
7992 <name>PSC</name>
7993 <description>Prescaler value</description>
7994 <bitOffset>0</bitOffset>
7995 <bitWidth>16</bitWidth>
7996 </field>
7997 </fields>
7998 </register>
7999 <register>
8000 <name>ARR</name>
8001 <displayName>ARR</displayName>
8002 <description>auto-reload register</description>
8003 <addressOffset>0x2C</addressOffset>
8004 <size>0x20</size>
8005 <access>read-write</access>
8006 <resetValue>0x00000000</resetValue>
8007 <fields>
8008 <field>
8009 <name>ARRL</name>
8010 <description>Low Auto-reload value</description>
8011 <bitOffset>0</bitOffset>
8012 <bitWidth>16</bitWidth>
8013 </field>
8014 <field>
8015 <name>ARRH</name>
8016 <description>High Auto-reload value</description>
8017 <bitOffset>16</bitOffset>
8018 <bitWidth>16</bitWidth>
8019 </field>
8020 </fields>
8021 </register>
8022 <register>
8023 <name>CCR1</name>
8024 <displayName>CCR1</displayName>
8025 <description>capture/compare register 1</description>
8026 <addressOffset>0x34</addressOffset>
8027 <size>0x20</size>
8028 <access>read-write</access>
8029 <resetValue>0x00000000</resetValue>
8030 <fields>
8031 <field>
8032 <name>CCR1L</name>
8033 <description>Low Capture/Compare 1
8034 value</description>
8035 <bitOffset>0</bitOffset>
8036 <bitWidth>16</bitWidth>
8037 </field>
8038 <field>
8039 <name>CCR1H</name>
8040 <description>High Capture/Compare 1 value (on
8041 TIM2)</description>
8042 <bitOffset>16</bitOffset>
8043 <bitWidth>16</bitWidth>
8044 </field>
8045 </fields>
8046 </register>
8047 <register>
8048 <name>CCR2</name>
8049 <displayName>CCR2</displayName>
8050 <description>capture/compare register 2</description>
8051 <addressOffset>0x38</addressOffset>
8052 <size>0x20</size>
8053 <access>read-write</access>
8054 <resetValue>0x00000000</resetValue>
8055 <fields>
8056 <field>
8057 <name>CCR2L</name>
8058 <description>Low Capture/Compare 2
8059 value</description>
8060 <bitOffset>0</bitOffset>
8061 <bitWidth>16</bitWidth>
8062 </field>
8063 <field>
8064 <name>CCR2H</name>
8065 <description>High Capture/Compare 2 value (on
8066 TIM2)</description>
8067 <bitOffset>16</bitOffset>
8068 <bitWidth>16</bitWidth>
8069 </field>
8070 </fields>
8071 </register>
8072 <register>
8073 <name>CCR3</name>
8074 <displayName>CCR3</displayName>
8075 <description>capture/compare register 3</description>
8076 <addressOffset>0x3C</addressOffset>
8077 <size>0x20</size>
8078 <access>read-write</access>
8079 <resetValue>0x00000000</resetValue>
8080 <fields>
8081 <field>
8082 <name>CCR3L</name>
8083 <description>Low Capture/Compare value</description>
8084 <bitOffset>0</bitOffset>
8085 <bitWidth>16</bitWidth>
8086 </field>
8087 <field>
8088 <name>CCR3H</name>
8089 <description>High Capture/Compare value (on
8090 TIM2)</description>
8091 <bitOffset>16</bitOffset>
8092 <bitWidth>16</bitWidth>
8093 </field>
8094 </fields>
8095 </register>
8096 <register>
8097 <name>CCR4</name>
8098 <displayName>CCR4</displayName>
8099 <description>capture/compare register 4</description>
8100 <addressOffset>0x40</addressOffset>
8101 <size>0x20</size>
8102 <access>read-write</access>
8103 <resetValue>0x00000000</resetValue>
8104 <fields>
8105 <field>
8106 <name>CCR4L</name>
8107 <description>Low Capture/Compare value</description>
8108 <bitOffset>0</bitOffset>
8109 <bitWidth>16</bitWidth>
8110 </field>
8111 <field>
8112 <name>CCR4H</name>
8113 <description>High Capture/Compare value (on
8114 TIM2)</description>
8115 <bitOffset>16</bitOffset>
8116 <bitWidth>16</bitWidth>
8117 </field>
8118 </fields>
8119 </register>
8120 <register>
8121 <name>DCR</name>
8122 <displayName>DCR</displayName>
8123 <description>DMA control register</description>
8124 <addressOffset>0x48</addressOffset>
8125 <size>0x20</size>
8126 <access>read-write</access>
8127 <resetValue>0x0000</resetValue>
8128 <fields>
8129 <field>
8130 <name>DBL</name>
8131 <description>DMA burst length</description>
8132 <bitOffset>8</bitOffset>
8133 <bitWidth>5</bitWidth>
8134 </field>
8135 <field>
8136 <name>DBA</name>
8137 <description>DMA base address</description>
8138 <bitOffset>0</bitOffset>
8139 <bitWidth>5</bitWidth>
8140 </field>
8141 </fields>
8142 </register>
8143 <register>
8144 <name>DMAR</name>
8145 <displayName>DMAR</displayName>
8146 <description>DMA address for full transfer</description>
8147 <addressOffset>0x4C</addressOffset>
8148 <size>0x20</size>
8149 <access>read-write</access>
8150 <resetValue>0x0000</resetValue>
8151 <fields>
8152 <field>
8153 <name>DMAB</name>
8154 <description>DMA register for burst
8155 accesses</description>
8156 <bitOffset>0</bitOffset>
8157 <bitWidth>16</bitWidth>
8158 </field>
8159 </fields>
8160 </register>
8161 </registers>
8162 </peripheral>
8163 <peripheral derivedFrom="TIM2">
8164 <name>TIM3</name>
8165 <baseAddress>0x40000400</baseAddress>
8166 <interrupt>
8167 <name>TIM3</name>
8168 <description>TIM3 global interrupt</description>
8169 <value>29</value>
8170 </interrupt>
8171 </peripheral>
8172 <peripheral derivedFrom="TIM2">
8173 <name>TIM4</name>
8174 <baseAddress>0x40000800</baseAddress>
8175 <interrupt>
8176 <name>TIM4</name>
8177 <description>TIM4 global interrupt</description>
8178 <value>30</value>
8179 </interrupt>
8180 </peripheral>
8181 <peripheral>
8182 <name>TIM15</name>
8183 <description>General purpose timers</description>
8184 <groupName>TIMs</groupName>
8185 <baseAddress>0x40014000</baseAddress>
8186 <addressBlock>
8187 <offset>0x0</offset>
8188 <size>0x400</size>
8189 <usage>registers</usage>
8190 </addressBlock>
8191 <interrupt>
8192 <name>TIM1_BRK_TIM15</name>
8193 <description>TIM1 Break/TIM15 global
8194 interruts</description>
8195 <value>24</value>
8196 </interrupt>
8197 <registers>
8198 <register>
8199 <name>CR1</name>
8200 <displayName>CR1</displayName>
8201 <description>control register 1</description>
8202 <addressOffset>0x0</addressOffset>
8203 <size>0x20</size>
8204 <access>read-write</access>
8205 <resetValue>0x0000</resetValue>
8206 <fields>
8207 <field>
8208 <name>CEN</name>
8209 <description>Counter enable</description>
8210 <bitOffset>0</bitOffset>
8211 <bitWidth>1</bitWidth>
8212 </field>
8213 <field>
8214 <name>UDIS</name>
8215 <description>Update disable</description>
8216 <bitOffset>1</bitOffset>
8217 <bitWidth>1</bitWidth>
8218 </field>
8219 <field>
8220 <name>URS</name>
8221 <description>Update request source</description>
8222 <bitOffset>2</bitOffset>
8223 <bitWidth>1</bitWidth>
8224 </field>
8225 <field>
8226 <name>OPM</name>
8227 <description>One-pulse mode</description>
8228 <bitOffset>3</bitOffset>
8229 <bitWidth>1</bitWidth>
8230 </field>
8231 <field>
8232 <name>ARPE</name>
8233 <description>Auto-reload preload enable</description>
8234 <bitOffset>7</bitOffset>
8235 <bitWidth>1</bitWidth>
8236 </field>
8237 <field>
8238 <name>CKD</name>
8239 <description>Clock division</description>
8240 <bitOffset>8</bitOffset>
8241 <bitWidth>2</bitWidth>
8242 </field>
8243 <field>
8244 <name>UIFREMAP</name>
8245 <description>UIF status bit remapping</description>
8246 <bitOffset>11</bitOffset>
8247 <bitWidth>1</bitWidth>
8248 </field>
8249 </fields>
8250 </register>
8251 <register>
8252 <name>CR2</name>
8253 <displayName>CR2</displayName>
8254 <description>control register 2</description>
8255 <addressOffset>0x4</addressOffset>
8256 <size>0x20</size>
8257 <access>read-write</access>
8258 <resetValue>0x0000</resetValue>
8259 <fields>
8260 <field>
8261 <name>CCPC</name>
8262 <description>Capture/compare preloaded
8263 control</description>
8264 <bitOffset>0</bitOffset>
8265 <bitWidth>1</bitWidth>
8266 </field>
8267 <field>
8268 <name>CCUS</name>
8269 <description>Capture/compare control update
8270 selection</description>
8271 <bitOffset>2</bitOffset>
8272 <bitWidth>1</bitWidth>
8273 </field>
8274 <field>
8275 <name>CCDS</name>
8276 <description>Capture/compare DMA
8277 selection</description>
8278 <bitOffset>3</bitOffset>
8279 <bitWidth>1</bitWidth>
8280 </field>
8281 <field>
8282 <name>MMS</name>
8283 <description>Master mode selection</description>
8284 <bitOffset>4</bitOffset>
8285 <bitWidth>3</bitWidth>
8286 </field>
8287 <field>
8288 <name>TI1S</name>
8289 <description>TI1 selection</description>
8290 <bitOffset>7</bitOffset>
8291 <bitWidth>1</bitWidth>
8292 </field>
8293 <field>
8294 <name>OIS1</name>
8295 <description>Output Idle state 1</description>
8296 <bitOffset>8</bitOffset>
8297 <bitWidth>1</bitWidth>
8298 </field>
8299 <field>
8300 <name>OIS1N</name>
8301 <description>Output Idle state 1</description>
8302 <bitOffset>9</bitOffset>
8303 <bitWidth>1</bitWidth>
8304 </field>
8305 <field>
8306 <name>OIS2</name>
8307 <description>Output Idle state 2</description>
8308 <bitOffset>10</bitOffset>
8309 <bitWidth>1</bitWidth>
8310 </field>
8311 </fields>
8312 </register>
8313 <register>
8314 <name>SMCR</name>
8315 <displayName>SMCR</displayName>
8316 <description>slave mode control register</description>
8317 <addressOffset>0x8</addressOffset>
8318 <size>0x20</size>
8319 <access>read-write</access>
8320 <resetValue>0x0000</resetValue>
8321 <fields>
8322 <field>
8323 <name>SMS</name>
8324 <description>Slave mode selection</description>
8325 <bitOffset>0</bitOffset>
8326 <bitWidth>3</bitWidth>
8327 </field>
8328 <field>
8329 <name>TS</name>
8330 <description>Trigger selection</description>
8331 <bitOffset>4</bitOffset>
8332 <bitWidth>3</bitWidth>
8333 </field>
8334 <field>
8335 <name>MSM</name>
8336 <description>Master/Slave mode</description>
8337 <bitOffset>7</bitOffset>
8338 <bitWidth>1</bitWidth>
8339 </field>
8340 <field>
8341 <name>SMS_3</name>
8342 <description>Slave mode selection bit 3</description>
8343 <bitOffset>16</bitOffset>
8344 <bitWidth>1</bitWidth>
8345 </field>
8346 </fields>
8347 </register>
8348 <register>
8349 <name>DIER</name>
8350 <displayName>DIER</displayName>
8351 <description>DMA/Interrupt enable register</description>
8352 <addressOffset>0xC</addressOffset>
8353 <size>0x20</size>
8354 <access>read-write</access>
8355 <resetValue>0x0000</resetValue>
8356 <fields>
8357 <field>
8358 <name>UIE</name>
8359 <description>Update interrupt enable</description>
8360 <bitOffset>0</bitOffset>
8361 <bitWidth>1</bitWidth>
8362 </field>
8363 <field>
8364 <name>CC1IE</name>
8365 <description>Capture/Compare 1 interrupt
8366 enable</description>
8367 <bitOffset>1</bitOffset>
8368 <bitWidth>1</bitWidth>
8369 </field>
8370 <field>
8371 <name>CC2IE</name>
8372 <description>Capture/Compare 2 interrupt
8373 enable</description>
8374 <bitOffset>2</bitOffset>
8375 <bitWidth>1</bitWidth>
8376 </field>
8377 <field>
8378 <name>COMIE</name>
8379 <description>COM interrupt enable</description>
8380 <bitOffset>5</bitOffset>
8381 <bitWidth>1</bitWidth>
8382 </field>
8383 <field>
8384 <name>TIE</name>
8385 <description>Trigger interrupt enable</description>
8386 <bitOffset>6</bitOffset>
8387 <bitWidth>1</bitWidth>
8388 </field>
8389 <field>
8390 <name>BIE</name>
8391 <description>Break interrupt enable</description>
8392 <bitOffset>7</bitOffset>
8393 <bitWidth>1</bitWidth>
8394 </field>
8395 <field>
8396 <name>UDE</name>
8397 <description>Update DMA request enable</description>
8398 <bitOffset>8</bitOffset>
8399 <bitWidth>1</bitWidth>
8400 </field>
8401 <field>
8402 <name>CC1DE</name>
8403 <description>Capture/Compare 1 DMA request
8404 enable</description>
8405 <bitOffset>9</bitOffset>
8406 <bitWidth>1</bitWidth>
8407 </field>
8408 <field>
8409 <name>CC2DE</name>
8410 <description>Capture/Compare 2 DMA request
8411 enable</description>
8412 <bitOffset>10</bitOffset>
8413 <bitWidth>1</bitWidth>
8414 </field>
8415 <field>
8416 <name>COMDE</name>
8417 <description>COM DMA request enable</description>
8418 <bitOffset>13</bitOffset>
8419 <bitWidth>1</bitWidth>
8420 </field>
8421 <field>
8422 <name>TDE</name>
8423 <description>Trigger DMA request enable</description>
8424 <bitOffset>14</bitOffset>
8425 <bitWidth>1</bitWidth>
8426 </field>
8427 </fields>
8428 </register>
8429 <register>
8430 <name>SR</name>
8431 <displayName>SR</displayName>
8432 <description>status register</description>
8433 <addressOffset>0x10</addressOffset>
8434 <size>0x20</size>
8435 <access>read-write</access>
8436 <resetValue>0x0000</resetValue>
8437 <fields>
8438 <field>
8439 <name>CC2OF</name>
8440 <description>Capture/compare 2 overcapture
8441 flag</description>
8442 <bitOffset>10</bitOffset>
8443 <bitWidth>1</bitWidth>
8444 </field>
8445 <field>
8446 <name>CC1OF</name>
8447 <description>Capture/Compare 1 overcapture
8448 flag</description>
8449 <bitOffset>9</bitOffset>
8450 <bitWidth>1</bitWidth>
8451 </field>
8452 <field>
8453 <name>BIF</name>
8454 <description>Break interrupt flag</description>
8455 <bitOffset>7</bitOffset>
8456 <bitWidth>1</bitWidth>
8457 </field>
8458 <field>
8459 <name>TIF</name>
8460 <description>Trigger interrupt flag</description>
8461 <bitOffset>6</bitOffset>
8462 <bitWidth>1</bitWidth>
8463 </field>
8464 <field>
8465 <name>COMIF</name>
8466 <description>COM interrupt flag</description>
8467 <bitOffset>5</bitOffset>
8468 <bitWidth>1</bitWidth>
8469 </field>
8470 <field>
8471 <name>CC2IF</name>
8472 <description>Capture/Compare 2 interrupt
8473 flag</description>
8474 <bitOffset>2</bitOffset>
8475 <bitWidth>1</bitWidth>
8476 </field>
8477 <field>
8478 <name>CC1IF</name>
8479 <description>Capture/compare 1 interrupt
8480 flag</description>
8481 <bitOffset>1</bitOffset>
8482 <bitWidth>1</bitWidth>
8483 </field>
8484 <field>
8485 <name>UIF</name>
8486 <description>Update interrupt flag</description>
8487 <bitOffset>0</bitOffset>
8488 <bitWidth>1</bitWidth>
8489 </field>
8490 </fields>
8491 </register>
8492 <register>
8493 <name>EGR</name>
8494 <displayName>EGR</displayName>
8495 <description>event generation register</description>
8496 <addressOffset>0x14</addressOffset>
8497 <size>0x20</size>
8498 <access>write-only</access>
8499 <resetValue>0x0000</resetValue>
8500 <fields>
8501 <field>
8502 <name>BG</name>
8503 <description>Break generation</description>
8504 <bitOffset>7</bitOffset>
8505 <bitWidth>1</bitWidth>
8506 </field>
8507 <field>
8508 <name>TG</name>
8509 <description>Trigger generation</description>
8510 <bitOffset>6</bitOffset>
8511 <bitWidth>1</bitWidth>
8512 </field>
8513 <field>
8514 <name>COMG</name>
8515 <description>Capture/Compare control update
8516 generation</description>
8517 <bitOffset>5</bitOffset>
8518 <bitWidth>1</bitWidth>
8519 </field>
8520 <field>
8521 <name>CC2G</name>
8522 <description>Capture/compare 2
8523 generation</description>
8524 <bitOffset>2</bitOffset>
8525 <bitWidth>1</bitWidth>
8526 </field>
8527 <field>
8528 <name>CC1G</name>
8529 <description>Capture/compare 1
8530 generation</description>
8531 <bitOffset>1</bitOffset>
8532 <bitWidth>1</bitWidth>
8533 </field>
8534 <field>
8535 <name>UG</name>
8536 <description>Update generation</description>
8537 <bitOffset>0</bitOffset>
8538 <bitWidth>1</bitWidth>
8539 </field>
8540 </fields>
8541 </register>
8542 <register>
8543 <name>CCMR1_Output</name>
8544 <displayName>CCMR1_Output</displayName>
8545 <description>capture/compare mode register (output
8546 mode)</description>
8547 <addressOffset>0x18</addressOffset>
8548 <size>0x20</size>
8549 <access>read-write</access>
8550 <resetValue>0x00000000</resetValue>
8551 <fields>
8552 <field>
8553 <name>CC1S</name>
8554 <description>Capture/Compare 1
8555 selection</description>
8556 <bitOffset>0</bitOffset>
8557 <bitWidth>2</bitWidth>
8558 </field>
8559 <field>
8560 <name>OC1FE</name>
8561 <description>Output Compare 1 fast
8562 enable</description>
8563 <bitOffset>2</bitOffset>
8564 <bitWidth>1</bitWidth>
8565 </field>
8566 <field>
8567 <name>OC1PE</name>
8568 <description>Output Compare 1 preload
8569 enable</description>
8570 <bitOffset>3</bitOffset>
8571 <bitWidth>1</bitWidth>
8572 </field>
8573 <field>
8574 <name>OC1M</name>
8575 <description>Output Compare 1 mode</description>
8576 <bitOffset>4</bitOffset>
8577 <bitWidth>3</bitWidth>
8578 </field>
8579 <field>
8580 <name>CC2S</name>
8581 <description>Capture/Compare 2
8582 selection</description>
8583 <bitOffset>8</bitOffset>
8584 <bitWidth>2</bitWidth>
8585 </field>
8586 <field>
8587 <name>OC2FE</name>
8588 <description>Output Compare 2 fast
8589 enable</description>
8590 <bitOffset>10</bitOffset>
8591 <bitWidth>1</bitWidth>
8592 </field>
8593 <field>
8594 <name>OC2PE</name>
8595 <description>Output Compare 2 preload
8596 enable</description>
8597 <bitOffset>11</bitOffset>
8598 <bitWidth>1</bitWidth>
8599 </field>
8600 <field>
8601 <name>OC2M</name>
8602 <description>Output Compare 2 mode</description>
8603 <bitOffset>12</bitOffset>
8604 <bitWidth>3</bitWidth>
8605 </field>
8606 <field>
8607 <name>OC1M_3</name>
8608 <description>Output Compare 1 mode bit
8609 3</description>
8610 <bitOffset>16</bitOffset>
8611 <bitWidth>1</bitWidth>
8612 </field>
8613 <field>
8614 <name>OC2M_3</name>
8615 <description>Output Compare 2 mode bit
8616 3</description>
8617 <bitOffset>24</bitOffset>
8618 <bitWidth>1</bitWidth>
8619 </field>
8620 </fields>
8621 </register>
8622 <register>
8623 <name>CCMR1_Input</name>
8624 <displayName>CCMR1_Input</displayName>
8625 <description>capture/compare mode register 1 (input
8626 mode)</description>
8627 <alternateRegister>CCMR1_Output</alternateRegister>
8628 <addressOffset>0x18</addressOffset>
8629 <size>0x20</size>
8630 <access>read-write</access>
8631 <resetValue>0x00000000</resetValue>
8632 <fields>
8633 <field>
8634 <name>IC2F</name>
8635 <description>Input capture 2 filter</description>
8636 <bitOffset>12</bitOffset>
8637 <bitWidth>4</bitWidth>
8638 </field>
8639 <field>
8640 <name>IC2PSC</name>
8641 <description>Input capture 2 prescaler</description>
8642 <bitOffset>10</bitOffset>
8643 <bitWidth>2</bitWidth>
8644 </field>
8645 <field>
8646 <name>CC2S</name>
8647 <description>Capture/Compare 2
8648 selection</description>
8649 <bitOffset>8</bitOffset>
8650 <bitWidth>2</bitWidth>
8651 </field>
8652 <field>
8653 <name>IC1F</name>
8654 <description>Input capture 1 filter</description>
8655 <bitOffset>4</bitOffset>
8656 <bitWidth>4</bitWidth>
8657 </field>
8658 <field>
8659 <name>IC1PSC</name>
8660 <description>Input capture 1 prescaler</description>
8661 <bitOffset>2</bitOffset>
8662 <bitWidth>2</bitWidth>
8663 </field>
8664 <field>
8665 <name>CC1S</name>
8666 <description>Capture/Compare 1
8667 selection</description>
8668 <bitOffset>0</bitOffset>
8669 <bitWidth>2</bitWidth>
8670 </field>
8671 </fields>
8672 </register>
8673 <register>
8674 <name>CCER</name>
8675 <displayName>CCER</displayName>
8676 <description>capture/compare enable
8677 register</description>
8678 <addressOffset>0x20</addressOffset>
8679 <size>0x20</size>
8680 <access>read-write</access>
8681 <resetValue>0x0000</resetValue>
8682 <fields>
8683 <field>
8684 <name>CC2NP</name>
8685 <description>Capture/Compare 2 output
8686 Polarity</description>
8687 <bitOffset>7</bitOffset>
8688 <bitWidth>1</bitWidth>
8689 </field>
8690 <field>
8691 <name>CC2P</name>
8692 <description>Capture/Compare 2 output
8693 Polarity</description>
8694 <bitOffset>5</bitOffset>
8695 <bitWidth>1</bitWidth>
8696 </field>
8697 <field>
8698 <name>CC2E</name>
8699 <description>Capture/Compare 2 output
8700 enable</description>
8701 <bitOffset>4</bitOffset>
8702 <bitWidth>1</bitWidth>
8703 </field>
8704 <field>
8705 <name>CC1NP</name>
8706 <description>Capture/Compare 1 output
8707 Polarity</description>
8708 <bitOffset>3</bitOffset>
8709 <bitWidth>1</bitWidth>
8710 </field>
8711 <field>
8712 <name>CC1NE</name>
8713 <description>Capture/Compare 1 complementary output
8714 enable</description>
8715 <bitOffset>2</bitOffset>
8716 <bitWidth>1</bitWidth>
8717 </field>
8718 <field>
8719 <name>CC1P</name>
8720 <description>Capture/Compare 1 output
8721 Polarity</description>
8722 <bitOffset>1</bitOffset>
8723 <bitWidth>1</bitWidth>
8724 </field>
8725 <field>
8726 <name>CC1E</name>
8727 <description>Capture/Compare 1 output
8728 enable</description>
8729 <bitOffset>0</bitOffset>
8730 <bitWidth>1</bitWidth>
8731 </field>
8732 </fields>
8733 </register>
8734 <register>
8735 <name>CNT</name>
8736 <displayName>CNT</displayName>
8737 <description>counter</description>
8738 <addressOffset>0x24</addressOffset>
8739 <size>0x20</size>
8740 <resetValue>0x00000000</resetValue>
8741 <fields>
8742 <field>
8743 <name>CNT</name>
8744 <description>counter value</description>
8745 <bitOffset>0</bitOffset>
8746 <bitWidth>16</bitWidth>
8747 <access>read-write</access>
8748 </field>
8749 <field>
8750 <name>UIFCPY</name>
8751 <description>UIF copy</description>
8752 <bitOffset>31</bitOffset>
8753 <bitWidth>1</bitWidth>
8754 <access>read-only</access>
8755 </field>
8756 </fields>
8757 </register>
8758 <register>
8759 <name>PSC</name>
8760 <displayName>PSC</displayName>
8761 <description>prescaler</description>
8762 <addressOffset>0x28</addressOffset>
8763 <size>0x20</size>
8764 <access>read-write</access>
8765 <resetValue>0x0000</resetValue>
8766 <fields>
8767 <field>
8768 <name>PSC</name>
8769 <description>Prescaler value</description>
8770 <bitOffset>0</bitOffset>
8771 <bitWidth>16</bitWidth>
8772 </field>
8773 </fields>
8774 </register>
8775 <register>
8776 <name>ARR</name>
8777 <displayName>ARR</displayName>
8778 <description>auto-reload register</description>
8779 <addressOffset>0x2C</addressOffset>
8780 <size>0x20</size>
8781 <access>read-write</access>
8782 <resetValue>0x00000000</resetValue>
8783 <fields>
8784 <field>
8785 <name>ARR</name>
8786 <description>Auto-reload value</description>
8787 <bitOffset>0</bitOffset>
8788 <bitWidth>16</bitWidth>
8789 </field>
8790 </fields>
8791 </register>
8792 <register>
8793 <name>RCR</name>
8794 <displayName>RCR</displayName>
8795 <description>repetition counter register</description>
8796 <addressOffset>0x30</addressOffset>
8797 <size>0x20</size>
8798 <access>read-write</access>
8799 <resetValue>0x0000</resetValue>
8800 <fields>
8801 <field>
8802 <name>REP</name>
8803 <description>Repetition counter value</description>
8804 <bitOffset>0</bitOffset>
8805 <bitWidth>8</bitWidth>
8806 </field>
8807 </fields>
8808 </register>
8809 <register>
8810 <name>CCR1</name>
8811 <displayName>CCR1</displayName>
8812 <description>capture/compare register 1</description>
8813 <addressOffset>0x34</addressOffset>
8814 <size>0x20</size>
8815 <access>read-write</access>
8816 <resetValue>0x00000000</resetValue>
8817 <fields>
8818 <field>
8819 <name>CCR1</name>
8820 <description>Capture/Compare 1 value</description>
8821 <bitOffset>0</bitOffset>
8822 <bitWidth>16</bitWidth>
8823 </field>
8824 </fields>
8825 </register>
8826 <register>
8827 <name>CCR2</name>
8828 <displayName>CCR2</displayName>
8829 <description>capture/compare register 2</description>
8830 <addressOffset>0x38</addressOffset>
8831 <size>0x20</size>
8832 <access>read-write</access>
8833 <resetValue>0x00000000</resetValue>
8834 <fields>
8835 <field>
8836 <name>CCR2</name>
8837 <description>Capture/Compare 2 value</description>
8838 <bitOffset>0</bitOffset>
8839 <bitWidth>16</bitWidth>
8840 </field>
8841 </fields>
8842 </register>
8843 <register>
8844 <name>BDTR</name>
8845 <displayName>BDTR</displayName>
8846 <description>break and dead-time register</description>
8847 <addressOffset>0x44</addressOffset>
8848 <size>0x20</size>
8849 <access>read-write</access>
8850 <resetValue>0x0000</resetValue>
8851 <fields>
8852 <field>
8853 <name>MOE</name>
8854 <description>Main output enable</description>
8855 <bitOffset>15</bitOffset>
8856 <bitWidth>1</bitWidth>
8857 </field>
8858 <field>
8859 <name>AOE</name>
8860 <description>Automatic output enable</description>
8861 <bitOffset>14</bitOffset>
8862 <bitWidth>1</bitWidth>
8863 </field>
8864 <field>
8865 <name>BKP</name>
8866 <description>Break polarity</description>
8867 <bitOffset>13</bitOffset>
8868 <bitWidth>1</bitWidth>
8869 </field>
8870 <field>
8871 <name>BKE</name>
8872 <description>Break enable</description>
8873 <bitOffset>12</bitOffset>
8874 <bitWidth>1</bitWidth>
8875 </field>
8876 <field>
8877 <name>OSSR</name>
8878 <description>Off-state selection for Run
8879 mode</description>
8880 <bitOffset>11</bitOffset>
8881 <bitWidth>1</bitWidth>
8882 </field>
8883 <field>
8884 <name>OSSI</name>
8885 <description>Off-state selection for Idle
8886 mode</description>
8887 <bitOffset>10</bitOffset>
8888 <bitWidth>1</bitWidth>
8889 </field>
8890 <field>
8891 <name>LOCK</name>
8892 <description>Lock configuration</description>
8893 <bitOffset>8</bitOffset>
8894 <bitWidth>2</bitWidth>
8895 </field>
8896 <field>
8897 <name>DTG</name>
8898 <description>Dead-time generator setup</description>
8899 <bitOffset>0</bitOffset>
8900 <bitWidth>8</bitWidth>
8901 </field>
8902 <field>
8903 <name>BKF</name>
8904 <description>Break filter</description>
8905 <bitOffset>16</bitOffset>
8906 <bitWidth>4</bitWidth>
8907 </field>
8908 </fields>
8909 </register>
8910 <register>
8911 <name>DCR</name>
8912 <displayName>DCR</displayName>
8913 <description>DMA control register</description>
8914 <addressOffset>0x48</addressOffset>
8915 <size>0x20</size>
8916 <access>read-write</access>
8917 <resetValue>0x0000</resetValue>
8918 <fields>
8919 <field>
8920 <name>DBL</name>
8921 <description>DMA burst length</description>
8922 <bitOffset>8</bitOffset>
8923 <bitWidth>5</bitWidth>
8924 </field>
8925 <field>
8926 <name>DBA</name>
8927 <description>DMA base address</description>
8928 <bitOffset>0</bitOffset>
8929 <bitWidth>5</bitWidth>
8930 </field>
8931 </fields>
8932 </register>
8933 <register>
8934 <name>DMAR</name>
8935 <displayName>DMAR</displayName>
8936 <description>DMA address for full transfer</description>
8937 <addressOffset>0x4C</addressOffset>
8938 <size>0x20</size>
8939 <access>read-write</access>
8940 <resetValue>0x0000</resetValue>
8941 <fields>
8942 <field>
8943 <name>DMAB</name>
8944 <description>DMA register for burst
8945 accesses</description>
8946 <bitOffset>0</bitOffset>
8947 <bitWidth>16</bitWidth>
8948 </field>
8949 </fields>
8950 </register>
8951 </registers>
8952 </peripheral>
8953 <peripheral>
8954 <name>TIM16</name>
8955 <description>General-purpose-timers</description>
8956 <groupName>TIMs</groupName>
8957 <baseAddress>0x40014400</baseAddress>
8958 <addressBlock>
8959 <offset>0x0</offset>
8960 <size>0x400</size>
8961 <usage>registers</usage>
8962 </addressBlock>
8963 <interrupt>
8964 <name>TIM1_UP_TIM16</name>
8965 <description>TIM1 Update/TIM16 global
8966 interrupts</description>
8967 <value>25</value>
8968 </interrupt>
8969 <registers>
8970 <register>
8971 <name>CR1</name>
8972 <displayName>CR1</displayName>
8973 <description>control register 1</description>
8974 <addressOffset>0x0</addressOffset>
8975 <size>0x20</size>
8976 <access>read-write</access>
8977 <resetValue>0x0000</resetValue>
8978 <fields>
8979 <field>
8980 <name>CEN</name>
8981 <description>Counter enable</description>
8982 <bitOffset>0</bitOffset>
8983 <bitWidth>1</bitWidth>
8984 </field>
8985 <field>
8986 <name>UDIS</name>
8987 <description>Update disable</description>
8988 <bitOffset>1</bitOffset>
8989 <bitWidth>1</bitWidth>
8990 </field>
8991 <field>
8992 <name>URS</name>
8993 <description>Update request source</description>
8994 <bitOffset>2</bitOffset>
8995 <bitWidth>1</bitWidth>
8996 </field>
8997 <field>
8998 <name>OPM</name>
8999 <description>One-pulse mode</description>
9000 <bitOffset>3</bitOffset>
9001 <bitWidth>1</bitWidth>
9002 </field>
9003 <field>
9004 <name>ARPE</name>
9005 <description>Auto-reload preload enable</description>
9006 <bitOffset>7</bitOffset>
9007 <bitWidth>1</bitWidth>
9008 </field>
9009 <field>
9010 <name>CKD</name>
9011 <description>Clock division</description>
9012 <bitOffset>8</bitOffset>
9013 <bitWidth>2</bitWidth>
9014 </field>
9015 <field>
9016 <name>UIFREMAP</name>
9017 <description>UIF status bit remapping</description>
9018 <bitOffset>11</bitOffset>
9019 <bitWidth>1</bitWidth>
9020 </field>
9021 </fields>
9022 </register>
9023 <register>
9024 <name>CR2</name>
9025 <displayName>CR2</displayName>
9026 <description>control register 2</description>
9027 <addressOffset>0x4</addressOffset>
9028 <size>0x20</size>
9029 <access>read-write</access>
9030 <resetValue>0x0000</resetValue>
9031 <fields>
9032 <field>
9033 <name>OIS1N</name>
9034 <description>Output Idle state 1</description>
9035 <bitOffset>9</bitOffset>
9036 <bitWidth>1</bitWidth>
9037 </field>
9038 <field>
9039 <name>OIS1</name>
9040 <description>Output Idle state 1</description>
9041 <bitOffset>8</bitOffset>
9042 <bitWidth>1</bitWidth>
9043 </field>
9044 <field>
9045 <name>CCDS</name>
9046 <description>Capture/compare DMA
9047 selection</description>
9048 <bitOffset>3</bitOffset>
9049 <bitWidth>1</bitWidth>
9050 </field>
9051 <field>
9052 <name>CCUS</name>
9053 <description>Capture/compare control update
9054 selection</description>
9055 <bitOffset>2</bitOffset>
9056 <bitWidth>1</bitWidth>
9057 </field>
9058 <field>
9059 <name>CCPC</name>
9060 <description>Capture/compare preloaded
9061 control</description>
9062 <bitOffset>0</bitOffset>
9063 <bitWidth>1</bitWidth>
9064 </field>
9065 </fields>
9066 </register>
9067 <register>
9068 <name>DIER</name>
9069 <displayName>DIER</displayName>
9070 <description>DMA/Interrupt enable register</description>
9071 <addressOffset>0xC</addressOffset>
9072 <size>0x20</size>
9073 <access>read-write</access>
9074 <resetValue>0x0000</resetValue>
9075 <fields>
9076 <field>
9077 <name>UIE</name>
9078 <description>Update interrupt enable</description>
9079 <bitOffset>0</bitOffset>
9080 <bitWidth>1</bitWidth>
9081 </field>
9082 <field>
9083 <name>CC1IE</name>
9084 <description>Capture/Compare 1 interrupt
9085 enable</description>
9086 <bitOffset>1</bitOffset>
9087 <bitWidth>1</bitWidth>
9088 </field>
9089 <field>
9090 <name>COMIE</name>
9091 <description>COM interrupt enable</description>
9092 <bitOffset>5</bitOffset>
9093 <bitWidth>1</bitWidth>
9094 </field>
9095 <field>
9096 <name>TIE</name>
9097 <description>Trigger interrupt enable</description>
9098 <bitOffset>6</bitOffset>
9099 <bitWidth>1</bitWidth>
9100 </field>
9101 <field>
9102 <name>BIE</name>
9103 <description>Break interrupt enable</description>
9104 <bitOffset>7</bitOffset>
9105 <bitWidth>1</bitWidth>
9106 </field>
9107 <field>
9108 <name>UDE</name>
9109 <description>Update DMA request enable</description>
9110 <bitOffset>8</bitOffset>
9111 <bitWidth>1</bitWidth>
9112 </field>
9113 <field>
9114 <name>CC1DE</name>
9115 <description>Capture/Compare 1 DMA request
9116 enable</description>
9117 <bitOffset>9</bitOffset>
9118 <bitWidth>1</bitWidth>
9119 </field>
9120 <field>
9121 <name>COMDE</name>
9122 <description>COM DMA request enable</description>
9123 <bitOffset>13</bitOffset>
9124 <bitWidth>1</bitWidth>
9125 </field>
9126 <field>
9127 <name>TDE</name>
9128 <description>Trigger DMA request enable</description>
9129 <bitOffset>14</bitOffset>
9130 <bitWidth>1</bitWidth>
9131 </field>
9132 </fields>
9133 </register>
9134 <register>
9135 <name>SR</name>
9136 <displayName>SR</displayName>
9137 <description>status register</description>
9138 <addressOffset>0x10</addressOffset>
9139 <size>0x20</size>
9140 <access>read-write</access>
9141 <resetValue>0x0000</resetValue>
9142 <fields>
9143 <field>
9144 <name>CC1OF</name>
9145 <description>Capture/Compare 1 overcapture
9146 flag</description>
9147 <bitOffset>9</bitOffset>
9148 <bitWidth>1</bitWidth>
9149 </field>
9150 <field>
9151 <name>BIF</name>
9152 <description>Break interrupt flag</description>
9153 <bitOffset>7</bitOffset>
9154 <bitWidth>1</bitWidth>
9155 </field>
9156 <field>
9157 <name>TIF</name>
9158 <description>Trigger interrupt flag</description>
9159 <bitOffset>6</bitOffset>
9160 <bitWidth>1</bitWidth>
9161 </field>
9162 <field>
9163 <name>COMIF</name>
9164 <description>COM interrupt flag</description>
9165 <bitOffset>5</bitOffset>
9166 <bitWidth>1</bitWidth>
9167 </field>
9168 <field>
9169 <name>CC1IF</name>
9170 <description>Capture/compare 1 interrupt
9171 flag</description>
9172 <bitOffset>1</bitOffset>
9173 <bitWidth>1</bitWidth>
9174 </field>
9175 <field>
9176 <name>UIF</name>
9177 <description>Update interrupt flag</description>
9178 <bitOffset>0</bitOffset>
9179 <bitWidth>1</bitWidth>
9180 </field>
9181 </fields>
9182 </register>
9183 <register>
9184 <name>EGR</name>
9185 <displayName>EGR</displayName>
9186 <description>event generation register</description>
9187 <addressOffset>0x14</addressOffset>
9188 <size>0x20</size>
9189 <access>write-only</access>
9190 <resetValue>0x0000</resetValue>
9191 <fields>
9192 <field>
9193 <name>BG</name>
9194 <description>Break generation</description>
9195 <bitOffset>7</bitOffset>
9196 <bitWidth>1</bitWidth>
9197 </field>
9198 <field>
9199 <name>TG</name>
9200 <description>Trigger generation</description>
9201 <bitOffset>6</bitOffset>
9202 <bitWidth>1</bitWidth>
9203 </field>
9204 <field>
9205 <name>COMG</name>
9206 <description>Capture/Compare control update
9207 generation</description>
9208 <bitOffset>5</bitOffset>
9209 <bitWidth>1</bitWidth>
9210 </field>
9211 <field>
9212 <name>CC1G</name>
9213 <description>Capture/compare 1
9214 generation</description>
9215 <bitOffset>1</bitOffset>
9216 <bitWidth>1</bitWidth>
9217 </field>
9218 <field>
9219 <name>UG</name>
9220 <description>Update generation</description>
9221 <bitOffset>0</bitOffset>
9222 <bitWidth>1</bitWidth>
9223 </field>
9224 </fields>
9225 </register>
9226 <register>
9227 <name>CCMR1_Output</name>
9228 <displayName>CCMR1_Output</displayName>
9229 <description>capture/compare mode register (output
9230 mode)</description>
9231 <addressOffset>0x18</addressOffset>
9232 <size>0x20</size>
9233 <access>read-write</access>
9234 <resetValue>0x00000000</resetValue>
9235 <fields>
9236 <field>
9237 <name>CC1S</name>
9238 <description>Capture/Compare 1
9239 selection</description>
9240 <bitOffset>0</bitOffset>
9241 <bitWidth>2</bitWidth>
9242 </field>
9243 <field>
9244 <name>OC1FE</name>
9245 <description>Output Compare 1 fast
9246 enable</description>
9247 <bitOffset>2</bitOffset>
9248 <bitWidth>1</bitWidth>
9249 </field>
9250 <field>
9251 <name>OC1PE</name>
9252 <description>Output Compare 1 preload
9253 enable</description>
9254 <bitOffset>3</bitOffset>
9255 <bitWidth>1</bitWidth>
9256 </field>
9257 <field>
9258 <name>OC1M</name>
9259 <description>Output Compare 1 mode</description>
9260 <bitOffset>4</bitOffset>
9261 <bitWidth>3</bitWidth>
9262 </field>
9263 <field>
9264 <name>OC1M_3</name>
9265 <description>Output Compare 1 mode</description>
9266 <bitOffset>16</bitOffset>
9267 <bitWidth>1</bitWidth>
9268 </field>
9269 </fields>
9270 </register>
9271 <register>
9272 <name>CCMR1_Input</name>
9273 <displayName>CCMR1_Input</displayName>
9274 <description>capture/compare mode register 1 (input
9275 mode)</description>
9276 <alternateRegister>CCMR1_Output</alternateRegister>
9277 <addressOffset>0x18</addressOffset>
9278 <size>0x20</size>
9279 <access>read-write</access>
9280 <resetValue>0x00000000</resetValue>
9281 <fields>
9282 <field>
9283 <name>IC1F</name>
9284 <description>Input capture 1 filter</description>
9285 <bitOffset>4</bitOffset>
9286 <bitWidth>4</bitWidth>
9287 </field>
9288 <field>
9289 <name>IC1PSC</name>
9290 <description>Input capture 1 prescaler</description>
9291 <bitOffset>2</bitOffset>
9292 <bitWidth>2</bitWidth>
9293 </field>
9294 <field>
9295 <name>CC1S</name>
9296 <description>Capture/Compare 1
9297 selection</description>
9298 <bitOffset>0</bitOffset>
9299 <bitWidth>2</bitWidth>
9300 </field>
9301 </fields>
9302 </register>
9303 <register>
9304 <name>CCER</name>
9305 <displayName>CCER</displayName>
9306 <description>capture/compare enable
9307 register</description>
9308 <addressOffset>0x20</addressOffset>
9309 <size>0x20</size>
9310 <access>read-write</access>
9311 <resetValue>0x0000</resetValue>
9312 <fields>
9313 <field>
9314 <name>CC1NP</name>
9315 <description>Capture/Compare 1 output
9316 Polarity</description>
9317 <bitOffset>3</bitOffset>
9318 <bitWidth>1</bitWidth>
9319 </field>
9320 <field>
9321 <name>CC1NE</name>
9322 <description>Capture/Compare 1 complementary output
9323 enable</description>
9324 <bitOffset>2</bitOffset>
9325 <bitWidth>1</bitWidth>
9326 </field>
9327 <field>
9328 <name>CC1P</name>
9329 <description>Capture/Compare 1 output
9330 Polarity</description>
9331 <bitOffset>1</bitOffset>
9332 <bitWidth>1</bitWidth>
9333 </field>
9334 <field>
9335 <name>CC1E</name>
9336 <description>Capture/Compare 1 output
9337 enable</description>
9338 <bitOffset>0</bitOffset>
9339 <bitWidth>1</bitWidth>
9340 </field>
9341 </fields>
9342 </register>
9343 <register>
9344 <name>CNT</name>
9345 <displayName>CNT</displayName>
9346 <description>counter</description>
9347 <addressOffset>0x24</addressOffset>
9348 <size>0x20</size>
9349 <resetValue>0x00000000</resetValue>
9350 <fields>
9351 <field>
9352 <name>CNT</name>
9353 <description>counter value</description>
9354 <bitOffset>0</bitOffset>
9355 <bitWidth>16</bitWidth>
9356 <access>read-write</access>
9357 </field>
9358 <field>
9359 <name>UIFCPY</name>
9360 <description>UIF Copy</description>
9361 <bitOffset>31</bitOffset>
9362 <bitWidth>1</bitWidth>
9363 <access>read-only</access>
9364 </field>
9365 </fields>
9366 </register>
9367 <register>
9368 <name>PSC</name>
9369 <displayName>PSC</displayName>
9370 <description>prescaler</description>
9371 <addressOffset>0x28</addressOffset>
9372 <size>0x20</size>
9373 <access>read-write</access>
9374 <resetValue>0x0000</resetValue>
9375 <fields>
9376 <field>
9377 <name>PSC</name>
9378 <description>Prescaler value</description>
9379 <bitOffset>0</bitOffset>
9380 <bitWidth>16</bitWidth>
9381 </field>
9382 </fields>
9383 </register>
9384 <register>
9385 <name>ARR</name>
9386 <displayName>ARR</displayName>
9387 <description>auto-reload register</description>
9388 <addressOffset>0x2C</addressOffset>
9389 <size>0x20</size>
9390 <access>read-write</access>
9391 <resetValue>0x00000000</resetValue>
9392 <fields>
9393 <field>
9394 <name>ARR</name>
9395 <description>Auto-reload value</description>
9396 <bitOffset>0</bitOffset>
9397 <bitWidth>16</bitWidth>
9398 </field>
9399 </fields>
9400 </register>
9401 <register>
9402 <name>RCR</name>
9403 <displayName>RCR</displayName>
9404 <description>repetition counter register</description>
9405 <addressOffset>0x30</addressOffset>
9406 <size>0x20</size>
9407 <access>read-write</access>
9408 <resetValue>0x0000</resetValue>
9409 <fields>
9410 <field>
9411 <name>REP</name>
9412 <description>Repetition counter value</description>
9413 <bitOffset>0</bitOffset>
9414 <bitWidth>8</bitWidth>
9415 </field>
9416 </fields>
9417 </register>
9418 <register>
9419 <name>CCR1</name>
9420 <displayName>CCR1</displayName>
9421 <description>capture/compare register 1</description>
9422 <addressOffset>0x34</addressOffset>
9423 <size>0x20</size>
9424 <access>read-write</access>
9425 <resetValue>0x00000000</resetValue>
9426 <fields>
9427 <field>
9428 <name>CCR1</name>
9429 <description>Capture/Compare 1 value</description>
9430 <bitOffset>0</bitOffset>
9431 <bitWidth>16</bitWidth>
9432 </field>
9433 </fields>
9434 </register>
9435 <register>
9436 <name>BDTR</name>
9437 <displayName>BDTR</displayName>
9438 <description>break and dead-time register</description>
9439 <addressOffset>0x44</addressOffset>
9440 <size>0x20</size>
9441 <access>read-write</access>
9442 <resetValue>0x0000</resetValue>
9443 <fields>
9444 <field>
9445 <name>DTG</name>
9446 <description>Dead-time generator setup</description>
9447 <bitOffset>0</bitOffset>
9448 <bitWidth>8</bitWidth>
9449 </field>
9450 <field>
9451 <name>LOCK</name>
9452 <description>Lock configuration</description>
9453 <bitOffset>8</bitOffset>
9454 <bitWidth>2</bitWidth>
9455 </field>
9456 <field>
9457 <name>OSSI</name>
9458 <description>Off-state selection for Idle
9459 mode</description>
9460 <bitOffset>10</bitOffset>
9461 <bitWidth>1</bitWidth>
9462 </field>
9463 <field>
9464 <name>OSSR</name>
9465 <description>Off-state selection for Run
9466 mode</description>
9467 <bitOffset>11</bitOffset>
9468 <bitWidth>1</bitWidth>
9469 </field>
9470 <field>
9471 <name>BKE</name>
9472 <description>Break enable</description>
9473 <bitOffset>12</bitOffset>
9474 <bitWidth>1</bitWidth>
9475 </field>
9476 <field>
9477 <name>BKP</name>
9478 <description>Break polarity</description>
9479 <bitOffset>13</bitOffset>
9480 <bitWidth>1</bitWidth>
9481 </field>
9482 <field>
9483 <name>AOE</name>
9484 <description>Automatic output enable</description>
9485 <bitOffset>14</bitOffset>
9486 <bitWidth>1</bitWidth>
9487 </field>
9488 <field>
9489 <name>MOE</name>
9490 <description>Main output enable</description>
9491 <bitOffset>15</bitOffset>
9492 <bitWidth>1</bitWidth>
9493 </field>
9494 <field>
9495 <name>BKF</name>
9496 <description>Break filter</description>
9497 <bitOffset>16</bitOffset>
9498 <bitWidth>4</bitWidth>
9499 </field>
9500 </fields>
9501 </register>
9502 <register>
9503 <name>DCR</name>
9504 <displayName>DCR</displayName>
9505 <description>DMA control register</description>
9506 <addressOffset>0x48</addressOffset>
9507 <size>0x20</size>
9508 <access>read-write</access>
9509 <resetValue>0x0000</resetValue>
9510 <fields>
9511 <field>
9512 <name>DBL</name>
9513 <description>DMA burst length</description>
9514 <bitOffset>8</bitOffset>
9515 <bitWidth>5</bitWidth>
9516 </field>
9517 <field>
9518 <name>DBA</name>
9519 <description>DMA base address</description>
9520 <bitOffset>0</bitOffset>
9521 <bitWidth>5</bitWidth>
9522 </field>
9523 </fields>
9524 </register>
9525 <register>
9526 <name>DMAR</name>
9527 <displayName>DMAR</displayName>
9528 <description>DMA address for full transfer</description>
9529 <addressOffset>0x4C</addressOffset>
9530 <size>0x20</size>
9531 <access>read-write</access>
9532 <resetValue>0x0000</resetValue>
9533 <fields>
9534 <field>
9535 <name>DMAB</name>
9536 <description>DMA register for burst
9537 accesses</description>
9538 <bitOffset>0</bitOffset>
9539 <bitWidth>16</bitWidth>
9540 </field>
9541 </fields>
9542 </register>
9543 <register>
9544 <name>OR</name>
9545 <displayName>OR</displayName>
9546 <description>option register</description>
9547 <addressOffset>0x50</addressOffset>
9548 <size>0x20</size>
9549 <access>read-write</access>
9550 <resetValue>0x0000</resetValue>
9551 </register>
9552 </registers>
9553 </peripheral>
9554 <peripheral>
9555 <name>TIM17</name>
9556 <description>General purpose timer</description>
9557 <groupName>TIMs</groupName>
9558 <baseAddress>0x40014800</baseAddress>
9559 <addressBlock>
9560 <offset>0x0</offset>
9561 <size>0x400</size>
9562 <usage>registers</usage>
9563 </addressBlock>
9564 <interrupt>
9565 <name>TIM1_TRG_COM_TIM17</name>
9566 <description>TIM1 trigger and commutation/TIM17
9567 interrupts</description>
9568 <value>26</value>
9569 </interrupt>
9570 <registers>
9571 <register>
9572 <name>CR1</name>
9573 <displayName>CR1</displayName>
9574 <description>control register 1</description>
9575 <addressOffset>0x0</addressOffset>
9576 <size>0x20</size>
9577 <access>read-write</access>
9578 <resetValue>0x0000</resetValue>
9579 <fields>
9580 <field>
9581 <name>CEN</name>
9582 <description>Counter enable</description>
9583 <bitOffset>0</bitOffset>
9584 <bitWidth>1</bitWidth>
9585 </field>
9586 <field>
9587 <name>UDIS</name>
9588 <description>Update disable</description>
9589 <bitOffset>1</bitOffset>
9590 <bitWidth>1</bitWidth>
9591 </field>
9592 <field>
9593 <name>URS</name>
9594 <description>Update request source</description>
9595 <bitOffset>2</bitOffset>
9596 <bitWidth>1</bitWidth>
9597 </field>
9598 <field>
9599 <name>OPM</name>
9600 <description>One-pulse mode</description>
9601 <bitOffset>3</bitOffset>
9602 <bitWidth>1</bitWidth>
9603 </field>
9604 <field>
9605 <name>ARPE</name>
9606 <description>Auto-reload preload enable</description>
9607 <bitOffset>7</bitOffset>
9608 <bitWidth>1</bitWidth>
9609 </field>
9610 <field>
9611 <name>CKD</name>
9612 <description>Clock division</description>
9613 <bitOffset>8</bitOffset>
9614 <bitWidth>2</bitWidth>
9615 </field>
9616 <field>
9617 <name>UIFREMAP</name>
9618 <description>UIF status bit remapping</description>
9619 <bitOffset>11</bitOffset>
9620 <bitWidth>1</bitWidth>
9621 </field>
9622 </fields>
9623 </register>
9624 <register>
9625 <name>CR2</name>
9626 <displayName>CR2</displayName>
9627 <description>control register 2</description>
9628 <addressOffset>0x4</addressOffset>
9629 <size>0x20</size>
9630 <access>read-write</access>
9631 <resetValue>0x0000</resetValue>
9632 <fields>
9633 <field>
9634 <name>OIS1N</name>
9635 <description>Output Idle state 1</description>
9636 <bitOffset>9</bitOffset>
9637 <bitWidth>1</bitWidth>
9638 </field>
9639 <field>
9640 <name>OIS1</name>
9641 <description>Output Idle state 1</description>
9642 <bitOffset>8</bitOffset>
9643 <bitWidth>1</bitWidth>
9644 </field>
9645 <field>
9646 <name>CCDS</name>
9647 <description>Capture/compare DMA
9648 selection</description>
9649 <bitOffset>3</bitOffset>
9650 <bitWidth>1</bitWidth>
9651 </field>
9652 <field>
9653 <name>CCUS</name>
9654 <description>Capture/compare control update
9655 selection</description>
9656 <bitOffset>2</bitOffset>
9657 <bitWidth>1</bitWidth>
9658 </field>
9659 <field>
9660 <name>CCPC</name>
9661 <description>Capture/compare preloaded
9662 control</description>
9663 <bitOffset>0</bitOffset>
9664 <bitWidth>1</bitWidth>
9665 </field>
9666 </fields>
9667 </register>
9668 <register>
9669 <name>DIER</name>
9670 <displayName>DIER</displayName>
9671 <description>DMA/Interrupt enable register</description>
9672 <addressOffset>0xC</addressOffset>
9673 <size>0x20</size>
9674 <access>read-write</access>
9675 <resetValue>0x0000</resetValue>
9676 <fields>
9677 <field>
9678 <name>UIE</name>
9679 <description>Update interrupt enable</description>
9680 <bitOffset>0</bitOffset>
9681 <bitWidth>1</bitWidth>
9682 </field>
9683 <field>
9684 <name>CC1IE</name>
9685 <description>Capture/Compare 1 interrupt
9686 enable</description>
9687 <bitOffset>1</bitOffset>
9688 <bitWidth>1</bitWidth>
9689 </field>
9690 <field>
9691 <name>COMIE</name>
9692 <description>COM interrupt enable</description>
9693 <bitOffset>5</bitOffset>
9694 <bitWidth>1</bitWidth>
9695 </field>
9696 <field>
9697 <name>TIE</name>
9698 <description>Trigger interrupt enable</description>
9699 <bitOffset>6</bitOffset>
9700 <bitWidth>1</bitWidth>
9701 </field>
9702 <field>
9703 <name>BIE</name>
9704 <description>Break interrupt enable</description>
9705 <bitOffset>7</bitOffset>
9706 <bitWidth>1</bitWidth>
9707 </field>
9708 <field>
9709 <name>UDE</name>
9710 <description>Update DMA request enable</description>
9711 <bitOffset>8</bitOffset>
9712 <bitWidth>1</bitWidth>
9713 </field>
9714 <field>
9715 <name>CC1DE</name>
9716 <description>Capture/Compare 1 DMA request
9717 enable</description>
9718 <bitOffset>9</bitOffset>
9719 <bitWidth>1</bitWidth>
9720 </field>
9721 <field>
9722 <name>COMDE</name>
9723 <description>COM DMA request enable</description>
9724 <bitOffset>13</bitOffset>
9725 <bitWidth>1</bitWidth>
9726 </field>
9727 <field>
9728 <name>TDE</name>
9729 <description>Trigger DMA request enable</description>
9730 <bitOffset>14</bitOffset>
9731 <bitWidth>1</bitWidth>
9732 </field>
9733 </fields>
9734 </register>
9735 <register>
9736 <name>SR</name>
9737 <displayName>SR</displayName>
9738 <description>status register</description>
9739 <addressOffset>0x10</addressOffset>
9740 <size>0x20</size>
9741 <access>read-write</access>
9742 <resetValue>0x0000</resetValue>
9743 <fields>
9744 <field>
9745 <name>CC1OF</name>
9746 <description>Capture/Compare 1 overcapture
9747 flag</description>
9748 <bitOffset>9</bitOffset>
9749 <bitWidth>1</bitWidth>
9750 </field>
9751 <field>
9752 <name>BIF</name>
9753 <description>Break interrupt flag</description>
9754 <bitOffset>7</bitOffset>
9755 <bitWidth>1</bitWidth>
9756 </field>
9757 <field>
9758 <name>TIF</name>
9759 <description>Trigger interrupt flag</description>
9760 <bitOffset>6</bitOffset>
9761 <bitWidth>1</bitWidth>
9762 </field>
9763 <field>
9764 <name>COMIF</name>
9765 <description>COM interrupt flag</description>
9766 <bitOffset>5</bitOffset>
9767 <bitWidth>1</bitWidth>
9768 </field>
9769 <field>
9770 <name>CC1IF</name>
9771 <description>Capture/compare 1 interrupt
9772 flag</description>
9773 <bitOffset>1</bitOffset>
9774 <bitWidth>1</bitWidth>
9775 </field>
9776 <field>
9777 <name>UIF</name>
9778 <description>Update interrupt flag</description>
9779 <bitOffset>0</bitOffset>
9780 <bitWidth>1</bitWidth>
9781 </field>
9782 </fields>
9783 </register>
9784 <register>
9785 <name>EGR</name>
9786 <displayName>EGR</displayName>
9787 <description>event generation register</description>
9788 <addressOffset>0x14</addressOffset>
9789 <size>0x20</size>
9790 <access>write-only</access>
9791 <resetValue>0x0000</resetValue>
9792 <fields>
9793 <field>
9794 <name>BG</name>
9795 <description>Break generation</description>
9796 <bitOffset>7</bitOffset>
9797 <bitWidth>1</bitWidth>
9798 </field>
9799 <field>
9800 <name>TG</name>
9801 <description>Trigger generation</description>
9802 <bitOffset>6</bitOffset>
9803 <bitWidth>1</bitWidth>
9804 </field>
9805 <field>
9806 <name>COMG</name>
9807 <description>Capture/Compare control update
9808 generation</description>
9809 <bitOffset>5</bitOffset>
9810 <bitWidth>1</bitWidth>
9811 </field>
9812 <field>
9813 <name>CC1G</name>
9814 <description>Capture/compare 1
9815 generation</description>
9816 <bitOffset>1</bitOffset>
9817 <bitWidth>1</bitWidth>
9818 </field>
9819 <field>
9820 <name>UG</name>
9821 <description>Update generation</description>
9822 <bitOffset>0</bitOffset>
9823 <bitWidth>1</bitWidth>
9824 </field>
9825 </fields>
9826 </register>
9827 <register>
9828 <name>CCMR1_Output</name>
9829 <displayName>CCMR1_Output</displayName>
9830 <description>capture/compare mode register (output
9831 mode)</description>
9832 <addressOffset>0x18</addressOffset>
9833 <size>0x20</size>
9834 <access>read-write</access>
9835 <resetValue>0x00000000</resetValue>
9836 <fields>
9837 <field>
9838 <name>CC1S</name>
9839 <description>Capture/Compare 1
9840 selection</description>
9841 <bitOffset>0</bitOffset>
9842 <bitWidth>2</bitWidth>
9843 </field>
9844 <field>
9845 <name>OC1FE</name>
9846 <description>Output Compare 1 fast
9847 enable</description>
9848 <bitOffset>2</bitOffset>
9849 <bitWidth>1</bitWidth>
9850 </field>
9851 <field>
9852 <name>OC1PE</name>
9853 <description>Output Compare 1 preload
9854 enable</description>
9855 <bitOffset>3</bitOffset>
9856 <bitWidth>1</bitWidth>
9857 </field>
9858 <field>
9859 <name>OC1M</name>
9860 <description>Output Compare 1 mode</description>
9861 <bitOffset>4</bitOffset>
9862 <bitWidth>3</bitWidth>
9863 </field>
9864 <field>
9865 <name>OC1M_3</name>
9866 <description>Output Compare 1 mode</description>
9867 <bitOffset>16</bitOffset>
9868 <bitWidth>1</bitWidth>
9869 </field>
9870 </fields>
9871 </register>
9872 <register>
9873 <name>CCMR1_Input</name>
9874 <displayName>CCMR1_Input</displayName>
9875 <description>capture/compare mode register 1 (input
9876 mode)</description>
9877 <alternateRegister>CCMR1_Output</alternateRegister>
9878 <addressOffset>0x18</addressOffset>
9879 <size>0x20</size>
9880 <access>read-write</access>
9881 <resetValue>0x00000000</resetValue>
9882 <fields>
9883 <field>
9884 <name>IC1F</name>
9885 <description>Input capture 1 filter</description>
9886 <bitOffset>4</bitOffset>
9887 <bitWidth>4</bitWidth>
9888 </field>
9889 <field>
9890 <name>IC1PSC</name>
9891 <description>Input capture 1 prescaler</description>
9892 <bitOffset>2</bitOffset>
9893 <bitWidth>2</bitWidth>
9894 </field>
9895 <field>
9896 <name>CC1S</name>
9897 <description>Capture/Compare 1
9898 selection</description>
9899 <bitOffset>0</bitOffset>
9900 <bitWidth>2</bitWidth>
9901 </field>
9902 </fields>
9903 </register>
9904 <register>
9905 <name>CCER</name>
9906 <displayName>CCER</displayName>
9907 <description>capture/compare enable
9908 register</description>
9909 <addressOffset>0x20</addressOffset>
9910 <size>0x20</size>
9911 <access>read-write</access>
9912 <resetValue>0x0000</resetValue>
9913 <fields>
9914 <field>
9915 <name>CC1NP</name>
9916 <description>Capture/Compare 1 output
9917 Polarity</description>
9918 <bitOffset>3</bitOffset>
9919 <bitWidth>1</bitWidth>
9920 </field>
9921 <field>
9922 <name>CC1NE</name>
9923 <description>Capture/Compare 1 complementary output
9924 enable</description>
9925 <bitOffset>2</bitOffset>
9926 <bitWidth>1</bitWidth>
9927 </field>
9928 <field>
9929 <name>CC1P</name>
9930 <description>Capture/Compare 1 output
9931 Polarity</description>
9932 <bitOffset>1</bitOffset>
9933 <bitWidth>1</bitWidth>
9934 </field>
9935 <field>
9936 <name>CC1E</name>
9937 <description>Capture/Compare 1 output
9938 enable</description>
9939 <bitOffset>0</bitOffset>
9940 <bitWidth>1</bitWidth>
9941 </field>
9942 </fields>
9943 </register>
9944 <register>
9945 <name>CNT</name>
9946 <displayName>CNT</displayName>
9947 <description>counter</description>
9948 <addressOffset>0x24</addressOffset>
9949 <size>0x20</size>
9950 <resetValue>0x00000000</resetValue>
9951 <fields>
9952 <field>
9953 <name>CNT</name>
9954 <description>counter value</description>
9955 <bitOffset>0</bitOffset>
9956 <bitWidth>16</bitWidth>
9957 <access>read-write</access>
9958 </field>
9959 <field>
9960 <name>UIFCPY</name>
9961 <description>UIF Copy</description>
9962 <bitOffset>31</bitOffset>
9963 <bitWidth>1</bitWidth>
9964 <access>read-only</access>
9965 </field>
9966 </fields>
9967 </register>
9968 <register>
9969 <name>PSC</name>
9970 <displayName>PSC</displayName>
9971 <description>prescaler</description>
9972 <addressOffset>0x28</addressOffset>
9973 <size>0x20</size>
9974 <access>read-write</access>
9975 <resetValue>0x0000</resetValue>
9976 <fields>
9977 <field>
9978 <name>PSC</name>
9979 <description>Prescaler value</description>
9980 <bitOffset>0</bitOffset>
9981 <bitWidth>16</bitWidth>
9982 </field>
9983 </fields>
9984 </register>
9985 <register>
9986 <name>ARR</name>
9987 <displayName>ARR</displayName>
9988 <description>auto-reload register</description>
9989 <addressOffset>0x2C</addressOffset>
9990 <size>0x20</size>
9991 <access>read-write</access>
9992 <resetValue>0x00000000</resetValue>
9993 <fields>
9994 <field>
9995 <name>ARR</name>
9996 <description>Auto-reload value</description>
9997 <bitOffset>0</bitOffset>
9998 <bitWidth>16</bitWidth>
9999 </field>
10000 </fields>
10001 </register>
10002 <register>
10003 <name>RCR</name>
10004 <displayName>RCR</displayName>
10005 <description>repetition counter register</description>
10006 <addressOffset>0x30</addressOffset>
10007 <size>0x20</size>
10008 <access>read-write</access>
10009 <resetValue>0x0000</resetValue>
10010 <fields>
10011 <field>
10012 <name>REP</name>
10013 <description>Repetition counter value</description>
10014 <bitOffset>0</bitOffset>
10015 <bitWidth>8</bitWidth>
10016 </field>
10017 </fields>
10018 </register>
10019 <register>
10020 <name>CCR1</name>
10021 <displayName>CCR1</displayName>
10022 <description>capture/compare register 1</description>
10023 <addressOffset>0x34</addressOffset>
10024 <size>0x20</size>
10025 <access>read-write</access>
10026 <resetValue>0x00000000</resetValue>
10027 <fields>
10028 <field>
10029 <name>CCR1</name>
10030 <description>Capture/Compare 1 value</description>
10031 <bitOffset>0</bitOffset>
10032 <bitWidth>16</bitWidth>
10033 </field>
10034 </fields>
10035 </register>
10036 <register>
10037 <name>BDTR</name>
10038 <displayName>BDTR</displayName>
10039 <description>break and dead-time register</description>
10040 <addressOffset>0x44</addressOffset>
10041 <size>0x20</size>
10042 <access>read-write</access>
10043 <resetValue>0x0000</resetValue>
10044 <fields>
10045 <field>
10046 <name>DTG</name>
10047 <description>Dead-time generator setup</description>
10048 <bitOffset>0</bitOffset>
10049 <bitWidth>8</bitWidth>
10050 </field>
10051 <field>
10052 <name>LOCK</name>
10053 <description>Lock configuration</description>
10054 <bitOffset>8</bitOffset>
10055 <bitWidth>2</bitWidth>
10056 </field>
10057 <field>
10058 <name>OSSI</name>
10059 <description>Off-state selection for Idle
10060 mode</description>
10061 <bitOffset>10</bitOffset>
10062 <bitWidth>1</bitWidth>
10063 </field>
10064 <field>
10065 <name>OSSR</name>
10066 <description>Off-state selection for Run
10067 mode</description>
10068 <bitOffset>11</bitOffset>
10069 <bitWidth>1</bitWidth>
10070 </field>
10071 <field>
10072 <name>BKE</name>
10073 <description>Break enable</description>
10074 <bitOffset>12</bitOffset>
10075 <bitWidth>1</bitWidth>
10076 </field>
10077 <field>
10078 <name>BKP</name>
10079 <description>Break polarity</description>
10080 <bitOffset>13</bitOffset>
10081 <bitWidth>1</bitWidth>
10082 </field>
10083 <field>
10084 <name>AOE</name>
10085 <description>Automatic output enable</description>
10086 <bitOffset>14</bitOffset>
10087 <bitWidth>1</bitWidth>
10088 </field>
10089 <field>
10090 <name>MOE</name>
10091 <description>Main output enable</description>
10092 <bitOffset>15</bitOffset>
10093 <bitWidth>1</bitWidth>
10094 </field>
10095 <field>
10096 <name>BKF</name>
10097 <description>Break filter</description>
10098 <bitOffset>16</bitOffset>
10099 <bitWidth>4</bitWidth>
10100 </field>
10101 </fields>
10102 </register>
10103 <register>
10104 <name>DCR</name>
10105 <displayName>DCR</displayName>
10106 <description>DMA control register</description>
10107 <addressOffset>0x48</addressOffset>
10108 <size>0x20</size>
10109 <access>read-write</access>
10110 <resetValue>0x0000</resetValue>
10111 <fields>
10112 <field>
10113 <name>DBL</name>
10114 <description>DMA burst length</description>
10115 <bitOffset>8</bitOffset>
10116 <bitWidth>5</bitWidth>
10117 </field>
10118 <field>
10119 <name>DBA</name>
10120 <description>DMA base address</description>
10121 <bitOffset>0</bitOffset>
10122 <bitWidth>5</bitWidth>
10123 </field>
10124 </fields>
10125 </register>
10126 <register>
10127 <name>DMAR</name>
10128 <displayName>DMAR</displayName>
10129 <description>DMA address for full transfer</description>
10130 <addressOffset>0x4C</addressOffset>
10131 <size>0x20</size>
10132 <access>read-write</access>
10133 <resetValue>0x0000</resetValue>
10134 <fields>
10135 <field>
10136 <name>DMAB</name>
10137 <description>DMA register for burst
10138 accesses</description>
10139 <bitOffset>0</bitOffset>
10140 <bitWidth>16</bitWidth>
10141 </field>
10142 </fields>
10143 </register>
10144 </registers>
10145 </peripheral>
10146 <peripheral>
10147 <name>USART1</name>
10148 <description>Universal synchronous asynchronous receiver
10149 transmitter</description>
10150 <groupName>USART</groupName>
10151 <baseAddress>0x40013800</baseAddress>
10152 <addressBlock>
10153 <offset>0x0</offset>
10154 <size>0x400</size>
10155 <usage>registers</usage>
10156 </addressBlock>
10157 <interrupt>
10158 <name>USART1_EXTI25</name>
10159 <description>USART1 global interrupt and EXTI Line 25
10160 interrupt</description>
10161 <value>37</value>
10162 </interrupt>
10163 <registers>
10164 <register>
10165 <name>CR1</name>
10166 <displayName>CR1</displayName>
10167 <description>Control register 1</description>
10168 <addressOffset>0x0</addressOffset>
10169 <size>0x20</size>
10170 <access>read-write</access>
10171 <resetValue>0x0000</resetValue>
10172 <fields>
10173 <field>
10174 <name>EOBIE</name>
10175 <description>End of Block interrupt
10176 enable</description>
10177 <bitOffset>27</bitOffset>
10178 <bitWidth>1</bitWidth>
10179 </field>
10180 <field>
10181 <name>RTOIE</name>
10182 <description>Receiver timeout interrupt
10183 enable</description>
10184 <bitOffset>26</bitOffset>
10185 <bitWidth>1</bitWidth>
10186 </field>
10187 <field>
10188 <name>DEAT</name>
10189 <description>Driver Enable assertion
10190 time</description>
10191 <bitOffset>21</bitOffset>
10192 <bitWidth>5</bitWidth>
10193 </field>
10194 <field>
10195 <name>DEDT</name>
10196 <description>Driver Enable deassertion
10197 time</description>
10198 <bitOffset>16</bitOffset>
10199 <bitWidth>5</bitWidth>
10200 </field>
10201 <field>
10202 <name>OVER8</name>
10203 <description>Oversampling mode</description>
10204 <bitOffset>15</bitOffset>
10205 <bitWidth>1</bitWidth>
10206 </field>
10207 <field>
10208 <name>CMIE</name>
10209 <description>Character match interrupt
10210 enable</description>
10211 <bitOffset>14</bitOffset>
10212 <bitWidth>1</bitWidth>
10213 </field>
10214 <field>
10215 <name>MME</name>
10216 <description>Mute mode enable</description>
10217 <bitOffset>13</bitOffset>
10218 <bitWidth>1</bitWidth>
10219 </field>
10220 <field>
10221 <name>M</name>
10222 <description>Word length</description>
10223 <bitOffset>12</bitOffset>
10224 <bitWidth>1</bitWidth>
10225 </field>
10226 <field>
10227 <name>WAKE</name>
10228 <description>Receiver wakeup method</description>
10229 <bitOffset>11</bitOffset>
10230 <bitWidth>1</bitWidth>
10231 </field>
10232 <field>
10233 <name>PCE</name>
10234 <description>Parity control enable</description>
10235 <bitOffset>10</bitOffset>
10236 <bitWidth>1</bitWidth>
10237 </field>
10238 <field>
10239 <name>PS</name>
10240 <description>Parity selection</description>
10241 <bitOffset>9</bitOffset>
10242 <bitWidth>1</bitWidth>
10243 </field>
10244 <field>
10245 <name>PEIE</name>
10246 <description>PE interrupt enable</description>
10247 <bitOffset>8</bitOffset>
10248 <bitWidth>1</bitWidth>
10249 </field>
10250 <field>
10251 <name>TXEIE</name>
10252 <description>interrupt enable</description>
10253 <bitOffset>7</bitOffset>
10254 <bitWidth>1</bitWidth>
10255 </field>
10256 <field>
10257 <name>TCIE</name>
10258 <description>Transmission complete interrupt
10259 enable</description>
10260 <bitOffset>6</bitOffset>
10261 <bitWidth>1</bitWidth>
10262 </field>
10263 <field>
10264 <name>RXNEIE</name>
10265 <description>RXNE interrupt enable</description>
10266 <bitOffset>5</bitOffset>
10267 <bitWidth>1</bitWidth>
10268 </field>
10269 <field>
10270 <name>IDLEIE</name>
10271 <description>IDLE interrupt enable</description>
10272 <bitOffset>4</bitOffset>
10273 <bitWidth>1</bitWidth>
10274 </field>
10275 <field>
10276 <name>TE</name>
10277 <description>Transmitter enable</description>
10278 <bitOffset>3</bitOffset>
10279 <bitWidth>1</bitWidth>
10280 </field>
10281 <field>
10282 <name>RE</name>
10283 <description>Receiver enable</description>
10284 <bitOffset>2</bitOffset>
10285 <bitWidth>1</bitWidth>
10286 </field>
10287 <field>
10288 <name>UESM</name>
10289 <description>USART enable in Stop mode</description>
10290 <bitOffset>1</bitOffset>
10291 <bitWidth>1</bitWidth>
10292 </field>
10293 <field>
10294 <name>UE</name>
10295 <description>USART enable</description>
10296 <bitOffset>0</bitOffset>
10297 <bitWidth>1</bitWidth>
10298 </field>
10299 </fields>
10300 </register>
10301 <register>
10302 <name>CR2</name>
10303 <displayName>CR2</displayName>
10304 <description>Control register 2</description>
10305 <addressOffset>0x4</addressOffset>
10306 <size>0x20</size>
10307 <access>read-write</access>
10308 <resetValue>0x0000</resetValue>
10309 <fields>
10310 <field>
10311 <name>ADD4</name>
10312 <description>Address of the USART node</description>
10313 <bitOffset>28</bitOffset>
10314 <bitWidth>4</bitWidth>
10315 </field>
10316 <field>
10317 <name>ADD0</name>
10318 <description>Address of the USART node</description>
10319 <bitOffset>24</bitOffset>
10320 <bitWidth>4</bitWidth>
10321 </field>
10322 <field>
10323 <name>RTOEN</name>
10324 <description>Receiver timeout enable</description>
10325 <bitOffset>23</bitOffset>
10326 <bitWidth>1</bitWidth>
10327 </field>
10328 <field>
10329 <name>ABRMOD</name>
10330 <description>Auto baud rate mode</description>
10331 <bitOffset>21</bitOffset>
10332 <bitWidth>2</bitWidth>
10333 </field>
10334 <field>
10335 <name>ABREN</name>
10336 <description>Auto baud rate enable</description>
10337 <bitOffset>20</bitOffset>
10338 <bitWidth>1</bitWidth>
10339 </field>
10340 <field>
10341 <name>MSBFIRST</name>
10342 <description>Most significant bit first</description>
10343 <bitOffset>19</bitOffset>
10344 <bitWidth>1</bitWidth>
10345 </field>
10346 <field>
10347 <name>DATAINV</name>
10348 <description>Binary data inversion</description>
10349 <bitOffset>18</bitOffset>
10350 <bitWidth>1</bitWidth>
10351 </field>
10352 <field>
10353 <name>TXINV</name>
10354 <description>TX pin active level
10355 inversion</description>
10356 <bitOffset>17</bitOffset>
10357 <bitWidth>1</bitWidth>
10358 </field>
10359 <field>
10360 <name>RXINV</name>
10361 <description>RX pin active level
10362 inversion</description>
10363 <bitOffset>16</bitOffset>
10364 <bitWidth>1</bitWidth>
10365 </field>
10366 <field>
10367 <name>SWAP</name>
10368 <description>Swap TX/RX pins</description>
10369 <bitOffset>15</bitOffset>
10370 <bitWidth>1</bitWidth>
10371 </field>
10372 <field>
10373 <name>LINEN</name>
10374 <description>LIN mode enable</description>
10375 <bitOffset>14</bitOffset>
10376 <bitWidth>1</bitWidth>
10377 </field>
10378 <field>
10379 <name>STOP</name>
10380 <description>STOP bits</description>
10381 <bitOffset>12</bitOffset>
10382 <bitWidth>2</bitWidth>
10383 </field>
10384 <field>
10385 <name>CLKEN</name>
10386 <description>Clock enable</description>
10387 <bitOffset>11</bitOffset>
10388 <bitWidth>1</bitWidth>
10389 </field>
10390 <field>
10391 <name>CPOL</name>
10392 <description>Clock polarity</description>
10393 <bitOffset>10</bitOffset>
10394 <bitWidth>1</bitWidth>
10395 </field>
10396 <field>
10397 <name>CPHA</name>
10398 <description>Clock phase</description>
10399 <bitOffset>9</bitOffset>
10400 <bitWidth>1</bitWidth>
10401 </field>
10402 <field>
10403 <name>LBCL</name>
10404 <description>Last bit clock pulse</description>
10405 <bitOffset>8</bitOffset>
10406 <bitWidth>1</bitWidth>
10407 </field>
10408 <field>
10409 <name>LBDIE</name>
10410 <description>LIN break detection interrupt
10411 enable</description>
10412 <bitOffset>6</bitOffset>
10413 <bitWidth>1</bitWidth>
10414 </field>
10415 <field>
10416 <name>LBDL</name>
10417 <description>LIN break detection length</description>
10418 <bitOffset>5</bitOffset>
10419 <bitWidth>1</bitWidth>
10420 </field>
10421 <field>
10422 <name>ADDM7</name>
10423 <description>7-bit Address Detection/4-bit Address
10424 Detection</description>
10425 <bitOffset>4</bitOffset>
10426 <bitWidth>1</bitWidth>
10427 </field>
10428 </fields>
10429 </register>
10430 <register>
10431 <name>CR3</name>
10432 <displayName>CR3</displayName>
10433 <description>Control register 3</description>
10434 <addressOffset>0x8</addressOffset>
10435 <size>0x20</size>
10436 <access>read-write</access>
10437 <resetValue>0x0000</resetValue>
10438 <fields>
10439 <field>
10440 <name>WUFIE</name>
10441 <description>Wakeup from Stop mode interrupt
10442 enable</description>
10443 <bitOffset>22</bitOffset>
10444 <bitWidth>1</bitWidth>
10445 </field>
10446 <field>
10447 <name>WUS</name>
10448 <description>Wakeup from Stop mode interrupt flag
10449 selection</description>
10450 <bitOffset>20</bitOffset>
10451 <bitWidth>2</bitWidth>
10452 </field>
10453 <field>
10454 <name>SCARCNT</name>
10455 <description>Smartcard auto-retry count</description>
10456 <bitOffset>17</bitOffset>
10457 <bitWidth>3</bitWidth>
10458 </field>
10459 <field>
10460 <name>DEP</name>
10461 <description>Driver enable polarity
10462 selection</description>
10463 <bitOffset>15</bitOffset>
10464 <bitWidth>1</bitWidth>
10465 </field>
10466 <field>
10467 <name>DEM</name>
10468 <description>Driver enable mode</description>
10469 <bitOffset>14</bitOffset>
10470 <bitWidth>1</bitWidth>
10471 </field>
10472 <field>
10473 <name>DDRE</name>
10474 <description>DMA Disable on Reception
10475 Error</description>
10476 <bitOffset>13</bitOffset>
10477 <bitWidth>1</bitWidth>
10478 </field>
10479 <field>
10480 <name>OVRDIS</name>
10481 <description>Overrun Disable</description>
10482 <bitOffset>12</bitOffset>
10483 <bitWidth>1</bitWidth>
10484 </field>
10485 <field>
10486 <name>ONEBIT</name>
10487 <description>One sample bit method
10488 enable</description>
10489 <bitOffset>11</bitOffset>
10490 <bitWidth>1</bitWidth>
10491 </field>
10492 <field>
10493 <name>CTSIE</name>
10494 <description>CTS interrupt enable</description>
10495 <bitOffset>10</bitOffset>
10496 <bitWidth>1</bitWidth>
10497 </field>
10498 <field>
10499 <name>CTSE</name>
10500 <description>CTS enable</description>
10501 <bitOffset>9</bitOffset>
10502 <bitWidth>1</bitWidth>
10503 </field>
10504 <field>
10505 <name>RTSE</name>
10506 <description>RTS enable</description>
10507 <bitOffset>8</bitOffset>
10508 <bitWidth>1</bitWidth>
10509 </field>
10510 <field>
10511 <name>DMAT</name>
10512 <description>DMA enable transmitter</description>
10513 <bitOffset>7</bitOffset>
10514 <bitWidth>1</bitWidth>
10515 </field>
10516 <field>
10517 <name>DMAR</name>
10518 <description>DMA enable receiver</description>
10519 <bitOffset>6</bitOffset>
10520 <bitWidth>1</bitWidth>
10521 </field>
10522 <field>
10523 <name>SCEN</name>
10524 <description>Smartcard mode enable</description>
10525 <bitOffset>5</bitOffset>
10526 <bitWidth>1</bitWidth>
10527 </field>
10528 <field>
10529 <name>NACK</name>
10530 <description>Smartcard NACK enable</description>
10531 <bitOffset>4</bitOffset>
10532 <bitWidth>1</bitWidth>
10533 </field>
10534 <field>
10535 <name>HDSEL</name>
10536 <description>Half-duplex selection</description>
10537 <bitOffset>3</bitOffset>
10538 <bitWidth>1</bitWidth>
10539 </field>
10540 <field>
10541 <name>IRLP</name>
10542 <description>IrDA low-power</description>
10543 <bitOffset>2</bitOffset>
10544 <bitWidth>1</bitWidth>
10545 </field>
10546 <field>
10547 <name>IREN</name>
10548 <description>IrDA mode enable</description>
10549 <bitOffset>1</bitOffset>
10550 <bitWidth>1</bitWidth>
10551 </field>
10552 <field>
10553 <name>EIE</name>
10554 <description>Error interrupt enable</description>
10555 <bitOffset>0</bitOffset>
10556 <bitWidth>1</bitWidth>
10557 </field>
10558 </fields>
10559 </register>
10560 <register>
10561 <name>BRR</name>
10562 <displayName>BRR</displayName>
10563 <description>Baud rate register</description>
10564 <addressOffset>0xC</addressOffset>
10565 <size>0x20</size>
10566 <access>read-write</access>
10567 <resetValue>0x0000</resetValue>
10568 <fields>
10569 <field>
10570 <name>DIV_Mantissa</name>
10571 <description>mantissa of USARTDIV</description>
10572 <bitOffset>4</bitOffset>
10573 <bitWidth>12</bitWidth>
10574 </field>
10575 <field>
10576 <name>DIV_Fraction</name>
10577 <description>fraction of USARTDIV</description>
10578 <bitOffset>0</bitOffset>
10579 <bitWidth>4</bitWidth>
10580 </field>
10581 </fields>
10582 </register>
10583 <register>
10584 <name>GTPR</name>
10585 <displayName>GTPR</displayName>
10586 <description>Guard time and prescaler
10587 register</description>
10588 <addressOffset>0x10</addressOffset>
10589 <size>0x20</size>
10590 <access>read-write</access>
10591 <resetValue>0x0000</resetValue>
10592 <fields>
10593 <field>
10594 <name>GT</name>
10595 <description>Guard time value</description>
10596 <bitOffset>8</bitOffset>
10597 <bitWidth>8</bitWidth>
10598 </field>
10599 <field>
10600 <name>PSC</name>
10601 <description>Prescaler value</description>
10602 <bitOffset>0</bitOffset>
10603 <bitWidth>8</bitWidth>
10604 </field>
10605 </fields>
10606 </register>
10607 <register>
10608 <name>RTOR</name>
10609 <displayName>RTOR</displayName>
10610 <description>Receiver timeout register</description>
10611 <addressOffset>0x14</addressOffset>
10612 <size>0x20</size>
10613 <access>read-write</access>
10614 <resetValue>0x0000</resetValue>
10615 <fields>
10616 <field>
10617 <name>BLEN</name>
10618 <description>Block Length</description>
10619 <bitOffset>24</bitOffset>
10620 <bitWidth>8</bitWidth>
10621 </field>
10622 <field>
10623 <name>RTO</name>
10624 <description>Receiver timeout value</description>
10625 <bitOffset>0</bitOffset>
10626 <bitWidth>24</bitWidth>
10627 </field>
10628 </fields>
10629 </register>
10630 <register>
10631 <name>RQR</name>
10632 <displayName>RQR</displayName>
10633 <description>Request register</description>
10634 <addressOffset>0x18</addressOffset>
10635 <size>0x20</size>
10636 <access>read-write</access>
10637 <resetValue>0x0000</resetValue>
10638 <fields>
10639 <field>
10640 <name>TXFRQ</name>
10641 <description>Transmit data flush
10642 request</description>
10643 <bitOffset>4</bitOffset>
10644 <bitWidth>1</bitWidth>
10645 </field>
10646 <field>
10647 <name>RXFRQ</name>
10648 <description>Receive data flush request</description>
10649 <bitOffset>3</bitOffset>
10650 <bitWidth>1</bitWidth>
10651 </field>
10652 <field>
10653 <name>MMRQ</name>
10654 <description>Mute mode request</description>
10655 <bitOffset>2</bitOffset>
10656 <bitWidth>1</bitWidth>
10657 </field>
10658 <field>
10659 <name>SBKRQ</name>
10660 <description>Send break request</description>
10661 <bitOffset>1</bitOffset>
10662 <bitWidth>1</bitWidth>
10663 </field>
10664 <field>
10665 <name>ABRRQ</name>
10666 <description>Auto baud rate request</description>
10667 <bitOffset>0</bitOffset>
10668 <bitWidth>1</bitWidth>
10669 </field>
10670 </fields>
10671 </register>
10672 <register>
10673 <name>ISR</name>
10674 <displayName>ISR</displayName>
10675 <description>Interrupt &amp; status
10676 register</description>
10677 <addressOffset>0x1C</addressOffset>
10678 <size>0x20</size>
10679 <access>read-only</access>
10680 <resetValue>0x00C0</resetValue>
10681 <fields>
10682 <field>
10683 <name>REACK</name>
10684 <description>Receive enable acknowledge
10685 flag</description>
10686 <bitOffset>22</bitOffset>
10687 <bitWidth>1</bitWidth>
10688 </field>
10689 <field>
10690 <name>TEACK</name>
10691 <description>Transmit enable acknowledge
10692 flag</description>
10693 <bitOffset>21</bitOffset>
10694 <bitWidth>1</bitWidth>
10695 </field>
10696 <field>
10697 <name>WUF</name>
10698 <description>Wakeup from Stop mode flag</description>
10699 <bitOffset>20</bitOffset>
10700 <bitWidth>1</bitWidth>
10701 </field>
10702 <field>
10703 <name>RWU</name>
10704 <description>Receiver wakeup from Mute
10705 mode</description>
10706 <bitOffset>19</bitOffset>
10707 <bitWidth>1</bitWidth>
10708 </field>
10709 <field>
10710 <name>SBKF</name>
10711 <description>Send break flag</description>
10712 <bitOffset>18</bitOffset>
10713 <bitWidth>1</bitWidth>
10714 </field>
10715 <field>
10716 <name>CMF</name>
10717 <description>character match flag</description>
10718 <bitOffset>17</bitOffset>
10719 <bitWidth>1</bitWidth>
10720 </field>
10721 <field>
10722 <name>BUSY</name>
10723 <description>Busy flag</description>
10724 <bitOffset>16</bitOffset>
10725 <bitWidth>1</bitWidth>
10726 </field>
10727 <field>
10728 <name>ABRF</name>
10729 <description>Auto baud rate flag</description>
10730 <bitOffset>15</bitOffset>
10731 <bitWidth>1</bitWidth>
10732 </field>
10733 <field>
10734 <name>ABRE</name>
10735 <description>Auto baud rate error</description>
10736 <bitOffset>14</bitOffset>
10737 <bitWidth>1</bitWidth>
10738 </field>
10739 <field>
10740 <name>EOBF</name>
10741 <description>End of block flag</description>
10742 <bitOffset>12</bitOffset>
10743 <bitWidth>1</bitWidth>
10744 </field>
10745 <field>
10746 <name>RTOF</name>
10747 <description>Receiver timeout</description>
10748 <bitOffset>11</bitOffset>
10749 <bitWidth>1</bitWidth>
10750 </field>
10751 <field>
10752 <name>CTS</name>
10753 <description>CTS flag</description>
10754 <bitOffset>10</bitOffset>
10755 <bitWidth>1</bitWidth>
10756 </field>
10757 <field>
10758 <name>CTSIF</name>
10759 <description>CTS interrupt flag</description>
10760 <bitOffset>9</bitOffset>
10761 <bitWidth>1</bitWidth>
10762 </field>
10763 <field>
10764 <name>LBDF</name>
10765 <description>LIN break detection flag</description>
10766 <bitOffset>8</bitOffset>
10767 <bitWidth>1</bitWidth>
10768 </field>
10769 <field>
10770 <name>TXE</name>
10771 <description>Transmit data register
10772 empty</description>
10773 <bitOffset>7</bitOffset>
10774 <bitWidth>1</bitWidth>
10775 </field>
10776 <field>
10777 <name>TC</name>
10778 <description>Transmission complete</description>
10779 <bitOffset>6</bitOffset>
10780 <bitWidth>1</bitWidth>
10781 </field>
10782 <field>
10783 <name>RXNE</name>
10784 <description>Read data register not
10785 empty</description>
10786 <bitOffset>5</bitOffset>
10787 <bitWidth>1</bitWidth>
10788 </field>
10789 <field>
10790 <name>IDLE</name>
10791 <description>Idle line detected</description>
10792 <bitOffset>4</bitOffset>
10793 <bitWidth>1</bitWidth>
10794 </field>
10795 <field>
10796 <name>ORE</name>
10797 <description>Overrun error</description>
10798 <bitOffset>3</bitOffset>
10799 <bitWidth>1</bitWidth>
10800 </field>
10801 <field>
10802 <name>NF</name>
10803 <description>Noise detected flag</description>
10804 <bitOffset>2</bitOffset>
10805 <bitWidth>1</bitWidth>
10806 </field>
10807 <field>
10808 <name>FE</name>
10809 <description>Framing error</description>
10810 <bitOffset>1</bitOffset>
10811 <bitWidth>1</bitWidth>
10812 </field>
10813 <field>
10814 <name>PE</name>
10815 <description>Parity error</description>
10816 <bitOffset>0</bitOffset>
10817 <bitWidth>1</bitWidth>
10818 </field>
10819 </fields>
10820 </register>
10821 <register>
10822 <name>ICR</name>
10823 <displayName>ICR</displayName>
10824 <description>Interrupt flag clear register</description>
10825 <addressOffset>0x20</addressOffset>
10826 <size>0x20</size>
10827 <access>read-write</access>
10828 <resetValue>0x0000</resetValue>
10829 <fields>
10830 <field>
10831 <name>WUCF</name>
10832 <description>Wakeup from Stop mode clear
10833 flag</description>
10834 <bitOffset>20</bitOffset>
10835 <bitWidth>1</bitWidth>
10836 </field>
10837 <field>
10838 <name>CMCF</name>
10839 <description>Character match clear flag</description>
10840 <bitOffset>17</bitOffset>
10841 <bitWidth>1</bitWidth>
10842 </field>
10843 <field>
10844 <name>EOBCF</name>
10845 <description>End of timeout clear flag</description>
10846 <bitOffset>12</bitOffset>
10847 <bitWidth>1</bitWidth>
10848 </field>
10849 <field>
10850 <name>RTOCF</name>
10851 <description>Receiver timeout clear
10852 flag</description>
10853 <bitOffset>11</bitOffset>
10854 <bitWidth>1</bitWidth>
10855 </field>
10856 <field>
10857 <name>CTSCF</name>
10858 <description>CTS clear flag</description>
10859 <bitOffset>9</bitOffset>
10860 <bitWidth>1</bitWidth>
10861 </field>
10862 <field>
10863 <name>LBDCF</name>
10864 <description>LIN break detection clear
10865 flag</description>
10866 <bitOffset>8</bitOffset>
10867 <bitWidth>1</bitWidth>
10868 </field>
10869 <field>
10870 <name>TCCF</name>
10871 <description>Transmission complete clear
10872 flag</description>
10873 <bitOffset>6</bitOffset>
10874 <bitWidth>1</bitWidth>
10875 </field>
10876 <field>
10877 <name>IDLECF</name>
10878 <description>Idle line detected clear
10879 flag</description>
10880 <bitOffset>4</bitOffset>
10881 <bitWidth>1</bitWidth>
10882 </field>
10883 <field>
10884 <name>ORECF</name>
10885 <description>Overrun error clear flag</description>
10886 <bitOffset>3</bitOffset>
10887 <bitWidth>1</bitWidth>
10888 </field>
10889 <field>
10890 <name>NCF</name>
10891 <description>Noise detected clear flag</description>
10892 <bitOffset>2</bitOffset>
10893 <bitWidth>1</bitWidth>
10894 </field>
10895 <field>
10896 <name>FECF</name>
10897 <description>Framing error clear flag</description>
10898 <bitOffset>1</bitOffset>
10899 <bitWidth>1</bitWidth>
10900 </field>
10901 <field>
10902 <name>PECF</name>
10903 <description>Parity error clear flag</description>
10904 <bitOffset>0</bitOffset>
10905 <bitWidth>1</bitWidth>
10906 </field>
10907 </fields>
10908 </register>
10909 <register>
10910 <name>RDR</name>
10911 <displayName>RDR</displayName>
10912 <description>Receive data register</description>
10913 <addressOffset>0x24</addressOffset>
10914 <size>0x20</size>
10915 <access>read-only</access>
10916 <resetValue>0x0000</resetValue>
10917 <fields>
10918 <field>
10919 <name>RDR</name>
10920 <description>Receive data value</description>
10921 <bitOffset>0</bitOffset>
10922 <bitWidth>9</bitWidth>
10923 </field>
10924 </fields>
10925 </register>
10926 <register>
10927 <name>TDR</name>
10928 <displayName>TDR</displayName>
10929 <description>Transmit data register</description>
10930 <addressOffset>0x28</addressOffset>
10931 <size>0x20</size>
10932 <access>read-write</access>
10933 <resetValue>0x0000</resetValue>
10934 <fields>
10935 <field>
10936 <name>TDR</name>
10937 <description>Transmit data value</description>
10938 <bitOffset>0</bitOffset>
10939 <bitWidth>9</bitWidth>
10940 </field>
10941 </fields>
10942 </register>
10943 </registers>
10944 </peripheral>
10945 <peripheral derivedFrom="USART1">
10946 <name>USART2</name>
10947 <baseAddress>0x40004400</baseAddress>
10948 <interrupt>
10949 <name>USART2_EXTI26</name>
10950 <description>USART2 global interrupt and EXTI Line 26
10951 interrupt</description>
10952 <value>38</value>
10953 </interrupt>
10954 </peripheral>
10955 <peripheral derivedFrom="USART1">
10956 <name>USART3</name>
10957 <baseAddress>0x40004800</baseAddress>
10958 <interrupt>
10959 <name>USART3_EXTI28</name>
10960 <description>USART3 global interrupt and EXTI Line 28
10961 interrupt</description>
10962 <value>39</value>
10963 </interrupt>
10964 </peripheral>
10965 <peripheral derivedFrom="USART1">
10966 <name>UART4</name>
10967 <baseAddress>0x40004C00</baseAddress>
10968 <interrupt>
10969 <name>UART4_EXTI34</name>
10970 <description>UART4 global and EXTI Line 34
10971 interrupts</description>
10972 <value>52</value>
10973 </interrupt>
10974 </peripheral>
10975 <peripheral derivedFrom="USART1">
10976 <name>UART5</name>
10977 <baseAddress>0x40005000</baseAddress>
10978 <interrupt>
10979 <name>UART5_EXTI35</name>
10980 <description>UART5 global and EXTI Line 35
10981 interrupts</description>
10982 <value>53</value>
10983 </interrupt>
10984 </peripheral>
10985 <peripheral>
10986 <name>SPI1</name>
10987 <description>Serial peripheral interface/Inter-IC
10988 sound</description>
10989 <groupName>SPI</groupName>
10990 <baseAddress>0x40013000</baseAddress>
10991 <addressBlock>
10992 <offset>0x0</offset>
10993 <size>0x400</size>
10994 <usage>registers</usage>
10995 </addressBlock>
10996 <interrupt>
10997 <name>SPI1</name>
10998 <description>SPI1 global interrupt</description>
10999 <value>35</value>
11000 </interrupt>
11001 <registers>
11002 <register>
11003 <name>CR1</name>
11004 <displayName>CR1</displayName>
11005 <description>control register 1</description>
11006 <addressOffset>0x0</addressOffset>
11007 <size>0x20</size>
11008 <access>read-write</access>
11009 <resetValue>0x0000</resetValue>
11010 <fields>
11011 <field>
11012 <name>BIDIMODE</name>
11013 <description>Bidirectional data mode
11014 enable</description>
11015 <bitOffset>15</bitOffset>
11016 <bitWidth>1</bitWidth>
11017 </field>
11018 <field>
11019 <name>BIDIOE</name>
11020 <description>Output enable in bidirectional
11021 mode</description>
11022 <bitOffset>14</bitOffset>
11023 <bitWidth>1</bitWidth>
11024 </field>
11025 <field>
11026 <name>CRCEN</name>
11027 <description>Hardware CRC calculation
11028 enable</description>
11029 <bitOffset>13</bitOffset>
11030 <bitWidth>1</bitWidth>
11031 </field>
11032 <field>
11033 <name>CRCNEXT</name>
11034 <description>CRC transfer next</description>
11035 <bitOffset>12</bitOffset>
11036 <bitWidth>1</bitWidth>
11037 </field>
11038 <field>
11039 <name>CRCL</name>
11040 <description>CRC length</description>
11041 <bitOffset>11</bitOffset>
11042 <bitWidth>1</bitWidth>
11043 </field>
11044 <field>
11045 <name>RXONLY</name>
11046 <description>Receive only</description>
11047 <bitOffset>10</bitOffset>
11048 <bitWidth>1</bitWidth>
11049 </field>
11050 <field>
11051 <name>SSM</name>
11052 <description>Software slave management</description>
11053 <bitOffset>9</bitOffset>
11054 <bitWidth>1</bitWidth>
11055 </field>
11056 <field>
11057 <name>SSI</name>
11058 <description>Internal slave select</description>
11059 <bitOffset>8</bitOffset>
11060 <bitWidth>1</bitWidth>
11061 </field>
11062 <field>
11063 <name>LSBFIRST</name>
11064 <description>Frame format</description>
11065 <bitOffset>7</bitOffset>
11066 <bitWidth>1</bitWidth>
11067 </field>
11068 <field>
11069 <name>SPE</name>
11070 <description>SPI enable</description>
11071 <bitOffset>6</bitOffset>
11072 <bitWidth>1</bitWidth>
11073 </field>
11074 <field>
11075 <name>BR</name>
11076 <description>Baud rate control</description>
11077 <bitOffset>3</bitOffset>
11078 <bitWidth>3</bitWidth>
11079 </field>
11080 <field>
11081 <name>MSTR</name>
11082 <description>Master selection</description>
11083 <bitOffset>2</bitOffset>
11084 <bitWidth>1</bitWidth>
11085 </field>
11086 <field>
11087 <name>CPOL</name>
11088 <description>Clock polarity</description>
11089 <bitOffset>1</bitOffset>
11090 <bitWidth>1</bitWidth>
11091 </field>
11092 <field>
11093 <name>CPHA</name>
11094 <description>Clock phase</description>
11095 <bitOffset>0</bitOffset>
11096 <bitWidth>1</bitWidth>
11097 </field>
11098 </fields>
11099 </register>
11100 <register>
11101 <name>CR2</name>
11102 <displayName>CR2</displayName>
11103 <description>control register 2</description>
11104 <addressOffset>0x4</addressOffset>
11105 <size>0x20</size>
11106 <access>read-write</access>
11107 <resetValue>0x0000</resetValue>
11108 <fields>
11109 <field>
11110 <name>RXDMAEN</name>
11111 <description>Rx buffer DMA enable</description>
11112 <bitOffset>0</bitOffset>
11113 <bitWidth>1</bitWidth>
11114 </field>
11115 <field>
11116 <name>TXDMAEN</name>
11117 <description>Tx buffer DMA enable</description>
11118 <bitOffset>1</bitOffset>
11119 <bitWidth>1</bitWidth>
11120 </field>
11121 <field>
11122 <name>SSOE</name>
11123 <description>SS output enable</description>
11124 <bitOffset>2</bitOffset>
11125 <bitWidth>1</bitWidth>
11126 </field>
11127 <field>
11128 <name>NSSP</name>
11129 <description>NSS pulse management</description>
11130 <bitOffset>3</bitOffset>
11131 <bitWidth>1</bitWidth>
11132 </field>
11133 <field>
11134 <name>FRF</name>
11135 <description>Frame format</description>
11136 <bitOffset>4</bitOffset>
11137 <bitWidth>1</bitWidth>
11138 </field>
11139 <field>
11140 <name>ERRIE</name>
11141 <description>Error interrupt enable</description>
11142 <bitOffset>5</bitOffset>
11143 <bitWidth>1</bitWidth>
11144 </field>
11145 <field>
11146 <name>RXNEIE</name>
11147 <description>RX buffer not empty interrupt
11148 enable</description>
11149 <bitOffset>6</bitOffset>
11150 <bitWidth>1</bitWidth>
11151 </field>
11152 <field>
11153 <name>TXEIE</name>
11154 <description>Tx buffer empty interrupt
11155 enable</description>
11156 <bitOffset>7</bitOffset>
11157 <bitWidth>1</bitWidth>
11158 </field>
11159 <field>
11160 <name>DS</name>
11161 <description>Data size</description>
11162 <bitOffset>8</bitOffset>
11163 <bitWidth>4</bitWidth>
11164 </field>
11165 <field>
11166 <name>FRXTH</name>
11167 <description>FIFO reception threshold</description>
11168 <bitOffset>12</bitOffset>
11169 <bitWidth>1</bitWidth>
11170 </field>
11171 <field>
11172 <name>LDMA_RX</name>
11173 <description>Last DMA transfer for
11174 reception</description>
11175 <bitOffset>13</bitOffset>
11176 <bitWidth>1</bitWidth>
11177 </field>
11178 <field>
11179 <name>LDMA_TX</name>
11180 <description>Last DMA transfer for
11181 transmission</description>
11182 <bitOffset>14</bitOffset>
11183 <bitWidth>1</bitWidth>
11184 </field>
11185 </fields>
11186 </register>
11187 <register>
11188 <name>SR</name>
11189 <displayName>SR</displayName>
11190 <description>status register</description>
11191 <addressOffset>0x8</addressOffset>
11192 <size>0x20</size>
11193 <resetValue>0x0002</resetValue>
11194 <fields>
11195 <field>
11196 <name>RXNE</name>
11197 <description>Receive buffer not empty</description>
11198 <bitOffset>0</bitOffset>
11199 <bitWidth>1</bitWidth>
11200 <access>read-only</access>
11201 </field>
11202 <field>
11203 <name>TXE</name>
11204 <description>Transmit buffer empty</description>
11205 <bitOffset>1</bitOffset>
11206 <bitWidth>1</bitWidth>
11207 <access>read-only</access>
11208 </field>
11209 <field>
11210 <name>CHSIDE</name>
11211 <description>Channel side</description>
11212 <bitOffset>2</bitOffset>
11213 <bitWidth>1</bitWidth>
11214 <access>read-only</access>
11215 </field>
11216 <field>
11217 <name>UDR</name>
11218 <description>Underrun flag</description>
11219 <bitOffset>3</bitOffset>
11220 <bitWidth>1</bitWidth>
11221 <access>read-only</access>
11222 </field>
11223 <field>
11224 <name>CRCERR</name>
11225 <description>CRC error flag</description>
11226 <bitOffset>4</bitOffset>
11227 <bitWidth>1</bitWidth>
11228 <access>read-write</access>
11229 </field>
11230 <field>
11231 <name>MODF</name>
11232 <description>Mode fault</description>
11233 <bitOffset>5</bitOffset>
11234 <bitWidth>1</bitWidth>
11235 <access>read-only</access>
11236 </field>
11237 <field>
11238 <name>OVR</name>
11239 <description>Overrun flag</description>
11240 <bitOffset>6</bitOffset>
11241 <bitWidth>1</bitWidth>
11242 <access>read-only</access>
11243 </field>
11244 <field>
11245 <name>BSY</name>
11246 <description>Busy flag</description>
11247 <bitOffset>7</bitOffset>
11248 <bitWidth>1</bitWidth>
11249 <access>read-only</access>
11250 </field>
11251 <field>
11252 <name>TIFRFE</name>
11253 <description>TI frame format error</description>
11254 <bitOffset>8</bitOffset>
11255 <bitWidth>1</bitWidth>
11256 <access>read-only</access>
11257 </field>
11258 <field>
11259 <name>FRLVL</name>
11260 <description>FIFO reception level</description>
11261 <bitOffset>9</bitOffset>
11262 <bitWidth>2</bitWidth>
11263 <access>read-only</access>
11264 </field>
11265 <field>
11266 <name>FTLVL</name>
11267 <description>FIFO transmission level</description>
11268 <bitOffset>11</bitOffset>
11269 <bitWidth>2</bitWidth>
11270 <access>read-only</access>
11271 </field>
11272 </fields>
11273 </register>
11274 <register>
11275 <name>DR</name>
11276 <displayName>DR</displayName>
11277 <description>data register</description>
11278 <addressOffset>0xC</addressOffset>
11279 <size>0x20</size>
11280 <access>read-write</access>
11281 <resetValue>0x0000</resetValue>
11282 <fields>
11283 <field>
11284 <name>DR</name>
11285 <description>Data register</description>
11286 <bitOffset>0</bitOffset>
11287 <bitWidth>16</bitWidth>
11288 </field>
11289 </fields>
11290 </register>
11291 <register>
11292 <name>CRCPR</name>
11293 <displayName>CRCPR</displayName>
11294 <description>CRC polynomial register</description>
11295 <addressOffset>0x10</addressOffset>
11296 <size>0x20</size>
11297 <access>read-write</access>
11298 <resetValue>0x0007</resetValue>
11299 <fields>
11300 <field>
11301 <name>CRCPOLY</name>
11302 <description>CRC polynomial register</description>
11303 <bitOffset>0</bitOffset>
11304 <bitWidth>16</bitWidth>
11305 </field>
11306 </fields>
11307 </register>
11308 <register>
11309 <name>RXCRCR</name>
11310 <displayName>RXCRCR</displayName>
11311 <description>RX CRC register</description>
11312 <addressOffset>0x14</addressOffset>
11313 <size>0x20</size>
11314 <access>read-only</access>
11315 <resetValue>0x0000</resetValue>
11316 <fields>
11317 <field>
11318 <name>RxCRC</name>
11319 <description>Rx CRC register</description>
11320 <bitOffset>0</bitOffset>
11321 <bitWidth>16</bitWidth>
11322 </field>
11323 </fields>
11324 </register>
11325 <register>
11326 <name>TXCRCR</name>
11327 <displayName>TXCRCR</displayName>
11328 <description>TX CRC register</description>
11329 <addressOffset>0x18</addressOffset>
11330 <size>0x20</size>
11331 <access>read-only</access>
11332 <resetValue>0x0000</resetValue>
11333 <fields>
11334 <field>
11335 <name>TxCRC</name>
11336 <description>Tx CRC register</description>
11337 <bitOffset>0</bitOffset>
11338 <bitWidth>16</bitWidth>
11339 </field>
11340 </fields>
11341 </register>
11342 <register>
11343 <name>I2SCFGR</name>
11344 <displayName>I2SCFGR</displayName>
11345 <description>I2S configuration register</description>
11346 <addressOffset>0x1C</addressOffset>
11347 <size>0x20</size>
11348 <access>read-write</access>
11349 <resetValue>0x0000</resetValue>
11350 <fields>
11351 <field>
11352 <name>I2SMOD</name>
11353 <description>I2S mode selection</description>
11354 <bitOffset>11</bitOffset>
11355 <bitWidth>1</bitWidth>
11356 </field>
11357 <field>
11358 <name>I2SE</name>
11359 <description>I2S Enable</description>
11360 <bitOffset>10</bitOffset>
11361 <bitWidth>1</bitWidth>
11362 </field>
11363 <field>
11364 <name>I2SCFG</name>
11365 <description>I2S configuration mode</description>
11366 <bitOffset>8</bitOffset>
11367 <bitWidth>2</bitWidth>
11368 </field>
11369 <field>
11370 <name>PCMSYNC</name>
11371 <description>PCM frame synchronization</description>
11372 <bitOffset>7</bitOffset>
11373 <bitWidth>1</bitWidth>
11374 </field>
11375 <field>
11376 <name>I2SSTD</name>
11377 <description>I2S standard selection</description>
11378 <bitOffset>4</bitOffset>
11379 <bitWidth>2</bitWidth>
11380 </field>
11381 <field>
11382 <name>CKPOL</name>
11383 <description>Steady state clock
11384 polarity</description>
11385 <bitOffset>3</bitOffset>
11386 <bitWidth>1</bitWidth>
11387 </field>
11388 <field>
11389 <name>DATLEN</name>
11390 <description>Data length to be
11391 transferred</description>
11392 <bitOffset>1</bitOffset>
11393 <bitWidth>2</bitWidth>
11394 </field>
11395 <field>
11396 <name>CHLEN</name>
11397 <description>Channel length (number of bits per audio
11398 channel)</description>
11399 <bitOffset>0</bitOffset>
11400 <bitWidth>1</bitWidth>
11401 </field>
11402 </fields>
11403 </register>
11404 <register>
11405 <name>I2SPR</name>
11406 <displayName>I2SPR</displayName>
11407 <description>I2S prescaler register</description>
11408 <addressOffset>0x20</addressOffset>
11409 <size>0x20</size>
11410 <access>read-write</access>
11411 <resetValue>0x00000010</resetValue>
11412 <fields>
11413 <field>
11414 <name>MCKOE</name>
11415 <description>Master clock output enable</description>
11416 <bitOffset>9</bitOffset>
11417 <bitWidth>1</bitWidth>
11418 </field>
11419 <field>
11420 <name>ODD</name>
11421 <description>Odd factor for the
11422 prescaler</description>
11423 <bitOffset>8</bitOffset>
11424 <bitWidth>1</bitWidth>
11425 </field>
11426 <field>
11427 <name>I2SDIV</name>
11428 <description>I2S Linear prescaler</description>
11429 <bitOffset>0</bitOffset>
11430 <bitWidth>8</bitWidth>
11431 </field>
11432 </fields>
11433 </register>
11434 </registers>
11435 </peripheral>
11436 <peripheral derivedFrom="SPI1">
11437 <name>SPI2</name>
11438 <baseAddress>0x40003800</baseAddress>
11439 <interrupt>
11440 <name>SPI2</name>
11441 <description>SPI2 global interrupt</description>
11442 <value>36</value>
11443 </interrupt>
11444 </peripheral>
11445 <peripheral derivedFrom="SPI1">
11446 <name>SPI3</name>
11447 <baseAddress>0x40003C00</baseAddress>
11448 <interrupt>
11449 <name>SPI3</name>
11450 <description>SPI3 global interrupt</description>
11451 <value>51</value>
11452 </interrupt>
11453 </peripheral>
11454 <peripheral derivedFrom="SPI1">
11455 <name>I2S2ext</name>
11456 <baseAddress>0x40003400</baseAddress>
11457 </peripheral>
11458 <peripheral derivedFrom="SPI1">
11459 <name>I2S3ext</name>
11460 <baseAddress>0x40004000</baseAddress>
11461 </peripheral>
11462 <peripheral derivedFrom="SPI1">
11463 <name>SPI4</name>
11464 <baseAddress>0x40013C00</baseAddress>
11465 <interrupt>
11466 <name>SPI3</name>
11467 <description>SPI3 global interrupt</description>
11468 <value>51</value>
11469 </interrupt>
11470 <interrupt>
11471 <name>SPI4</name>
11472 <description>SPI4 Global interrupt</description>
11473 <value>84</value>
11474 </interrupt>
11475 </peripheral>
11476 <peripheral>
11477 <name>EXTI</name>
11478 <description>External interrupt/event
11479 controller</description>
11480 <groupName>EXTI</groupName>
11481 <baseAddress>0x40010400</baseAddress>
11482 <addressBlock>
11483 <offset>0x0</offset>
11484 <size>0x400</size>
11485 <usage>registers</usage>
11486 </addressBlock>
11487 <interrupt>
11488 <name>TAMP_STAMP</name>
11489 <description>Tamper and TimeStamp interrupts</description>
11490 <value>2</value>
11491 </interrupt>
11492 <interrupt>
11493 <name>EXTI0</name>
11494 <description>EXTI Line0 interrupt</description>
11495 <value>6</value>
11496 </interrupt>
11497 <interrupt>
11498 <name>EXTI1</name>
11499 <description>EXTI Line3 interrupt</description>
11500 <value>7</value>
11501 </interrupt>
11502 <interrupt>
11503 <name>EXTI2_TSC</name>
11504 <description>EXTI Line2 and Touch sensing
11505 interrupts</description>
11506 <value>8</value>
11507 </interrupt>
11508 <interrupt>
11509 <name>EXTI3</name>
11510 <description>EXTI Line3 interrupt</description>
11511 <value>9</value>
11512 </interrupt>
11513 <interrupt>
11514 <name>EXTI4</name>
11515 <description>EXTI Line4 interrupt</description>
11516 <value>10</value>
11517 </interrupt>
11518 <interrupt>
11519 <name>EXTI9_5</name>
11520 <description>EXTI Line5 to Line9 interrupts</description>
11521 <value>23</value>
11522 </interrupt>
11523 <interrupt>
11524 <name>I2C1_EV_EXTI23</name>
11525 <description>I2C1 event interrupt and EXTI Line23
11526 interrupt</description>
11527 <value>31</value>
11528 </interrupt>
11529 <interrupt>
11530 <name>USART1_EXTI25</name>
11531 <description>USART1 global interrupt and EXTI Line 25
11532 interrupt</description>
11533 <value>37</value>
11534 </interrupt>
11535 <interrupt>
11536 <name>USART2_EXTI26</name>
11537 <description>USART2 global interrupt and EXTI Line 26
11538 interrupt</description>
11539 <value>38</value>
11540 </interrupt>
11541 <interrupt>
11542 <name>USART3_EXTI28</name>
11543 <description>USART3 global interrupt and EXTI Line 28
11544 interrupt</description>
11545 <value>39</value>
11546 </interrupt>
11547 <interrupt>
11548 <name>EXTI15_10</name>
11549 <description>EXTI Line15 to Line10 interrupts</description>
11550 <value>40</value>
11551 </interrupt>
11552 <interrupt>
11553 <name>UART4_EXTI34</name>
11554 <description>UART4 global and EXTI Line 34
11555 interrupts</description>
11556 <value>52</value>
11557 </interrupt>
11558 <interrupt>
11559 <name>UART5_EXTI35</name>
11560 <description>UART5 global and EXTI Line 35
11561 interrupts</description>
11562 <value>53</value>
11563 </interrupt>
11564 <interrupt>
11565 <name>USB_WKUP_EXTI</name>
11566 <description>USB wakeup from Suspend and EXTI Line
11567 18</description>
11568 <value>76</value>
11569 </interrupt>
11570 <registers>
11571 <register>
11572 <name>IMR1</name>
11573 <displayName>IMR1</displayName>
11574 <description>Interrupt mask register</description>
11575 <addressOffset>0x0</addressOffset>
11576 <size>0x20</size>
11577 <access>read-write</access>
11578 <resetValue>0x1F800000</resetValue>
11579 <fields>
11580 <field>
11581 <name>MR0</name>
11582 <description>Interrupt Mask on line 0</description>
11583 <bitOffset>0</bitOffset>
11584 <bitWidth>1</bitWidth>
11585 </field>
11586 <field>
11587 <name>MR1</name>
11588 <description>Interrupt Mask on line 1</description>
11589 <bitOffset>1</bitOffset>
11590 <bitWidth>1</bitWidth>
11591 </field>
11592 <field>
11593 <name>MR2</name>
11594 <description>Interrupt Mask on line 2</description>
11595 <bitOffset>2</bitOffset>
11596 <bitWidth>1</bitWidth>
11597 </field>
11598 <field>
11599 <name>MR3</name>
11600 <description>Interrupt Mask on line 3</description>
11601 <bitOffset>3</bitOffset>
11602 <bitWidth>1</bitWidth>
11603 </field>
11604 <field>
11605 <name>MR4</name>
11606 <description>Interrupt Mask on line 4</description>
11607 <bitOffset>4</bitOffset>
11608 <bitWidth>1</bitWidth>
11609 </field>
11610 <field>
11611 <name>MR5</name>
11612 <description>Interrupt Mask on line 5</description>
11613 <bitOffset>5</bitOffset>
11614 <bitWidth>1</bitWidth>
11615 </field>
11616 <field>
11617 <name>MR6</name>
11618 <description>Interrupt Mask on line 6</description>
11619 <bitOffset>6</bitOffset>
11620 <bitWidth>1</bitWidth>
11621 </field>
11622 <field>
11623 <name>MR7</name>
11624 <description>Interrupt Mask on line 7</description>
11625 <bitOffset>7</bitOffset>
11626 <bitWidth>1</bitWidth>
11627 </field>
11628 <field>
11629 <name>MR8</name>
11630 <description>Interrupt Mask on line 8</description>
11631 <bitOffset>8</bitOffset>
11632 <bitWidth>1</bitWidth>
11633 </field>
11634 <field>
11635 <name>MR9</name>
11636 <description>Interrupt Mask on line 9</description>
11637 <bitOffset>9</bitOffset>
11638 <bitWidth>1</bitWidth>
11639 </field>
11640 <field>
11641 <name>MR10</name>
11642 <description>Interrupt Mask on line 10</description>
11643 <bitOffset>10</bitOffset>
11644 <bitWidth>1</bitWidth>
11645 </field>
11646 <field>
11647 <name>MR11</name>
11648 <description>Interrupt Mask on line 11</description>
11649 <bitOffset>11</bitOffset>
11650 <bitWidth>1</bitWidth>
11651 </field>
11652 <field>
11653 <name>MR12</name>
11654 <description>Interrupt Mask on line 12</description>
11655 <bitOffset>12</bitOffset>
11656 <bitWidth>1</bitWidth>
11657 </field>
11658 <field>
11659 <name>MR13</name>
11660 <description>Interrupt Mask on line 13</description>
11661 <bitOffset>13</bitOffset>
11662 <bitWidth>1</bitWidth>
11663 </field>
11664 <field>
11665 <name>MR14</name>
11666 <description>Interrupt Mask on line 14</description>
11667 <bitOffset>14</bitOffset>
11668 <bitWidth>1</bitWidth>
11669 </field>
11670 <field>
11671 <name>MR15</name>
11672 <description>Interrupt Mask on line 15</description>
11673 <bitOffset>15</bitOffset>
11674 <bitWidth>1</bitWidth>
11675 </field>
11676 <field>
11677 <name>MR16</name>
11678 <description>Interrupt Mask on line 16</description>
11679 <bitOffset>16</bitOffset>
11680 <bitWidth>1</bitWidth>
11681 </field>
11682 <field>
11683 <name>MR17</name>
11684 <description>Interrupt Mask on line 17</description>
11685 <bitOffset>17</bitOffset>
11686 <bitWidth>1</bitWidth>
11687 </field>
11688 <field>
11689 <name>MR18</name>
11690 <description>Interrupt Mask on line 18</description>
11691 <bitOffset>18</bitOffset>
11692 <bitWidth>1</bitWidth>
11693 </field>
11694 <field>
11695 <name>MR19</name>
11696 <description>Interrupt Mask on line 19</description>
11697 <bitOffset>19</bitOffset>
11698 <bitWidth>1</bitWidth>
11699 </field>
11700 <field>
11701 <name>MR20</name>
11702 <description>Interrupt Mask on line 20</description>
11703 <bitOffset>20</bitOffset>
11704 <bitWidth>1</bitWidth>
11705 </field>
11706 <field>
11707 <name>MR21</name>
11708 <description>Interrupt Mask on line 21</description>
11709 <bitOffset>21</bitOffset>
11710 <bitWidth>1</bitWidth>
11711 </field>
11712 <field>
11713 <name>MR22</name>
11714 <description>Interrupt Mask on line 22</description>
11715 <bitOffset>22</bitOffset>
11716 <bitWidth>1</bitWidth>
11717 </field>
11718 <field>
11719 <name>MR23</name>
11720 <description>Interrupt Mask on line 23</description>
11721 <bitOffset>23</bitOffset>
11722 <bitWidth>1</bitWidth>
11723 </field>
11724 <field>
11725 <name>MR24</name>
11726 <description>Interrupt Mask on line 24</description>
11727 <bitOffset>24</bitOffset>
11728 <bitWidth>1</bitWidth>
11729 </field>
11730 <field>
11731 <name>MR25</name>
11732 <description>Interrupt Mask on line 25</description>
11733 <bitOffset>25</bitOffset>
11734 <bitWidth>1</bitWidth>
11735 </field>
11736 <field>
11737 <name>MR26</name>
11738 <description>Interrupt Mask on line 26</description>
11739 <bitOffset>26</bitOffset>
11740 <bitWidth>1</bitWidth>
11741 </field>
11742 <field>
11743 <name>MR27</name>
11744 <description>Interrupt Mask on line 27</description>
11745 <bitOffset>27</bitOffset>
11746 <bitWidth>1</bitWidth>
11747 </field>
11748 <field>
11749 <name>MR28</name>
11750 <description>Interrupt Mask on line 28</description>
11751 <bitOffset>28</bitOffset>
11752 <bitWidth>1</bitWidth>
11753 </field>
11754 <field>
11755 <name>MR29</name>
11756 <description>Interrupt Mask on line 29</description>
11757 <bitOffset>29</bitOffset>
11758 <bitWidth>1</bitWidth>
11759 </field>
11760 <field>
11761 <name>MR30</name>
11762 <description>Interrupt Mask on line 30</description>
11763 <bitOffset>30</bitOffset>
11764 <bitWidth>1</bitWidth>
11765 </field>
11766 <field>
11767 <name>MR31</name>
11768 <description>Interrupt Mask on line 31</description>
11769 <bitOffset>31</bitOffset>
11770 <bitWidth>1</bitWidth>
11771 </field>
11772 </fields>
11773 </register>
11774 <register>
11775 <name>EMR1</name>
11776 <displayName>EMR1</displayName>
11777 <description>Event mask register</description>
11778 <addressOffset>0x4</addressOffset>
11779 <size>0x20</size>
11780 <access>read-write</access>
11781 <resetValue>0x00000000</resetValue>
11782 <fields>
11783 <field>
11784 <name>MR0</name>
11785 <description>Event Mask on line 0</description>
11786 <bitOffset>0</bitOffset>
11787 <bitWidth>1</bitWidth>
11788 </field>
11789 <field>
11790 <name>MR1</name>
11791 <description>Event Mask on line 1</description>
11792 <bitOffset>1</bitOffset>
11793 <bitWidth>1</bitWidth>
11794 </field>
11795 <field>
11796 <name>MR2</name>
11797 <description>Event Mask on line 2</description>
11798 <bitOffset>2</bitOffset>
11799 <bitWidth>1</bitWidth>
11800 </field>
11801 <field>
11802 <name>MR3</name>
11803 <description>Event Mask on line 3</description>
11804 <bitOffset>3</bitOffset>
11805 <bitWidth>1</bitWidth>
11806 </field>
11807 <field>
11808 <name>MR4</name>
11809 <description>Event Mask on line 4</description>
11810 <bitOffset>4</bitOffset>
11811 <bitWidth>1</bitWidth>
11812 </field>
11813 <field>
11814 <name>MR5</name>
11815 <description>Event Mask on line 5</description>
11816 <bitOffset>5</bitOffset>
11817 <bitWidth>1</bitWidth>
11818 </field>
11819 <field>
11820 <name>MR6</name>
11821 <description>Event Mask on line 6</description>
11822 <bitOffset>6</bitOffset>
11823 <bitWidth>1</bitWidth>
11824 </field>
11825 <field>
11826 <name>MR7</name>
11827 <description>Event Mask on line 7</description>
11828 <bitOffset>7</bitOffset>
11829 <bitWidth>1</bitWidth>
11830 </field>
11831 <field>
11832 <name>MR8</name>
11833 <description>Event Mask on line 8</description>
11834 <bitOffset>8</bitOffset>
11835 <bitWidth>1</bitWidth>
11836 </field>
11837 <field>
11838 <name>MR9</name>
11839 <description>Event Mask on line 9</description>
11840 <bitOffset>9</bitOffset>
11841 <bitWidth>1</bitWidth>
11842 </field>
11843 <field>
11844 <name>MR10</name>
11845 <description>Event Mask on line 10</description>
11846 <bitOffset>10</bitOffset>
11847 <bitWidth>1</bitWidth>
11848 </field>
11849 <field>
11850 <name>MR11</name>
11851 <description>Event Mask on line 11</description>
11852 <bitOffset>11</bitOffset>
11853 <bitWidth>1</bitWidth>
11854 </field>
11855 <field>
11856 <name>MR12</name>
11857 <description>Event Mask on line 12</description>
11858 <bitOffset>12</bitOffset>
11859 <bitWidth>1</bitWidth>
11860 </field>
11861 <field>
11862 <name>MR13</name>
11863 <description>Event Mask on line 13</description>
11864 <bitOffset>13</bitOffset>
11865 <bitWidth>1</bitWidth>
11866 </field>
11867 <field>
11868 <name>MR14</name>
11869 <description>Event Mask on line 14</description>
11870 <bitOffset>14</bitOffset>
11871 <bitWidth>1</bitWidth>
11872 </field>
11873 <field>
11874 <name>MR15</name>
11875 <description>Event Mask on line 15</description>
11876 <bitOffset>15</bitOffset>
11877 <bitWidth>1</bitWidth>
11878 </field>
11879 <field>
11880 <name>MR16</name>
11881 <description>Event Mask on line 16</description>
11882 <bitOffset>16</bitOffset>
11883 <bitWidth>1</bitWidth>
11884 </field>
11885 <field>
11886 <name>MR17</name>
11887 <description>Event Mask on line 17</description>
11888 <bitOffset>17</bitOffset>
11889 <bitWidth>1</bitWidth>
11890 </field>
11891 <field>
11892 <name>MR18</name>
11893 <description>Event Mask on line 18</description>
11894 <bitOffset>18</bitOffset>
11895 <bitWidth>1</bitWidth>
11896 </field>
11897 <field>
11898 <name>MR19</name>
11899 <description>Event Mask on line 19</description>
11900 <bitOffset>19</bitOffset>
11901 <bitWidth>1</bitWidth>
11902 </field>
11903 <field>
11904 <name>MR20</name>
11905 <description>Event Mask on line 20</description>
11906 <bitOffset>20</bitOffset>
11907 <bitWidth>1</bitWidth>
11908 </field>
11909 <field>
11910 <name>MR21</name>
11911 <description>Event Mask on line 21</description>
11912 <bitOffset>21</bitOffset>
11913 <bitWidth>1</bitWidth>
11914 </field>
11915 <field>
11916 <name>MR22</name>
11917 <description>Event Mask on line 22</description>
11918 <bitOffset>22</bitOffset>
11919 <bitWidth>1</bitWidth>
11920 </field>
11921 <field>
11922 <name>MR23</name>
11923 <description>Event Mask on line 23</description>
11924 <bitOffset>23</bitOffset>
11925 <bitWidth>1</bitWidth>
11926 </field>
11927 <field>
11928 <name>MR24</name>
11929 <description>Event Mask on line 24</description>
11930 <bitOffset>24</bitOffset>
11931 <bitWidth>1</bitWidth>
11932 </field>
11933 <field>
11934 <name>MR25</name>
11935 <description>Event Mask on line 25</description>
11936 <bitOffset>25</bitOffset>
11937 <bitWidth>1</bitWidth>
11938 </field>
11939 <field>
11940 <name>MR26</name>
11941 <description>Event Mask on line 26</description>
11942 <bitOffset>26</bitOffset>
11943 <bitWidth>1</bitWidth>
11944 </field>
11945 <field>
11946 <name>MR27</name>
11947 <description>Event Mask on line 27</description>
11948 <bitOffset>27</bitOffset>
11949 <bitWidth>1</bitWidth>
11950 </field>
11951 <field>
11952 <name>MR28</name>
11953 <description>Event Mask on line 28</description>
11954 <bitOffset>28</bitOffset>
11955 <bitWidth>1</bitWidth>
11956 </field>
11957 <field>
11958 <name>MR29</name>
11959 <description>Event Mask on line 29</description>
11960 <bitOffset>29</bitOffset>
11961 <bitWidth>1</bitWidth>
11962 </field>
11963 <field>
11964 <name>MR30</name>
11965 <description>Event Mask on line 30</description>
11966 <bitOffset>30</bitOffset>
11967 <bitWidth>1</bitWidth>
11968 </field>
11969 <field>
11970 <name>MR31</name>
11971 <description>Event Mask on line 31</description>
11972 <bitOffset>31</bitOffset>
11973 <bitWidth>1</bitWidth>
11974 </field>
11975 </fields>
11976 </register>
11977 <register>
11978 <name>RTSR1</name>
11979 <displayName>RTSR1</displayName>
11980 <description>Rising Trigger selection
11981 register</description>
11982 <addressOffset>0x8</addressOffset>
11983 <size>0x20</size>
11984 <access>read-write</access>
11985 <resetValue>0x00000000</resetValue>
11986 <fields>
11987 <field>
11988 <name>TR0</name>
11989 <description>Rising trigger event configuration of
11990 line 0</description>
11991 <bitOffset>0</bitOffset>
11992 <bitWidth>1</bitWidth>
11993 </field>
11994 <field>
11995 <name>TR1</name>
11996 <description>Rising trigger event configuration of
11997 line 1</description>
11998 <bitOffset>1</bitOffset>
11999 <bitWidth>1</bitWidth>
12000 </field>
12001 <field>
12002 <name>TR2</name>
12003 <description>Rising trigger event configuration of
12004 line 2</description>
12005 <bitOffset>2</bitOffset>
12006 <bitWidth>1</bitWidth>
12007 </field>
12008 <field>
12009 <name>TR3</name>
12010 <description>Rising trigger event configuration of
12011 line 3</description>
12012 <bitOffset>3</bitOffset>
12013 <bitWidth>1</bitWidth>
12014 </field>
12015 <field>
12016 <name>TR4</name>
12017 <description>Rising trigger event configuration of
12018 line 4</description>
12019 <bitOffset>4</bitOffset>
12020 <bitWidth>1</bitWidth>
12021 </field>
12022 <field>
12023 <name>TR5</name>
12024 <description>Rising trigger event configuration of
12025 line 5</description>
12026 <bitOffset>5</bitOffset>
12027 <bitWidth>1</bitWidth>
12028 </field>
12029 <field>
12030 <name>TR6</name>
12031 <description>Rising trigger event configuration of
12032 line 6</description>
12033 <bitOffset>6</bitOffset>
12034 <bitWidth>1</bitWidth>
12035 </field>
12036 <field>
12037 <name>TR7</name>
12038 <description>Rising trigger event configuration of
12039 line 7</description>
12040 <bitOffset>7</bitOffset>
12041 <bitWidth>1</bitWidth>
12042 </field>
12043 <field>
12044 <name>TR8</name>
12045 <description>Rising trigger event configuration of
12046 line 8</description>
12047 <bitOffset>8</bitOffset>
12048 <bitWidth>1</bitWidth>
12049 </field>
12050 <field>
12051 <name>TR9</name>
12052 <description>Rising trigger event configuration of
12053 line 9</description>
12054 <bitOffset>9</bitOffset>
12055 <bitWidth>1</bitWidth>
12056 </field>
12057 <field>
12058 <name>TR10</name>
12059 <description>Rising trigger event configuration of
12060 line 10</description>
12061 <bitOffset>10</bitOffset>
12062 <bitWidth>1</bitWidth>
12063 </field>
12064 <field>
12065 <name>TR11</name>
12066 <description>Rising trigger event configuration of
12067 line 11</description>
12068 <bitOffset>11</bitOffset>
12069 <bitWidth>1</bitWidth>
12070 </field>
12071 <field>
12072 <name>TR12</name>
12073 <description>Rising trigger event configuration of
12074 line 12</description>
12075 <bitOffset>12</bitOffset>
12076 <bitWidth>1</bitWidth>
12077 </field>
12078 <field>
12079 <name>TR13</name>
12080 <description>Rising trigger event configuration of
12081 line 13</description>
12082 <bitOffset>13</bitOffset>
12083 <bitWidth>1</bitWidth>
12084 </field>
12085 <field>
12086 <name>TR14</name>
12087 <description>Rising trigger event configuration of
12088 line 14</description>
12089 <bitOffset>14</bitOffset>
12090 <bitWidth>1</bitWidth>
12091 </field>
12092 <field>
12093 <name>TR15</name>
12094 <description>Rising trigger event configuration of
12095 line 15</description>
12096 <bitOffset>15</bitOffset>
12097 <bitWidth>1</bitWidth>
12098 </field>
12099 <field>
12100 <name>TR16</name>
12101 <description>Rising trigger event configuration of
12102 line 16</description>
12103 <bitOffset>16</bitOffset>
12104 <bitWidth>1</bitWidth>
12105 </field>
12106 <field>
12107 <name>TR17</name>
12108 <description>Rising trigger event configuration of
12109 line 17</description>
12110 <bitOffset>17</bitOffset>
12111 <bitWidth>1</bitWidth>
12112 </field>
12113 <field>
12114 <name>TR18</name>
12115 <description>Rising trigger event configuration of
12116 line 18</description>
12117 <bitOffset>18</bitOffset>
12118 <bitWidth>1</bitWidth>
12119 </field>
12120 <field>
12121 <name>TR19</name>
12122 <description>Rising trigger event configuration of
12123 line 19</description>
12124 <bitOffset>19</bitOffset>
12125 <bitWidth>1</bitWidth>
12126 </field>
12127 <field>
12128 <name>TR20</name>
12129 <description>Rising trigger event configuration of
12130 line 20</description>
12131 <bitOffset>20</bitOffset>
12132 <bitWidth>1</bitWidth>
12133 </field>
12134 <field>
12135 <name>TR21</name>
12136 <description>Rising trigger event configuration of
12137 line 21</description>
12138 <bitOffset>21</bitOffset>
12139 <bitWidth>1</bitWidth>
12140 </field>
12141 <field>
12142 <name>TR22</name>
12143 <description>Rising trigger event configuration of
12144 line 22</description>
12145 <bitOffset>22</bitOffset>
12146 <bitWidth>1</bitWidth>
12147 </field>
12148 <field>
12149 <name>TR29</name>
12150 <description>Rising trigger event configuration of
12151 line 29</description>
12152 <bitOffset>29</bitOffset>
12153 <bitWidth>1</bitWidth>
12154 </field>
12155 <field>
12156 <name>TR30</name>
12157 <description>Rising trigger event configuration of
12158 line 30</description>
12159 <bitOffset>30</bitOffset>
12160 <bitWidth>1</bitWidth>
12161 </field>
12162 <field>
12163 <name>TR31</name>
12164 <description>Rising trigger event configuration of
12165 line 31</description>
12166 <bitOffset>31</bitOffset>
12167 <bitWidth>1</bitWidth>
12168 </field>
12169 </fields>
12170 </register>
12171 <register>
12172 <name>FTSR1</name>
12173 <displayName>FTSR1</displayName>
12174 <description>Falling Trigger selection
12175 register</description>
12176 <addressOffset>0xC</addressOffset>
12177 <size>0x20</size>
12178 <access>read-write</access>
12179 <resetValue>0x00000000</resetValue>
12180 <fields>
12181 <field>
12182 <name>TR0</name>
12183 <description>Falling trigger event configuration of
12184 line 0</description>
12185 <bitOffset>0</bitOffset>
12186 <bitWidth>1</bitWidth>
12187 </field>
12188 <field>
12189 <name>TR1</name>
12190 <description>Falling trigger event configuration of
12191 line 1</description>
12192 <bitOffset>1</bitOffset>
12193 <bitWidth>1</bitWidth>
12194 </field>
12195 <field>
12196 <name>TR2</name>
12197 <description>Falling trigger event configuration of
12198 line 2</description>
12199 <bitOffset>2</bitOffset>
12200 <bitWidth>1</bitWidth>
12201 </field>
12202 <field>
12203 <name>TR3</name>
12204 <description>Falling trigger event configuration of
12205 line 3</description>
12206 <bitOffset>3</bitOffset>
12207 <bitWidth>1</bitWidth>
12208 </field>
12209 <field>
12210 <name>TR4</name>
12211 <description>Falling trigger event configuration of
12212 line 4</description>
12213 <bitOffset>4</bitOffset>
12214 <bitWidth>1</bitWidth>
12215 </field>
12216 <field>
12217 <name>TR5</name>
12218 <description>Falling trigger event configuration of
12219 line 5</description>
12220 <bitOffset>5</bitOffset>
12221 <bitWidth>1</bitWidth>
12222 </field>
12223 <field>
12224 <name>TR6</name>
12225 <description>Falling trigger event configuration of
12226 line 6</description>
12227 <bitOffset>6</bitOffset>
12228 <bitWidth>1</bitWidth>
12229 </field>
12230 <field>
12231 <name>TR7</name>
12232 <description>Falling trigger event configuration of
12233 line 7</description>
12234 <bitOffset>7</bitOffset>
12235 <bitWidth>1</bitWidth>
12236 </field>
12237 <field>
12238 <name>TR8</name>
12239 <description>Falling trigger event configuration of
12240 line 8</description>
12241 <bitOffset>8</bitOffset>
12242 <bitWidth>1</bitWidth>
12243 </field>
12244 <field>
12245 <name>TR9</name>
12246 <description>Falling trigger event configuration of
12247 line 9</description>
12248 <bitOffset>9</bitOffset>
12249 <bitWidth>1</bitWidth>
12250 </field>
12251 <field>
12252 <name>TR10</name>
12253 <description>Falling trigger event configuration of
12254 line 10</description>
12255 <bitOffset>10</bitOffset>
12256 <bitWidth>1</bitWidth>
12257 </field>
12258 <field>
12259 <name>TR11</name>
12260 <description>Falling trigger event configuration of
12261 line 11</description>
12262 <bitOffset>11</bitOffset>
12263 <bitWidth>1</bitWidth>
12264 </field>
12265 <field>
12266 <name>TR12</name>
12267 <description>Falling trigger event configuration of
12268 line 12</description>
12269 <bitOffset>12</bitOffset>
12270 <bitWidth>1</bitWidth>
12271 </field>
12272 <field>
12273 <name>TR13</name>
12274 <description>Falling trigger event configuration of
12275 line 13</description>
12276 <bitOffset>13</bitOffset>
12277 <bitWidth>1</bitWidth>
12278 </field>
12279 <field>
12280 <name>TR14</name>
12281 <description>Falling trigger event configuration of
12282 line 14</description>
12283 <bitOffset>14</bitOffset>
12284 <bitWidth>1</bitWidth>
12285 </field>
12286 <field>
12287 <name>TR15</name>
12288 <description>Falling trigger event configuration of
12289 line 15</description>
12290 <bitOffset>15</bitOffset>
12291 <bitWidth>1</bitWidth>
12292 </field>
12293 <field>
12294 <name>TR16</name>
12295 <description>Falling trigger event configuration of
12296 line 16</description>
12297 <bitOffset>16</bitOffset>
12298 <bitWidth>1</bitWidth>
12299 </field>
12300 <field>
12301 <name>TR17</name>
12302 <description>Falling trigger event configuration of
12303 line 17</description>
12304 <bitOffset>17</bitOffset>
12305 <bitWidth>1</bitWidth>
12306 </field>
12307 <field>
12308 <name>TR18</name>
12309 <description>Falling trigger event configuration of
12310 line 18</description>
12311 <bitOffset>18</bitOffset>
12312 <bitWidth>1</bitWidth>
12313 </field>
12314 <field>
12315 <name>TR19</name>
12316 <description>Falling trigger event configuration of
12317 line 19</description>
12318 <bitOffset>19</bitOffset>
12319 <bitWidth>1</bitWidth>
12320 </field>
12321 <field>
12322 <name>TR20</name>
12323 <description>Falling trigger event configuration of
12324 line 20</description>
12325 <bitOffset>20</bitOffset>
12326 <bitWidth>1</bitWidth>
12327 </field>
12328 <field>
12329 <name>TR21</name>
12330 <description>Falling trigger event configuration of
12331 line 21</description>
12332 <bitOffset>21</bitOffset>
12333 <bitWidth>1</bitWidth>
12334 </field>
12335 <field>
12336 <name>TR22</name>
12337 <description>Falling trigger event configuration of
12338 line 22</description>
12339 <bitOffset>22</bitOffset>
12340 <bitWidth>1</bitWidth>
12341 </field>
12342 <field>
12343 <name>TR29</name>
12344 <description>Falling trigger event configuration of
12345 line 29</description>
12346 <bitOffset>29</bitOffset>
12347 <bitWidth>1</bitWidth>
12348 </field>
12349 <field>
12350 <name>TR30</name>
12351 <description>Falling trigger event configuration of
12352 line 30.</description>
12353 <bitOffset>30</bitOffset>
12354 <bitWidth>1</bitWidth>
12355 </field>
12356 <field>
12357 <name>TR31</name>
12358 <description>Falling trigger event configuration of
12359 line 31</description>
12360 <bitOffset>31</bitOffset>
12361 <bitWidth>1</bitWidth>
12362 </field>
12363 </fields>
12364 </register>
12365 <register>
12366 <name>SWIER1</name>
12367 <displayName>SWIER1</displayName>
12368 <description>Software interrupt event
12369 register</description>
12370 <addressOffset>0x10</addressOffset>
12371 <size>0x20</size>
12372 <access>read-write</access>
12373 <resetValue>0x00000000</resetValue>
12374 <fields>
12375 <field>
12376 <name>SWIER0</name>
12377 <description>Software Interrupt on line
12378 0</description>
12379 <bitOffset>0</bitOffset>
12380 <bitWidth>1</bitWidth>
12381 </field>
12382 <field>
12383 <name>SWIER1</name>
12384 <description>Software Interrupt on line
12385 1</description>
12386 <bitOffset>1</bitOffset>
12387 <bitWidth>1</bitWidth>
12388 </field>
12389 <field>
12390 <name>SWIER2</name>
12391 <description>Software Interrupt on line
12392 2</description>
12393 <bitOffset>2</bitOffset>
12394 <bitWidth>1</bitWidth>
12395 </field>
12396 <field>
12397 <name>SWIER3</name>
12398 <description>Software Interrupt on line
12399 3</description>
12400 <bitOffset>3</bitOffset>
12401 <bitWidth>1</bitWidth>
12402 </field>
12403 <field>
12404 <name>SWIER4</name>
12405 <description>Software Interrupt on line
12406 4</description>
12407 <bitOffset>4</bitOffset>
12408 <bitWidth>1</bitWidth>
12409 </field>
12410 <field>
12411 <name>SWIER5</name>
12412 <description>Software Interrupt on line
12413 5</description>
12414 <bitOffset>5</bitOffset>
12415 <bitWidth>1</bitWidth>
12416 </field>
12417 <field>
12418 <name>SWIER6</name>
12419 <description>Software Interrupt on line
12420 6</description>
12421 <bitOffset>6</bitOffset>
12422 <bitWidth>1</bitWidth>
12423 </field>
12424 <field>
12425 <name>SWIER7</name>
12426 <description>Software Interrupt on line
12427 7</description>
12428 <bitOffset>7</bitOffset>
12429 <bitWidth>1</bitWidth>
12430 </field>
12431 <field>
12432 <name>SWIER8</name>
12433 <description>Software Interrupt on line
12434 8</description>
12435 <bitOffset>8</bitOffset>
12436 <bitWidth>1</bitWidth>
12437 </field>
12438 <field>
12439 <name>SWIER9</name>
12440 <description>Software Interrupt on line
12441 9</description>
12442 <bitOffset>9</bitOffset>
12443 <bitWidth>1</bitWidth>
12444 </field>
12445 <field>
12446 <name>SWIER10</name>
12447 <description>Software Interrupt on line
12448 10</description>
12449 <bitOffset>10</bitOffset>
12450 <bitWidth>1</bitWidth>
12451 </field>
12452 <field>
12453 <name>SWIER11</name>
12454 <description>Software Interrupt on line
12455 11</description>
12456 <bitOffset>11</bitOffset>
12457 <bitWidth>1</bitWidth>
12458 </field>
12459 <field>
12460 <name>SWIER12</name>
12461 <description>Software Interrupt on line
12462 12</description>
12463 <bitOffset>12</bitOffset>
12464 <bitWidth>1</bitWidth>
12465 </field>
12466 <field>
12467 <name>SWIER13</name>
12468 <description>Software Interrupt on line
12469 13</description>
12470 <bitOffset>13</bitOffset>
12471 <bitWidth>1</bitWidth>
12472 </field>
12473 <field>
12474 <name>SWIER14</name>
12475 <description>Software Interrupt on line
12476 14</description>
12477 <bitOffset>14</bitOffset>
12478 <bitWidth>1</bitWidth>
12479 </field>
12480 <field>
12481 <name>SWIER15</name>
12482 <description>Software Interrupt on line
12483 15</description>
12484 <bitOffset>15</bitOffset>
12485 <bitWidth>1</bitWidth>
12486 </field>
12487 <field>
12488 <name>SWIER16</name>
12489 <description>Software Interrupt on line
12490 16</description>
12491 <bitOffset>16</bitOffset>
12492 <bitWidth>1</bitWidth>
12493 </field>
12494 <field>
12495 <name>SWIER17</name>
12496 <description>Software Interrupt on line
12497 17</description>
12498 <bitOffset>17</bitOffset>
12499 <bitWidth>1</bitWidth>
12500 </field>
12501 <field>
12502 <name>SWIER18</name>
12503 <description>Software Interrupt on line
12504 18</description>
12505 <bitOffset>18</bitOffset>
12506 <bitWidth>1</bitWidth>
12507 </field>
12508 <field>
12509 <name>SWIER19</name>
12510 <description>Software Interrupt on line
12511 19</description>
12512 <bitOffset>19</bitOffset>
12513 <bitWidth>1</bitWidth>
12514 </field>
12515 <field>
12516 <name>SWIER20</name>
12517 <description>Software Interrupt on line
12518 20</description>
12519 <bitOffset>20</bitOffset>
12520 <bitWidth>1</bitWidth>
12521 </field>
12522 <field>
12523 <name>SWIER21</name>
12524 <description>Software Interrupt on line
12525 21</description>
12526 <bitOffset>21</bitOffset>
12527 <bitWidth>1</bitWidth>
12528 </field>
12529 <field>
12530 <name>SWIER22</name>
12531 <description>Software Interrupt on line
12532 22</description>
12533 <bitOffset>22</bitOffset>
12534 <bitWidth>1</bitWidth>
12535 </field>
12536 <field>
12537 <name>SWIER29</name>
12538 <description>Software Interrupt on line
12539 29</description>
12540 <bitOffset>29</bitOffset>
12541 <bitWidth>1</bitWidth>
12542 </field>
12543 <field>
12544 <name>SWIER30</name>
12545 <description>Software Interrupt on line
12546 309</description>
12547 <bitOffset>30</bitOffset>
12548 <bitWidth>1</bitWidth>
12549 </field>
12550 <field>
12551 <name>SWIER31</name>
12552 <description>Software Interrupt on line
12553 319</description>
12554 <bitOffset>31</bitOffset>
12555 <bitWidth>1</bitWidth>
12556 </field>
12557 </fields>
12558 </register>
12559 <register>
12560 <name>PR1</name>
12561 <displayName>PR1</displayName>
12562 <description>Pending register</description>
12563 <addressOffset>0x14</addressOffset>
12564 <size>0x20</size>
12565 <access>read-write</access>
12566 <resetValue>0x00000000</resetValue>
12567 <fields>
12568 <field>
12569 <name>PR0</name>
12570 <description>Pending bit 0</description>
12571 <bitOffset>0</bitOffset>
12572 <bitWidth>1</bitWidth>
12573 </field>
12574 <field>
12575 <name>PR1</name>
12576 <description>Pending bit 1</description>
12577 <bitOffset>1</bitOffset>
12578 <bitWidth>1</bitWidth>
12579 </field>
12580 <field>
12581 <name>PR2</name>
12582 <description>Pending bit 2</description>
12583 <bitOffset>2</bitOffset>
12584 <bitWidth>1</bitWidth>
12585 </field>
12586 <field>
12587 <name>PR3</name>
12588 <description>Pending bit 3</description>
12589 <bitOffset>3</bitOffset>
12590 <bitWidth>1</bitWidth>
12591 </field>
12592 <field>
12593 <name>PR4</name>
12594 <description>Pending bit 4</description>
12595 <bitOffset>4</bitOffset>
12596 <bitWidth>1</bitWidth>
12597 </field>
12598 <field>
12599 <name>PR5</name>
12600 <description>Pending bit 5</description>
12601 <bitOffset>5</bitOffset>
12602 <bitWidth>1</bitWidth>
12603 </field>
12604 <field>
12605 <name>PR6</name>
12606 <description>Pending bit 6</description>
12607 <bitOffset>6</bitOffset>
12608 <bitWidth>1</bitWidth>
12609 </field>
12610 <field>
12611 <name>PR7</name>
12612 <description>Pending bit 7</description>
12613 <bitOffset>7</bitOffset>
12614 <bitWidth>1</bitWidth>
12615 </field>
12616 <field>
12617 <name>PR8</name>
12618 <description>Pending bit 8</description>
12619 <bitOffset>8</bitOffset>
12620 <bitWidth>1</bitWidth>
12621 </field>
12622 <field>
12623 <name>PR9</name>
12624 <description>Pending bit 9</description>
12625 <bitOffset>9</bitOffset>
12626 <bitWidth>1</bitWidth>
12627 </field>
12628 <field>
12629 <name>PR10</name>
12630 <description>Pending bit 10</description>
12631 <bitOffset>10</bitOffset>
12632 <bitWidth>1</bitWidth>
12633 </field>
12634 <field>
12635 <name>PR11</name>
12636 <description>Pending bit 11</description>
12637 <bitOffset>11</bitOffset>
12638 <bitWidth>1</bitWidth>
12639 </field>
12640 <field>
12641 <name>PR12</name>
12642 <description>Pending bit 12</description>
12643 <bitOffset>12</bitOffset>
12644 <bitWidth>1</bitWidth>
12645 </field>
12646 <field>
12647 <name>PR13</name>
12648 <description>Pending bit 13</description>
12649 <bitOffset>13</bitOffset>
12650 <bitWidth>1</bitWidth>
12651 </field>
12652 <field>
12653 <name>PR14</name>
12654 <description>Pending bit 14</description>
12655 <bitOffset>14</bitOffset>
12656 <bitWidth>1</bitWidth>
12657 </field>
12658 <field>
12659 <name>PR15</name>
12660 <description>Pending bit 15</description>
12661 <bitOffset>15</bitOffset>
12662 <bitWidth>1</bitWidth>
12663 </field>
12664 <field>
12665 <name>PR16</name>
12666 <description>Pending bit 16</description>
12667 <bitOffset>16</bitOffset>
12668 <bitWidth>1</bitWidth>
12669 </field>
12670 <field>
12671 <name>PR17</name>
12672 <description>Pending bit 17</description>
12673 <bitOffset>17</bitOffset>
12674 <bitWidth>1</bitWidth>
12675 </field>
12676 <field>
12677 <name>PR18</name>
12678 <description>Pending bit 18</description>
12679 <bitOffset>18</bitOffset>
12680 <bitWidth>1</bitWidth>
12681 </field>
12682 <field>
12683 <name>PR19</name>
12684 <description>Pending bit 19</description>
12685 <bitOffset>19</bitOffset>
12686 <bitWidth>1</bitWidth>
12687 </field>
12688 <field>
12689 <name>PR20</name>
12690 <description>Pending bit 20</description>
12691 <bitOffset>20</bitOffset>
12692 <bitWidth>1</bitWidth>
12693 </field>
12694 <field>
12695 <name>PR21</name>
12696 <description>Pending bit 21</description>
12697 <bitOffset>21</bitOffset>
12698 <bitWidth>1</bitWidth>
12699 </field>
12700 <field>
12701 <name>PR22</name>
12702 <description>Pending bit 22</description>
12703 <bitOffset>22</bitOffset>
12704 <bitWidth>1</bitWidth>
12705 </field>
12706 <field>
12707 <name>PR29</name>
12708 <description>Pending bit 29</description>
12709 <bitOffset>29</bitOffset>
12710 <bitWidth>1</bitWidth>
12711 </field>
12712 <field>
12713 <name>PR30</name>
12714 <description>Pending bit 30</description>
12715 <bitOffset>30</bitOffset>
12716 <bitWidth>1</bitWidth>
12717 </field>
12718 <field>
12719 <name>PR31</name>
12720 <description>Pending bit 31</description>
12721 <bitOffset>31</bitOffset>
12722 <bitWidth>1</bitWidth>
12723 </field>
12724 </fields>
12725 </register>
12726 <register>
12727 <name>IMR2</name>
12728 <displayName>IMR2</displayName>
12729 <description>Interrupt mask register</description>
12730 <addressOffset>0x18</addressOffset>
12731 <size>0x20</size>
12732 <access>read-write</access>
12733 <resetValue>0xFFFFFFFC</resetValue>
12734 <fields>
12735 <field>
12736 <name>MR32</name>
12737 <description>Interrupt Mask on external/internal line
12738 32</description>
12739 <bitOffset>0</bitOffset>
12740 <bitWidth>1</bitWidth>
12741 </field>
12742 <field>
12743 <name>MR33</name>
12744 <description>Interrupt Mask on external/internal line
12745 33</description>
12746 <bitOffset>1</bitOffset>
12747 <bitWidth>1</bitWidth>
12748 </field>
12749 <field>
12750 <name>MR34</name>
12751 <description>Interrupt Mask on external/internal line
12752 34</description>
12753 <bitOffset>2</bitOffset>
12754 <bitWidth>1</bitWidth>
12755 </field>
12756 <field>
12757 <name>MR35</name>
12758 <description>Interrupt Mask on external/internal line
12759 35</description>
12760 <bitOffset>3</bitOffset>
12761 <bitWidth>1</bitWidth>
12762 </field>
12763 </fields>
12764 </register>
12765 <register>
12766 <name>EMR2</name>
12767 <displayName>EMR2</displayName>
12768 <description>Event mask register</description>
12769 <addressOffset>0x1C</addressOffset>
12770 <size>0x20</size>
12771 <access>read-write</access>
12772 <resetValue>0x00000000</resetValue>
12773 <fields>
12774 <field>
12775 <name>MR32</name>
12776 <description>Event mask on external/internal line
12777 32</description>
12778 <bitOffset>0</bitOffset>
12779 <bitWidth>1</bitWidth>
12780 </field>
12781 <field>
12782 <name>MR33</name>
12783 <description>Event mask on external/internal line
12784 33</description>
12785 <bitOffset>1</bitOffset>
12786 <bitWidth>1</bitWidth>
12787 </field>
12788 <field>
12789 <name>MR34</name>
12790 <description>Event mask on external/internal line
12791 34</description>
12792 <bitOffset>2</bitOffset>
12793 <bitWidth>1</bitWidth>
12794 </field>
12795 <field>
12796 <name>MR35</name>
12797 <description>Event mask on external/internal line
12798 35</description>
12799 <bitOffset>3</bitOffset>
12800 <bitWidth>1</bitWidth>
12801 </field>
12802 </fields>
12803 </register>
12804 <register>
12805 <name>RTSR2</name>
12806 <displayName>RTSR2</displayName>
12807 <description>Rising Trigger selection
12808 register</description>
12809 <addressOffset>0x20</addressOffset>
12810 <size>0x20</size>
12811 <access>read-write</access>
12812 <resetValue>0x00000000</resetValue>
12813 <fields>
12814 <field>
12815 <name>TR32</name>
12816 <description>Rising trigger event configuration bit
12817 of line 32</description>
12818 <bitOffset>0</bitOffset>
12819 <bitWidth>1</bitWidth>
12820 </field>
12821 <field>
12822 <name>TR33</name>
12823 <description>Rising trigger event configuration bit
12824 of line 33</description>
12825 <bitOffset>1</bitOffset>
12826 <bitWidth>1</bitWidth>
12827 </field>
12828 </fields>
12829 </register>
12830 <register>
12831 <name>FTSR2</name>
12832 <displayName>FTSR2</displayName>
12833 <description>Falling Trigger selection
12834 register</description>
12835 <addressOffset>0x24</addressOffset>
12836 <size>0x20</size>
12837 <access>read-write</access>
12838 <resetValue>0x00000000</resetValue>
12839 <fields>
12840 <field>
12841 <name>TR32</name>
12842 <description>Falling trigger event configuration bit
12843 of line 32</description>
12844 <bitOffset>0</bitOffset>
12845 <bitWidth>1</bitWidth>
12846 </field>
12847 <field>
12848 <name>TR33</name>
12849 <description>Falling trigger event configuration bit
12850 of line 33</description>
12851 <bitOffset>1</bitOffset>
12852 <bitWidth>1</bitWidth>
12853 </field>
12854 </fields>
12855 </register>
12856 <register>
12857 <name>SWIER2</name>
12858 <displayName>SWIER2</displayName>
12859 <description>Software interrupt event
12860 register</description>
12861 <addressOffset>0x28</addressOffset>
12862 <size>0x20</size>
12863 <access>read-write</access>
12864 <resetValue>0x00000000</resetValue>
12865 <fields>
12866 <field>
12867 <name>SWIER32</name>
12868 <description>Software interrupt on line
12869 32</description>
12870 <bitOffset>0</bitOffset>
12871 <bitWidth>1</bitWidth>
12872 </field>
12873 <field>
12874 <name>SWIER33</name>
12875 <description>Software interrupt on line
12876 33</description>
12877 <bitOffset>1</bitOffset>
12878 <bitWidth>1</bitWidth>
12879 </field>
12880 </fields>
12881 </register>
12882 <register>
12883 <name>PR2</name>
12884 <displayName>PR2</displayName>
12885 <description>Pending register</description>
12886 <addressOffset>0x2C</addressOffset>
12887 <size>0x20</size>
12888 <access>read-write</access>
12889 <resetValue>0x00000000</resetValue>
12890 <fields>
12891 <field>
12892 <name>PR32</name>
12893 <description>Pending bit on line 32</description>
12894 <bitOffset>0</bitOffset>
12895 <bitWidth>1</bitWidth>
12896 </field>
12897 <field>
12898 <name>PR33</name>
12899 <description>Pending bit on line 33</description>
12900 <bitOffset>1</bitOffset>
12901 <bitWidth>1</bitWidth>
12902 </field>
12903 </fields>
12904 </register>
12905 </registers>
12906 </peripheral>
12907 <peripheral>
12908 <name>PWR</name>
12909 <description>Power control</description>
12910 <groupName>PWR</groupName>
12911 <baseAddress>0x40007000</baseAddress>
12912 <addressBlock>
12913 <offset>0x0</offset>
12914 <size>0x400</size>
12915 <usage>registers</usage>
12916 </addressBlock>
12917 <interrupt>
12918 <name>PVD</name>
12919 <description>PVD through EXTI line detection
12920 interrupt</description>
12921 <value>1</value>
12922 </interrupt>
12923 <registers>
12924 <register>
12925 <name>CR</name>
12926 <displayName>CR</displayName>
12927 <description>power control register</description>
12928 <addressOffset>0x0</addressOffset>
12929 <size>0x20</size>
12930 <access>read-write</access>
12931 <resetValue>0x00000000</resetValue>
12932 <fields>
12933 <field>
12934 <name>LPDS</name>
12935 <description>Low-power deep sleep</description>
12936 <bitOffset>0</bitOffset>
12937 <bitWidth>1</bitWidth>
12938 </field>
12939 <field>
12940 <name>PDDS</name>
12941 <description>Power down deepsleep</description>
12942 <bitOffset>1</bitOffset>
12943 <bitWidth>1</bitWidth>
12944 </field>
12945 <field>
12946 <name>CWUF</name>
12947 <description>Clear wakeup flag</description>
12948 <bitOffset>2</bitOffset>
12949 <bitWidth>1</bitWidth>
12950 </field>
12951 <field>
12952 <name>CSBF</name>
12953 <description>Clear standby flag</description>
12954 <bitOffset>3</bitOffset>
12955 <bitWidth>1</bitWidth>
12956 </field>
12957 <field>
12958 <name>PVDE</name>
12959 <description>Power voltage detector
12960 enable</description>
12961 <bitOffset>4</bitOffset>
12962 <bitWidth>1</bitWidth>
12963 </field>
12964 <field>
12965 <name>PLS</name>
12966 <description>PVD level selection</description>
12967 <bitOffset>5</bitOffset>
12968 <bitWidth>3</bitWidth>
12969 </field>
12970 <field>
12971 <name>DBP</name>
12972 <description>Disable backup domain write
12973 protection</description>
12974 <bitOffset>8</bitOffset>
12975 <bitWidth>1</bitWidth>
12976 </field>
12977 </fields>
12978 </register>
12979 <register>
12980 <name>CSR</name>
12981 <displayName>CSR</displayName>
12982 <description>power control/status register</description>
12983 <addressOffset>0x4</addressOffset>
12984 <size>0x20</size>
12985 <resetValue>0x00000000</resetValue>
12986 <fields>
12987 <field>
12988 <name>WUF</name>
12989 <description>Wakeup flag</description>
12990 <bitOffset>0</bitOffset>
12991 <bitWidth>1</bitWidth>
12992 <access>read-only</access>
12993 </field>
12994 <field>
12995 <name>SBF</name>
12996 <description>Standby flag</description>
12997 <bitOffset>1</bitOffset>
12998 <bitWidth>1</bitWidth>
12999 <access>read-only</access>
13000 </field>
13001 <field>
13002 <name>PVDO</name>
13003 <description>PVD output</description>
13004 <bitOffset>2</bitOffset>
13005 <bitWidth>1</bitWidth>
13006 <access>read-only</access>
13007 </field>
13008 <field>
13009 <name>EWUP1</name>
13010 <description>Enable WKUP1 pin</description>
13011 <bitOffset>8</bitOffset>
13012 <bitWidth>1</bitWidth>
13013 <access>read-write</access>
13014 </field>
13015 <field>
13016 <name>EWUP2</name>
13017 <description>Enable WKUP2 pin</description>
13018 <bitOffset>9</bitOffset>
13019 <bitWidth>1</bitWidth>
13020 <access>read-write</access>
13021 </field>
13022 </fields>
13023 </register>
13024 </registers>
13025 </peripheral>
13026 <peripheral>
13027 <name>CAN</name>
13028 <description>Controller area network</description>
13029 <groupName>CAN</groupName>
13030 <baseAddress>0x40006400</baseAddress>
13031 <addressBlock>
13032 <offset>0x0</offset>
13033 <size>0x400</size>
13034 <usage>registers</usage>
13035 </addressBlock>
13036 <interrupt>
13037 <name>USB_HP_CAN_TX</name>
13038 <description>USB High Priority/CAN_TX
13039 interrupts</description>
13040 <value>19</value>
13041 </interrupt>
13042 <interrupt>
13043 <name>USB_LP_CAN_RX0</name>
13044 <description>USB Low Priority/CAN_RX0
13045 interrupts</description>
13046 <value>20</value>
13047 </interrupt>
13048 <interrupt>
13049 <name>CAN_RX1</name>
13050 <description>CAN_RX1 interrupt</description>
13051 <value>21</value>
13052 </interrupt>
13053 <interrupt>
13054 <name>CAN_SCE</name>
13055 <description>CAN_SCE interrupt</description>
13056 <value>22</value>
13057 </interrupt>
13058 <registers>
13059 <register>
13060 <name>MCR</name>
13061 <displayName>MCR</displayName>
13062 <description>master control register</description>
13063 <addressOffset>0x0</addressOffset>
13064 <size>0x20</size>
13065 <access>read-write</access>
13066 <resetValue>0x00010002</resetValue>
13067 <fields>
13068 <field>
13069 <name>DBF</name>
13070 <description>DBF</description>
13071 <bitOffset>16</bitOffset>
13072 <bitWidth>1</bitWidth>
13073 </field>
13074 <field>
13075 <name>RESET</name>
13076 <description>RESET</description>
13077 <bitOffset>15</bitOffset>
13078 <bitWidth>1</bitWidth>
13079 </field>
13080 <field>
13081 <name>TTCM</name>
13082 <description>TTCM</description>
13083 <bitOffset>7</bitOffset>
13084 <bitWidth>1</bitWidth>
13085 </field>
13086 <field>
13087 <name>ABOM</name>
13088 <description>ABOM</description>
13089 <bitOffset>6</bitOffset>
13090 <bitWidth>1</bitWidth>
13091 </field>
13092 <field>
13093 <name>AWUM</name>
13094 <description>AWUM</description>
13095 <bitOffset>5</bitOffset>
13096 <bitWidth>1</bitWidth>
13097 </field>
13098 <field>
13099 <name>NART</name>
13100 <description>NART</description>
13101 <bitOffset>4</bitOffset>
13102 <bitWidth>1</bitWidth>
13103 </field>
13104 <field>
13105 <name>RFLM</name>
13106 <description>RFLM</description>
13107 <bitOffset>3</bitOffset>
13108 <bitWidth>1</bitWidth>
13109 </field>
13110 <field>
13111 <name>TXFP</name>
13112 <description>TXFP</description>
13113 <bitOffset>2</bitOffset>
13114 <bitWidth>1</bitWidth>
13115 </field>
13116 <field>
13117 <name>SLEEP</name>
13118 <description>SLEEP</description>
13119 <bitOffset>1</bitOffset>
13120 <bitWidth>1</bitWidth>
13121 </field>
13122 <field>
13123 <name>INRQ</name>
13124 <description>INRQ</description>
13125 <bitOffset>0</bitOffset>
13126 <bitWidth>1</bitWidth>
13127 </field>
13128 </fields>
13129 </register>
13130 <register>
13131 <name>MSR</name>
13132 <displayName>MSR</displayName>
13133 <description>master status register</description>
13134 <addressOffset>0x4</addressOffset>
13135 <size>0x20</size>
13136 <resetValue>0x00000C02</resetValue>
13137 <fields>
13138 <field>
13139 <name>RX</name>
13140 <description>RX</description>
13141 <bitOffset>11</bitOffset>
13142 <bitWidth>1</bitWidth>
13143 <access>read-only</access>
13144 </field>
13145 <field>
13146 <name>SAMP</name>
13147 <description>SAMP</description>
13148 <bitOffset>10</bitOffset>
13149 <bitWidth>1</bitWidth>
13150 <access>read-only</access>
13151 </field>
13152 <field>
13153 <name>RXM</name>
13154 <description>RXM</description>
13155 <bitOffset>9</bitOffset>
13156 <bitWidth>1</bitWidth>
13157 <access>read-only</access>
13158 </field>
13159 <field>
13160 <name>TXM</name>
13161 <description>TXM</description>
13162 <bitOffset>8</bitOffset>
13163 <bitWidth>1</bitWidth>
13164 <access>read-only</access>
13165 </field>
13166 <field>
13167 <name>SLAKI</name>
13168 <description>SLAKI</description>
13169 <bitOffset>4</bitOffset>
13170 <bitWidth>1</bitWidth>
13171 <access>read-write</access>
13172 </field>
13173 <field>
13174 <name>WKUI</name>
13175 <description>WKUI</description>
13176 <bitOffset>3</bitOffset>
13177 <bitWidth>1</bitWidth>
13178 <access>read-write</access>
13179 </field>
13180 <field>
13181 <name>ERRI</name>
13182 <description>ERRI</description>
13183 <bitOffset>2</bitOffset>
13184 <bitWidth>1</bitWidth>
13185 <access>read-write</access>
13186 </field>
13187 <field>
13188 <name>SLAK</name>
13189 <description>SLAK</description>
13190 <bitOffset>1</bitOffset>
13191 <bitWidth>1</bitWidth>
13192 <access>read-only</access>
13193 </field>
13194 <field>
13195 <name>INAK</name>
13196 <description>INAK</description>
13197 <bitOffset>0</bitOffset>
13198 <bitWidth>1</bitWidth>
13199 <access>read-only</access>
13200 </field>
13201 </fields>
13202 </register>
13203 <register>
13204 <name>TSR</name>
13205 <displayName>TSR</displayName>
13206 <description>transmit status register</description>
13207 <addressOffset>0x8</addressOffset>
13208 <size>0x20</size>
13209 <resetValue>0x1C000000</resetValue>
13210 <fields>
13211 <field>
13212 <name>LOW2</name>
13213 <description>Lowest priority flag for mailbox
13214 2</description>
13215 <bitOffset>31</bitOffset>
13216 <bitWidth>1</bitWidth>
13217 <access>read-only</access>
13218 </field>
13219 <field>
13220 <name>LOW1</name>
13221 <description>Lowest priority flag for mailbox
13222 1</description>
13223 <bitOffset>30</bitOffset>
13224 <bitWidth>1</bitWidth>
13225 <access>read-only</access>
13226 </field>
13227 <field>
13228 <name>LOW0</name>
13229 <description>Lowest priority flag for mailbox
13230 0</description>
13231 <bitOffset>29</bitOffset>
13232 <bitWidth>1</bitWidth>
13233 <access>read-only</access>
13234 </field>
13235 <field>
13236 <name>TME2</name>
13237 <description>Lowest priority flag for mailbox
13238 2</description>
13239 <bitOffset>28</bitOffset>
13240 <bitWidth>1</bitWidth>
13241 <access>read-only</access>
13242 </field>
13243 <field>
13244 <name>TME1</name>
13245 <description>Lowest priority flag for mailbox
13246 1</description>
13247 <bitOffset>27</bitOffset>
13248 <bitWidth>1</bitWidth>
13249 <access>read-only</access>
13250 </field>
13251 <field>
13252 <name>TME0</name>
13253 <description>Lowest priority flag for mailbox
13254 0</description>
13255 <bitOffset>26</bitOffset>
13256 <bitWidth>1</bitWidth>
13257 <access>read-only</access>
13258 </field>
13259 <field>
13260 <name>CODE</name>
13261 <description>CODE</description>
13262 <bitOffset>24</bitOffset>
13263 <bitWidth>2</bitWidth>
13264 <access>read-only</access>
13265 </field>
13266 <field>
13267 <name>ABRQ2</name>
13268 <description>ABRQ2</description>
13269 <bitOffset>23</bitOffset>
13270 <bitWidth>1</bitWidth>
13271 <access>read-write</access>
13272 </field>
13273 <field>
13274 <name>TERR2</name>
13275 <description>TERR2</description>
13276 <bitOffset>19</bitOffset>
13277 <bitWidth>1</bitWidth>
13278 <access>read-write</access>
13279 </field>
13280 <field>
13281 <name>ALST2</name>
13282 <description>ALST2</description>
13283 <bitOffset>18</bitOffset>
13284 <bitWidth>1</bitWidth>
13285 <access>read-write</access>
13286 </field>
13287 <field>
13288 <name>TXOK2</name>
13289 <description>TXOK2</description>
13290 <bitOffset>17</bitOffset>
13291 <bitWidth>1</bitWidth>
13292 <access>read-write</access>
13293 </field>
13294 <field>
13295 <name>RQCP2</name>
13296 <description>RQCP2</description>
13297 <bitOffset>16</bitOffset>
13298 <bitWidth>1</bitWidth>
13299 <access>read-write</access>
13300 </field>
13301 <field>
13302 <name>ABRQ1</name>
13303 <description>ABRQ1</description>
13304 <bitOffset>15</bitOffset>
13305 <bitWidth>1</bitWidth>
13306 <access>read-write</access>
13307 </field>
13308 <field>
13309 <name>TERR1</name>
13310 <description>TERR1</description>
13311 <bitOffset>11</bitOffset>
13312 <bitWidth>1</bitWidth>
13313 <access>read-write</access>
13314 </field>
13315 <field>
13316 <name>ALST1</name>
13317 <description>ALST1</description>
13318 <bitOffset>10</bitOffset>
13319 <bitWidth>1</bitWidth>
13320 <access>read-write</access>
13321 </field>
13322 <field>
13323 <name>TXOK1</name>
13324 <description>TXOK1</description>
13325 <bitOffset>9</bitOffset>
13326 <bitWidth>1</bitWidth>
13327 <access>read-write</access>
13328 </field>
13329 <field>
13330 <name>RQCP1</name>
13331 <description>RQCP1</description>
13332 <bitOffset>8</bitOffset>
13333 <bitWidth>1</bitWidth>
13334 <access>read-write</access>
13335 </field>
13336 <field>
13337 <name>ABRQ0</name>
13338 <description>ABRQ0</description>
13339 <bitOffset>7</bitOffset>
13340 <bitWidth>1</bitWidth>
13341 <access>read-write</access>
13342 </field>
13343 <field>
13344 <name>TERR0</name>
13345 <description>TERR0</description>
13346 <bitOffset>3</bitOffset>
13347 <bitWidth>1</bitWidth>
13348 <access>read-write</access>
13349 </field>
13350 <field>
13351 <name>ALST0</name>
13352 <description>ALST0</description>
13353 <bitOffset>2</bitOffset>
13354 <bitWidth>1</bitWidth>
13355 <access>read-write</access>
13356 </field>
13357 <field>
13358 <name>TXOK0</name>
13359 <description>TXOK0</description>
13360 <bitOffset>1</bitOffset>
13361 <bitWidth>1</bitWidth>
13362 <access>read-write</access>
13363 </field>
13364 <field>
13365 <name>RQCP0</name>
13366 <description>RQCP0</description>
13367 <bitOffset>0</bitOffset>
13368 <bitWidth>1</bitWidth>
13369 <access>read-write</access>
13370 </field>
13371 </fields>
13372 </register>
13373 <register>
13374 <name>RF0R</name>
13375 <displayName>RF0R</displayName>
13376 <description>receive FIFO 0 register</description>
13377 <addressOffset>0xC</addressOffset>
13378 <size>0x20</size>
13379 <resetValue>0x00000000</resetValue>
13380 <fields>
13381 <field>
13382 <name>RFOM0</name>
13383 <description>RFOM0</description>
13384 <bitOffset>5</bitOffset>
13385 <bitWidth>1</bitWidth>
13386 <access>read-write</access>
13387 </field>
13388 <field>
13389 <name>FOVR0</name>
13390 <description>FOVR0</description>
13391 <bitOffset>4</bitOffset>
13392 <bitWidth>1</bitWidth>
13393 <access>read-write</access>
13394 </field>
13395 <field>
13396 <name>FULL0</name>
13397 <description>FULL0</description>
13398 <bitOffset>3</bitOffset>
13399 <bitWidth>1</bitWidth>
13400 <access>read-write</access>
13401 </field>
13402 <field>
13403 <name>FMP0</name>
13404 <description>FMP0</description>
13405 <bitOffset>0</bitOffset>
13406 <bitWidth>2</bitWidth>
13407 <access>read-only</access>
13408 </field>
13409 </fields>
13410 </register>
13411 <register>
13412 <name>RF1R</name>
13413 <displayName>RF1R</displayName>
13414 <description>receive FIFO 1 register</description>
13415 <addressOffset>0x10</addressOffset>
13416 <size>0x20</size>
13417 <resetValue>0x00000000</resetValue>
13418 <fields>
13419 <field>
13420 <name>RFOM1</name>
13421 <description>RFOM1</description>
13422 <bitOffset>5</bitOffset>
13423 <bitWidth>1</bitWidth>
13424 <access>read-write</access>
13425 </field>
13426 <field>
13427 <name>FOVR1</name>
13428 <description>FOVR1</description>
13429 <bitOffset>4</bitOffset>
13430 <bitWidth>1</bitWidth>
13431 <access>read-write</access>
13432 </field>
13433 <field>
13434 <name>FULL1</name>
13435 <description>FULL1</description>
13436 <bitOffset>3</bitOffset>
13437 <bitWidth>1</bitWidth>
13438 <access>read-write</access>
13439 </field>
13440 <field>
13441 <name>FMP1</name>
13442 <description>FMP1</description>
13443 <bitOffset>0</bitOffset>
13444 <bitWidth>2</bitWidth>
13445 <access>read-only</access>
13446 </field>
13447 </fields>
13448 </register>
13449 <register>
13450 <name>IER</name>
13451 <displayName>IER</displayName>
13452 <description>interrupt enable register</description>
13453 <addressOffset>0x14</addressOffset>
13454 <size>0x20</size>
13455 <access>read-write</access>
13456 <resetValue>0x00000000</resetValue>
13457 <fields>
13458 <field>
13459 <name>SLKIE</name>
13460 <description>SLKIE</description>
13461 <bitOffset>17</bitOffset>
13462 <bitWidth>1</bitWidth>
13463 </field>
13464 <field>
13465 <name>WKUIE</name>
13466 <description>WKUIE</description>
13467 <bitOffset>16</bitOffset>
13468 <bitWidth>1</bitWidth>
13469 </field>
13470 <field>
13471 <name>ERRIE</name>
13472 <description>ERRIE</description>
13473 <bitOffset>15</bitOffset>
13474 <bitWidth>1</bitWidth>
13475 </field>
13476 <field>
13477 <name>LECIE</name>
13478 <description>LECIE</description>
13479 <bitOffset>11</bitOffset>
13480 <bitWidth>1</bitWidth>
13481 </field>
13482 <field>
13483 <name>BOFIE</name>
13484 <description>BOFIE</description>
13485 <bitOffset>10</bitOffset>
13486 <bitWidth>1</bitWidth>
13487 </field>
13488 <field>
13489 <name>EPVIE</name>
13490 <description>EPVIE</description>
13491 <bitOffset>9</bitOffset>
13492 <bitWidth>1</bitWidth>
13493 </field>
13494 <field>
13495 <name>EWGIE</name>
13496 <description>EWGIE</description>
13497 <bitOffset>8</bitOffset>
13498 <bitWidth>1</bitWidth>
13499 </field>
13500 <field>
13501 <name>FOVIE1</name>
13502 <description>FOVIE1</description>
13503 <bitOffset>6</bitOffset>
13504 <bitWidth>1</bitWidth>
13505 </field>
13506 <field>
13507 <name>FFIE1</name>
13508 <description>FFIE1</description>
13509 <bitOffset>5</bitOffset>
13510 <bitWidth>1</bitWidth>
13511 </field>
13512 <field>
13513 <name>FMPIE1</name>
13514 <description>FMPIE1</description>
13515 <bitOffset>4</bitOffset>
13516 <bitWidth>1</bitWidth>
13517 </field>
13518 <field>
13519 <name>FOVIE0</name>
13520 <description>FOVIE0</description>
13521 <bitOffset>3</bitOffset>
13522 <bitWidth>1</bitWidth>
13523 </field>
13524 <field>
13525 <name>FFIE0</name>
13526 <description>FFIE0</description>
13527 <bitOffset>2</bitOffset>
13528 <bitWidth>1</bitWidth>
13529 </field>
13530 <field>
13531 <name>FMPIE0</name>
13532 <description>FMPIE0</description>
13533 <bitOffset>1</bitOffset>
13534 <bitWidth>1</bitWidth>
13535 </field>
13536 <field>
13537 <name>TMEIE</name>
13538 <description>TMEIE</description>
13539 <bitOffset>0</bitOffset>
13540 <bitWidth>1</bitWidth>
13541 </field>
13542 </fields>
13543 </register>
13544 <register>
13545 <name>ESR</name>
13546 <displayName>ESR</displayName>
13547 <description>error status register</description>
13548 <addressOffset>0x18</addressOffset>
13549 <size>0x20</size>
13550 <resetValue>0x00000000</resetValue>
13551 <fields>
13552 <field>
13553 <name>REC</name>
13554 <description>REC</description>
13555 <bitOffset>24</bitOffset>
13556 <bitWidth>8</bitWidth>
13557 <access>read-only</access>
13558 </field>
13559 <field>
13560 <name>TEC</name>
13561 <description>TEC</description>
13562 <bitOffset>16</bitOffset>
13563 <bitWidth>8</bitWidth>
13564 <access>read-only</access>
13565 </field>
13566 <field>
13567 <name>LEC</name>
13568 <description>LEC</description>
13569 <bitOffset>4</bitOffset>
13570 <bitWidth>3</bitWidth>
13571 <access>read-write</access>
13572 </field>
13573 <field>
13574 <name>BOFF</name>
13575 <description>BOFF</description>
13576 <bitOffset>2</bitOffset>
13577 <bitWidth>1</bitWidth>
13578 <access>read-only</access>
13579 </field>
13580 <field>
13581 <name>EPVF</name>
13582 <description>EPVF</description>
13583 <bitOffset>1</bitOffset>
13584 <bitWidth>1</bitWidth>
13585 <access>read-only</access>
13586 </field>
13587 <field>
13588 <name>EWGF</name>
13589 <description>EWGF</description>
13590 <bitOffset>0</bitOffset>
13591 <bitWidth>1</bitWidth>
13592 <access>read-only</access>
13593 </field>
13594 </fields>
13595 </register>
13596 <register>
13597 <name>BTR</name>
13598 <displayName>BTR</displayName>
13599 <description>bit timing register</description>
13600 <addressOffset>0x1C</addressOffset>
13601 <size>0x20</size>
13602 <access>read-write</access>
13603 <resetValue>0x01230000</resetValue>
13604 <fields>
13605 <field>
13606 <name>SILM</name>
13607 <description>SILM</description>
13608 <bitOffset>31</bitOffset>
13609 <bitWidth>1</bitWidth>
13610 </field>
13611 <field>
13612 <name>LBKM</name>
13613 <description>LBKM</description>
13614 <bitOffset>30</bitOffset>
13615 <bitWidth>1</bitWidth>
13616 </field>
13617 <field>
13618 <name>SJW</name>
13619 <description>SJW</description>
13620 <bitOffset>24</bitOffset>
13621 <bitWidth>2</bitWidth>
13622 </field>
13623 <field>
13624 <name>TS2</name>
13625 <description>TS2</description>
13626 <bitOffset>20</bitOffset>
13627 <bitWidth>3</bitWidth>
13628 </field>
13629 <field>
13630 <name>TS1</name>
13631 <description>TS1</description>
13632 <bitOffset>16</bitOffset>
13633 <bitWidth>4</bitWidth>
13634 </field>
13635 <field>
13636 <name>BRP</name>
13637 <description>BRP</description>
13638 <bitOffset>0</bitOffset>
13639 <bitWidth>10</bitWidth>
13640 </field>
13641 </fields>
13642 </register>
13643 <register>
13644 <name>TI0R</name>
13645 <displayName>TI0R</displayName>
13646 <description>TX mailbox identifier register</description>
13647 <addressOffset>0x180</addressOffset>
13648 <size>0x20</size>
13649 <access>read-write</access>
13650 <resetValue>0x00000000</resetValue>
13651 <fields>
13652 <field>
13653 <name>STID</name>
13654 <description>STID</description>
13655 <bitOffset>21</bitOffset>
13656 <bitWidth>11</bitWidth>
13657 </field>
13658 <field>
13659 <name>EXID</name>
13660 <description>EXID</description>
13661 <bitOffset>3</bitOffset>
13662 <bitWidth>18</bitWidth>
13663 </field>
13664 <field>
13665 <name>IDE</name>
13666 <description>IDE</description>
13667 <bitOffset>2</bitOffset>
13668 <bitWidth>1</bitWidth>
13669 </field>
13670 <field>
13671 <name>RTR</name>
13672 <description>RTR</description>
13673 <bitOffset>1</bitOffset>
13674 <bitWidth>1</bitWidth>
13675 </field>
13676 <field>
13677 <name>TXRQ</name>
13678 <description>TXRQ</description>
13679 <bitOffset>0</bitOffset>
13680 <bitWidth>1</bitWidth>
13681 </field>
13682 </fields>
13683 </register>
13684 <register>
13685 <name>TDT0R</name>
13686 <displayName>TDT0R</displayName>
13687 <description>mailbox data length control and time stamp
13688 register</description>
13689 <addressOffset>0x184</addressOffset>
13690 <size>0x20</size>
13691 <access>read-write</access>
13692 <resetValue>0x00000000</resetValue>
13693 <fields>
13694 <field>
13695 <name>TIME</name>
13696 <description>TIME</description>
13697 <bitOffset>16</bitOffset>
13698 <bitWidth>16</bitWidth>
13699 </field>
13700 <field>
13701 <name>TGT</name>
13702 <description>TGT</description>
13703 <bitOffset>8</bitOffset>
13704 <bitWidth>1</bitWidth>
13705 </field>
13706 <field>
13707 <name>DLC</name>
13708 <description>DLC</description>
13709 <bitOffset>0</bitOffset>
13710 <bitWidth>4</bitWidth>
13711 </field>
13712 </fields>
13713 </register>
13714 <register>
13715 <name>TDL0R</name>
13716 <displayName>TDL0R</displayName>
13717 <description>mailbox data low register</description>
13718 <addressOffset>0x188</addressOffset>
13719 <size>0x20</size>
13720 <access>read-write</access>
13721 <resetValue>0x00000000</resetValue>
13722 <fields>
13723 <field>
13724 <name>DATA3</name>
13725 <description>DATA3</description>
13726 <bitOffset>24</bitOffset>
13727 <bitWidth>8</bitWidth>
13728 </field>
13729 <field>
13730 <name>DATA2</name>
13731 <description>DATA2</description>
13732 <bitOffset>16</bitOffset>
13733 <bitWidth>8</bitWidth>
13734 </field>
13735 <field>
13736 <name>DATA1</name>
13737 <description>DATA1</description>
13738 <bitOffset>8</bitOffset>
13739 <bitWidth>8</bitWidth>
13740 </field>
13741 <field>
13742 <name>DATA0</name>
13743 <description>DATA0</description>
13744 <bitOffset>0</bitOffset>
13745 <bitWidth>8</bitWidth>
13746 </field>
13747 </fields>
13748 </register>
13749 <register>
13750 <name>TDH0R</name>
13751 <displayName>TDH0R</displayName>
13752 <description>mailbox data high register</description>
13753 <addressOffset>0x18C</addressOffset>
13754 <size>0x20</size>
13755 <access>read-write</access>
13756 <resetValue>0x00000000</resetValue>
13757 <fields>
13758 <field>
13759 <name>DATA7</name>
13760 <description>DATA7</description>
13761 <bitOffset>24</bitOffset>
13762 <bitWidth>8</bitWidth>
13763 </field>
13764 <field>
13765 <name>DATA6</name>
13766 <description>DATA6</description>
13767 <bitOffset>16</bitOffset>
13768 <bitWidth>8</bitWidth>
13769 </field>
13770 <field>
13771 <name>DATA5</name>
13772 <description>DATA5</description>
13773 <bitOffset>8</bitOffset>
13774 <bitWidth>8</bitWidth>
13775 </field>
13776 <field>
13777 <name>DATA4</name>
13778 <description>DATA4</description>
13779 <bitOffset>0</bitOffset>
13780 <bitWidth>8</bitWidth>
13781 </field>
13782 </fields>
13783 </register>
13784 <register>
13785 <name>TI1R</name>
13786 <displayName>TI1R</displayName>
13787 <description>TX mailbox identifier register</description>
13788 <addressOffset>0x190</addressOffset>
13789 <size>0x20</size>
13790 <access>read-write</access>
13791 <resetValue>0x00000000</resetValue>
13792 <fields>
13793 <field>
13794 <name>STID</name>
13795 <description>STID</description>
13796 <bitOffset>21</bitOffset>
13797 <bitWidth>11</bitWidth>
13798 </field>
13799 <field>
13800 <name>EXID</name>
13801 <description>EXID</description>
13802 <bitOffset>3</bitOffset>
13803 <bitWidth>18</bitWidth>
13804 </field>
13805 <field>
13806 <name>IDE</name>
13807 <description>IDE</description>
13808 <bitOffset>2</bitOffset>
13809 <bitWidth>1</bitWidth>
13810 </field>
13811 <field>
13812 <name>RTR</name>
13813 <description>RTR</description>
13814 <bitOffset>1</bitOffset>
13815 <bitWidth>1</bitWidth>
13816 </field>
13817 <field>
13818 <name>TXRQ</name>
13819 <description>TXRQ</description>
13820 <bitOffset>0</bitOffset>
13821 <bitWidth>1</bitWidth>
13822 </field>
13823 </fields>
13824 </register>
13825 <register>
13826 <name>TDT1R</name>
13827 <displayName>TDT1R</displayName>
13828 <description>mailbox data length control and time stamp
13829 register</description>
13830 <addressOffset>0x194</addressOffset>
13831 <size>0x20</size>
13832 <access>read-write</access>
13833 <resetValue>0x00000000</resetValue>
13834 <fields>
13835 <field>
13836 <name>TIME</name>
13837 <description>TIME</description>
13838 <bitOffset>16</bitOffset>
13839 <bitWidth>16</bitWidth>
13840 </field>
13841 <field>
13842 <name>TGT</name>
13843 <description>TGT</description>
13844 <bitOffset>8</bitOffset>
13845 <bitWidth>1</bitWidth>
13846 </field>
13847 <field>
13848 <name>DLC</name>
13849 <description>DLC</description>
13850 <bitOffset>0</bitOffset>
13851 <bitWidth>4</bitWidth>
13852 </field>
13853 </fields>
13854 </register>
13855 <register>
13856 <name>TDL1R</name>
13857 <displayName>TDL1R</displayName>
13858 <description>mailbox data low register</description>
13859 <addressOffset>0x198</addressOffset>
13860 <size>0x20</size>
13861 <access>read-write</access>
13862 <resetValue>0x00000000</resetValue>
13863 <fields>
13864 <field>
13865 <name>DATA3</name>
13866 <description>DATA3</description>
13867 <bitOffset>24</bitOffset>
13868 <bitWidth>8</bitWidth>
13869 </field>
13870 <field>
13871 <name>DATA2</name>
13872 <description>DATA2</description>
13873 <bitOffset>16</bitOffset>
13874 <bitWidth>8</bitWidth>
13875 </field>
13876 <field>
13877 <name>DATA1</name>
13878 <description>DATA1</description>
13879 <bitOffset>8</bitOffset>
13880 <bitWidth>8</bitWidth>
13881 </field>
13882 <field>
13883 <name>DATA0</name>
13884 <description>DATA0</description>
13885 <bitOffset>0</bitOffset>
13886 <bitWidth>8</bitWidth>
13887 </field>
13888 </fields>
13889 </register>
13890 <register>
13891 <name>TDH1R</name>
13892 <displayName>TDH1R</displayName>
13893 <description>mailbox data high register</description>
13894 <addressOffset>0x19C</addressOffset>
13895 <size>0x20</size>
13896 <access>read-write</access>
13897 <resetValue>0x00000000</resetValue>
13898 <fields>
13899 <field>
13900 <name>DATA7</name>
13901 <description>DATA7</description>
13902 <bitOffset>24</bitOffset>
13903 <bitWidth>8</bitWidth>
13904 </field>
13905 <field>
13906 <name>DATA6</name>
13907 <description>DATA6</description>
13908 <bitOffset>16</bitOffset>
13909 <bitWidth>8</bitWidth>
13910 </field>
13911 <field>
13912 <name>DATA5</name>
13913 <description>DATA5</description>
13914 <bitOffset>8</bitOffset>
13915 <bitWidth>8</bitWidth>
13916 </field>
13917 <field>
13918 <name>DATA4</name>
13919 <description>DATA4</description>
13920 <bitOffset>0</bitOffset>
13921 <bitWidth>8</bitWidth>
13922 </field>
13923 </fields>
13924 </register>
13925 <register>
13926 <name>TI2R</name>
13927 <displayName>TI2R</displayName>
13928 <description>TX mailbox identifier register</description>
13929 <addressOffset>0x1A0</addressOffset>
13930 <size>0x20</size>
13931 <access>read-write</access>
13932 <resetValue>0x00000000</resetValue>
13933 <fields>
13934 <field>
13935 <name>STID</name>
13936 <description>STID</description>
13937 <bitOffset>21</bitOffset>
13938 <bitWidth>11</bitWidth>
13939 </field>
13940 <field>
13941 <name>EXID</name>
13942 <description>EXID</description>
13943 <bitOffset>3</bitOffset>
13944 <bitWidth>18</bitWidth>
13945 </field>
13946 <field>
13947 <name>IDE</name>
13948 <description>IDE</description>
13949 <bitOffset>2</bitOffset>
13950 <bitWidth>1</bitWidth>
13951 </field>
13952 <field>
13953 <name>RTR</name>
13954 <description>RTR</description>
13955 <bitOffset>1</bitOffset>
13956 <bitWidth>1</bitWidth>
13957 </field>
13958 <field>
13959 <name>TXRQ</name>
13960 <description>TXRQ</description>
13961 <bitOffset>0</bitOffset>
13962 <bitWidth>1</bitWidth>
13963 </field>
13964 </fields>
13965 </register>
13966 <register>
13967 <name>TDT2R</name>
13968 <displayName>TDT2R</displayName>
13969 <description>mailbox data length control and time stamp
13970 register</description>
13971 <addressOffset>0x1A4</addressOffset>
13972 <size>0x20</size>
13973 <access>read-write</access>
13974 <resetValue>0x00000000</resetValue>
13975 <fields>
13976 <field>
13977 <name>TIME</name>
13978 <description>TIME</description>
13979 <bitOffset>16</bitOffset>
13980 <bitWidth>16</bitWidth>
13981 </field>
13982 <field>
13983 <name>TGT</name>
13984 <description>TGT</description>
13985 <bitOffset>8</bitOffset>
13986 <bitWidth>1</bitWidth>
13987 </field>
13988 <field>
13989 <name>DLC</name>
13990 <description>DLC</description>
13991 <bitOffset>0</bitOffset>
13992 <bitWidth>4</bitWidth>
13993 </field>
13994 </fields>
13995 </register>
13996 <register>
13997 <name>TDL2R</name>
13998 <displayName>TDL2R</displayName>
13999 <description>mailbox data low register</description>
14000 <addressOffset>0x1A8</addressOffset>
14001 <size>0x20</size>
14002 <access>read-write</access>
14003 <resetValue>0x00000000</resetValue>
14004 <fields>
14005 <field>
14006 <name>DATA3</name>
14007 <description>DATA3</description>
14008 <bitOffset>24</bitOffset>
14009 <bitWidth>8</bitWidth>
14010 </field>
14011 <field>
14012 <name>DATA2</name>
14013 <description>DATA2</description>
14014 <bitOffset>16</bitOffset>
14015 <bitWidth>8</bitWidth>
14016 </field>
14017 <field>
14018 <name>DATA1</name>
14019 <description>DATA1</description>
14020 <bitOffset>8</bitOffset>
14021 <bitWidth>8</bitWidth>
14022 </field>
14023 <field>
14024 <name>DATA0</name>
14025 <description>DATA0</description>
14026 <bitOffset>0</bitOffset>
14027 <bitWidth>8</bitWidth>
14028 </field>
14029 </fields>
14030 </register>
14031 <register>
14032 <name>TDH2R</name>
14033 <displayName>TDH2R</displayName>
14034 <description>mailbox data high register</description>
14035 <addressOffset>0x1AC</addressOffset>
14036 <size>0x20</size>
14037 <access>read-write</access>
14038 <resetValue>0x00000000</resetValue>
14039 <fields>
14040 <field>
14041 <name>DATA7</name>
14042 <description>DATA7</description>
14043 <bitOffset>24</bitOffset>
14044 <bitWidth>8</bitWidth>
14045 </field>
14046 <field>
14047 <name>DATA6</name>
14048 <description>DATA6</description>
14049 <bitOffset>16</bitOffset>
14050 <bitWidth>8</bitWidth>
14051 </field>
14052 <field>
14053 <name>DATA5</name>
14054 <description>DATA5</description>
14055 <bitOffset>8</bitOffset>
14056 <bitWidth>8</bitWidth>
14057 </field>
14058 <field>
14059 <name>DATA4</name>
14060 <description>DATA4</description>
14061 <bitOffset>0</bitOffset>
14062 <bitWidth>8</bitWidth>
14063 </field>
14064 </fields>
14065 </register>
14066 <register>
14067 <name>RI0R</name>
14068 <displayName>RI0R</displayName>
14069 <description>receive FIFO mailbox identifier
14070 register</description>
14071 <addressOffset>0x1B0</addressOffset>
14072 <size>0x20</size>
14073 <access>read-only</access>
14074 <resetValue>0x00000000</resetValue>
14075 <fields>
14076 <field>
14077 <name>STID</name>
14078 <description>STID</description>
14079 <bitOffset>21</bitOffset>
14080 <bitWidth>11</bitWidth>
14081 </field>
14082 <field>
14083 <name>EXID</name>
14084 <description>EXID</description>
14085 <bitOffset>3</bitOffset>
14086 <bitWidth>18</bitWidth>
14087 </field>
14088 <field>
14089 <name>IDE</name>
14090 <description>IDE</description>
14091 <bitOffset>2</bitOffset>
14092 <bitWidth>1</bitWidth>
14093 </field>
14094 <field>
14095 <name>RTR</name>
14096 <description>RTR</description>
14097 <bitOffset>1</bitOffset>
14098 <bitWidth>1</bitWidth>
14099 </field>
14100 </fields>
14101 </register>
14102 <register>
14103 <name>RDT0R</name>
14104 <displayName>RDT0R</displayName>
14105 <description>receive FIFO mailbox data length control and
14106 time stamp register</description>
14107 <addressOffset>0x1B4</addressOffset>
14108 <size>0x20</size>
14109 <access>read-only</access>
14110 <resetValue>0x00000000</resetValue>
14111 <fields>
14112 <field>
14113 <name>TIME</name>
14114 <description>TIME</description>
14115 <bitOffset>16</bitOffset>
14116 <bitWidth>16</bitWidth>
14117 </field>
14118 <field>
14119 <name>FMI</name>
14120 <description>FMI</description>
14121 <bitOffset>8</bitOffset>
14122 <bitWidth>8</bitWidth>
14123 </field>
14124 <field>
14125 <name>DLC</name>
14126 <description>DLC</description>
14127 <bitOffset>0</bitOffset>
14128 <bitWidth>4</bitWidth>
14129 </field>
14130 </fields>
14131 </register>
14132 <register>
14133 <name>RDL0R</name>
14134 <displayName>RDL0R</displayName>
14135 <description>receive FIFO mailbox data low
14136 register</description>
14137 <addressOffset>0x1B8</addressOffset>
14138 <size>0x20</size>
14139 <access>read-only</access>
14140 <resetValue>0x00000000</resetValue>
14141 <fields>
14142 <field>
14143 <name>DATA3</name>
14144 <description>DATA3</description>
14145 <bitOffset>24</bitOffset>
14146 <bitWidth>8</bitWidth>
14147 </field>
14148 <field>
14149 <name>DATA2</name>
14150 <description>DATA2</description>
14151 <bitOffset>16</bitOffset>
14152 <bitWidth>8</bitWidth>
14153 </field>
14154 <field>
14155 <name>DATA1</name>
14156 <description>DATA1</description>
14157 <bitOffset>8</bitOffset>
14158 <bitWidth>8</bitWidth>
14159 </field>
14160 <field>
14161 <name>DATA0</name>
14162 <description>DATA0</description>
14163 <bitOffset>0</bitOffset>
14164 <bitWidth>8</bitWidth>
14165 </field>
14166 </fields>
14167 </register>
14168 <register>
14169 <name>RDH0R</name>
14170 <displayName>RDH0R</displayName>
14171 <description>receive FIFO mailbox data high
14172 register</description>
14173 <addressOffset>0x1BC</addressOffset>
14174 <size>0x20</size>
14175 <access>read-only</access>
14176 <resetValue>0x00000000</resetValue>
14177 <fields>
14178 <field>
14179 <name>DATA7</name>
14180 <description>DATA7</description>
14181 <bitOffset>24</bitOffset>
14182 <bitWidth>8</bitWidth>
14183 </field>
14184 <field>
14185 <name>DATA6</name>
14186 <description>DATA6</description>
14187 <bitOffset>16</bitOffset>
14188 <bitWidth>8</bitWidth>
14189 </field>
14190 <field>
14191 <name>DATA5</name>
14192 <description>DATA5</description>
14193 <bitOffset>8</bitOffset>
14194 <bitWidth>8</bitWidth>
14195 </field>
14196 <field>
14197 <name>DATA4</name>
14198 <description>DATA4</description>
14199 <bitOffset>0</bitOffset>
14200 <bitWidth>8</bitWidth>
14201 </field>
14202 </fields>
14203 </register>
14204 <register>
14205 <name>RI1R</name>
14206 <displayName>RI1R</displayName>
14207 <description>receive FIFO mailbox identifier
14208 register</description>
14209 <addressOffset>0x1C0</addressOffset>
14210 <size>0x20</size>
14211 <access>read-only</access>
14212 <resetValue>0x00000000</resetValue>
14213 <fields>
14214 <field>
14215 <name>STID</name>
14216 <description>STID</description>
14217 <bitOffset>21</bitOffset>
14218 <bitWidth>11</bitWidth>
14219 </field>
14220 <field>
14221 <name>EXID</name>
14222 <description>EXID</description>
14223 <bitOffset>3</bitOffset>
14224 <bitWidth>18</bitWidth>
14225 </field>
14226 <field>
14227 <name>IDE</name>
14228 <description>IDE</description>
14229 <bitOffset>2</bitOffset>
14230 <bitWidth>1</bitWidth>
14231 </field>
14232 <field>
14233 <name>RTR</name>
14234 <description>RTR</description>
14235 <bitOffset>1</bitOffset>
14236 <bitWidth>1</bitWidth>
14237 </field>
14238 </fields>
14239 </register>
14240 <register>
14241 <name>RDT1R</name>
14242 <displayName>RDT1R</displayName>
14243 <description>receive FIFO mailbox data length control and
14244 time stamp register</description>
14245 <addressOffset>0x1C4</addressOffset>
14246 <size>0x20</size>
14247 <access>read-only</access>
14248 <resetValue>0x00000000</resetValue>
14249 <fields>
14250 <field>
14251 <name>TIME</name>
14252 <description>TIME</description>
14253 <bitOffset>16</bitOffset>
14254 <bitWidth>16</bitWidth>
14255 </field>
14256 <field>
14257 <name>FMI</name>
14258 <description>FMI</description>
14259 <bitOffset>8</bitOffset>
14260 <bitWidth>8</bitWidth>
14261 </field>
14262 <field>
14263 <name>DLC</name>
14264 <description>DLC</description>
14265 <bitOffset>0</bitOffset>
14266 <bitWidth>4</bitWidth>
14267 </field>
14268 </fields>
14269 </register>
14270 <register>
14271 <name>RDL1R</name>
14272 <displayName>RDL1R</displayName>
14273 <description>receive FIFO mailbox data low
14274 register</description>
14275 <addressOffset>0x1C8</addressOffset>
14276 <size>0x20</size>
14277 <access>read-only</access>
14278 <resetValue>0x00000000</resetValue>
14279 <fields>
14280 <field>
14281 <name>DATA3</name>
14282 <description>DATA3</description>
14283 <bitOffset>24</bitOffset>
14284 <bitWidth>8</bitWidth>
14285 </field>
14286 <field>
14287 <name>DATA2</name>
14288 <description>DATA2</description>
14289 <bitOffset>16</bitOffset>
14290 <bitWidth>8</bitWidth>
14291 </field>
14292 <field>
14293 <name>DATA1</name>
14294 <description>DATA1</description>
14295 <bitOffset>8</bitOffset>
14296 <bitWidth>8</bitWidth>
14297 </field>
14298 <field>
14299 <name>DATA0</name>
14300 <description>DATA0</description>
14301 <bitOffset>0</bitOffset>
14302 <bitWidth>8</bitWidth>
14303 </field>
14304 </fields>
14305 </register>
14306 <register>
14307 <name>RDH1R</name>
14308 <displayName>RDH1R</displayName>
14309 <description>receive FIFO mailbox data high
14310 register</description>
14311 <addressOffset>0x1CC</addressOffset>
14312 <size>0x20</size>
14313 <access>read-only</access>
14314 <resetValue>0x00000000</resetValue>
14315 <fields>
14316 <field>
14317 <name>DATA7</name>
14318 <description>DATA7</description>
14319 <bitOffset>24</bitOffset>
14320 <bitWidth>8</bitWidth>
14321 </field>
14322 <field>
14323 <name>DATA6</name>
14324 <description>DATA6</description>
14325 <bitOffset>16</bitOffset>
14326 <bitWidth>8</bitWidth>
14327 </field>
14328 <field>
14329 <name>DATA5</name>
14330 <description>DATA5</description>
14331 <bitOffset>8</bitOffset>
14332 <bitWidth>8</bitWidth>
14333 </field>
14334 <field>
14335 <name>DATA4</name>
14336 <description>DATA4</description>
14337 <bitOffset>0</bitOffset>
14338 <bitWidth>8</bitWidth>
14339 </field>
14340 </fields>
14341 </register>
14342 <register>
14343 <name>FMR</name>
14344 <displayName>FMR</displayName>
14345 <description>filter master register</description>
14346 <addressOffset>0x200</addressOffset>
14347 <size>0x20</size>
14348 <access>read-write</access>
14349 <resetValue>0x2A1C0E01</resetValue>
14350 <fields>
14351 <field>
14352 <name>CAN2SB</name>
14353 <description>CAN2 start bank</description>
14354 <bitOffset>8</bitOffset>
14355 <bitWidth>6</bitWidth>
14356 </field>
14357 <field>
14358 <name>FINIT</name>
14359 <description>Filter init mode</description>
14360 <bitOffset>0</bitOffset>
14361 <bitWidth>1</bitWidth>
14362 </field>
14363 </fields>
14364 </register>
14365 <register>
14366 <name>FM1R</name>
14367 <displayName>FM1R</displayName>
14368 <description>filter mode register</description>
14369 <addressOffset>0x204</addressOffset>
14370 <size>0x20</size>
14371 <access>read-write</access>
14372 <resetValue>0x00000000</resetValue>
14373 <fields>
14374 <field>
14375 <name>FBM0</name>
14376 <description>Filter mode</description>
14377 <bitOffset>0</bitOffset>
14378 <bitWidth>1</bitWidth>
14379 </field>
14380 <field>
14381 <name>FBM1</name>
14382 <description>Filter mode</description>
14383 <bitOffset>1</bitOffset>
14384 <bitWidth>1</bitWidth>
14385 </field>
14386 <field>
14387 <name>FBM2</name>
14388 <description>Filter mode</description>
14389 <bitOffset>2</bitOffset>
14390 <bitWidth>1</bitWidth>
14391 </field>
14392 <field>
14393 <name>FBM3</name>
14394 <description>Filter mode</description>
14395 <bitOffset>3</bitOffset>
14396 <bitWidth>1</bitWidth>
14397 </field>
14398 <field>
14399 <name>FBM4</name>
14400 <description>Filter mode</description>
14401 <bitOffset>4</bitOffset>
14402 <bitWidth>1</bitWidth>
14403 </field>
14404 <field>
14405 <name>FBM5</name>
14406 <description>Filter mode</description>
14407 <bitOffset>5</bitOffset>
14408 <bitWidth>1</bitWidth>
14409 </field>
14410 <field>
14411 <name>FBM6</name>
14412 <description>Filter mode</description>
14413 <bitOffset>6</bitOffset>
14414 <bitWidth>1</bitWidth>
14415 </field>
14416 <field>
14417 <name>FBM7</name>
14418 <description>Filter mode</description>
14419 <bitOffset>7</bitOffset>
14420 <bitWidth>1</bitWidth>
14421 </field>
14422 <field>
14423 <name>FBM8</name>
14424 <description>Filter mode</description>
14425 <bitOffset>8</bitOffset>
14426 <bitWidth>1</bitWidth>
14427 </field>
14428 <field>
14429 <name>FBM9</name>
14430 <description>Filter mode</description>
14431 <bitOffset>9</bitOffset>
14432 <bitWidth>1</bitWidth>
14433 </field>
14434 <field>
14435 <name>FBM10</name>
14436 <description>Filter mode</description>
14437 <bitOffset>10</bitOffset>
14438 <bitWidth>1</bitWidth>
14439 </field>
14440 <field>
14441 <name>FBM11</name>
14442 <description>Filter mode</description>
14443 <bitOffset>11</bitOffset>
14444 <bitWidth>1</bitWidth>
14445 </field>
14446 <field>
14447 <name>FBM12</name>
14448 <description>Filter mode</description>
14449 <bitOffset>12</bitOffset>
14450 <bitWidth>1</bitWidth>
14451 </field>
14452 <field>
14453 <name>FBM13</name>
14454 <description>Filter mode</description>
14455 <bitOffset>13</bitOffset>
14456 <bitWidth>1</bitWidth>
14457 </field>
14458 <field>
14459 <name>FBM14</name>
14460 <description>Filter mode</description>
14461 <bitOffset>14</bitOffset>
14462 <bitWidth>1</bitWidth>
14463 </field>
14464 <field>
14465 <name>FBM15</name>
14466 <description>Filter mode</description>
14467 <bitOffset>15</bitOffset>
14468 <bitWidth>1</bitWidth>
14469 </field>
14470 <field>
14471 <name>FBM16</name>
14472 <description>Filter mode</description>
14473 <bitOffset>16</bitOffset>
14474 <bitWidth>1</bitWidth>
14475 </field>
14476 <field>
14477 <name>FBM17</name>
14478 <description>Filter mode</description>
14479 <bitOffset>17</bitOffset>
14480 <bitWidth>1</bitWidth>
14481 </field>
14482 <field>
14483 <name>FBM18</name>
14484 <description>Filter mode</description>
14485 <bitOffset>18</bitOffset>
14486 <bitWidth>1</bitWidth>
14487 </field>
14488 <field>
14489 <name>FBM19</name>
14490 <description>Filter mode</description>
14491 <bitOffset>19</bitOffset>
14492 <bitWidth>1</bitWidth>
14493 </field>
14494 <field>
14495 <name>FBM20</name>
14496 <description>Filter mode</description>
14497 <bitOffset>20</bitOffset>
14498 <bitWidth>1</bitWidth>
14499 </field>
14500 <field>
14501 <name>FBM21</name>
14502 <description>Filter mode</description>
14503 <bitOffset>21</bitOffset>
14504 <bitWidth>1</bitWidth>
14505 </field>
14506 <field>
14507 <name>FBM22</name>
14508 <description>Filter mode</description>
14509 <bitOffset>22</bitOffset>
14510 <bitWidth>1</bitWidth>
14511 </field>
14512 <field>
14513 <name>FBM23</name>
14514 <description>Filter mode</description>
14515 <bitOffset>23</bitOffset>
14516 <bitWidth>1</bitWidth>
14517 </field>
14518 <field>
14519 <name>FBM24</name>
14520 <description>Filter mode</description>
14521 <bitOffset>24</bitOffset>
14522 <bitWidth>1</bitWidth>
14523 </field>
14524 <field>
14525 <name>FBM25</name>
14526 <description>Filter mode</description>
14527 <bitOffset>25</bitOffset>
14528 <bitWidth>1</bitWidth>
14529 </field>
14530 <field>
14531 <name>FBM26</name>
14532 <description>Filter mode</description>
14533 <bitOffset>26</bitOffset>
14534 <bitWidth>1</bitWidth>
14535 </field>
14536 <field>
14537 <name>FBM27</name>
14538 <description>Filter mode</description>
14539 <bitOffset>27</bitOffset>
14540 <bitWidth>1</bitWidth>
14541 </field>
14542 </fields>
14543 </register>
14544 <register>
14545 <name>FS1R</name>
14546 <displayName>FS1R</displayName>
14547 <description>filter scale register</description>
14548 <addressOffset>0x20C</addressOffset>
14549 <size>0x20</size>
14550 <access>read-write</access>
14551 <resetValue>0x00000000</resetValue>
14552 <fields>
14553 <field>
14554 <name>FSC0</name>
14555 <description>Filter scale configuration</description>
14556 <bitOffset>0</bitOffset>
14557 <bitWidth>1</bitWidth>
14558 </field>
14559 <field>
14560 <name>FSC1</name>
14561 <description>Filter scale configuration</description>
14562 <bitOffset>1</bitOffset>
14563 <bitWidth>1</bitWidth>
14564 </field>
14565 <field>
14566 <name>FSC2</name>
14567 <description>Filter scale configuration</description>
14568 <bitOffset>2</bitOffset>
14569 <bitWidth>1</bitWidth>
14570 </field>
14571 <field>
14572 <name>FSC3</name>
14573 <description>Filter scale configuration</description>
14574 <bitOffset>3</bitOffset>
14575 <bitWidth>1</bitWidth>
14576 </field>
14577 <field>
14578 <name>FSC4</name>
14579 <description>Filter scale configuration</description>
14580 <bitOffset>4</bitOffset>
14581 <bitWidth>1</bitWidth>
14582 </field>
14583 <field>
14584 <name>FSC5</name>
14585 <description>Filter scale configuration</description>
14586 <bitOffset>5</bitOffset>
14587 <bitWidth>1</bitWidth>
14588 </field>
14589 <field>
14590 <name>FSC6</name>
14591 <description>Filter scale configuration</description>
14592 <bitOffset>6</bitOffset>
14593 <bitWidth>1</bitWidth>
14594 </field>
14595 <field>
14596 <name>FSC7</name>
14597 <description>Filter scale configuration</description>
14598 <bitOffset>7</bitOffset>
14599 <bitWidth>1</bitWidth>
14600 </field>
14601 <field>
14602 <name>FSC8</name>
14603 <description>Filter scale configuration</description>
14604 <bitOffset>8</bitOffset>
14605 <bitWidth>1</bitWidth>
14606 </field>
14607 <field>
14608 <name>FSC9</name>
14609 <description>Filter scale configuration</description>
14610 <bitOffset>9</bitOffset>
14611 <bitWidth>1</bitWidth>
14612 </field>
14613 <field>
14614 <name>FSC10</name>
14615 <description>Filter scale configuration</description>
14616 <bitOffset>10</bitOffset>
14617 <bitWidth>1</bitWidth>
14618 </field>
14619 <field>
14620 <name>FSC11</name>
14621 <description>Filter scale configuration</description>
14622 <bitOffset>11</bitOffset>
14623 <bitWidth>1</bitWidth>
14624 </field>
14625 <field>
14626 <name>FSC12</name>
14627 <description>Filter scale configuration</description>
14628 <bitOffset>12</bitOffset>
14629 <bitWidth>1</bitWidth>
14630 </field>
14631 <field>
14632 <name>FSC13</name>
14633 <description>Filter scale configuration</description>
14634 <bitOffset>13</bitOffset>
14635 <bitWidth>1</bitWidth>
14636 </field>
14637 <field>
14638 <name>FSC14</name>
14639 <description>Filter scale configuration</description>
14640 <bitOffset>14</bitOffset>
14641 <bitWidth>1</bitWidth>
14642 </field>
14643 <field>
14644 <name>FSC15</name>
14645 <description>Filter scale configuration</description>
14646 <bitOffset>15</bitOffset>
14647 <bitWidth>1</bitWidth>
14648 </field>
14649 <field>
14650 <name>FSC16</name>
14651 <description>Filter scale configuration</description>
14652 <bitOffset>16</bitOffset>
14653 <bitWidth>1</bitWidth>
14654 </field>
14655 <field>
14656 <name>FSC17</name>
14657 <description>Filter scale configuration</description>
14658 <bitOffset>17</bitOffset>
14659 <bitWidth>1</bitWidth>
14660 </field>
14661 <field>
14662 <name>FSC18</name>
14663 <description>Filter scale configuration</description>
14664 <bitOffset>18</bitOffset>
14665 <bitWidth>1</bitWidth>
14666 </field>
14667 <field>
14668 <name>FSC19</name>
14669 <description>Filter scale configuration</description>
14670 <bitOffset>19</bitOffset>
14671 <bitWidth>1</bitWidth>
14672 </field>
14673 <field>
14674 <name>FSC20</name>
14675 <description>Filter scale configuration</description>
14676 <bitOffset>20</bitOffset>
14677 <bitWidth>1</bitWidth>
14678 </field>
14679 <field>
14680 <name>FSC21</name>
14681 <description>Filter scale configuration</description>
14682 <bitOffset>21</bitOffset>
14683 <bitWidth>1</bitWidth>
14684 </field>
14685 <field>
14686 <name>FSC22</name>
14687 <description>Filter scale configuration</description>
14688 <bitOffset>22</bitOffset>
14689 <bitWidth>1</bitWidth>
14690 </field>
14691 <field>
14692 <name>FSC23</name>
14693 <description>Filter scale configuration</description>
14694 <bitOffset>23</bitOffset>
14695 <bitWidth>1</bitWidth>
14696 </field>
14697 <field>
14698 <name>FSC24</name>
14699 <description>Filter scale configuration</description>
14700 <bitOffset>24</bitOffset>
14701 <bitWidth>1</bitWidth>
14702 </field>
14703 <field>
14704 <name>FSC25</name>
14705 <description>Filter scale configuration</description>
14706 <bitOffset>25</bitOffset>
14707 <bitWidth>1</bitWidth>
14708 </field>
14709 <field>
14710 <name>FSC26</name>
14711 <description>Filter scale configuration</description>
14712 <bitOffset>26</bitOffset>
14713 <bitWidth>1</bitWidth>
14714 </field>
14715 <field>
14716 <name>FSC27</name>
14717 <description>Filter scale configuration</description>
14718 <bitOffset>27</bitOffset>
14719 <bitWidth>1</bitWidth>
14720 </field>
14721 </fields>
14722 </register>
14723 <register>
14724 <name>FFA1R</name>
14725 <displayName>FFA1R</displayName>
14726 <description>filter FIFO assignment
14727 register</description>
14728 <addressOffset>0x214</addressOffset>
14729 <size>0x20</size>
14730 <access>read-write</access>
14731 <resetValue>0x00000000</resetValue>
14732 <fields>
14733 <field>
14734 <name>FFA0</name>
14735 <description>Filter FIFO assignment for filter
14736 0</description>
14737 <bitOffset>0</bitOffset>
14738 <bitWidth>1</bitWidth>
14739 </field>
14740 <field>
14741 <name>FFA1</name>
14742 <description>Filter FIFO assignment for filter
14743 1</description>
14744 <bitOffset>1</bitOffset>
14745 <bitWidth>1</bitWidth>
14746 </field>
14747 <field>
14748 <name>FFA2</name>
14749 <description>Filter FIFO assignment for filter
14750 2</description>
14751 <bitOffset>2</bitOffset>
14752 <bitWidth>1</bitWidth>
14753 </field>
14754 <field>
14755 <name>FFA3</name>
14756 <description>Filter FIFO assignment for filter
14757 3</description>
14758 <bitOffset>3</bitOffset>
14759 <bitWidth>1</bitWidth>
14760 </field>
14761 <field>
14762 <name>FFA4</name>
14763 <description>Filter FIFO assignment for filter
14764 4</description>
14765 <bitOffset>4</bitOffset>
14766 <bitWidth>1</bitWidth>
14767 </field>
14768 <field>
14769 <name>FFA5</name>
14770 <description>Filter FIFO assignment for filter
14771 5</description>
14772 <bitOffset>5</bitOffset>
14773 <bitWidth>1</bitWidth>
14774 </field>
14775 <field>
14776 <name>FFA6</name>
14777 <description>Filter FIFO assignment for filter
14778 6</description>
14779 <bitOffset>6</bitOffset>
14780 <bitWidth>1</bitWidth>
14781 </field>
14782 <field>
14783 <name>FFA7</name>
14784 <description>Filter FIFO assignment for filter
14785 7</description>
14786 <bitOffset>7</bitOffset>
14787 <bitWidth>1</bitWidth>
14788 </field>
14789 <field>
14790 <name>FFA8</name>
14791 <description>Filter FIFO assignment for filter
14792 8</description>
14793 <bitOffset>8</bitOffset>
14794 <bitWidth>1</bitWidth>
14795 </field>
14796 <field>
14797 <name>FFA9</name>
14798 <description>Filter FIFO assignment for filter
14799 9</description>
14800 <bitOffset>9</bitOffset>
14801 <bitWidth>1</bitWidth>
14802 </field>
14803 <field>
14804 <name>FFA10</name>
14805 <description>Filter FIFO assignment for filter
14806 10</description>
14807 <bitOffset>10</bitOffset>
14808 <bitWidth>1</bitWidth>
14809 </field>
14810 <field>
14811 <name>FFA11</name>
14812 <description>Filter FIFO assignment for filter
14813 11</description>
14814 <bitOffset>11</bitOffset>
14815 <bitWidth>1</bitWidth>
14816 </field>
14817 <field>
14818 <name>FFA12</name>
14819 <description>Filter FIFO assignment for filter
14820 12</description>
14821 <bitOffset>12</bitOffset>
14822 <bitWidth>1</bitWidth>
14823 </field>
14824 <field>
14825 <name>FFA13</name>
14826 <description>Filter FIFO assignment for filter
14827 13</description>
14828 <bitOffset>13</bitOffset>
14829 <bitWidth>1</bitWidth>
14830 </field>
14831 <field>
14832 <name>FFA14</name>
14833 <description>Filter FIFO assignment for filter
14834 14</description>
14835 <bitOffset>14</bitOffset>
14836 <bitWidth>1</bitWidth>
14837 </field>
14838 <field>
14839 <name>FFA15</name>
14840 <description>Filter FIFO assignment for filter
14841 15</description>
14842 <bitOffset>15</bitOffset>
14843 <bitWidth>1</bitWidth>
14844 </field>
14845 <field>
14846 <name>FFA16</name>
14847 <description>Filter FIFO assignment for filter
14848 16</description>
14849 <bitOffset>16</bitOffset>
14850 <bitWidth>1</bitWidth>
14851 </field>
14852 <field>
14853 <name>FFA17</name>
14854 <description>Filter FIFO assignment for filter
14855 17</description>
14856 <bitOffset>17</bitOffset>
14857 <bitWidth>1</bitWidth>
14858 </field>
14859 <field>
14860 <name>FFA18</name>
14861 <description>Filter FIFO assignment for filter
14862 18</description>
14863 <bitOffset>18</bitOffset>
14864 <bitWidth>1</bitWidth>
14865 </field>
14866 <field>
14867 <name>FFA19</name>
14868 <description>Filter FIFO assignment for filter
14869 19</description>
14870 <bitOffset>19</bitOffset>
14871 <bitWidth>1</bitWidth>
14872 </field>
14873 <field>
14874 <name>FFA20</name>
14875 <description>Filter FIFO assignment for filter
14876 20</description>
14877 <bitOffset>20</bitOffset>
14878 <bitWidth>1</bitWidth>
14879 </field>
14880 <field>
14881 <name>FFA21</name>
14882 <description>Filter FIFO assignment for filter
14883 21</description>
14884 <bitOffset>21</bitOffset>
14885 <bitWidth>1</bitWidth>
14886 </field>
14887 <field>
14888 <name>FFA22</name>
14889 <description>Filter FIFO assignment for filter
14890 22</description>
14891 <bitOffset>22</bitOffset>
14892 <bitWidth>1</bitWidth>
14893 </field>
14894 <field>
14895 <name>FFA23</name>
14896 <description>Filter FIFO assignment for filter
14897 23</description>
14898 <bitOffset>23</bitOffset>
14899 <bitWidth>1</bitWidth>
14900 </field>
14901 <field>
14902 <name>FFA24</name>
14903 <description>Filter FIFO assignment for filter
14904 24</description>
14905 <bitOffset>24</bitOffset>
14906 <bitWidth>1</bitWidth>
14907 </field>
14908 <field>
14909 <name>FFA25</name>
14910 <description>Filter FIFO assignment for filter
14911 25</description>
14912 <bitOffset>25</bitOffset>
14913 <bitWidth>1</bitWidth>
14914 </field>
14915 <field>
14916 <name>FFA26</name>
14917 <description>Filter FIFO assignment for filter
14918 26</description>
14919 <bitOffset>26</bitOffset>
14920 <bitWidth>1</bitWidth>
14921 </field>
14922 <field>
14923 <name>FFA27</name>
14924 <description>Filter FIFO assignment for filter
14925 27</description>
14926 <bitOffset>27</bitOffset>
14927 <bitWidth>1</bitWidth>
14928 </field>
14929 </fields>
14930 </register>
14931 <register>
14932 <name>FA1R</name>
14933 <displayName>FA1R</displayName>
14934 <description>CAN filter activation register</description>
14935 <addressOffset>0x21C</addressOffset>
14936 <size>0x20</size>
14937 <access>read-write</access>
14938 <resetValue>0x00000000</resetValue>
14939 <fields>
14940 <field>
14941 <name>FACT0</name>
14942 <description>Filter active</description>
14943 <bitOffset>0</bitOffset>
14944 <bitWidth>1</bitWidth>
14945 </field>
14946 <field>
14947 <name>FACT1</name>
14948 <description>Filter active</description>
14949 <bitOffset>1</bitOffset>
14950 <bitWidth>1</bitWidth>
14951 </field>
14952 <field>
14953 <name>FACT2</name>
14954 <description>Filter active</description>
14955 <bitOffset>2</bitOffset>
14956 <bitWidth>1</bitWidth>
14957 </field>
14958 <field>
14959 <name>FACT3</name>
14960 <description>Filter active</description>
14961 <bitOffset>3</bitOffset>
14962 <bitWidth>1</bitWidth>
14963 </field>
14964 <field>
14965 <name>FACT4</name>
14966 <description>Filter active</description>
14967 <bitOffset>4</bitOffset>
14968 <bitWidth>1</bitWidth>
14969 </field>
14970 <field>
14971 <name>FACT5</name>
14972 <description>Filter active</description>
14973 <bitOffset>5</bitOffset>
14974 <bitWidth>1</bitWidth>
14975 </field>
14976 <field>
14977 <name>FACT6</name>
14978 <description>Filter active</description>
14979 <bitOffset>6</bitOffset>
14980 <bitWidth>1</bitWidth>
14981 </field>
14982 <field>
14983 <name>FACT7</name>
14984 <description>Filter active</description>
14985 <bitOffset>7</bitOffset>
14986 <bitWidth>1</bitWidth>
14987 </field>
14988 <field>
14989 <name>FACT8</name>
14990 <description>Filter active</description>
14991 <bitOffset>8</bitOffset>
14992 <bitWidth>1</bitWidth>
14993 </field>
14994 <field>
14995 <name>FACT9</name>
14996 <description>Filter active</description>
14997 <bitOffset>9</bitOffset>
14998 <bitWidth>1</bitWidth>
14999 </field>
15000 <field>
15001 <name>FACT10</name>
15002 <description>Filter active</description>
15003 <bitOffset>10</bitOffset>
15004 <bitWidth>1</bitWidth>
15005 </field>
15006 <field>
15007 <name>FACT11</name>
15008 <description>Filter active</description>
15009 <bitOffset>11</bitOffset>
15010 <bitWidth>1</bitWidth>
15011 </field>
15012 <field>
15013 <name>FACT12</name>
15014 <description>Filter active</description>
15015 <bitOffset>12</bitOffset>
15016 <bitWidth>1</bitWidth>
15017 </field>
15018 <field>
15019 <name>FACT13</name>
15020 <description>Filter active</description>
15021 <bitOffset>13</bitOffset>
15022 <bitWidth>1</bitWidth>
15023 </field>
15024 <field>
15025 <name>FACT14</name>
15026 <description>Filter active</description>
15027 <bitOffset>14</bitOffset>
15028 <bitWidth>1</bitWidth>
15029 </field>
15030 <field>
15031 <name>FACT15</name>
15032 <description>Filter active</description>
15033 <bitOffset>15</bitOffset>
15034 <bitWidth>1</bitWidth>
15035 </field>
15036 <field>
15037 <name>FACT16</name>
15038 <description>Filter active</description>
15039 <bitOffset>16</bitOffset>
15040 <bitWidth>1</bitWidth>
15041 </field>
15042 <field>
15043 <name>FACT17</name>
15044 <description>Filter active</description>
15045 <bitOffset>17</bitOffset>
15046 <bitWidth>1</bitWidth>
15047 </field>
15048 <field>
15049 <name>FACT18</name>
15050 <description>Filter active</description>
15051 <bitOffset>18</bitOffset>
15052 <bitWidth>1</bitWidth>
15053 </field>
15054 <field>
15055 <name>FACT19</name>
15056 <description>Filter active</description>
15057 <bitOffset>19</bitOffset>
15058 <bitWidth>1</bitWidth>
15059 </field>
15060 <field>
15061 <name>FACT20</name>
15062 <description>Filter active</description>
15063 <bitOffset>20</bitOffset>
15064 <bitWidth>1</bitWidth>
15065 </field>
15066 <field>
15067 <name>FACT21</name>
15068 <description>Filter active</description>
15069 <bitOffset>21</bitOffset>
15070 <bitWidth>1</bitWidth>
15071 </field>
15072 <field>
15073 <name>FACT22</name>
15074 <description>Filter active</description>
15075 <bitOffset>22</bitOffset>
15076 <bitWidth>1</bitWidth>
15077 </field>
15078 <field>
15079 <name>FACT23</name>
15080 <description>Filter active</description>
15081 <bitOffset>23</bitOffset>
15082 <bitWidth>1</bitWidth>
15083 </field>
15084 <field>
15085 <name>FACT24</name>
15086 <description>Filter active</description>
15087 <bitOffset>24</bitOffset>
15088 <bitWidth>1</bitWidth>
15089 </field>
15090 <field>
15091 <name>FACT25</name>
15092 <description>Filter active</description>
15093 <bitOffset>25</bitOffset>
15094 <bitWidth>1</bitWidth>
15095 </field>
15096 <field>
15097 <name>FACT26</name>
15098 <description>Filter active</description>
15099 <bitOffset>26</bitOffset>
15100 <bitWidth>1</bitWidth>
15101 </field>
15102 <field>
15103 <name>FACT27</name>
15104 <description>Filter active</description>
15105 <bitOffset>27</bitOffset>
15106 <bitWidth>1</bitWidth>
15107 </field>
15108 </fields>
15109 </register>
15110 <register>
15111 <name>F0R1</name>
15112 <displayName>F0R1</displayName>
15113 <description>Filter bank 0 register 1</description>
15114 <addressOffset>0x240</addressOffset>
15115 <size>0x20</size>
15116 <access>read-write</access>
15117 <resetValue>0x00000000</resetValue>
15118 <fields>
15119 <field>
15120 <name>FB0</name>
15121 <description>Filter bits</description>
15122 <bitOffset>0</bitOffset>
15123 <bitWidth>1</bitWidth>
15124 </field>
15125 <field>
15126 <name>FB1</name>
15127 <description>Filter bits</description>
15128 <bitOffset>1</bitOffset>
15129 <bitWidth>1</bitWidth>
15130 </field>
15131 <field>
15132 <name>FB2</name>
15133 <description>Filter bits</description>
15134 <bitOffset>2</bitOffset>
15135 <bitWidth>1</bitWidth>
15136 </field>
15137 <field>
15138 <name>FB3</name>
15139 <description>Filter bits</description>
15140 <bitOffset>3</bitOffset>
15141 <bitWidth>1</bitWidth>
15142 </field>
15143 <field>
15144 <name>FB4</name>
15145 <description>Filter bits</description>
15146 <bitOffset>4</bitOffset>
15147 <bitWidth>1</bitWidth>
15148 </field>
15149 <field>
15150 <name>FB5</name>
15151 <description>Filter bits</description>
15152 <bitOffset>5</bitOffset>
15153 <bitWidth>1</bitWidth>
15154 </field>
15155 <field>
15156 <name>FB6</name>
15157 <description>Filter bits</description>
15158 <bitOffset>6</bitOffset>
15159 <bitWidth>1</bitWidth>
15160 </field>
15161 <field>
15162 <name>FB7</name>
15163 <description>Filter bits</description>
15164 <bitOffset>7</bitOffset>
15165 <bitWidth>1</bitWidth>
15166 </field>
15167 <field>
15168 <name>FB8</name>
15169 <description>Filter bits</description>
15170 <bitOffset>8</bitOffset>
15171 <bitWidth>1</bitWidth>
15172 </field>
15173 <field>
15174 <name>FB9</name>
15175 <description>Filter bits</description>
15176 <bitOffset>9</bitOffset>
15177 <bitWidth>1</bitWidth>
15178 </field>
15179 <field>
15180 <name>FB10</name>
15181 <description>Filter bits</description>
15182 <bitOffset>10</bitOffset>
15183 <bitWidth>1</bitWidth>
15184 </field>
15185 <field>
15186 <name>FB11</name>
15187 <description>Filter bits</description>
15188 <bitOffset>11</bitOffset>
15189 <bitWidth>1</bitWidth>
15190 </field>
15191 <field>
15192 <name>FB12</name>
15193 <description>Filter bits</description>
15194 <bitOffset>12</bitOffset>
15195 <bitWidth>1</bitWidth>
15196 </field>
15197 <field>
15198 <name>FB13</name>
15199 <description>Filter bits</description>
15200 <bitOffset>13</bitOffset>
15201 <bitWidth>1</bitWidth>
15202 </field>
15203 <field>
15204 <name>FB14</name>
15205 <description>Filter bits</description>
15206 <bitOffset>14</bitOffset>
15207 <bitWidth>1</bitWidth>
15208 </field>
15209 <field>
15210 <name>FB15</name>
15211 <description>Filter bits</description>
15212 <bitOffset>15</bitOffset>
15213 <bitWidth>1</bitWidth>
15214 </field>
15215 <field>
15216 <name>FB16</name>
15217 <description>Filter bits</description>
15218 <bitOffset>16</bitOffset>
15219 <bitWidth>1</bitWidth>
15220 </field>
15221 <field>
15222 <name>FB17</name>
15223 <description>Filter bits</description>
15224 <bitOffset>17</bitOffset>
15225 <bitWidth>1</bitWidth>
15226 </field>
15227 <field>
15228 <name>FB18</name>
15229 <description>Filter bits</description>
15230 <bitOffset>18</bitOffset>
15231 <bitWidth>1</bitWidth>
15232 </field>
15233 <field>
15234 <name>FB19</name>
15235 <description>Filter bits</description>
15236 <bitOffset>19</bitOffset>
15237 <bitWidth>1</bitWidth>
15238 </field>
15239 <field>
15240 <name>FB20</name>
15241 <description>Filter bits</description>
15242 <bitOffset>20</bitOffset>
15243 <bitWidth>1</bitWidth>
15244 </field>
15245 <field>
15246 <name>FB21</name>
15247 <description>Filter bits</description>
15248 <bitOffset>21</bitOffset>
15249 <bitWidth>1</bitWidth>
15250 </field>
15251 <field>
15252 <name>FB22</name>
15253 <description>Filter bits</description>
15254 <bitOffset>22</bitOffset>
15255 <bitWidth>1</bitWidth>
15256 </field>
15257 <field>
15258 <name>FB23</name>
15259 <description>Filter bits</description>
15260 <bitOffset>23</bitOffset>
15261 <bitWidth>1</bitWidth>
15262 </field>
15263 <field>
15264 <name>FB24</name>
15265 <description>Filter bits</description>
15266 <bitOffset>24</bitOffset>
15267 <bitWidth>1</bitWidth>
15268 </field>
15269 <field>
15270 <name>FB25</name>
15271 <description>Filter bits</description>
15272 <bitOffset>25</bitOffset>
15273 <bitWidth>1</bitWidth>
15274 </field>
15275 <field>
15276 <name>FB26</name>
15277 <description>Filter bits</description>
15278 <bitOffset>26</bitOffset>
15279 <bitWidth>1</bitWidth>
15280 </field>
15281 <field>
15282 <name>FB27</name>
15283 <description>Filter bits</description>
15284 <bitOffset>27</bitOffset>
15285 <bitWidth>1</bitWidth>
15286 </field>
15287 <field>
15288 <name>FB28</name>
15289 <description>Filter bits</description>
15290 <bitOffset>28</bitOffset>
15291 <bitWidth>1</bitWidth>
15292 </field>
15293 <field>
15294 <name>FB29</name>
15295 <description>Filter bits</description>
15296 <bitOffset>29</bitOffset>
15297 <bitWidth>1</bitWidth>
15298 </field>
15299 <field>
15300 <name>FB30</name>
15301 <description>Filter bits</description>
15302 <bitOffset>30</bitOffset>
15303 <bitWidth>1</bitWidth>
15304 </field>
15305 <field>
15306 <name>FB31</name>
15307 <description>Filter bits</description>
15308 <bitOffset>31</bitOffset>
15309 <bitWidth>1</bitWidth>
15310 </field>
15311 </fields>
15312 </register>
15313 <register>
15314 <name>F0R2</name>
15315 <displayName>F0R2</displayName>
15316 <description>Filter bank 0 register 2</description>
15317 <addressOffset>0x244</addressOffset>
15318 <size>0x20</size>
15319 <access>read-write</access>
15320 <resetValue>0x00000000</resetValue>
15321 <fields>
15322 <field>
15323 <name>FB0</name>
15324 <description>Filter bits</description>
15325 <bitOffset>0</bitOffset>
15326 <bitWidth>1</bitWidth>
15327 </field>
15328 <field>
15329 <name>FB1</name>
15330 <description>Filter bits</description>
15331 <bitOffset>1</bitOffset>
15332 <bitWidth>1</bitWidth>
15333 </field>
15334 <field>
15335 <name>FB2</name>
15336 <description>Filter bits</description>
15337 <bitOffset>2</bitOffset>
15338 <bitWidth>1</bitWidth>
15339 </field>
15340 <field>
15341 <name>FB3</name>
15342 <description>Filter bits</description>
15343 <bitOffset>3</bitOffset>
15344 <bitWidth>1</bitWidth>
15345 </field>
15346 <field>
15347 <name>FB4</name>
15348 <description>Filter bits</description>
15349 <bitOffset>4</bitOffset>
15350 <bitWidth>1</bitWidth>
15351 </field>
15352 <field>
15353 <name>FB5</name>
15354 <description>Filter bits</description>
15355 <bitOffset>5</bitOffset>
15356 <bitWidth>1</bitWidth>
15357 </field>
15358 <field>
15359 <name>FB6</name>
15360 <description>Filter bits</description>
15361 <bitOffset>6</bitOffset>
15362 <bitWidth>1</bitWidth>
15363 </field>
15364 <field>
15365 <name>FB7</name>
15366 <description>Filter bits</description>
15367 <bitOffset>7</bitOffset>
15368 <bitWidth>1</bitWidth>
15369 </field>
15370 <field>
15371 <name>FB8</name>
15372 <description>Filter bits</description>
15373 <bitOffset>8</bitOffset>
15374 <bitWidth>1</bitWidth>
15375 </field>
15376 <field>
15377 <name>FB9</name>
15378 <description>Filter bits</description>
15379 <bitOffset>9</bitOffset>
15380 <bitWidth>1</bitWidth>
15381 </field>
15382 <field>
15383 <name>FB10</name>
15384 <description>Filter bits</description>
15385 <bitOffset>10</bitOffset>
15386 <bitWidth>1</bitWidth>
15387 </field>
15388 <field>
15389 <name>FB11</name>
15390 <description>Filter bits</description>
15391 <bitOffset>11</bitOffset>
15392 <bitWidth>1</bitWidth>
15393 </field>
15394 <field>
15395 <name>FB12</name>
15396 <description>Filter bits</description>
15397 <bitOffset>12</bitOffset>
15398 <bitWidth>1</bitWidth>
15399 </field>
15400 <field>
15401 <name>FB13</name>
15402 <description>Filter bits</description>
15403 <bitOffset>13</bitOffset>
15404 <bitWidth>1</bitWidth>
15405 </field>
15406 <field>
15407 <name>FB14</name>
15408 <description>Filter bits</description>
15409 <bitOffset>14</bitOffset>
15410 <bitWidth>1</bitWidth>
15411 </field>
15412 <field>
15413 <name>FB15</name>
15414 <description>Filter bits</description>
15415 <bitOffset>15</bitOffset>
15416 <bitWidth>1</bitWidth>
15417 </field>
15418 <field>
15419 <name>FB16</name>
15420 <description>Filter bits</description>
15421 <bitOffset>16</bitOffset>
15422 <bitWidth>1</bitWidth>
15423 </field>
15424 <field>
15425 <name>FB17</name>
15426 <description>Filter bits</description>
15427 <bitOffset>17</bitOffset>
15428 <bitWidth>1</bitWidth>
15429 </field>
15430 <field>
15431 <name>FB18</name>
15432 <description>Filter bits</description>
15433 <bitOffset>18</bitOffset>
15434 <bitWidth>1</bitWidth>
15435 </field>
15436 <field>
15437 <name>FB19</name>
15438 <description>Filter bits</description>
15439 <bitOffset>19</bitOffset>
15440 <bitWidth>1</bitWidth>
15441 </field>
15442 <field>
15443 <name>FB20</name>
15444 <description>Filter bits</description>
15445 <bitOffset>20</bitOffset>
15446 <bitWidth>1</bitWidth>
15447 </field>
15448 <field>
15449 <name>FB21</name>
15450 <description>Filter bits</description>
15451 <bitOffset>21</bitOffset>
15452 <bitWidth>1</bitWidth>
15453 </field>
15454 <field>
15455 <name>FB22</name>
15456 <description>Filter bits</description>
15457 <bitOffset>22</bitOffset>
15458 <bitWidth>1</bitWidth>
15459 </field>
15460 <field>
15461 <name>FB23</name>
15462 <description>Filter bits</description>
15463 <bitOffset>23</bitOffset>
15464 <bitWidth>1</bitWidth>
15465 </field>
15466 <field>
15467 <name>FB24</name>
15468 <description>Filter bits</description>
15469 <bitOffset>24</bitOffset>
15470 <bitWidth>1</bitWidth>
15471 </field>
15472 <field>
15473 <name>FB25</name>
15474 <description>Filter bits</description>
15475 <bitOffset>25</bitOffset>
15476 <bitWidth>1</bitWidth>
15477 </field>
15478 <field>
15479 <name>FB26</name>
15480 <description>Filter bits</description>
15481 <bitOffset>26</bitOffset>
15482 <bitWidth>1</bitWidth>
15483 </field>
15484 <field>
15485 <name>FB27</name>
15486 <description>Filter bits</description>
15487 <bitOffset>27</bitOffset>
15488 <bitWidth>1</bitWidth>
15489 </field>
15490 <field>
15491 <name>FB28</name>
15492 <description>Filter bits</description>
15493 <bitOffset>28</bitOffset>
15494 <bitWidth>1</bitWidth>
15495 </field>
15496 <field>
15497 <name>FB29</name>
15498 <description>Filter bits</description>
15499 <bitOffset>29</bitOffset>
15500 <bitWidth>1</bitWidth>
15501 </field>
15502 <field>
15503 <name>FB30</name>
15504 <description>Filter bits</description>
15505 <bitOffset>30</bitOffset>
15506 <bitWidth>1</bitWidth>
15507 </field>
15508 <field>
15509 <name>FB31</name>
15510 <description>Filter bits</description>
15511 <bitOffset>31</bitOffset>
15512 <bitWidth>1</bitWidth>
15513 </field>
15514 </fields>
15515 </register>
15516 <register>
15517 <name>F1R1</name>
15518 <displayName>F1R1</displayName>
15519 <description>Filter bank 1 register 1</description>
15520 <addressOffset>0x248</addressOffset>
15521 <size>0x20</size>
15522 <access>read-write</access>
15523 <resetValue>0x00000000</resetValue>
15524 <fields>
15525 <field>
15526 <name>FB0</name>
15527 <description>Filter bits</description>
15528 <bitOffset>0</bitOffset>
15529 <bitWidth>1</bitWidth>
15530 </field>
15531 <field>
15532 <name>FB1</name>
15533 <description>Filter bits</description>
15534 <bitOffset>1</bitOffset>
15535 <bitWidth>1</bitWidth>
15536 </field>
15537 <field>
15538 <name>FB2</name>
15539 <description>Filter bits</description>
15540 <bitOffset>2</bitOffset>
15541 <bitWidth>1</bitWidth>
15542 </field>
15543 <field>
15544 <name>FB3</name>
15545 <description>Filter bits</description>
15546 <bitOffset>3</bitOffset>
15547 <bitWidth>1</bitWidth>
15548 </field>
15549 <field>
15550 <name>FB4</name>
15551 <description>Filter bits</description>
15552 <bitOffset>4</bitOffset>
15553 <bitWidth>1</bitWidth>
15554 </field>
15555 <field>
15556 <name>FB5</name>
15557 <description>Filter bits</description>
15558 <bitOffset>5</bitOffset>
15559 <bitWidth>1</bitWidth>
15560 </field>
15561 <field>
15562 <name>FB6</name>
15563 <description>Filter bits</description>
15564 <bitOffset>6</bitOffset>
15565 <bitWidth>1</bitWidth>
15566 </field>
15567 <field>
15568 <name>FB7</name>
15569 <description>Filter bits</description>
15570 <bitOffset>7</bitOffset>
15571 <bitWidth>1</bitWidth>
15572 </field>
15573 <field>
15574 <name>FB8</name>
15575 <description>Filter bits</description>
15576 <bitOffset>8</bitOffset>
15577 <bitWidth>1</bitWidth>
15578 </field>
15579 <field>
15580 <name>FB9</name>
15581 <description>Filter bits</description>
15582 <bitOffset>9</bitOffset>
15583 <bitWidth>1</bitWidth>
15584 </field>
15585 <field>
15586 <name>FB10</name>
15587 <description>Filter bits</description>
15588 <bitOffset>10</bitOffset>
15589 <bitWidth>1</bitWidth>
15590 </field>
15591 <field>
15592 <name>FB11</name>
15593 <description>Filter bits</description>
15594 <bitOffset>11</bitOffset>
15595 <bitWidth>1</bitWidth>
15596 </field>
15597 <field>
15598 <name>FB12</name>
15599 <description>Filter bits</description>
15600 <bitOffset>12</bitOffset>
15601 <bitWidth>1</bitWidth>
15602 </field>
15603 <field>
15604 <name>FB13</name>
15605 <description>Filter bits</description>
15606 <bitOffset>13</bitOffset>
15607 <bitWidth>1</bitWidth>
15608 </field>
15609 <field>
15610 <name>FB14</name>
15611 <description>Filter bits</description>
15612 <bitOffset>14</bitOffset>
15613 <bitWidth>1</bitWidth>
15614 </field>
15615 <field>
15616 <name>FB15</name>
15617 <description>Filter bits</description>
15618 <bitOffset>15</bitOffset>
15619 <bitWidth>1</bitWidth>
15620 </field>
15621 <field>
15622 <name>FB16</name>
15623 <description>Filter bits</description>
15624 <bitOffset>16</bitOffset>
15625 <bitWidth>1</bitWidth>
15626 </field>
15627 <field>
15628 <name>FB17</name>
15629 <description>Filter bits</description>
15630 <bitOffset>17</bitOffset>
15631 <bitWidth>1</bitWidth>
15632 </field>
15633 <field>
15634 <name>FB18</name>
15635 <description>Filter bits</description>
15636 <bitOffset>18</bitOffset>
15637 <bitWidth>1</bitWidth>
15638 </field>
15639 <field>
15640 <name>FB19</name>
15641 <description>Filter bits</description>
15642 <bitOffset>19</bitOffset>
15643 <bitWidth>1</bitWidth>
15644 </field>
15645 <field>
15646 <name>FB20</name>
15647 <description>Filter bits</description>
15648 <bitOffset>20</bitOffset>
15649 <bitWidth>1</bitWidth>
15650 </field>
15651 <field>
15652 <name>FB21</name>
15653 <description>Filter bits</description>
15654 <bitOffset>21</bitOffset>
15655 <bitWidth>1</bitWidth>
15656 </field>
15657 <field>
15658 <name>FB22</name>
15659 <description>Filter bits</description>
15660 <bitOffset>22</bitOffset>
15661 <bitWidth>1</bitWidth>
15662 </field>
15663 <field>
15664 <name>FB23</name>
15665 <description>Filter bits</description>
15666 <bitOffset>23</bitOffset>
15667 <bitWidth>1</bitWidth>
15668 </field>
15669 <field>
15670 <name>FB24</name>
15671 <description>Filter bits</description>
15672 <bitOffset>24</bitOffset>
15673 <bitWidth>1</bitWidth>
15674 </field>
15675 <field>
15676 <name>FB25</name>
15677 <description>Filter bits</description>
15678 <bitOffset>25</bitOffset>
15679 <bitWidth>1</bitWidth>
15680 </field>
15681 <field>
15682 <name>FB26</name>
15683 <description>Filter bits</description>
15684 <bitOffset>26</bitOffset>
15685 <bitWidth>1</bitWidth>
15686 </field>
15687 <field>
15688 <name>FB27</name>
15689 <description>Filter bits</description>
15690 <bitOffset>27</bitOffset>
15691 <bitWidth>1</bitWidth>
15692 </field>
15693 <field>
15694 <name>FB28</name>
15695 <description>Filter bits</description>
15696 <bitOffset>28</bitOffset>
15697 <bitWidth>1</bitWidth>
15698 </field>
15699 <field>
15700 <name>FB29</name>
15701 <description>Filter bits</description>
15702 <bitOffset>29</bitOffset>
15703 <bitWidth>1</bitWidth>
15704 </field>
15705 <field>
15706 <name>FB30</name>
15707 <description>Filter bits</description>
15708 <bitOffset>30</bitOffset>
15709 <bitWidth>1</bitWidth>
15710 </field>
15711 <field>
15712 <name>FB31</name>
15713 <description>Filter bits</description>
15714 <bitOffset>31</bitOffset>
15715 <bitWidth>1</bitWidth>
15716 </field>
15717 </fields>
15718 </register>
15719 <register>
15720 <name>F1R2</name>
15721 <displayName>F1R2</displayName>
15722 <description>Filter bank 1 register 2</description>
15723 <addressOffset>0x24C</addressOffset>
15724 <size>0x20</size>
15725 <access>read-write</access>
15726 <resetValue>0x00000000</resetValue>
15727 <fields>
15728 <field>
15729 <name>FB0</name>
15730 <description>Filter bits</description>
15731 <bitOffset>0</bitOffset>
15732 <bitWidth>1</bitWidth>
15733 </field>
15734 <field>
15735 <name>FB1</name>
15736 <description>Filter bits</description>
15737 <bitOffset>1</bitOffset>
15738 <bitWidth>1</bitWidth>
15739 </field>
15740 <field>
15741 <name>FB2</name>
15742 <description>Filter bits</description>
15743 <bitOffset>2</bitOffset>
15744 <bitWidth>1</bitWidth>
15745 </field>
15746 <field>
15747 <name>FB3</name>
15748 <description>Filter bits</description>
15749 <bitOffset>3</bitOffset>
15750 <bitWidth>1</bitWidth>
15751 </field>
15752 <field>
15753 <name>FB4</name>
15754 <description>Filter bits</description>
15755 <bitOffset>4</bitOffset>
15756 <bitWidth>1</bitWidth>
15757 </field>
15758 <field>
15759 <name>FB5</name>
15760 <description>Filter bits</description>
15761 <bitOffset>5</bitOffset>
15762 <bitWidth>1</bitWidth>
15763 </field>
15764 <field>
15765 <name>FB6</name>
15766 <description>Filter bits</description>
15767 <bitOffset>6</bitOffset>
15768 <bitWidth>1</bitWidth>
15769 </field>
15770 <field>
15771 <name>FB7</name>
15772 <description>Filter bits</description>
15773 <bitOffset>7</bitOffset>
15774 <bitWidth>1</bitWidth>
15775 </field>
15776 <field>
15777 <name>FB8</name>
15778 <description>Filter bits</description>
15779 <bitOffset>8</bitOffset>
15780 <bitWidth>1</bitWidth>
15781 </field>
15782 <field>
15783 <name>FB9</name>
15784 <description>Filter bits</description>
15785 <bitOffset>9</bitOffset>
15786 <bitWidth>1</bitWidth>
15787 </field>
15788 <field>
15789 <name>FB10</name>
15790 <description>Filter bits</description>
15791 <bitOffset>10</bitOffset>
15792 <bitWidth>1</bitWidth>
15793 </field>
15794 <field>
15795 <name>FB11</name>
15796 <description>Filter bits</description>
15797 <bitOffset>11</bitOffset>
15798 <bitWidth>1</bitWidth>
15799 </field>
15800 <field>
15801 <name>FB12</name>
15802 <description>Filter bits</description>
15803 <bitOffset>12</bitOffset>
15804 <bitWidth>1</bitWidth>
15805 </field>
15806 <field>
15807 <name>FB13</name>
15808 <description>Filter bits</description>
15809 <bitOffset>13</bitOffset>
15810 <bitWidth>1</bitWidth>
15811 </field>
15812 <field>
15813 <name>FB14</name>
15814 <description>Filter bits</description>
15815 <bitOffset>14</bitOffset>
15816 <bitWidth>1</bitWidth>
15817 </field>
15818 <field>
15819 <name>FB15</name>
15820 <description>Filter bits</description>
15821 <bitOffset>15</bitOffset>
15822 <bitWidth>1</bitWidth>
15823 </field>
15824 <field>
15825 <name>FB16</name>
15826 <description>Filter bits</description>
15827 <bitOffset>16</bitOffset>
15828 <bitWidth>1</bitWidth>
15829 </field>
15830 <field>
15831 <name>FB17</name>
15832 <description>Filter bits</description>
15833 <bitOffset>17</bitOffset>
15834 <bitWidth>1</bitWidth>
15835 </field>
15836 <field>
15837 <name>FB18</name>
15838 <description>Filter bits</description>
15839 <bitOffset>18</bitOffset>
15840 <bitWidth>1</bitWidth>
15841 </field>
15842 <field>
15843 <name>FB19</name>
15844 <description>Filter bits</description>
15845 <bitOffset>19</bitOffset>
15846 <bitWidth>1</bitWidth>
15847 </field>
15848 <field>
15849 <name>FB20</name>
15850 <description>Filter bits</description>
15851 <bitOffset>20</bitOffset>
15852 <bitWidth>1</bitWidth>
15853 </field>
15854 <field>
15855 <name>FB21</name>
15856 <description>Filter bits</description>
15857 <bitOffset>21</bitOffset>
15858 <bitWidth>1</bitWidth>
15859 </field>
15860 <field>
15861 <name>FB22</name>
15862 <description>Filter bits</description>
15863 <bitOffset>22</bitOffset>
15864 <bitWidth>1</bitWidth>
15865 </field>
15866 <field>
15867 <name>FB23</name>
15868 <description>Filter bits</description>
15869 <bitOffset>23</bitOffset>
15870 <bitWidth>1</bitWidth>
15871 </field>
15872 <field>
15873 <name>FB24</name>
15874 <description>Filter bits</description>
15875 <bitOffset>24</bitOffset>
15876 <bitWidth>1</bitWidth>
15877 </field>
15878 <field>
15879 <name>FB25</name>
15880 <description>Filter bits</description>
15881 <bitOffset>25</bitOffset>
15882 <bitWidth>1</bitWidth>
15883 </field>
15884 <field>
15885 <name>FB26</name>
15886 <description>Filter bits</description>
15887 <bitOffset>26</bitOffset>
15888 <bitWidth>1</bitWidth>
15889 </field>
15890 <field>
15891 <name>FB27</name>
15892 <description>Filter bits</description>
15893 <bitOffset>27</bitOffset>
15894 <bitWidth>1</bitWidth>
15895 </field>
15896 <field>
15897 <name>FB28</name>
15898 <description>Filter bits</description>
15899 <bitOffset>28</bitOffset>
15900 <bitWidth>1</bitWidth>
15901 </field>
15902 <field>
15903 <name>FB29</name>
15904 <description>Filter bits</description>
15905 <bitOffset>29</bitOffset>
15906 <bitWidth>1</bitWidth>
15907 </field>
15908 <field>
15909 <name>FB30</name>
15910 <description>Filter bits</description>
15911 <bitOffset>30</bitOffset>
15912 <bitWidth>1</bitWidth>
15913 </field>
15914 <field>
15915 <name>FB31</name>
15916 <description>Filter bits</description>
15917 <bitOffset>31</bitOffset>
15918 <bitWidth>1</bitWidth>
15919 </field>
15920 </fields>
15921 </register>
15922 <register>
15923 <name>F2R1</name>
15924 <displayName>F2R1</displayName>
15925 <description>Filter bank 2 register 1</description>
15926 <addressOffset>0x250</addressOffset>
15927 <size>0x20</size>
15928 <access>read-write</access>
15929 <resetValue>0x00000000</resetValue>
15930 <fields>
15931 <field>
15932 <name>FB0</name>
15933 <description>Filter bits</description>
15934 <bitOffset>0</bitOffset>
15935 <bitWidth>1</bitWidth>
15936 </field>
15937 <field>
15938 <name>FB1</name>
15939 <description>Filter bits</description>
15940 <bitOffset>1</bitOffset>
15941 <bitWidth>1</bitWidth>
15942 </field>
15943 <field>
15944 <name>FB2</name>
15945 <description>Filter bits</description>
15946 <bitOffset>2</bitOffset>
15947 <bitWidth>1</bitWidth>
15948 </field>
15949 <field>
15950 <name>FB3</name>
15951 <description>Filter bits</description>
15952 <bitOffset>3</bitOffset>
15953 <bitWidth>1</bitWidth>
15954 </field>
15955 <field>
15956 <name>FB4</name>
15957 <description>Filter bits</description>
15958 <bitOffset>4</bitOffset>
15959 <bitWidth>1</bitWidth>
15960 </field>
15961 <field>
15962 <name>FB5</name>
15963 <description>Filter bits</description>
15964 <bitOffset>5</bitOffset>
15965 <bitWidth>1</bitWidth>
15966 </field>
15967 <field>
15968 <name>FB6</name>
15969 <description>Filter bits</description>
15970 <bitOffset>6</bitOffset>
15971 <bitWidth>1</bitWidth>
15972 </field>
15973 <field>
15974 <name>FB7</name>
15975 <description>Filter bits</description>
15976 <bitOffset>7</bitOffset>
15977 <bitWidth>1</bitWidth>
15978 </field>
15979 <field>
15980 <name>FB8</name>
15981 <description>Filter bits</description>
15982 <bitOffset>8</bitOffset>
15983 <bitWidth>1</bitWidth>
15984 </field>
15985 <field>
15986 <name>FB9</name>
15987 <description>Filter bits</description>
15988 <bitOffset>9</bitOffset>
15989 <bitWidth>1</bitWidth>
15990 </field>
15991 <field>
15992 <name>FB10</name>
15993 <description>Filter bits</description>
15994 <bitOffset>10</bitOffset>
15995 <bitWidth>1</bitWidth>
15996 </field>
15997 <field>
15998 <name>FB11</name>
15999 <description>Filter bits</description>
16000 <bitOffset>11</bitOffset>
16001 <bitWidth>1</bitWidth>
16002 </field>
16003 <field>
16004 <name>FB12</name>
16005 <description>Filter bits</description>
16006 <bitOffset>12</bitOffset>
16007 <bitWidth>1</bitWidth>
16008 </field>
16009 <field>
16010 <name>FB13</name>
16011 <description>Filter bits</description>
16012 <bitOffset>13</bitOffset>
16013 <bitWidth>1</bitWidth>
16014 </field>
16015 <field>
16016 <name>FB14</name>
16017 <description>Filter bits</description>
16018 <bitOffset>14</bitOffset>
16019 <bitWidth>1</bitWidth>
16020 </field>
16021 <field>
16022 <name>FB15</name>
16023 <description>Filter bits</description>
16024 <bitOffset>15</bitOffset>
16025 <bitWidth>1</bitWidth>
16026 </field>
16027 <field>
16028 <name>FB16</name>
16029 <description>Filter bits</description>
16030 <bitOffset>16</bitOffset>
16031 <bitWidth>1</bitWidth>
16032 </field>
16033 <field>
16034 <name>FB17</name>
16035 <description>Filter bits</description>
16036 <bitOffset>17</bitOffset>
16037 <bitWidth>1</bitWidth>
16038 </field>
16039 <field>
16040 <name>FB18</name>
16041 <description>Filter bits</description>
16042 <bitOffset>18</bitOffset>
16043 <bitWidth>1</bitWidth>
16044 </field>
16045 <field>
16046 <name>FB19</name>
16047 <description>Filter bits</description>
16048 <bitOffset>19</bitOffset>
16049 <bitWidth>1</bitWidth>
16050 </field>
16051 <field>
16052 <name>FB20</name>
16053 <description>Filter bits</description>
16054 <bitOffset>20</bitOffset>
16055 <bitWidth>1</bitWidth>
16056 </field>
16057 <field>
16058 <name>FB21</name>
16059 <description>Filter bits</description>
16060 <bitOffset>21</bitOffset>
16061 <bitWidth>1</bitWidth>
16062 </field>
16063 <field>
16064 <name>FB22</name>
16065 <description>Filter bits</description>
16066 <bitOffset>22</bitOffset>
16067 <bitWidth>1</bitWidth>
16068 </field>
16069 <field>
16070 <name>FB23</name>
16071 <description>Filter bits</description>
16072 <bitOffset>23</bitOffset>
16073 <bitWidth>1</bitWidth>
16074 </field>
16075 <field>
16076 <name>FB24</name>
16077 <description>Filter bits</description>
16078 <bitOffset>24</bitOffset>
16079 <bitWidth>1</bitWidth>
16080 </field>
16081 <field>
16082 <name>FB25</name>
16083 <description>Filter bits</description>
16084 <bitOffset>25</bitOffset>
16085 <bitWidth>1</bitWidth>
16086 </field>
16087 <field>
16088 <name>FB26</name>
16089 <description>Filter bits</description>
16090 <bitOffset>26</bitOffset>
16091 <bitWidth>1</bitWidth>
16092 </field>
16093 <field>
16094 <name>FB27</name>
16095 <description>Filter bits</description>
16096 <bitOffset>27</bitOffset>
16097 <bitWidth>1</bitWidth>
16098 </field>
16099 <field>
16100 <name>FB28</name>
16101 <description>Filter bits</description>
16102 <bitOffset>28</bitOffset>
16103 <bitWidth>1</bitWidth>
16104 </field>
16105 <field>
16106 <name>FB29</name>
16107 <description>Filter bits</description>
16108 <bitOffset>29</bitOffset>
16109 <bitWidth>1</bitWidth>
16110 </field>
16111 <field>
16112 <name>FB30</name>
16113 <description>Filter bits</description>
16114 <bitOffset>30</bitOffset>
16115 <bitWidth>1</bitWidth>
16116 </field>
16117 <field>
16118 <name>FB31</name>
16119 <description>Filter bits</description>
16120 <bitOffset>31</bitOffset>
16121 <bitWidth>1</bitWidth>
16122 </field>
16123 </fields>
16124 </register>
16125 <register>
16126 <name>F2R2</name>
16127 <displayName>F2R2</displayName>
16128 <description>Filter bank 2 register 2</description>
16129 <addressOffset>0x254</addressOffset>
16130 <size>0x20</size>
16131 <access>read-write</access>
16132 <resetValue>0x00000000</resetValue>
16133 <fields>
16134 <field>
16135 <name>FB0</name>
16136 <description>Filter bits</description>
16137 <bitOffset>0</bitOffset>
16138 <bitWidth>1</bitWidth>
16139 </field>
16140 <field>
16141 <name>FB1</name>
16142 <description>Filter bits</description>
16143 <bitOffset>1</bitOffset>
16144 <bitWidth>1</bitWidth>
16145 </field>
16146 <field>
16147 <name>FB2</name>
16148 <description>Filter bits</description>
16149 <bitOffset>2</bitOffset>
16150 <bitWidth>1</bitWidth>
16151 </field>
16152 <field>
16153 <name>FB3</name>
16154 <description>Filter bits</description>
16155 <bitOffset>3</bitOffset>
16156 <bitWidth>1</bitWidth>
16157 </field>
16158 <field>
16159 <name>FB4</name>
16160 <description>Filter bits</description>
16161 <bitOffset>4</bitOffset>
16162 <bitWidth>1</bitWidth>
16163 </field>
16164 <field>
16165 <name>FB5</name>
16166 <description>Filter bits</description>
16167 <bitOffset>5</bitOffset>
16168 <bitWidth>1</bitWidth>
16169 </field>
16170 <field>
16171 <name>FB6</name>
16172 <description>Filter bits</description>
16173 <bitOffset>6</bitOffset>
16174 <bitWidth>1</bitWidth>
16175 </field>
16176 <field>
16177 <name>FB7</name>
16178 <description>Filter bits</description>
16179 <bitOffset>7</bitOffset>
16180 <bitWidth>1</bitWidth>
16181 </field>
16182 <field>
16183 <name>FB8</name>
16184 <description>Filter bits</description>
16185 <bitOffset>8</bitOffset>
16186 <bitWidth>1</bitWidth>
16187 </field>
16188 <field>
16189 <name>FB9</name>
16190 <description>Filter bits</description>
16191 <bitOffset>9</bitOffset>
16192 <bitWidth>1</bitWidth>
16193 </field>
16194 <field>
16195 <name>FB10</name>
16196 <description>Filter bits</description>
16197 <bitOffset>10</bitOffset>
16198 <bitWidth>1</bitWidth>
16199 </field>
16200 <field>
16201 <name>FB11</name>
16202 <description>Filter bits</description>
16203 <bitOffset>11</bitOffset>
16204 <bitWidth>1</bitWidth>
16205 </field>
16206 <field>
16207 <name>FB12</name>
16208 <description>Filter bits</description>
16209 <bitOffset>12</bitOffset>
16210 <bitWidth>1</bitWidth>
16211 </field>
16212 <field>
16213 <name>FB13</name>
16214 <description>Filter bits</description>
16215 <bitOffset>13</bitOffset>
16216 <bitWidth>1</bitWidth>
16217 </field>
16218 <field>
16219 <name>FB14</name>
16220 <description>Filter bits</description>
16221 <bitOffset>14</bitOffset>
16222 <bitWidth>1</bitWidth>
16223 </field>
16224 <field>
16225 <name>FB15</name>
16226 <description>Filter bits</description>
16227 <bitOffset>15</bitOffset>
16228 <bitWidth>1</bitWidth>
16229 </field>
16230 <field>
16231 <name>FB16</name>
16232 <description>Filter bits</description>
16233 <bitOffset>16</bitOffset>
16234 <bitWidth>1</bitWidth>
16235 </field>
16236 <field>
16237 <name>FB17</name>
16238 <description>Filter bits</description>
16239 <bitOffset>17</bitOffset>
16240 <bitWidth>1</bitWidth>
16241 </field>
16242 <field>
16243 <name>FB18</name>
16244 <description>Filter bits</description>
16245 <bitOffset>18</bitOffset>
16246 <bitWidth>1</bitWidth>
16247 </field>
16248 <field>
16249 <name>FB19</name>
16250 <description>Filter bits</description>
16251 <bitOffset>19</bitOffset>
16252 <bitWidth>1</bitWidth>
16253 </field>
16254 <field>
16255 <name>FB20</name>
16256 <description>Filter bits</description>
16257 <bitOffset>20</bitOffset>
16258 <bitWidth>1</bitWidth>
16259 </field>
16260 <field>
16261 <name>FB21</name>
16262 <description>Filter bits</description>
16263 <bitOffset>21</bitOffset>
16264 <bitWidth>1</bitWidth>
16265 </field>
16266 <field>
16267 <name>FB22</name>
16268 <description>Filter bits</description>
16269 <bitOffset>22</bitOffset>
16270 <bitWidth>1</bitWidth>
16271 </field>
16272 <field>
16273 <name>FB23</name>
16274 <description>Filter bits</description>
16275 <bitOffset>23</bitOffset>
16276 <bitWidth>1</bitWidth>
16277 </field>
16278 <field>
16279 <name>FB24</name>
16280 <description>Filter bits</description>
16281 <bitOffset>24</bitOffset>
16282 <bitWidth>1</bitWidth>
16283 </field>
16284 <field>
16285 <name>FB25</name>
16286 <description>Filter bits</description>
16287 <bitOffset>25</bitOffset>
16288 <bitWidth>1</bitWidth>
16289 </field>
16290 <field>
16291 <name>FB26</name>
16292 <description>Filter bits</description>
16293 <bitOffset>26</bitOffset>
16294 <bitWidth>1</bitWidth>
16295 </field>
16296 <field>
16297 <name>FB27</name>
16298 <description>Filter bits</description>
16299 <bitOffset>27</bitOffset>
16300 <bitWidth>1</bitWidth>
16301 </field>
16302 <field>
16303 <name>FB28</name>
16304 <description>Filter bits</description>
16305 <bitOffset>28</bitOffset>
16306 <bitWidth>1</bitWidth>
16307 </field>
16308 <field>
16309 <name>FB29</name>
16310 <description>Filter bits</description>
16311 <bitOffset>29</bitOffset>
16312 <bitWidth>1</bitWidth>
16313 </field>
16314 <field>
16315 <name>FB30</name>
16316 <description>Filter bits</description>
16317 <bitOffset>30</bitOffset>
16318 <bitWidth>1</bitWidth>
16319 </field>
16320 <field>
16321 <name>FB31</name>
16322 <description>Filter bits</description>
16323 <bitOffset>31</bitOffset>
16324 <bitWidth>1</bitWidth>
16325 </field>
16326 </fields>
16327 </register>
16328 <register>
16329 <name>F3R1</name>
16330 <displayName>F3R1</displayName>
16331 <description>Filter bank 3 register 1</description>
16332 <addressOffset>0x258</addressOffset>
16333 <size>0x20</size>
16334 <access>read-write</access>
16335 <resetValue>0x00000000</resetValue>
16336 <fields>
16337 <field>
16338 <name>FB0</name>
16339 <description>Filter bits</description>
16340 <bitOffset>0</bitOffset>
16341 <bitWidth>1</bitWidth>
16342 </field>
16343 <field>
16344 <name>FB1</name>
16345 <description>Filter bits</description>
16346 <bitOffset>1</bitOffset>
16347 <bitWidth>1</bitWidth>
16348 </field>
16349 <field>
16350 <name>FB2</name>
16351 <description>Filter bits</description>
16352 <bitOffset>2</bitOffset>
16353 <bitWidth>1</bitWidth>
16354 </field>
16355 <field>
16356 <name>FB3</name>
16357 <description>Filter bits</description>
16358 <bitOffset>3</bitOffset>
16359 <bitWidth>1</bitWidth>
16360 </field>
16361 <field>
16362 <name>FB4</name>
16363 <description>Filter bits</description>
16364 <bitOffset>4</bitOffset>
16365 <bitWidth>1</bitWidth>
16366 </field>
16367 <field>
16368 <name>FB5</name>
16369 <description>Filter bits</description>
16370 <bitOffset>5</bitOffset>
16371 <bitWidth>1</bitWidth>
16372 </field>
16373 <field>
16374 <name>FB6</name>
16375 <description>Filter bits</description>
16376 <bitOffset>6</bitOffset>
16377 <bitWidth>1</bitWidth>
16378 </field>
16379 <field>
16380 <name>FB7</name>
16381 <description>Filter bits</description>
16382 <bitOffset>7</bitOffset>
16383 <bitWidth>1</bitWidth>
16384 </field>
16385 <field>
16386 <name>FB8</name>
16387 <description>Filter bits</description>
16388 <bitOffset>8</bitOffset>
16389 <bitWidth>1</bitWidth>
16390 </field>
16391 <field>
16392 <name>FB9</name>
16393 <description>Filter bits</description>
16394 <bitOffset>9</bitOffset>
16395 <bitWidth>1</bitWidth>
16396 </field>
16397 <field>
16398 <name>FB10</name>
16399 <description>Filter bits</description>
16400 <bitOffset>10</bitOffset>
16401 <bitWidth>1</bitWidth>
16402 </field>
16403 <field>
16404 <name>FB11</name>
16405 <description>Filter bits</description>
16406 <bitOffset>11</bitOffset>
16407 <bitWidth>1</bitWidth>
16408 </field>
16409 <field>
16410 <name>FB12</name>
16411 <description>Filter bits</description>
16412 <bitOffset>12</bitOffset>
16413 <bitWidth>1</bitWidth>
16414 </field>
16415 <field>
16416 <name>FB13</name>
16417 <description>Filter bits</description>
16418 <bitOffset>13</bitOffset>
16419 <bitWidth>1</bitWidth>
16420 </field>
16421 <field>
16422 <name>FB14</name>
16423 <description>Filter bits</description>
16424 <bitOffset>14</bitOffset>
16425 <bitWidth>1</bitWidth>
16426 </field>
16427 <field>
16428 <name>FB15</name>
16429 <description>Filter bits</description>
16430 <bitOffset>15</bitOffset>
16431 <bitWidth>1</bitWidth>
16432 </field>
16433 <field>
16434 <name>FB16</name>
16435 <description>Filter bits</description>
16436 <bitOffset>16</bitOffset>
16437 <bitWidth>1</bitWidth>
16438 </field>
16439 <field>
16440 <name>FB17</name>
16441 <description>Filter bits</description>
16442 <bitOffset>17</bitOffset>
16443 <bitWidth>1</bitWidth>
16444 </field>
16445 <field>
16446 <name>FB18</name>
16447 <description>Filter bits</description>
16448 <bitOffset>18</bitOffset>
16449 <bitWidth>1</bitWidth>
16450 </field>
16451 <field>
16452 <name>FB19</name>
16453 <description>Filter bits</description>
16454 <bitOffset>19</bitOffset>
16455 <bitWidth>1</bitWidth>
16456 </field>
16457 <field>
16458 <name>FB20</name>
16459 <description>Filter bits</description>
16460 <bitOffset>20</bitOffset>
16461 <bitWidth>1</bitWidth>
16462 </field>
16463 <field>
16464 <name>FB21</name>
16465 <description>Filter bits</description>
16466 <bitOffset>21</bitOffset>
16467 <bitWidth>1</bitWidth>
16468 </field>
16469 <field>
16470 <name>FB22</name>
16471 <description>Filter bits</description>
16472 <bitOffset>22</bitOffset>
16473 <bitWidth>1</bitWidth>
16474 </field>
16475 <field>
16476 <name>FB23</name>
16477 <description>Filter bits</description>
16478 <bitOffset>23</bitOffset>
16479 <bitWidth>1</bitWidth>
16480 </field>
16481 <field>
16482 <name>FB24</name>
16483 <description>Filter bits</description>
16484 <bitOffset>24</bitOffset>
16485 <bitWidth>1</bitWidth>
16486 </field>
16487 <field>
16488 <name>FB25</name>
16489 <description>Filter bits</description>
16490 <bitOffset>25</bitOffset>
16491 <bitWidth>1</bitWidth>
16492 </field>
16493 <field>
16494 <name>FB26</name>
16495 <description>Filter bits</description>
16496 <bitOffset>26</bitOffset>
16497 <bitWidth>1</bitWidth>
16498 </field>
16499 <field>
16500 <name>FB27</name>
16501 <description>Filter bits</description>
16502 <bitOffset>27</bitOffset>
16503 <bitWidth>1</bitWidth>
16504 </field>
16505 <field>
16506 <name>FB28</name>
16507 <description>Filter bits</description>
16508 <bitOffset>28</bitOffset>
16509 <bitWidth>1</bitWidth>
16510 </field>
16511 <field>
16512 <name>FB29</name>
16513 <description>Filter bits</description>
16514 <bitOffset>29</bitOffset>
16515 <bitWidth>1</bitWidth>
16516 </field>
16517 <field>
16518 <name>FB30</name>
16519 <description>Filter bits</description>
16520 <bitOffset>30</bitOffset>
16521 <bitWidth>1</bitWidth>
16522 </field>
16523 <field>
16524 <name>FB31</name>
16525 <description>Filter bits</description>
16526 <bitOffset>31</bitOffset>
16527 <bitWidth>1</bitWidth>
16528 </field>
16529 </fields>
16530 </register>
16531 <register>
16532 <name>F3R2</name>
16533 <displayName>F3R2</displayName>
16534 <description>Filter bank 3 register 2</description>
16535 <addressOffset>0x25C</addressOffset>
16536 <size>0x20</size>
16537 <access>read-write</access>
16538 <resetValue>0x00000000</resetValue>
16539 <fields>
16540 <field>
16541 <name>FB0</name>
16542 <description>Filter bits</description>
16543 <bitOffset>0</bitOffset>
16544 <bitWidth>1</bitWidth>
16545 </field>
16546 <field>
16547 <name>FB1</name>
16548 <description>Filter bits</description>
16549 <bitOffset>1</bitOffset>
16550 <bitWidth>1</bitWidth>
16551 </field>
16552 <field>
16553 <name>FB2</name>
16554 <description>Filter bits</description>
16555 <bitOffset>2</bitOffset>
16556 <bitWidth>1</bitWidth>
16557 </field>
16558 <field>
16559 <name>FB3</name>
16560 <description>Filter bits</description>
16561 <bitOffset>3</bitOffset>
16562 <bitWidth>1</bitWidth>
16563 </field>
16564 <field>
16565 <name>FB4</name>
16566 <description>Filter bits</description>
16567 <bitOffset>4</bitOffset>
16568 <bitWidth>1</bitWidth>
16569 </field>
16570 <field>
16571 <name>FB5</name>
16572 <description>Filter bits</description>
16573 <bitOffset>5</bitOffset>
16574 <bitWidth>1</bitWidth>
16575 </field>
16576 <field>
16577 <name>FB6</name>
16578 <description>Filter bits</description>
16579 <bitOffset>6</bitOffset>
16580 <bitWidth>1</bitWidth>
16581 </field>
16582 <field>
16583 <name>FB7</name>
16584 <description>Filter bits</description>
16585 <bitOffset>7</bitOffset>
16586 <bitWidth>1</bitWidth>
16587 </field>
16588 <field>
16589 <name>FB8</name>
16590 <description>Filter bits</description>
16591 <bitOffset>8</bitOffset>
16592 <bitWidth>1</bitWidth>
16593 </field>
16594 <field>
16595 <name>FB9</name>
16596 <description>Filter bits</description>
16597 <bitOffset>9</bitOffset>
16598 <bitWidth>1</bitWidth>
16599 </field>
16600 <field>
16601 <name>FB10</name>
16602 <description>Filter bits</description>
16603 <bitOffset>10</bitOffset>
16604 <bitWidth>1</bitWidth>
16605 </field>
16606 <field>
16607 <name>FB11</name>
16608 <description>Filter bits</description>
16609 <bitOffset>11</bitOffset>
16610 <bitWidth>1</bitWidth>
16611 </field>
16612 <field>
16613 <name>FB12</name>
16614 <description>Filter bits</description>
16615 <bitOffset>12</bitOffset>
16616 <bitWidth>1</bitWidth>
16617 </field>
16618 <field>
16619 <name>FB13</name>
16620 <description>Filter bits</description>
16621 <bitOffset>13</bitOffset>
16622 <bitWidth>1</bitWidth>
16623 </field>
16624 <field>
16625 <name>FB14</name>
16626 <description>Filter bits</description>
16627 <bitOffset>14</bitOffset>
16628 <bitWidth>1</bitWidth>
16629 </field>
16630 <field>
16631 <name>FB15</name>
16632 <description>Filter bits</description>
16633 <bitOffset>15</bitOffset>
16634 <bitWidth>1</bitWidth>
16635 </field>
16636 <field>
16637 <name>FB16</name>
16638 <description>Filter bits</description>
16639 <bitOffset>16</bitOffset>
16640 <bitWidth>1</bitWidth>
16641 </field>
16642 <field>
16643 <name>FB17</name>
16644 <description>Filter bits</description>
16645 <bitOffset>17</bitOffset>
16646 <bitWidth>1</bitWidth>
16647 </field>
16648 <field>
16649 <name>FB18</name>
16650 <description>Filter bits</description>
16651 <bitOffset>18</bitOffset>
16652 <bitWidth>1</bitWidth>
16653 </field>
16654 <field>
16655 <name>FB19</name>
16656 <description>Filter bits</description>
16657 <bitOffset>19</bitOffset>
16658 <bitWidth>1</bitWidth>
16659 </field>
16660 <field>
16661 <name>FB20</name>
16662 <description>Filter bits</description>
16663 <bitOffset>20</bitOffset>
16664 <bitWidth>1</bitWidth>
16665 </field>
16666 <field>
16667 <name>FB21</name>
16668 <description>Filter bits</description>
16669 <bitOffset>21</bitOffset>
16670 <bitWidth>1</bitWidth>
16671 </field>
16672 <field>
16673 <name>FB22</name>
16674 <description>Filter bits</description>
16675 <bitOffset>22</bitOffset>
16676 <bitWidth>1</bitWidth>
16677 </field>
16678 <field>
16679 <name>FB23</name>
16680 <description>Filter bits</description>
16681 <bitOffset>23</bitOffset>
16682 <bitWidth>1</bitWidth>
16683 </field>
16684 <field>
16685 <name>FB24</name>
16686 <description>Filter bits</description>
16687 <bitOffset>24</bitOffset>
16688 <bitWidth>1</bitWidth>
16689 </field>
16690 <field>
16691 <name>FB25</name>
16692 <description>Filter bits</description>
16693 <bitOffset>25</bitOffset>
16694 <bitWidth>1</bitWidth>
16695 </field>
16696 <field>
16697 <name>FB26</name>
16698 <description>Filter bits</description>
16699 <bitOffset>26</bitOffset>
16700 <bitWidth>1</bitWidth>
16701 </field>
16702 <field>
16703 <name>FB27</name>
16704 <description>Filter bits</description>
16705 <bitOffset>27</bitOffset>
16706 <bitWidth>1</bitWidth>
16707 </field>
16708 <field>
16709 <name>FB28</name>
16710 <description>Filter bits</description>
16711 <bitOffset>28</bitOffset>
16712 <bitWidth>1</bitWidth>
16713 </field>
16714 <field>
16715 <name>FB29</name>
16716 <description>Filter bits</description>
16717 <bitOffset>29</bitOffset>
16718 <bitWidth>1</bitWidth>
16719 </field>
16720 <field>
16721 <name>FB30</name>
16722 <description>Filter bits</description>
16723 <bitOffset>30</bitOffset>
16724 <bitWidth>1</bitWidth>
16725 </field>
16726 <field>
16727 <name>FB31</name>
16728 <description>Filter bits</description>
16729 <bitOffset>31</bitOffset>
16730 <bitWidth>1</bitWidth>
16731 </field>
16732 </fields>
16733 </register>
16734 <register>
16735 <name>F4R1</name>
16736 <displayName>F4R1</displayName>
16737 <description>Filter bank 4 register 1</description>
16738 <addressOffset>0x260</addressOffset>
16739 <size>0x20</size>
16740 <access>read-write</access>
16741 <resetValue>0x00000000</resetValue>
16742 <fields>
16743 <field>
16744 <name>FB0</name>
16745 <description>Filter bits</description>
16746 <bitOffset>0</bitOffset>
16747 <bitWidth>1</bitWidth>
16748 </field>
16749 <field>
16750 <name>FB1</name>
16751 <description>Filter bits</description>
16752 <bitOffset>1</bitOffset>
16753 <bitWidth>1</bitWidth>
16754 </field>
16755 <field>
16756 <name>FB2</name>
16757 <description>Filter bits</description>
16758 <bitOffset>2</bitOffset>
16759 <bitWidth>1</bitWidth>
16760 </field>
16761 <field>
16762 <name>FB3</name>
16763 <description>Filter bits</description>
16764 <bitOffset>3</bitOffset>
16765 <bitWidth>1</bitWidth>
16766 </field>
16767 <field>
16768 <name>FB4</name>
16769 <description>Filter bits</description>
16770 <bitOffset>4</bitOffset>
16771 <bitWidth>1</bitWidth>
16772 </field>
16773 <field>
16774 <name>FB5</name>
16775 <description>Filter bits</description>
16776 <bitOffset>5</bitOffset>
16777 <bitWidth>1</bitWidth>
16778 </field>
16779 <field>
16780 <name>FB6</name>
16781 <description>Filter bits</description>
16782 <bitOffset>6</bitOffset>
16783 <bitWidth>1</bitWidth>
16784 </field>
16785 <field>
16786 <name>FB7</name>
16787 <description>Filter bits</description>
16788 <bitOffset>7</bitOffset>
16789 <bitWidth>1</bitWidth>
16790 </field>
16791 <field>
16792 <name>FB8</name>
16793 <description>Filter bits</description>
16794 <bitOffset>8</bitOffset>
16795 <bitWidth>1</bitWidth>
16796 </field>
16797 <field>
16798 <name>FB9</name>
16799 <description>Filter bits</description>
16800 <bitOffset>9</bitOffset>
16801 <bitWidth>1</bitWidth>
16802 </field>
16803 <field>
16804 <name>FB10</name>
16805 <description>Filter bits</description>
16806 <bitOffset>10</bitOffset>
16807 <bitWidth>1</bitWidth>
16808 </field>
16809 <field>
16810 <name>FB11</name>
16811 <description>Filter bits</description>
16812 <bitOffset>11</bitOffset>
16813 <bitWidth>1</bitWidth>
16814 </field>
16815 <field>
16816 <name>FB12</name>
16817 <description>Filter bits</description>
16818 <bitOffset>12</bitOffset>
16819 <bitWidth>1</bitWidth>
16820 </field>
16821 <field>
16822 <name>FB13</name>
16823 <description>Filter bits</description>
16824 <bitOffset>13</bitOffset>
16825 <bitWidth>1</bitWidth>
16826 </field>
16827 <field>
16828 <name>FB14</name>
16829 <description>Filter bits</description>
16830 <bitOffset>14</bitOffset>
16831 <bitWidth>1</bitWidth>
16832 </field>
16833 <field>
16834 <name>FB15</name>
16835 <description>Filter bits</description>
16836 <bitOffset>15</bitOffset>
16837 <bitWidth>1</bitWidth>
16838 </field>
16839 <field>
16840 <name>FB16</name>
16841 <description>Filter bits</description>
16842 <bitOffset>16</bitOffset>
16843 <bitWidth>1</bitWidth>
16844 </field>
16845 <field>
16846 <name>FB17</name>
16847 <description>Filter bits</description>
16848 <bitOffset>17</bitOffset>
16849 <bitWidth>1</bitWidth>
16850 </field>
16851 <field>
16852 <name>FB18</name>
16853 <description>Filter bits</description>
16854 <bitOffset>18</bitOffset>
16855 <bitWidth>1</bitWidth>
16856 </field>
16857 <field>
16858 <name>FB19</name>
16859 <description>Filter bits</description>
16860 <bitOffset>19</bitOffset>
16861 <bitWidth>1</bitWidth>
16862 </field>
16863 <field>
16864 <name>FB20</name>
16865 <description>Filter bits</description>
16866 <bitOffset>20</bitOffset>
16867 <bitWidth>1</bitWidth>
16868 </field>
16869 <field>
16870 <name>FB21</name>
16871 <description>Filter bits</description>
16872 <bitOffset>21</bitOffset>
16873 <bitWidth>1</bitWidth>
16874 </field>
16875 <field>
16876 <name>FB22</name>
16877 <description>Filter bits</description>
16878 <bitOffset>22</bitOffset>
16879 <bitWidth>1</bitWidth>
16880 </field>
16881 <field>
16882 <name>FB23</name>
16883 <description>Filter bits</description>
16884 <bitOffset>23</bitOffset>
16885 <bitWidth>1</bitWidth>
16886 </field>
16887 <field>
16888 <name>FB24</name>
16889 <description>Filter bits</description>
16890 <bitOffset>24</bitOffset>
16891 <bitWidth>1</bitWidth>
16892 </field>
16893 <field>
16894 <name>FB25</name>
16895 <description>Filter bits</description>
16896 <bitOffset>25</bitOffset>
16897 <bitWidth>1</bitWidth>
16898 </field>
16899 <field>
16900 <name>FB26</name>
16901 <description>Filter bits</description>
16902 <bitOffset>26</bitOffset>
16903 <bitWidth>1</bitWidth>
16904 </field>
16905 <field>
16906 <name>FB27</name>
16907 <description>Filter bits</description>
16908 <bitOffset>27</bitOffset>
16909 <bitWidth>1</bitWidth>
16910 </field>
16911 <field>
16912 <name>FB28</name>
16913 <description>Filter bits</description>
16914 <bitOffset>28</bitOffset>
16915 <bitWidth>1</bitWidth>
16916 </field>
16917 <field>
16918 <name>FB29</name>
16919 <description>Filter bits</description>
16920 <bitOffset>29</bitOffset>
16921 <bitWidth>1</bitWidth>
16922 </field>
16923 <field>
16924 <name>FB30</name>
16925 <description>Filter bits</description>
16926 <bitOffset>30</bitOffset>
16927 <bitWidth>1</bitWidth>
16928 </field>
16929 <field>
16930 <name>FB31</name>
16931 <description>Filter bits</description>
16932 <bitOffset>31</bitOffset>
16933 <bitWidth>1</bitWidth>
16934 </field>
16935 </fields>
16936 </register>
16937 <register>
16938 <name>F4R2</name>
16939 <displayName>F4R2</displayName>
16940 <description>Filter bank 4 register 2</description>
16941 <addressOffset>0x264</addressOffset>
16942 <size>0x20</size>
16943 <access>read-write</access>
16944 <resetValue>0x00000000</resetValue>
16945 <fields>
16946 <field>
16947 <name>FB0</name>
16948 <description>Filter bits</description>
16949 <bitOffset>0</bitOffset>
16950 <bitWidth>1</bitWidth>
16951 </field>
16952 <field>
16953 <name>FB1</name>
16954 <description>Filter bits</description>
16955 <bitOffset>1</bitOffset>
16956 <bitWidth>1</bitWidth>
16957 </field>
16958 <field>
16959 <name>FB2</name>
16960 <description>Filter bits</description>
16961 <bitOffset>2</bitOffset>
16962 <bitWidth>1</bitWidth>
16963 </field>
16964 <field>
16965 <name>FB3</name>
16966 <description>Filter bits</description>
16967 <bitOffset>3</bitOffset>
16968 <bitWidth>1</bitWidth>
16969 </field>
16970 <field>
16971 <name>FB4</name>
16972 <description>Filter bits</description>
16973 <bitOffset>4</bitOffset>
16974 <bitWidth>1</bitWidth>
16975 </field>
16976 <field>
16977 <name>FB5</name>
16978 <description>Filter bits</description>
16979 <bitOffset>5</bitOffset>
16980 <bitWidth>1</bitWidth>
16981 </field>
16982 <field>
16983 <name>FB6</name>
16984 <description>Filter bits</description>
16985 <bitOffset>6</bitOffset>
16986 <bitWidth>1</bitWidth>
16987 </field>
16988 <field>
16989 <name>FB7</name>
16990 <description>Filter bits</description>
16991 <bitOffset>7</bitOffset>
16992 <bitWidth>1</bitWidth>
16993 </field>
16994 <field>
16995 <name>FB8</name>
16996 <description>Filter bits</description>
16997 <bitOffset>8</bitOffset>
16998 <bitWidth>1</bitWidth>
16999 </field>
17000 <field>
17001 <name>FB9</name>
17002 <description>Filter bits</description>
17003 <bitOffset>9</bitOffset>
17004 <bitWidth>1</bitWidth>
17005 </field>
17006 <field>
17007 <name>FB10</name>
17008 <description>Filter bits</description>
17009 <bitOffset>10</bitOffset>
17010 <bitWidth>1</bitWidth>
17011 </field>
17012 <field>
17013 <name>FB11</name>
17014 <description>Filter bits</description>
17015 <bitOffset>11</bitOffset>
17016 <bitWidth>1</bitWidth>
17017 </field>
17018 <field>
17019 <name>FB12</name>
17020 <description>Filter bits</description>
17021 <bitOffset>12</bitOffset>
17022 <bitWidth>1</bitWidth>
17023 </field>
17024 <field>
17025 <name>FB13</name>
17026 <description>Filter bits</description>
17027 <bitOffset>13</bitOffset>
17028 <bitWidth>1</bitWidth>
17029 </field>
17030 <field>
17031 <name>FB14</name>
17032 <description>Filter bits</description>
17033 <bitOffset>14</bitOffset>
17034 <bitWidth>1</bitWidth>
17035 </field>
17036 <field>
17037 <name>FB15</name>
17038 <description>Filter bits</description>
17039 <bitOffset>15</bitOffset>
17040 <bitWidth>1</bitWidth>
17041 </field>
17042 <field>
17043 <name>FB16</name>
17044 <description>Filter bits</description>
17045 <bitOffset>16</bitOffset>
17046 <bitWidth>1</bitWidth>
17047 </field>
17048 <field>
17049 <name>FB17</name>
17050 <description>Filter bits</description>
17051 <bitOffset>17</bitOffset>
17052 <bitWidth>1</bitWidth>
17053 </field>
17054 <field>
17055 <name>FB18</name>
17056 <description>Filter bits</description>
17057 <bitOffset>18</bitOffset>
17058 <bitWidth>1</bitWidth>
17059 </field>
17060 <field>
17061 <name>FB19</name>
17062 <description>Filter bits</description>
17063 <bitOffset>19</bitOffset>
17064 <bitWidth>1</bitWidth>
17065 </field>
17066 <field>
17067 <name>FB20</name>
17068 <description>Filter bits</description>
17069 <bitOffset>20</bitOffset>
17070 <bitWidth>1</bitWidth>
17071 </field>
17072 <field>
17073 <name>FB21</name>
17074 <description>Filter bits</description>
17075 <bitOffset>21</bitOffset>
17076 <bitWidth>1</bitWidth>
17077 </field>
17078 <field>
17079 <name>FB22</name>
17080 <description>Filter bits</description>
17081 <bitOffset>22</bitOffset>
17082 <bitWidth>1</bitWidth>
17083 </field>
17084 <field>
17085 <name>FB23</name>
17086 <description>Filter bits</description>
17087 <bitOffset>23</bitOffset>
17088 <bitWidth>1</bitWidth>
17089 </field>
17090 <field>
17091 <name>FB24</name>
17092 <description>Filter bits</description>
17093 <bitOffset>24</bitOffset>
17094 <bitWidth>1</bitWidth>
17095 </field>
17096 <field>
17097 <name>FB25</name>
17098 <description>Filter bits</description>
17099 <bitOffset>25</bitOffset>
17100 <bitWidth>1</bitWidth>
17101 </field>
17102 <field>
17103 <name>FB26</name>
17104 <description>Filter bits</description>
17105 <bitOffset>26</bitOffset>
17106 <bitWidth>1</bitWidth>
17107 </field>
17108 <field>
17109 <name>FB27</name>
17110 <description>Filter bits</description>
17111 <bitOffset>27</bitOffset>
17112 <bitWidth>1</bitWidth>
17113 </field>
17114 <field>
17115 <name>FB28</name>
17116 <description>Filter bits</description>
17117 <bitOffset>28</bitOffset>
17118 <bitWidth>1</bitWidth>
17119 </field>
17120 <field>
17121 <name>FB29</name>
17122 <description>Filter bits</description>
17123 <bitOffset>29</bitOffset>
17124 <bitWidth>1</bitWidth>
17125 </field>
17126 <field>
17127 <name>FB30</name>
17128 <description>Filter bits</description>
17129 <bitOffset>30</bitOffset>
17130 <bitWidth>1</bitWidth>
17131 </field>
17132 <field>
17133 <name>FB31</name>
17134 <description>Filter bits</description>
17135 <bitOffset>31</bitOffset>
17136 <bitWidth>1</bitWidth>
17137 </field>
17138 </fields>
17139 </register>
17140 <register>
17141 <name>F5R1</name>
17142 <displayName>F5R1</displayName>
17143 <description>Filter bank 5 register 1</description>
17144 <addressOffset>0x268</addressOffset>
17145 <size>0x20</size>
17146 <access>read-write</access>
17147 <resetValue>0x00000000</resetValue>
17148 <fields>
17149 <field>
17150 <name>FB0</name>
17151 <description>Filter bits</description>
17152 <bitOffset>0</bitOffset>
17153 <bitWidth>1</bitWidth>
17154 </field>
17155 <field>
17156 <name>FB1</name>
17157 <description>Filter bits</description>
17158 <bitOffset>1</bitOffset>
17159 <bitWidth>1</bitWidth>
17160 </field>
17161 <field>
17162 <name>FB2</name>
17163 <description>Filter bits</description>
17164 <bitOffset>2</bitOffset>
17165 <bitWidth>1</bitWidth>
17166 </field>
17167 <field>
17168 <name>FB3</name>
17169 <description>Filter bits</description>
17170 <bitOffset>3</bitOffset>
17171 <bitWidth>1</bitWidth>
17172 </field>
17173 <field>
17174 <name>FB4</name>
17175 <description>Filter bits</description>
17176 <bitOffset>4</bitOffset>
17177 <bitWidth>1</bitWidth>
17178 </field>
17179 <field>
17180 <name>FB5</name>
17181 <description>Filter bits</description>
17182 <bitOffset>5</bitOffset>
17183 <bitWidth>1</bitWidth>
17184 </field>
17185 <field>
17186 <name>FB6</name>
17187 <description>Filter bits</description>
17188 <bitOffset>6</bitOffset>
17189 <bitWidth>1</bitWidth>
17190 </field>
17191 <field>
17192 <name>FB7</name>
17193 <description>Filter bits</description>
17194 <bitOffset>7</bitOffset>
17195 <bitWidth>1</bitWidth>
17196 </field>
17197 <field>
17198 <name>FB8</name>
17199 <description>Filter bits</description>
17200 <bitOffset>8</bitOffset>
17201 <bitWidth>1</bitWidth>
17202 </field>
17203 <field>
17204 <name>FB9</name>
17205 <description>Filter bits</description>
17206 <bitOffset>9</bitOffset>
17207 <bitWidth>1</bitWidth>
17208 </field>
17209 <field>
17210 <name>FB10</name>
17211 <description>Filter bits</description>
17212 <bitOffset>10</bitOffset>
17213 <bitWidth>1</bitWidth>
17214 </field>
17215 <field>
17216 <name>FB11</name>
17217 <description>Filter bits</description>
17218 <bitOffset>11</bitOffset>
17219 <bitWidth>1</bitWidth>
17220 </field>
17221 <field>
17222 <name>FB12</name>
17223 <description>Filter bits</description>
17224 <bitOffset>12</bitOffset>
17225 <bitWidth>1</bitWidth>
17226 </field>
17227 <field>
17228 <name>FB13</name>
17229 <description>Filter bits</description>
17230 <bitOffset>13</bitOffset>
17231 <bitWidth>1</bitWidth>
17232 </field>
17233 <field>
17234 <name>FB14</name>
17235 <description>Filter bits</description>
17236 <bitOffset>14</bitOffset>
17237 <bitWidth>1</bitWidth>
17238 </field>
17239 <field>
17240 <name>FB15</name>
17241 <description>Filter bits</description>
17242 <bitOffset>15</bitOffset>
17243 <bitWidth>1</bitWidth>
17244 </field>
17245 <field>
17246 <name>FB16</name>
17247 <description>Filter bits</description>
17248 <bitOffset>16</bitOffset>
17249 <bitWidth>1</bitWidth>
17250 </field>
17251 <field>
17252 <name>FB17</name>
17253 <description>Filter bits</description>
17254 <bitOffset>17</bitOffset>
17255 <bitWidth>1</bitWidth>
17256 </field>
17257 <field>
17258 <name>FB18</name>
17259 <description>Filter bits</description>
17260 <bitOffset>18</bitOffset>
17261 <bitWidth>1</bitWidth>
17262 </field>
17263 <field>
17264 <name>FB19</name>
17265 <description>Filter bits</description>
17266 <bitOffset>19</bitOffset>
17267 <bitWidth>1</bitWidth>
17268 </field>
17269 <field>
17270 <name>FB20</name>
17271 <description>Filter bits</description>
17272 <bitOffset>20</bitOffset>
17273 <bitWidth>1</bitWidth>
17274 </field>
17275 <field>
17276 <name>FB21</name>
17277 <description>Filter bits</description>
17278 <bitOffset>21</bitOffset>
17279 <bitWidth>1</bitWidth>
17280 </field>
17281 <field>
17282 <name>FB22</name>
17283 <description>Filter bits</description>
17284 <bitOffset>22</bitOffset>
17285 <bitWidth>1</bitWidth>
17286 </field>
17287 <field>
17288 <name>FB23</name>
17289 <description>Filter bits</description>
17290 <bitOffset>23</bitOffset>
17291 <bitWidth>1</bitWidth>
17292 </field>
17293 <field>
17294 <name>FB24</name>
17295 <description>Filter bits</description>
17296 <bitOffset>24</bitOffset>
17297 <bitWidth>1</bitWidth>
17298 </field>
17299 <field>
17300 <name>FB25</name>
17301 <description>Filter bits</description>
17302 <bitOffset>25</bitOffset>
17303 <bitWidth>1</bitWidth>
17304 </field>
17305 <field>
17306 <name>FB26</name>
17307 <description>Filter bits</description>
17308 <bitOffset>26</bitOffset>
17309 <bitWidth>1</bitWidth>
17310 </field>
17311 <field>
17312 <name>FB27</name>
17313 <description>Filter bits</description>
17314 <bitOffset>27</bitOffset>
17315 <bitWidth>1</bitWidth>
17316 </field>
17317 <field>
17318 <name>FB28</name>
17319 <description>Filter bits</description>
17320 <bitOffset>28</bitOffset>
17321 <bitWidth>1</bitWidth>
17322 </field>
17323 <field>
17324 <name>FB29</name>
17325 <description>Filter bits</description>
17326 <bitOffset>29</bitOffset>
17327 <bitWidth>1</bitWidth>
17328 </field>
17329 <field>
17330 <name>FB30</name>
17331 <description>Filter bits</description>
17332 <bitOffset>30</bitOffset>
17333 <bitWidth>1</bitWidth>
17334 </field>
17335 <field>
17336 <name>FB31</name>
17337 <description>Filter bits</description>
17338 <bitOffset>31</bitOffset>
17339 <bitWidth>1</bitWidth>
17340 </field>
17341 </fields>
17342 </register>
17343 <register>
17344 <name>F5R2</name>
17345 <displayName>F5R2</displayName>
17346 <description>Filter bank 5 register 2</description>
17347 <addressOffset>0x26C</addressOffset>
17348 <size>0x20</size>
17349 <access>read-write</access>
17350 <resetValue>0x00000000</resetValue>
17351 <fields>
17352 <field>
17353 <name>FB0</name>
17354 <description>Filter bits</description>
17355 <bitOffset>0</bitOffset>
17356 <bitWidth>1</bitWidth>
17357 </field>
17358 <field>
17359 <name>FB1</name>
17360 <description>Filter bits</description>
17361 <bitOffset>1</bitOffset>
17362 <bitWidth>1</bitWidth>
17363 </field>
17364 <field>
17365 <name>FB2</name>
17366 <description>Filter bits</description>
17367 <bitOffset>2</bitOffset>
17368 <bitWidth>1</bitWidth>
17369 </field>
17370 <field>
17371 <name>FB3</name>
17372 <description>Filter bits</description>
17373 <bitOffset>3</bitOffset>
17374 <bitWidth>1</bitWidth>
17375 </field>
17376 <field>
17377 <name>FB4</name>
17378 <description>Filter bits</description>
17379 <bitOffset>4</bitOffset>
17380 <bitWidth>1</bitWidth>
17381 </field>
17382 <field>
17383 <name>FB5</name>
17384 <description>Filter bits</description>
17385 <bitOffset>5</bitOffset>
17386 <bitWidth>1</bitWidth>
17387 </field>
17388 <field>
17389 <name>FB6</name>
17390 <description>Filter bits</description>
17391 <bitOffset>6</bitOffset>
17392 <bitWidth>1</bitWidth>
17393 </field>
17394 <field>
17395 <name>FB7</name>
17396 <description>Filter bits</description>
17397 <bitOffset>7</bitOffset>
17398 <bitWidth>1</bitWidth>
17399 </field>
17400 <field>
17401 <name>FB8</name>
17402 <description>Filter bits</description>
17403 <bitOffset>8</bitOffset>
17404 <bitWidth>1</bitWidth>
17405 </field>
17406 <field>
17407 <name>FB9</name>
17408 <description>Filter bits</description>
17409 <bitOffset>9</bitOffset>
17410 <bitWidth>1</bitWidth>
17411 </field>
17412 <field>
17413 <name>FB10</name>
17414 <description>Filter bits</description>
17415 <bitOffset>10</bitOffset>
17416 <bitWidth>1</bitWidth>
17417 </field>
17418 <field>
17419 <name>FB11</name>
17420 <description>Filter bits</description>
17421 <bitOffset>11</bitOffset>
17422 <bitWidth>1</bitWidth>
17423 </field>
17424 <field>
17425 <name>FB12</name>
17426 <description>Filter bits</description>
17427 <bitOffset>12</bitOffset>
17428 <bitWidth>1</bitWidth>
17429 </field>
17430 <field>
17431 <name>FB13</name>
17432 <description>Filter bits</description>
17433 <bitOffset>13</bitOffset>
17434 <bitWidth>1</bitWidth>
17435 </field>
17436 <field>
17437 <name>FB14</name>
17438 <description>Filter bits</description>
17439 <bitOffset>14</bitOffset>
17440 <bitWidth>1</bitWidth>
17441 </field>
17442 <field>
17443 <name>FB15</name>
17444 <description>Filter bits</description>
17445 <bitOffset>15</bitOffset>
17446 <bitWidth>1</bitWidth>
17447 </field>
17448 <field>
17449 <name>FB16</name>
17450 <description>Filter bits</description>
17451 <bitOffset>16</bitOffset>
17452 <bitWidth>1</bitWidth>
17453 </field>
17454 <field>
17455 <name>FB17</name>
17456 <description>Filter bits</description>
17457 <bitOffset>17</bitOffset>
17458 <bitWidth>1</bitWidth>
17459 </field>
17460 <field>
17461 <name>FB18</name>
17462 <description>Filter bits</description>
17463 <bitOffset>18</bitOffset>
17464 <bitWidth>1</bitWidth>
17465 </field>
17466 <field>
17467 <name>FB19</name>
17468 <description>Filter bits</description>
17469 <bitOffset>19</bitOffset>
17470 <bitWidth>1</bitWidth>
17471 </field>
17472 <field>
17473 <name>FB20</name>
17474 <description>Filter bits</description>
17475 <bitOffset>20</bitOffset>
17476 <bitWidth>1</bitWidth>
17477 </field>
17478 <field>
17479 <name>FB21</name>
17480 <description>Filter bits</description>
17481 <bitOffset>21</bitOffset>
17482 <bitWidth>1</bitWidth>
17483 </field>
17484 <field>
17485 <name>FB22</name>
17486 <description>Filter bits</description>
17487 <bitOffset>22</bitOffset>
17488 <bitWidth>1</bitWidth>
17489 </field>
17490 <field>
17491 <name>FB23</name>
17492 <description>Filter bits</description>
17493 <bitOffset>23</bitOffset>
17494 <bitWidth>1</bitWidth>
17495 </field>
17496 <field>
17497 <name>FB24</name>
17498 <description>Filter bits</description>
17499 <bitOffset>24</bitOffset>
17500 <bitWidth>1</bitWidth>
17501 </field>
17502 <field>
17503 <name>FB25</name>
17504 <description>Filter bits</description>
17505 <bitOffset>25</bitOffset>
17506 <bitWidth>1</bitWidth>
17507 </field>
17508 <field>
17509 <name>FB26</name>
17510 <description>Filter bits</description>
17511 <bitOffset>26</bitOffset>
17512 <bitWidth>1</bitWidth>
17513 </field>
17514 <field>
17515 <name>FB27</name>
17516 <description>Filter bits</description>
17517 <bitOffset>27</bitOffset>
17518 <bitWidth>1</bitWidth>
17519 </field>
17520 <field>
17521 <name>FB28</name>
17522 <description>Filter bits</description>
17523 <bitOffset>28</bitOffset>
17524 <bitWidth>1</bitWidth>
17525 </field>
17526 <field>
17527 <name>FB29</name>
17528 <description>Filter bits</description>
17529 <bitOffset>29</bitOffset>
17530 <bitWidth>1</bitWidth>
17531 </field>
17532 <field>
17533 <name>FB30</name>
17534 <description>Filter bits</description>
17535 <bitOffset>30</bitOffset>
17536 <bitWidth>1</bitWidth>
17537 </field>
17538 <field>
17539 <name>FB31</name>
17540 <description>Filter bits</description>
17541 <bitOffset>31</bitOffset>
17542 <bitWidth>1</bitWidth>
17543 </field>
17544 </fields>
17545 </register>
17546 <register>
17547 <name>F6R1</name>
17548 <displayName>F6R1</displayName>
17549 <description>Filter bank 6 register 1</description>
17550 <addressOffset>0x270</addressOffset>
17551 <size>0x20</size>
17552 <access>read-write</access>
17553 <resetValue>0x00000000</resetValue>
17554 <fields>
17555 <field>
17556 <name>FB0</name>
17557 <description>Filter bits</description>
17558 <bitOffset>0</bitOffset>
17559 <bitWidth>1</bitWidth>
17560 </field>
17561 <field>
17562 <name>FB1</name>
17563 <description>Filter bits</description>
17564 <bitOffset>1</bitOffset>
17565 <bitWidth>1</bitWidth>
17566 </field>
17567 <field>
17568 <name>FB2</name>
17569 <description>Filter bits</description>
17570 <bitOffset>2</bitOffset>
17571 <bitWidth>1</bitWidth>
17572 </field>
17573 <field>
17574 <name>FB3</name>
17575 <description>Filter bits</description>
17576 <bitOffset>3</bitOffset>
17577 <bitWidth>1</bitWidth>
17578 </field>
17579 <field>
17580 <name>FB4</name>
17581 <description>Filter bits</description>
17582 <bitOffset>4</bitOffset>
17583 <bitWidth>1</bitWidth>
17584 </field>
17585 <field>
17586 <name>FB5</name>
17587 <description>Filter bits</description>
17588 <bitOffset>5</bitOffset>
17589 <bitWidth>1</bitWidth>
17590 </field>
17591 <field>
17592 <name>FB6</name>
17593 <description>Filter bits</description>
17594 <bitOffset>6</bitOffset>
17595 <bitWidth>1</bitWidth>
17596 </field>
17597 <field>
17598 <name>FB7</name>
17599 <description>Filter bits</description>
17600 <bitOffset>7</bitOffset>
17601 <bitWidth>1</bitWidth>
17602 </field>
17603 <field>
17604 <name>FB8</name>
17605 <description>Filter bits</description>
17606 <bitOffset>8</bitOffset>
17607 <bitWidth>1</bitWidth>
17608 </field>
17609 <field>
17610 <name>FB9</name>
17611 <description>Filter bits</description>
17612 <bitOffset>9</bitOffset>
17613 <bitWidth>1</bitWidth>
17614 </field>
17615 <field>
17616 <name>FB10</name>
17617 <description>Filter bits</description>
17618 <bitOffset>10</bitOffset>
17619 <bitWidth>1</bitWidth>
17620 </field>
17621 <field>
17622 <name>FB11</name>
17623 <description>Filter bits</description>
17624 <bitOffset>11</bitOffset>
17625 <bitWidth>1</bitWidth>
17626 </field>
17627 <field>
17628 <name>FB12</name>
17629 <description>Filter bits</description>
17630 <bitOffset>12</bitOffset>
17631 <bitWidth>1</bitWidth>
17632 </field>
17633 <field>
17634 <name>FB13</name>
17635 <description>Filter bits</description>
17636 <bitOffset>13</bitOffset>
17637 <bitWidth>1</bitWidth>
17638 </field>
17639 <field>
17640 <name>FB14</name>
17641 <description>Filter bits</description>
17642 <bitOffset>14</bitOffset>
17643 <bitWidth>1</bitWidth>
17644 </field>
17645 <field>
17646 <name>FB15</name>
17647 <description>Filter bits</description>
17648 <bitOffset>15</bitOffset>
17649 <bitWidth>1</bitWidth>
17650 </field>
17651 <field>
17652 <name>FB16</name>
17653 <description>Filter bits</description>
17654 <bitOffset>16</bitOffset>
17655 <bitWidth>1</bitWidth>
17656 </field>
17657 <field>
17658 <name>FB17</name>
17659 <description>Filter bits</description>
17660 <bitOffset>17</bitOffset>
17661 <bitWidth>1</bitWidth>
17662 </field>
17663 <field>
17664 <name>FB18</name>
17665 <description>Filter bits</description>
17666 <bitOffset>18</bitOffset>
17667 <bitWidth>1</bitWidth>
17668 </field>
17669 <field>
17670 <name>FB19</name>
17671 <description>Filter bits</description>
17672 <bitOffset>19</bitOffset>
17673 <bitWidth>1</bitWidth>
17674 </field>
17675 <field>
17676 <name>FB20</name>
17677 <description>Filter bits</description>
17678 <bitOffset>20</bitOffset>
17679 <bitWidth>1</bitWidth>
17680 </field>
17681 <field>
17682 <name>FB21</name>
17683 <description>Filter bits</description>
17684 <bitOffset>21</bitOffset>
17685 <bitWidth>1</bitWidth>
17686 </field>
17687 <field>
17688 <name>FB22</name>
17689 <description>Filter bits</description>
17690 <bitOffset>22</bitOffset>
17691 <bitWidth>1</bitWidth>
17692 </field>
17693 <field>
17694 <name>FB23</name>
17695 <description>Filter bits</description>
17696 <bitOffset>23</bitOffset>
17697 <bitWidth>1</bitWidth>
17698 </field>
17699 <field>
17700 <name>FB24</name>
17701 <description>Filter bits</description>
17702 <bitOffset>24</bitOffset>
17703 <bitWidth>1</bitWidth>
17704 </field>
17705 <field>
17706 <name>FB25</name>
17707 <description>Filter bits</description>
17708 <bitOffset>25</bitOffset>
17709 <bitWidth>1</bitWidth>
17710 </field>
17711 <field>
17712 <name>FB26</name>
17713 <description>Filter bits</description>
17714 <bitOffset>26</bitOffset>
17715 <bitWidth>1</bitWidth>
17716 </field>
17717 <field>
17718 <name>FB27</name>
17719 <description>Filter bits</description>
17720 <bitOffset>27</bitOffset>
17721 <bitWidth>1</bitWidth>
17722 </field>
17723 <field>
17724 <name>FB28</name>
17725 <description>Filter bits</description>
17726 <bitOffset>28</bitOffset>
17727 <bitWidth>1</bitWidth>
17728 </field>
17729 <field>
17730 <name>FB29</name>
17731 <description>Filter bits</description>
17732 <bitOffset>29</bitOffset>
17733 <bitWidth>1</bitWidth>
17734 </field>
17735 <field>
17736 <name>FB30</name>
17737 <description>Filter bits</description>
17738 <bitOffset>30</bitOffset>
17739 <bitWidth>1</bitWidth>
17740 </field>
17741 <field>
17742 <name>FB31</name>
17743 <description>Filter bits</description>
17744 <bitOffset>31</bitOffset>
17745 <bitWidth>1</bitWidth>
17746 </field>
17747 </fields>
17748 </register>
17749 <register>
17750 <name>F6R2</name>
17751 <displayName>F6R2</displayName>
17752 <description>Filter bank 6 register 2</description>
17753 <addressOffset>0x274</addressOffset>
17754 <size>0x20</size>
17755 <access>read-write</access>
17756 <resetValue>0x00000000</resetValue>
17757 <fields>
17758 <field>
17759 <name>FB0</name>
17760 <description>Filter bits</description>
17761 <bitOffset>0</bitOffset>
17762 <bitWidth>1</bitWidth>
17763 </field>
17764 <field>
17765 <name>FB1</name>
17766 <description>Filter bits</description>
17767 <bitOffset>1</bitOffset>
17768 <bitWidth>1</bitWidth>
17769 </field>
17770 <field>
17771 <name>FB2</name>
17772 <description>Filter bits</description>
17773 <bitOffset>2</bitOffset>
17774 <bitWidth>1</bitWidth>
17775 </field>
17776 <field>
17777 <name>FB3</name>
17778 <description>Filter bits</description>
17779 <bitOffset>3</bitOffset>
17780 <bitWidth>1</bitWidth>
17781 </field>
17782 <field>
17783 <name>FB4</name>
17784 <description>Filter bits</description>
17785 <bitOffset>4</bitOffset>
17786 <bitWidth>1</bitWidth>
17787 </field>
17788 <field>
17789 <name>FB5</name>
17790 <description>Filter bits</description>
17791 <bitOffset>5</bitOffset>
17792 <bitWidth>1</bitWidth>
17793 </field>
17794 <field>
17795 <name>FB6</name>
17796 <description>Filter bits</description>
17797 <bitOffset>6</bitOffset>
17798 <bitWidth>1</bitWidth>
17799 </field>
17800 <field>
17801 <name>FB7</name>
17802 <description>Filter bits</description>
17803 <bitOffset>7</bitOffset>
17804 <bitWidth>1</bitWidth>
17805 </field>
17806 <field>
17807 <name>FB8</name>
17808 <description>Filter bits</description>
17809 <bitOffset>8</bitOffset>
17810 <bitWidth>1</bitWidth>
17811 </field>
17812 <field>
17813 <name>FB9</name>
17814 <description>Filter bits</description>
17815 <bitOffset>9</bitOffset>
17816 <bitWidth>1</bitWidth>
17817 </field>
17818 <field>
17819 <name>FB10</name>
17820 <description>Filter bits</description>
17821 <bitOffset>10</bitOffset>
17822 <bitWidth>1</bitWidth>
17823 </field>
17824 <field>
17825 <name>FB11</name>
17826 <description>Filter bits</description>
17827 <bitOffset>11</bitOffset>
17828 <bitWidth>1</bitWidth>
17829 </field>
17830 <field>
17831 <name>FB12</name>
17832 <description>Filter bits</description>
17833 <bitOffset>12</bitOffset>
17834 <bitWidth>1</bitWidth>
17835 </field>
17836 <field>
17837 <name>FB13</name>
17838 <description>Filter bits</description>
17839 <bitOffset>13</bitOffset>
17840 <bitWidth>1</bitWidth>
17841 </field>
17842 <field>
17843 <name>FB14</name>
17844 <description>Filter bits</description>
17845 <bitOffset>14</bitOffset>
17846 <bitWidth>1</bitWidth>
17847 </field>
17848 <field>
17849 <name>FB15</name>
17850 <description>Filter bits</description>
17851 <bitOffset>15</bitOffset>
17852 <bitWidth>1</bitWidth>
17853 </field>
17854 <field>
17855 <name>FB16</name>
17856 <description>Filter bits</description>
17857 <bitOffset>16</bitOffset>
17858 <bitWidth>1</bitWidth>
17859 </field>
17860 <field>
17861 <name>FB17</name>
17862 <description>Filter bits</description>
17863 <bitOffset>17</bitOffset>
17864 <bitWidth>1</bitWidth>
17865 </field>
17866 <field>
17867 <name>FB18</name>
17868 <description>Filter bits</description>
17869 <bitOffset>18</bitOffset>
17870 <bitWidth>1</bitWidth>
17871 </field>
17872 <field>
17873 <name>FB19</name>
17874 <description>Filter bits</description>
17875 <bitOffset>19</bitOffset>
17876 <bitWidth>1</bitWidth>
17877 </field>
17878 <field>
17879 <name>FB20</name>
17880 <description>Filter bits</description>
17881 <bitOffset>20</bitOffset>
17882 <bitWidth>1</bitWidth>
17883 </field>
17884 <field>
17885 <name>FB21</name>
17886 <description>Filter bits</description>
17887 <bitOffset>21</bitOffset>
17888 <bitWidth>1</bitWidth>
17889 </field>
17890 <field>
17891 <name>FB22</name>
17892 <description>Filter bits</description>
17893 <bitOffset>22</bitOffset>
17894 <bitWidth>1</bitWidth>
17895 </field>
17896 <field>
17897 <name>FB23</name>
17898 <description>Filter bits</description>
17899 <bitOffset>23</bitOffset>
17900 <bitWidth>1</bitWidth>
17901 </field>
17902 <field>
17903 <name>FB24</name>
17904 <description>Filter bits</description>
17905 <bitOffset>24</bitOffset>
17906 <bitWidth>1</bitWidth>
17907 </field>
17908 <field>
17909 <name>FB25</name>
17910 <description>Filter bits</description>
17911 <bitOffset>25</bitOffset>
17912 <bitWidth>1</bitWidth>
17913 </field>
17914 <field>
17915 <name>FB26</name>
17916 <description>Filter bits</description>
17917 <bitOffset>26</bitOffset>
17918 <bitWidth>1</bitWidth>
17919 </field>
17920 <field>
17921 <name>FB27</name>
17922 <description>Filter bits</description>
17923 <bitOffset>27</bitOffset>
17924 <bitWidth>1</bitWidth>
17925 </field>
17926 <field>
17927 <name>FB28</name>
17928 <description>Filter bits</description>
17929 <bitOffset>28</bitOffset>
17930 <bitWidth>1</bitWidth>
17931 </field>
17932 <field>
17933 <name>FB29</name>
17934 <description>Filter bits</description>
17935 <bitOffset>29</bitOffset>
17936 <bitWidth>1</bitWidth>
17937 </field>
17938 <field>
17939 <name>FB30</name>
17940 <description>Filter bits</description>
17941 <bitOffset>30</bitOffset>
17942 <bitWidth>1</bitWidth>
17943 </field>
17944 <field>
17945 <name>FB31</name>
17946 <description>Filter bits</description>
17947 <bitOffset>31</bitOffset>
17948 <bitWidth>1</bitWidth>
17949 </field>
17950 </fields>
17951 </register>
17952 <register>
17953 <name>F7R1</name>
17954 <displayName>F7R1</displayName>
17955 <description>Filter bank 7 register 1</description>
17956 <addressOffset>0x278</addressOffset>
17957 <size>0x20</size>
17958 <access>read-write</access>
17959 <resetValue>0x00000000</resetValue>
17960 <fields>
17961 <field>
17962 <name>FB0</name>
17963 <description>Filter bits</description>
17964 <bitOffset>0</bitOffset>
17965 <bitWidth>1</bitWidth>
17966 </field>
17967 <field>
17968 <name>FB1</name>
17969 <description>Filter bits</description>
17970 <bitOffset>1</bitOffset>
17971 <bitWidth>1</bitWidth>
17972 </field>
17973 <field>
17974 <name>FB2</name>
17975 <description>Filter bits</description>
17976 <bitOffset>2</bitOffset>
17977 <bitWidth>1</bitWidth>
17978 </field>
17979 <field>
17980 <name>FB3</name>
17981 <description>Filter bits</description>
17982 <bitOffset>3</bitOffset>
17983 <bitWidth>1</bitWidth>
17984 </field>
17985 <field>
17986 <name>FB4</name>
17987 <description>Filter bits</description>
17988 <bitOffset>4</bitOffset>
17989 <bitWidth>1</bitWidth>
17990 </field>
17991 <field>
17992 <name>FB5</name>
17993 <description>Filter bits</description>
17994 <bitOffset>5</bitOffset>
17995 <bitWidth>1</bitWidth>
17996 </field>
17997 <field>
17998 <name>FB6</name>
17999 <description>Filter bits</description>
18000 <bitOffset>6</bitOffset>
18001 <bitWidth>1</bitWidth>
18002 </field>
18003 <field>
18004 <name>FB7</name>
18005 <description>Filter bits</description>
18006 <bitOffset>7</bitOffset>
18007 <bitWidth>1</bitWidth>
18008 </field>
18009 <field>
18010 <name>FB8</name>
18011 <description>Filter bits</description>
18012 <bitOffset>8</bitOffset>
18013 <bitWidth>1</bitWidth>
18014 </field>
18015 <field>
18016 <name>FB9</name>
18017 <description>Filter bits</description>
18018 <bitOffset>9</bitOffset>
18019 <bitWidth>1</bitWidth>
18020 </field>
18021 <field>
18022 <name>FB10</name>
18023 <description>Filter bits</description>
18024 <bitOffset>10</bitOffset>
18025 <bitWidth>1</bitWidth>
18026 </field>
18027 <field>
18028 <name>FB11</name>
18029 <description>Filter bits</description>
18030 <bitOffset>11</bitOffset>
18031 <bitWidth>1</bitWidth>
18032 </field>
18033 <field>
18034 <name>FB12</name>
18035 <description>Filter bits</description>
18036 <bitOffset>12</bitOffset>
18037 <bitWidth>1</bitWidth>
18038 </field>
18039 <field>
18040 <name>FB13</name>
18041 <description>Filter bits</description>
18042 <bitOffset>13</bitOffset>
18043 <bitWidth>1</bitWidth>
18044 </field>
18045 <field>
18046 <name>FB14</name>
18047 <description>Filter bits</description>
18048 <bitOffset>14</bitOffset>
18049 <bitWidth>1</bitWidth>
18050 </field>
18051 <field>
18052 <name>FB15</name>
18053 <description>Filter bits</description>
18054 <bitOffset>15</bitOffset>
18055 <bitWidth>1</bitWidth>
18056 </field>
18057 <field>
18058 <name>FB16</name>
18059 <description>Filter bits</description>
18060 <bitOffset>16</bitOffset>
18061 <bitWidth>1</bitWidth>
18062 </field>
18063 <field>
18064 <name>FB17</name>
18065 <description>Filter bits</description>
18066 <bitOffset>17</bitOffset>
18067 <bitWidth>1</bitWidth>
18068 </field>
18069 <field>
18070 <name>FB18</name>
18071 <description>Filter bits</description>
18072 <bitOffset>18</bitOffset>
18073 <bitWidth>1</bitWidth>
18074 </field>
18075 <field>
18076 <name>FB19</name>
18077 <description>Filter bits</description>
18078 <bitOffset>19</bitOffset>
18079 <bitWidth>1</bitWidth>
18080 </field>
18081 <field>
18082 <name>FB20</name>
18083 <description>Filter bits</description>
18084 <bitOffset>20</bitOffset>
18085 <bitWidth>1</bitWidth>
18086 </field>
18087 <field>
18088 <name>FB21</name>
18089 <description>Filter bits</description>
18090 <bitOffset>21</bitOffset>
18091 <bitWidth>1</bitWidth>
18092 </field>
18093 <field>
18094 <name>FB22</name>
18095 <description>Filter bits</description>
18096 <bitOffset>22</bitOffset>
18097 <bitWidth>1</bitWidth>
18098 </field>
18099 <field>
18100 <name>FB23</name>
18101 <description>Filter bits</description>
18102 <bitOffset>23</bitOffset>
18103 <bitWidth>1</bitWidth>
18104 </field>
18105 <field>
18106 <name>FB24</name>
18107 <description>Filter bits</description>
18108 <bitOffset>24</bitOffset>
18109 <bitWidth>1</bitWidth>
18110 </field>
18111 <field>
18112 <name>FB25</name>
18113 <description>Filter bits</description>
18114 <bitOffset>25</bitOffset>
18115 <bitWidth>1</bitWidth>
18116 </field>
18117 <field>
18118 <name>FB26</name>
18119 <description>Filter bits</description>
18120 <bitOffset>26</bitOffset>
18121 <bitWidth>1</bitWidth>
18122 </field>
18123 <field>
18124 <name>FB27</name>
18125 <description>Filter bits</description>
18126 <bitOffset>27</bitOffset>
18127 <bitWidth>1</bitWidth>
18128 </field>
18129 <field>
18130 <name>FB28</name>
18131 <description>Filter bits</description>
18132 <bitOffset>28</bitOffset>
18133 <bitWidth>1</bitWidth>
18134 </field>
18135 <field>
18136 <name>FB29</name>
18137 <description>Filter bits</description>
18138 <bitOffset>29</bitOffset>
18139 <bitWidth>1</bitWidth>
18140 </field>
18141 <field>
18142 <name>FB30</name>
18143 <description>Filter bits</description>
18144 <bitOffset>30</bitOffset>
18145 <bitWidth>1</bitWidth>
18146 </field>
18147 <field>
18148 <name>FB31</name>
18149 <description>Filter bits</description>
18150 <bitOffset>31</bitOffset>
18151 <bitWidth>1</bitWidth>
18152 </field>
18153 </fields>
18154 </register>
18155 <register>
18156 <name>F7R2</name>
18157 <displayName>F7R2</displayName>
18158 <description>Filter bank 7 register 2</description>
18159 <addressOffset>0x27C</addressOffset>
18160 <size>0x20</size>
18161 <access>read-write</access>
18162 <resetValue>0x00000000</resetValue>
18163 <fields>
18164 <field>
18165 <name>FB0</name>
18166 <description>Filter bits</description>
18167 <bitOffset>0</bitOffset>
18168 <bitWidth>1</bitWidth>
18169 </field>
18170 <field>
18171 <name>FB1</name>
18172 <description>Filter bits</description>
18173 <bitOffset>1</bitOffset>
18174 <bitWidth>1</bitWidth>
18175 </field>
18176 <field>
18177 <name>FB2</name>
18178 <description>Filter bits</description>
18179 <bitOffset>2</bitOffset>
18180 <bitWidth>1</bitWidth>
18181 </field>
18182 <field>
18183 <name>FB3</name>
18184 <description>Filter bits</description>
18185 <bitOffset>3</bitOffset>
18186 <bitWidth>1</bitWidth>
18187 </field>
18188 <field>
18189 <name>FB4</name>
18190 <description>Filter bits</description>
18191 <bitOffset>4</bitOffset>
18192 <bitWidth>1</bitWidth>
18193 </field>
18194 <field>
18195 <name>FB5</name>
18196 <description>Filter bits</description>
18197 <bitOffset>5</bitOffset>
18198 <bitWidth>1</bitWidth>
18199 </field>
18200 <field>
18201 <name>FB6</name>
18202 <description>Filter bits</description>
18203 <bitOffset>6</bitOffset>
18204 <bitWidth>1</bitWidth>
18205 </field>
18206 <field>
18207 <name>FB7</name>
18208 <description>Filter bits</description>
18209 <bitOffset>7</bitOffset>
18210 <bitWidth>1</bitWidth>
18211 </field>
18212 <field>
18213 <name>FB8</name>
18214 <description>Filter bits</description>
18215 <bitOffset>8</bitOffset>
18216 <bitWidth>1</bitWidth>
18217 </field>
18218 <field>
18219 <name>FB9</name>
18220 <description>Filter bits</description>
18221 <bitOffset>9</bitOffset>
18222 <bitWidth>1</bitWidth>
18223 </field>
18224 <field>
18225 <name>FB10</name>
18226 <description>Filter bits</description>
18227 <bitOffset>10</bitOffset>
18228 <bitWidth>1</bitWidth>
18229 </field>
18230 <field>
18231 <name>FB11</name>
18232 <description>Filter bits</description>
18233 <bitOffset>11</bitOffset>
18234 <bitWidth>1</bitWidth>
18235 </field>
18236 <field>
18237 <name>FB12</name>
18238 <description>Filter bits</description>
18239 <bitOffset>12</bitOffset>
18240 <bitWidth>1</bitWidth>
18241 </field>
18242 <field>
18243 <name>FB13</name>
18244 <description>Filter bits</description>
18245 <bitOffset>13</bitOffset>
18246 <bitWidth>1</bitWidth>
18247 </field>
18248 <field>
18249 <name>FB14</name>
18250 <description>Filter bits</description>
18251 <bitOffset>14</bitOffset>
18252 <bitWidth>1</bitWidth>
18253 </field>
18254 <field>
18255 <name>FB15</name>
18256 <description>Filter bits</description>
18257 <bitOffset>15</bitOffset>
18258 <bitWidth>1</bitWidth>
18259 </field>
18260 <field>
18261 <name>FB16</name>
18262 <description>Filter bits</description>
18263 <bitOffset>16</bitOffset>
18264 <bitWidth>1</bitWidth>
18265 </field>
18266 <field>
18267 <name>FB17</name>
18268 <description>Filter bits</description>
18269 <bitOffset>17</bitOffset>
18270 <bitWidth>1</bitWidth>
18271 </field>
18272 <field>
18273 <name>FB18</name>
18274 <description>Filter bits</description>
18275 <bitOffset>18</bitOffset>
18276 <bitWidth>1</bitWidth>
18277 </field>
18278 <field>
18279 <name>FB19</name>
18280 <description>Filter bits</description>
18281 <bitOffset>19</bitOffset>
18282 <bitWidth>1</bitWidth>
18283 </field>
18284 <field>
18285 <name>FB20</name>
18286 <description>Filter bits</description>
18287 <bitOffset>20</bitOffset>
18288 <bitWidth>1</bitWidth>
18289 </field>
18290 <field>
18291 <name>FB21</name>
18292 <description>Filter bits</description>
18293 <bitOffset>21</bitOffset>
18294 <bitWidth>1</bitWidth>
18295 </field>
18296 <field>
18297 <name>FB22</name>
18298 <description>Filter bits</description>
18299 <bitOffset>22</bitOffset>
18300 <bitWidth>1</bitWidth>
18301 </field>
18302 <field>
18303 <name>FB23</name>
18304 <description>Filter bits</description>
18305 <bitOffset>23</bitOffset>
18306 <bitWidth>1</bitWidth>
18307 </field>
18308 <field>
18309 <name>FB24</name>
18310 <description>Filter bits</description>
18311 <bitOffset>24</bitOffset>
18312 <bitWidth>1</bitWidth>
18313 </field>
18314 <field>
18315 <name>FB25</name>
18316 <description>Filter bits</description>
18317 <bitOffset>25</bitOffset>
18318 <bitWidth>1</bitWidth>
18319 </field>
18320 <field>
18321 <name>FB26</name>
18322 <description>Filter bits</description>
18323 <bitOffset>26</bitOffset>
18324 <bitWidth>1</bitWidth>
18325 </field>
18326 <field>
18327 <name>FB27</name>
18328 <description>Filter bits</description>
18329 <bitOffset>27</bitOffset>
18330 <bitWidth>1</bitWidth>
18331 </field>
18332 <field>
18333 <name>FB28</name>
18334 <description>Filter bits</description>
18335 <bitOffset>28</bitOffset>
18336 <bitWidth>1</bitWidth>
18337 </field>
18338 <field>
18339 <name>FB29</name>
18340 <description>Filter bits</description>
18341 <bitOffset>29</bitOffset>
18342 <bitWidth>1</bitWidth>
18343 </field>
18344 <field>
18345 <name>FB30</name>
18346 <description>Filter bits</description>
18347 <bitOffset>30</bitOffset>
18348 <bitWidth>1</bitWidth>
18349 </field>
18350 <field>
18351 <name>FB31</name>
18352 <description>Filter bits</description>
18353 <bitOffset>31</bitOffset>
18354 <bitWidth>1</bitWidth>
18355 </field>
18356 </fields>
18357 </register>
18358 <register>
18359 <name>F8R1</name>
18360 <displayName>F8R1</displayName>
18361 <description>Filter bank 8 register 1</description>
18362 <addressOffset>0x280</addressOffset>
18363 <size>0x20</size>
18364 <access>read-write</access>
18365 <resetValue>0x00000000</resetValue>
18366 <fields>
18367 <field>
18368 <name>FB0</name>
18369 <description>Filter bits</description>
18370 <bitOffset>0</bitOffset>
18371 <bitWidth>1</bitWidth>
18372 </field>
18373 <field>
18374 <name>FB1</name>
18375 <description>Filter bits</description>
18376 <bitOffset>1</bitOffset>
18377 <bitWidth>1</bitWidth>
18378 </field>
18379 <field>
18380 <name>FB2</name>
18381 <description>Filter bits</description>
18382 <bitOffset>2</bitOffset>
18383 <bitWidth>1</bitWidth>
18384 </field>
18385 <field>
18386 <name>FB3</name>
18387 <description>Filter bits</description>
18388 <bitOffset>3</bitOffset>
18389 <bitWidth>1</bitWidth>
18390 </field>
18391 <field>
18392 <name>FB4</name>
18393 <description>Filter bits</description>
18394 <bitOffset>4</bitOffset>
18395 <bitWidth>1</bitWidth>
18396 </field>
18397 <field>
18398 <name>FB5</name>
18399 <description>Filter bits</description>
18400 <bitOffset>5</bitOffset>
18401 <bitWidth>1</bitWidth>
18402 </field>
18403 <field>
18404 <name>FB6</name>
18405 <description>Filter bits</description>
18406 <bitOffset>6</bitOffset>
18407 <bitWidth>1</bitWidth>
18408 </field>
18409 <field>
18410 <name>FB7</name>
18411 <description>Filter bits</description>
18412 <bitOffset>7</bitOffset>
18413 <bitWidth>1</bitWidth>
18414 </field>
18415 <field>
18416 <name>FB8</name>
18417 <description>Filter bits</description>
18418 <bitOffset>8</bitOffset>
18419 <bitWidth>1</bitWidth>
18420 </field>
18421 <field>
18422 <name>FB9</name>
18423 <description>Filter bits</description>
18424 <bitOffset>9</bitOffset>
18425 <bitWidth>1</bitWidth>
18426 </field>
18427 <field>
18428 <name>FB10</name>
18429 <description>Filter bits</description>
18430 <bitOffset>10</bitOffset>
18431 <bitWidth>1</bitWidth>
18432 </field>
18433 <field>
18434 <name>FB11</name>
18435 <description>Filter bits</description>
18436 <bitOffset>11</bitOffset>
18437 <bitWidth>1</bitWidth>
18438 </field>
18439 <field>
18440 <name>FB12</name>
18441 <description>Filter bits</description>
18442 <bitOffset>12</bitOffset>
18443 <bitWidth>1</bitWidth>
18444 </field>
18445 <field>
18446 <name>FB13</name>
18447 <description>Filter bits</description>
18448 <bitOffset>13</bitOffset>
18449 <bitWidth>1</bitWidth>
18450 </field>
18451 <field>
18452 <name>FB14</name>
18453 <description>Filter bits</description>
18454 <bitOffset>14</bitOffset>
18455 <bitWidth>1</bitWidth>
18456 </field>
18457 <field>
18458 <name>FB15</name>
18459 <description>Filter bits</description>
18460 <bitOffset>15</bitOffset>
18461 <bitWidth>1</bitWidth>
18462 </field>
18463 <field>
18464 <name>FB16</name>
18465 <description>Filter bits</description>
18466 <bitOffset>16</bitOffset>
18467 <bitWidth>1</bitWidth>
18468 </field>
18469 <field>
18470 <name>FB17</name>
18471 <description>Filter bits</description>
18472 <bitOffset>17</bitOffset>
18473 <bitWidth>1</bitWidth>
18474 </field>
18475 <field>
18476 <name>FB18</name>
18477 <description>Filter bits</description>
18478 <bitOffset>18</bitOffset>
18479 <bitWidth>1</bitWidth>
18480 </field>
18481 <field>
18482 <name>FB19</name>
18483 <description>Filter bits</description>
18484 <bitOffset>19</bitOffset>
18485 <bitWidth>1</bitWidth>
18486 </field>
18487 <field>
18488 <name>FB20</name>
18489 <description>Filter bits</description>
18490 <bitOffset>20</bitOffset>
18491 <bitWidth>1</bitWidth>
18492 </field>
18493 <field>
18494 <name>FB21</name>
18495 <description>Filter bits</description>
18496 <bitOffset>21</bitOffset>
18497 <bitWidth>1</bitWidth>
18498 </field>
18499 <field>
18500 <name>FB22</name>
18501 <description>Filter bits</description>
18502 <bitOffset>22</bitOffset>
18503 <bitWidth>1</bitWidth>
18504 </field>
18505 <field>
18506 <name>FB23</name>
18507 <description>Filter bits</description>
18508 <bitOffset>23</bitOffset>
18509 <bitWidth>1</bitWidth>
18510 </field>
18511 <field>
18512 <name>FB24</name>
18513 <description>Filter bits</description>
18514 <bitOffset>24</bitOffset>
18515 <bitWidth>1</bitWidth>
18516 </field>
18517 <field>
18518 <name>FB25</name>
18519 <description>Filter bits</description>
18520 <bitOffset>25</bitOffset>
18521 <bitWidth>1</bitWidth>
18522 </field>
18523 <field>
18524 <name>FB26</name>
18525 <description>Filter bits</description>
18526 <bitOffset>26</bitOffset>
18527 <bitWidth>1</bitWidth>
18528 </field>
18529 <field>
18530 <name>FB27</name>
18531 <description>Filter bits</description>
18532 <bitOffset>27</bitOffset>
18533 <bitWidth>1</bitWidth>
18534 </field>
18535 <field>
18536 <name>FB28</name>
18537 <description>Filter bits</description>
18538 <bitOffset>28</bitOffset>
18539 <bitWidth>1</bitWidth>
18540 </field>
18541 <field>
18542 <name>FB29</name>
18543 <description>Filter bits</description>
18544 <bitOffset>29</bitOffset>
18545 <bitWidth>1</bitWidth>
18546 </field>
18547 <field>
18548 <name>FB30</name>
18549 <description>Filter bits</description>
18550 <bitOffset>30</bitOffset>
18551 <bitWidth>1</bitWidth>
18552 </field>
18553 <field>
18554 <name>FB31</name>
18555 <description>Filter bits</description>
18556 <bitOffset>31</bitOffset>
18557 <bitWidth>1</bitWidth>
18558 </field>
18559 </fields>
18560 </register>
18561 <register>
18562 <name>F8R2</name>
18563 <displayName>F8R2</displayName>
18564 <description>Filter bank 8 register 2</description>
18565 <addressOffset>0x284</addressOffset>
18566 <size>0x20</size>
18567 <access>read-write</access>
18568 <resetValue>0x00000000</resetValue>
18569 <fields>
18570 <field>
18571 <name>FB0</name>
18572 <description>Filter bits</description>
18573 <bitOffset>0</bitOffset>
18574 <bitWidth>1</bitWidth>
18575 </field>
18576 <field>
18577 <name>FB1</name>
18578 <description>Filter bits</description>
18579 <bitOffset>1</bitOffset>
18580 <bitWidth>1</bitWidth>
18581 </field>
18582 <field>
18583 <name>FB2</name>
18584 <description>Filter bits</description>
18585 <bitOffset>2</bitOffset>
18586 <bitWidth>1</bitWidth>
18587 </field>
18588 <field>
18589 <name>FB3</name>
18590 <description>Filter bits</description>
18591 <bitOffset>3</bitOffset>
18592 <bitWidth>1</bitWidth>
18593 </field>
18594 <field>
18595 <name>FB4</name>
18596 <description>Filter bits</description>
18597 <bitOffset>4</bitOffset>
18598 <bitWidth>1</bitWidth>
18599 </field>
18600 <field>
18601 <name>FB5</name>
18602 <description>Filter bits</description>
18603 <bitOffset>5</bitOffset>
18604 <bitWidth>1</bitWidth>
18605 </field>
18606 <field>
18607 <name>FB6</name>
18608 <description>Filter bits</description>
18609 <bitOffset>6</bitOffset>
18610 <bitWidth>1</bitWidth>
18611 </field>
18612 <field>
18613 <name>FB7</name>
18614 <description>Filter bits</description>
18615 <bitOffset>7</bitOffset>
18616 <bitWidth>1</bitWidth>
18617 </field>
18618 <field>
18619 <name>FB8</name>
18620 <description>Filter bits</description>
18621 <bitOffset>8</bitOffset>
18622 <bitWidth>1</bitWidth>
18623 </field>
18624 <field>
18625 <name>FB9</name>
18626 <description>Filter bits</description>
18627 <bitOffset>9</bitOffset>
18628 <bitWidth>1</bitWidth>
18629 </field>
18630 <field>
18631 <name>FB10</name>
18632 <description>Filter bits</description>
18633 <bitOffset>10</bitOffset>
18634 <bitWidth>1</bitWidth>
18635 </field>
18636 <field>
18637 <name>FB11</name>
18638 <description>Filter bits</description>
18639 <bitOffset>11</bitOffset>
18640 <bitWidth>1</bitWidth>
18641 </field>
18642 <field>
18643 <name>FB12</name>
18644 <description>Filter bits</description>
18645 <bitOffset>12</bitOffset>
18646 <bitWidth>1</bitWidth>
18647 </field>
18648 <field>
18649 <name>FB13</name>
18650 <description>Filter bits</description>
18651 <bitOffset>13</bitOffset>
18652 <bitWidth>1</bitWidth>
18653 </field>
18654 <field>
18655 <name>FB14</name>
18656 <description>Filter bits</description>
18657 <bitOffset>14</bitOffset>
18658 <bitWidth>1</bitWidth>
18659 </field>
18660 <field>
18661 <name>FB15</name>
18662 <description>Filter bits</description>
18663 <bitOffset>15</bitOffset>
18664 <bitWidth>1</bitWidth>
18665 </field>
18666 <field>
18667 <name>FB16</name>
18668 <description>Filter bits</description>
18669 <bitOffset>16</bitOffset>
18670 <bitWidth>1</bitWidth>
18671 </field>
18672 <field>
18673 <name>FB17</name>
18674 <description>Filter bits</description>
18675 <bitOffset>17</bitOffset>
18676 <bitWidth>1</bitWidth>
18677 </field>
18678 <field>
18679 <name>FB18</name>
18680 <description>Filter bits</description>
18681 <bitOffset>18</bitOffset>
18682 <bitWidth>1</bitWidth>
18683 </field>
18684 <field>
18685 <name>FB19</name>
18686 <description>Filter bits</description>
18687 <bitOffset>19</bitOffset>
18688 <bitWidth>1</bitWidth>
18689 </field>
18690 <field>
18691 <name>FB20</name>
18692 <description>Filter bits</description>
18693 <bitOffset>20</bitOffset>
18694 <bitWidth>1</bitWidth>
18695 </field>
18696 <field>
18697 <name>FB21</name>
18698 <description>Filter bits</description>
18699 <bitOffset>21</bitOffset>
18700 <bitWidth>1</bitWidth>
18701 </field>
18702 <field>
18703 <name>FB22</name>
18704 <description>Filter bits</description>
18705 <bitOffset>22</bitOffset>
18706 <bitWidth>1</bitWidth>
18707 </field>
18708 <field>
18709 <name>FB23</name>
18710 <description>Filter bits</description>
18711 <bitOffset>23</bitOffset>
18712 <bitWidth>1</bitWidth>
18713 </field>
18714 <field>
18715 <name>FB24</name>
18716 <description>Filter bits</description>
18717 <bitOffset>24</bitOffset>
18718 <bitWidth>1</bitWidth>
18719 </field>
18720 <field>
18721 <name>FB25</name>
18722 <description>Filter bits</description>
18723 <bitOffset>25</bitOffset>
18724 <bitWidth>1</bitWidth>
18725 </field>
18726 <field>
18727 <name>FB26</name>
18728 <description>Filter bits</description>
18729 <bitOffset>26</bitOffset>
18730 <bitWidth>1</bitWidth>
18731 </field>
18732 <field>
18733 <name>FB27</name>
18734 <description>Filter bits</description>
18735 <bitOffset>27</bitOffset>
18736 <bitWidth>1</bitWidth>
18737 </field>
18738 <field>
18739 <name>FB28</name>
18740 <description>Filter bits</description>
18741 <bitOffset>28</bitOffset>
18742 <bitWidth>1</bitWidth>
18743 </field>
18744 <field>
18745 <name>FB29</name>
18746 <description>Filter bits</description>
18747 <bitOffset>29</bitOffset>
18748 <bitWidth>1</bitWidth>
18749 </field>
18750 <field>
18751 <name>FB30</name>
18752 <description>Filter bits</description>
18753 <bitOffset>30</bitOffset>
18754 <bitWidth>1</bitWidth>
18755 </field>
18756 <field>
18757 <name>FB31</name>
18758 <description>Filter bits</description>
18759 <bitOffset>31</bitOffset>
18760 <bitWidth>1</bitWidth>
18761 </field>
18762 </fields>
18763 </register>
18764 <register>
18765 <name>F9R1</name>
18766 <displayName>F9R1</displayName>
18767 <description>Filter bank 9 register 1</description>
18768 <addressOffset>0x288</addressOffset>
18769 <size>0x20</size>
18770 <access>read-write</access>
18771 <resetValue>0x00000000</resetValue>
18772 <fields>
18773 <field>
18774 <name>FB0</name>
18775 <description>Filter bits</description>
18776 <bitOffset>0</bitOffset>
18777 <bitWidth>1</bitWidth>
18778 </field>
18779 <field>
18780 <name>FB1</name>
18781 <description>Filter bits</description>
18782 <bitOffset>1</bitOffset>
18783 <bitWidth>1</bitWidth>
18784 </field>
18785 <field>
18786 <name>FB2</name>
18787 <description>Filter bits</description>
18788 <bitOffset>2</bitOffset>
18789 <bitWidth>1</bitWidth>
18790 </field>
18791 <field>
18792 <name>FB3</name>
18793 <description>Filter bits</description>
18794 <bitOffset>3</bitOffset>
18795 <bitWidth>1</bitWidth>
18796 </field>
18797 <field>
18798 <name>FB4</name>
18799 <description>Filter bits</description>
18800 <bitOffset>4</bitOffset>
18801 <bitWidth>1</bitWidth>
18802 </field>
18803 <field>
18804 <name>FB5</name>
18805 <description>Filter bits</description>
18806 <bitOffset>5</bitOffset>
18807 <bitWidth>1</bitWidth>
18808 </field>
18809 <field>
18810 <name>FB6</name>
18811 <description>Filter bits</description>
18812 <bitOffset>6</bitOffset>
18813 <bitWidth>1</bitWidth>
18814 </field>
18815 <field>
18816 <name>FB7</name>
18817 <description>Filter bits</description>
18818 <bitOffset>7</bitOffset>
18819 <bitWidth>1</bitWidth>
18820 </field>
18821 <field>
18822 <name>FB8</name>
18823 <description>Filter bits</description>
18824 <bitOffset>8</bitOffset>
18825 <bitWidth>1</bitWidth>
18826 </field>
18827 <field>
18828 <name>FB9</name>
18829 <description>Filter bits</description>
18830 <bitOffset>9</bitOffset>
18831 <bitWidth>1</bitWidth>
18832 </field>
18833 <field>
18834 <name>FB10</name>
18835 <description>Filter bits</description>
18836 <bitOffset>10</bitOffset>
18837 <bitWidth>1</bitWidth>
18838 </field>
18839 <field>
18840 <name>FB11</name>
18841 <description>Filter bits</description>
18842 <bitOffset>11</bitOffset>
18843 <bitWidth>1</bitWidth>
18844 </field>
18845 <field>
18846 <name>FB12</name>
18847 <description>Filter bits</description>
18848 <bitOffset>12</bitOffset>
18849 <bitWidth>1</bitWidth>
18850 </field>
18851 <field>
18852 <name>FB13</name>
18853 <description>Filter bits</description>
18854 <bitOffset>13</bitOffset>
18855 <bitWidth>1</bitWidth>
18856 </field>
18857 <field>
18858 <name>FB14</name>
18859 <description>Filter bits</description>
18860 <bitOffset>14</bitOffset>
18861 <bitWidth>1</bitWidth>
18862 </field>
18863 <field>
18864 <name>FB15</name>
18865 <description>Filter bits</description>
18866 <bitOffset>15</bitOffset>
18867 <bitWidth>1</bitWidth>
18868 </field>
18869 <field>
18870 <name>FB16</name>
18871 <description>Filter bits</description>
18872 <bitOffset>16</bitOffset>
18873 <bitWidth>1</bitWidth>
18874 </field>
18875 <field>
18876 <name>FB17</name>
18877 <description>Filter bits</description>
18878 <bitOffset>17</bitOffset>
18879 <bitWidth>1</bitWidth>
18880 </field>
18881 <field>
18882 <name>FB18</name>
18883 <description>Filter bits</description>
18884 <bitOffset>18</bitOffset>
18885 <bitWidth>1</bitWidth>
18886 </field>
18887 <field>
18888 <name>FB19</name>
18889 <description>Filter bits</description>
18890 <bitOffset>19</bitOffset>
18891 <bitWidth>1</bitWidth>
18892 </field>
18893 <field>
18894 <name>FB20</name>
18895 <description>Filter bits</description>
18896 <bitOffset>20</bitOffset>
18897 <bitWidth>1</bitWidth>
18898 </field>
18899 <field>
18900 <name>FB21</name>
18901 <description>Filter bits</description>
18902 <bitOffset>21</bitOffset>
18903 <bitWidth>1</bitWidth>
18904 </field>
18905 <field>
18906 <name>FB22</name>
18907 <description>Filter bits</description>
18908 <bitOffset>22</bitOffset>
18909 <bitWidth>1</bitWidth>
18910 </field>
18911 <field>
18912 <name>FB23</name>
18913 <description>Filter bits</description>
18914 <bitOffset>23</bitOffset>
18915 <bitWidth>1</bitWidth>
18916 </field>
18917 <field>
18918 <name>FB24</name>
18919 <description>Filter bits</description>
18920 <bitOffset>24</bitOffset>
18921 <bitWidth>1</bitWidth>
18922 </field>
18923 <field>
18924 <name>FB25</name>
18925 <description>Filter bits</description>
18926 <bitOffset>25</bitOffset>
18927 <bitWidth>1</bitWidth>
18928 </field>
18929 <field>
18930 <name>FB26</name>
18931 <description>Filter bits</description>
18932 <bitOffset>26</bitOffset>
18933 <bitWidth>1</bitWidth>
18934 </field>
18935 <field>
18936 <name>FB27</name>
18937 <description>Filter bits</description>
18938 <bitOffset>27</bitOffset>
18939 <bitWidth>1</bitWidth>
18940 </field>
18941 <field>
18942 <name>FB28</name>
18943 <description>Filter bits</description>
18944 <bitOffset>28</bitOffset>
18945 <bitWidth>1</bitWidth>
18946 </field>
18947 <field>
18948 <name>FB29</name>
18949 <description>Filter bits</description>
18950 <bitOffset>29</bitOffset>
18951 <bitWidth>1</bitWidth>
18952 </field>
18953 <field>
18954 <name>FB30</name>
18955 <description>Filter bits</description>
18956 <bitOffset>30</bitOffset>
18957 <bitWidth>1</bitWidth>
18958 </field>
18959 <field>
18960 <name>FB31</name>
18961 <description>Filter bits</description>
18962 <bitOffset>31</bitOffset>
18963 <bitWidth>1</bitWidth>
18964 </field>
18965 </fields>
18966 </register>
18967 <register>
18968 <name>F9R2</name>
18969 <displayName>F9R2</displayName>
18970 <description>Filter bank 9 register 2</description>
18971 <addressOffset>0x28C</addressOffset>
18972 <size>0x20</size>
18973 <access>read-write</access>
18974 <resetValue>0x00000000</resetValue>
18975 <fields>
18976 <field>
18977 <name>FB0</name>
18978 <description>Filter bits</description>
18979 <bitOffset>0</bitOffset>
18980 <bitWidth>1</bitWidth>
18981 </field>
18982 <field>
18983 <name>FB1</name>
18984 <description>Filter bits</description>
18985 <bitOffset>1</bitOffset>
18986 <bitWidth>1</bitWidth>
18987 </field>
18988 <field>
18989 <name>FB2</name>
18990 <description>Filter bits</description>
18991 <bitOffset>2</bitOffset>
18992 <bitWidth>1</bitWidth>
18993 </field>
18994 <field>
18995 <name>FB3</name>
18996 <description>Filter bits</description>
18997 <bitOffset>3</bitOffset>
18998 <bitWidth>1</bitWidth>
18999 </field>
19000 <field>
19001 <name>FB4</name>
19002 <description>Filter bits</description>
19003 <bitOffset>4</bitOffset>
19004 <bitWidth>1</bitWidth>
19005 </field>
19006 <field>
19007 <name>FB5</name>
19008 <description>Filter bits</description>
19009 <bitOffset>5</bitOffset>
19010 <bitWidth>1</bitWidth>
19011 </field>
19012 <field>
19013 <name>FB6</name>
19014 <description>Filter bits</description>
19015 <bitOffset>6</bitOffset>
19016 <bitWidth>1</bitWidth>
19017 </field>
19018 <field>
19019 <name>FB7</name>
19020 <description>Filter bits</description>
19021 <bitOffset>7</bitOffset>
19022 <bitWidth>1</bitWidth>
19023 </field>
19024 <field>
19025 <name>FB8</name>
19026 <description>Filter bits</description>
19027 <bitOffset>8</bitOffset>
19028 <bitWidth>1</bitWidth>
19029 </field>
19030 <field>
19031 <name>FB9</name>
19032 <description>Filter bits</description>
19033 <bitOffset>9</bitOffset>
19034 <bitWidth>1</bitWidth>
19035 </field>
19036 <field>
19037 <name>FB10</name>
19038 <description>Filter bits</description>
19039 <bitOffset>10</bitOffset>
19040 <bitWidth>1</bitWidth>
19041 </field>
19042 <field>
19043 <name>FB11</name>
19044 <description>Filter bits</description>
19045 <bitOffset>11</bitOffset>
19046 <bitWidth>1</bitWidth>
19047 </field>
19048 <field>
19049 <name>FB12</name>
19050 <description>Filter bits</description>
19051 <bitOffset>12</bitOffset>
19052 <bitWidth>1</bitWidth>
19053 </field>
19054 <field>
19055 <name>FB13</name>
19056 <description>Filter bits</description>
19057 <bitOffset>13</bitOffset>
19058 <bitWidth>1</bitWidth>
19059 </field>
19060 <field>
19061 <name>FB14</name>
19062 <description>Filter bits</description>
19063 <bitOffset>14</bitOffset>
19064 <bitWidth>1</bitWidth>
19065 </field>
19066 <field>
19067 <name>FB15</name>
19068 <description>Filter bits</description>
19069 <bitOffset>15</bitOffset>
19070 <bitWidth>1</bitWidth>
19071 </field>
19072 <field>
19073 <name>FB16</name>
19074 <description>Filter bits</description>
19075 <bitOffset>16</bitOffset>
19076 <bitWidth>1</bitWidth>
19077 </field>
19078 <field>
19079 <name>FB17</name>
19080 <description>Filter bits</description>
19081 <bitOffset>17</bitOffset>
19082 <bitWidth>1</bitWidth>
19083 </field>
19084 <field>
19085 <name>FB18</name>
19086 <description>Filter bits</description>
19087 <bitOffset>18</bitOffset>
19088 <bitWidth>1</bitWidth>
19089 </field>
19090 <field>
19091 <name>FB19</name>
19092 <description>Filter bits</description>
19093 <bitOffset>19</bitOffset>
19094 <bitWidth>1</bitWidth>
19095 </field>
19096 <field>
19097 <name>FB20</name>
19098 <description>Filter bits</description>
19099 <bitOffset>20</bitOffset>
19100 <bitWidth>1</bitWidth>
19101 </field>
19102 <field>
19103 <name>FB21</name>
19104 <description>Filter bits</description>
19105 <bitOffset>21</bitOffset>
19106 <bitWidth>1</bitWidth>
19107 </field>
19108 <field>
19109 <name>FB22</name>
19110 <description>Filter bits</description>
19111 <bitOffset>22</bitOffset>
19112 <bitWidth>1</bitWidth>
19113 </field>
19114 <field>
19115 <name>FB23</name>
19116 <description>Filter bits</description>
19117 <bitOffset>23</bitOffset>
19118 <bitWidth>1</bitWidth>
19119 </field>
19120 <field>
19121 <name>FB24</name>
19122 <description>Filter bits</description>
19123 <bitOffset>24</bitOffset>
19124 <bitWidth>1</bitWidth>
19125 </field>
19126 <field>
19127 <name>FB25</name>
19128 <description>Filter bits</description>
19129 <bitOffset>25</bitOffset>
19130 <bitWidth>1</bitWidth>
19131 </field>
19132 <field>
19133 <name>FB26</name>
19134 <description>Filter bits</description>
19135 <bitOffset>26</bitOffset>
19136 <bitWidth>1</bitWidth>
19137 </field>
19138 <field>
19139 <name>FB27</name>
19140 <description>Filter bits</description>
19141 <bitOffset>27</bitOffset>
19142 <bitWidth>1</bitWidth>
19143 </field>
19144 <field>
19145 <name>FB28</name>
19146 <description>Filter bits</description>
19147 <bitOffset>28</bitOffset>
19148 <bitWidth>1</bitWidth>
19149 </field>
19150 <field>
19151 <name>FB29</name>
19152 <description>Filter bits</description>
19153 <bitOffset>29</bitOffset>
19154 <bitWidth>1</bitWidth>
19155 </field>
19156 <field>
19157 <name>FB30</name>
19158 <description>Filter bits</description>
19159 <bitOffset>30</bitOffset>
19160 <bitWidth>1</bitWidth>
19161 </field>
19162 <field>
19163 <name>FB31</name>
19164 <description>Filter bits</description>
19165 <bitOffset>31</bitOffset>
19166 <bitWidth>1</bitWidth>
19167 </field>
19168 </fields>
19169 </register>
19170 <register>
19171 <name>F10R1</name>
19172 <displayName>F10R1</displayName>
19173 <description>Filter bank 10 register 1</description>
19174 <addressOffset>0x290</addressOffset>
19175 <size>0x20</size>
19176 <access>read-write</access>
19177 <resetValue>0x00000000</resetValue>
19178 <fields>
19179 <field>
19180 <name>FB0</name>
19181 <description>Filter bits</description>
19182 <bitOffset>0</bitOffset>
19183 <bitWidth>1</bitWidth>
19184 </field>
19185 <field>
19186 <name>FB1</name>
19187 <description>Filter bits</description>
19188 <bitOffset>1</bitOffset>
19189 <bitWidth>1</bitWidth>
19190 </field>
19191 <field>
19192 <name>FB2</name>
19193 <description>Filter bits</description>
19194 <bitOffset>2</bitOffset>
19195 <bitWidth>1</bitWidth>
19196 </field>
19197 <field>
19198 <name>FB3</name>
19199 <description>Filter bits</description>
19200 <bitOffset>3</bitOffset>
19201 <bitWidth>1</bitWidth>
19202 </field>
19203 <field>
19204 <name>FB4</name>
19205 <description>Filter bits</description>
19206 <bitOffset>4</bitOffset>
19207 <bitWidth>1</bitWidth>
19208 </field>
19209 <field>
19210 <name>FB5</name>
19211 <description>Filter bits</description>
19212 <bitOffset>5</bitOffset>
19213 <bitWidth>1</bitWidth>
19214 </field>
19215 <field>
19216 <name>FB6</name>
19217 <description>Filter bits</description>
19218 <bitOffset>6</bitOffset>
19219 <bitWidth>1</bitWidth>
19220 </field>
19221 <field>
19222 <name>FB7</name>
19223 <description>Filter bits</description>
19224 <bitOffset>7</bitOffset>
19225 <bitWidth>1</bitWidth>
19226 </field>
19227 <field>
19228 <name>FB8</name>
19229 <description>Filter bits</description>
19230 <bitOffset>8</bitOffset>
19231 <bitWidth>1</bitWidth>
19232 </field>
19233 <field>
19234 <name>FB9</name>
19235 <description>Filter bits</description>
19236 <bitOffset>9</bitOffset>
19237 <bitWidth>1</bitWidth>
19238 </field>
19239 <field>
19240 <name>FB10</name>
19241 <description>Filter bits</description>
19242 <bitOffset>10</bitOffset>
19243 <bitWidth>1</bitWidth>
19244 </field>
19245 <field>
19246 <name>FB11</name>
19247 <description>Filter bits</description>
19248 <bitOffset>11</bitOffset>
19249 <bitWidth>1</bitWidth>
19250 </field>
19251 <field>
19252 <name>FB12</name>
19253 <description>Filter bits</description>
19254 <bitOffset>12</bitOffset>
19255 <bitWidth>1</bitWidth>
19256 </field>
19257 <field>
19258 <name>FB13</name>
19259 <description>Filter bits</description>
19260 <bitOffset>13</bitOffset>
19261 <bitWidth>1</bitWidth>
19262 </field>
19263 <field>
19264 <name>FB14</name>
19265 <description>Filter bits</description>
19266 <bitOffset>14</bitOffset>
19267 <bitWidth>1</bitWidth>
19268 </field>
19269 <field>
19270 <name>FB15</name>
19271 <description>Filter bits</description>
19272 <bitOffset>15</bitOffset>
19273 <bitWidth>1</bitWidth>
19274 </field>
19275 <field>
19276 <name>FB16</name>
19277 <description>Filter bits</description>
19278 <bitOffset>16</bitOffset>
19279 <bitWidth>1</bitWidth>
19280 </field>
19281 <field>
19282 <name>FB17</name>
19283 <description>Filter bits</description>
19284 <bitOffset>17</bitOffset>
19285 <bitWidth>1</bitWidth>
19286 </field>
19287 <field>
19288 <name>FB18</name>
19289 <description>Filter bits</description>
19290 <bitOffset>18</bitOffset>
19291 <bitWidth>1</bitWidth>
19292 </field>
19293 <field>
19294 <name>FB19</name>
19295 <description>Filter bits</description>
19296 <bitOffset>19</bitOffset>
19297 <bitWidth>1</bitWidth>
19298 </field>
19299 <field>
19300 <name>FB20</name>
19301 <description>Filter bits</description>
19302 <bitOffset>20</bitOffset>
19303 <bitWidth>1</bitWidth>
19304 </field>
19305 <field>
19306 <name>FB21</name>
19307 <description>Filter bits</description>
19308 <bitOffset>21</bitOffset>
19309 <bitWidth>1</bitWidth>
19310 </field>
19311 <field>
19312 <name>FB22</name>
19313 <description>Filter bits</description>
19314 <bitOffset>22</bitOffset>
19315 <bitWidth>1</bitWidth>
19316 </field>
19317 <field>
19318 <name>FB23</name>
19319 <description>Filter bits</description>
19320 <bitOffset>23</bitOffset>
19321 <bitWidth>1</bitWidth>
19322 </field>
19323 <field>
19324 <name>FB24</name>
19325 <description>Filter bits</description>
19326 <bitOffset>24</bitOffset>
19327 <bitWidth>1</bitWidth>
19328 </field>
19329 <field>
19330 <name>FB25</name>
19331 <description>Filter bits</description>
19332 <bitOffset>25</bitOffset>
19333 <bitWidth>1</bitWidth>
19334 </field>
19335 <field>
19336 <name>FB26</name>
19337 <description>Filter bits</description>
19338 <bitOffset>26</bitOffset>
19339 <bitWidth>1</bitWidth>
19340 </field>
19341 <field>
19342 <name>FB27</name>
19343 <description>Filter bits</description>
19344 <bitOffset>27</bitOffset>
19345 <bitWidth>1</bitWidth>
19346 </field>
19347 <field>
19348 <name>FB28</name>
19349 <description>Filter bits</description>
19350 <bitOffset>28</bitOffset>
19351 <bitWidth>1</bitWidth>
19352 </field>
19353 <field>
19354 <name>FB29</name>
19355 <description>Filter bits</description>
19356 <bitOffset>29</bitOffset>
19357 <bitWidth>1</bitWidth>
19358 </field>
19359 <field>
19360 <name>FB30</name>
19361 <description>Filter bits</description>
19362 <bitOffset>30</bitOffset>
19363 <bitWidth>1</bitWidth>
19364 </field>
19365 <field>
19366 <name>FB31</name>
19367 <description>Filter bits</description>
19368 <bitOffset>31</bitOffset>
19369 <bitWidth>1</bitWidth>
19370 </field>
19371 </fields>
19372 </register>
19373 <register>
19374 <name>F10R2</name>
19375 <displayName>F10R2</displayName>
19376 <description>Filter bank 10 register 2</description>
19377 <addressOffset>0x294</addressOffset>
19378 <size>0x20</size>
19379 <access>read-write</access>
19380 <resetValue>0x00000000</resetValue>
19381 <fields>
19382 <field>
19383 <name>FB0</name>
19384 <description>Filter bits</description>
19385 <bitOffset>0</bitOffset>
19386 <bitWidth>1</bitWidth>
19387 </field>
19388 <field>
19389 <name>FB1</name>
19390 <description>Filter bits</description>
19391 <bitOffset>1</bitOffset>
19392 <bitWidth>1</bitWidth>
19393 </field>
19394 <field>
19395 <name>FB2</name>
19396 <description>Filter bits</description>
19397 <bitOffset>2</bitOffset>
19398 <bitWidth>1</bitWidth>
19399 </field>
19400 <field>
19401 <name>FB3</name>
19402 <description>Filter bits</description>
19403 <bitOffset>3</bitOffset>
19404 <bitWidth>1</bitWidth>
19405 </field>
19406 <field>
19407 <name>FB4</name>
19408 <description>Filter bits</description>
19409 <bitOffset>4</bitOffset>
19410 <bitWidth>1</bitWidth>
19411 </field>
19412 <field>
19413 <name>FB5</name>
19414 <description>Filter bits</description>
19415 <bitOffset>5</bitOffset>
19416 <bitWidth>1</bitWidth>
19417 </field>
19418 <field>
19419 <name>FB6</name>
19420 <description>Filter bits</description>
19421 <bitOffset>6</bitOffset>
19422 <bitWidth>1</bitWidth>
19423 </field>
19424 <field>
19425 <name>FB7</name>
19426 <description>Filter bits</description>
19427 <bitOffset>7</bitOffset>
19428 <bitWidth>1</bitWidth>
19429 </field>
19430 <field>
19431 <name>FB8</name>
19432 <description>Filter bits</description>
19433 <bitOffset>8</bitOffset>
19434 <bitWidth>1</bitWidth>
19435 </field>
19436 <field>
19437 <name>FB9</name>
19438 <description>Filter bits</description>
19439 <bitOffset>9</bitOffset>
19440 <bitWidth>1</bitWidth>
19441 </field>
19442 <field>
19443 <name>FB10</name>
19444 <description>Filter bits</description>
19445 <bitOffset>10</bitOffset>
19446 <bitWidth>1</bitWidth>
19447 </field>
19448 <field>
19449 <name>FB11</name>
19450 <description>Filter bits</description>
19451 <bitOffset>11</bitOffset>
19452 <bitWidth>1</bitWidth>
19453 </field>
19454 <field>
19455 <name>FB12</name>
19456 <description>Filter bits</description>
19457 <bitOffset>12</bitOffset>
19458 <bitWidth>1</bitWidth>
19459 </field>
19460 <field>
19461 <name>FB13</name>
19462 <description>Filter bits</description>
19463 <bitOffset>13</bitOffset>
19464 <bitWidth>1</bitWidth>
19465 </field>
19466 <field>
19467 <name>FB14</name>
19468 <description>Filter bits</description>
19469 <bitOffset>14</bitOffset>
19470 <bitWidth>1</bitWidth>
19471 </field>
19472 <field>
19473 <name>FB15</name>
19474 <description>Filter bits</description>
19475 <bitOffset>15</bitOffset>
19476 <bitWidth>1</bitWidth>
19477 </field>
19478 <field>
19479 <name>FB16</name>
19480 <description>Filter bits</description>
19481 <bitOffset>16</bitOffset>
19482 <bitWidth>1</bitWidth>
19483 </field>
19484 <field>
19485 <name>FB17</name>
19486 <description>Filter bits</description>
19487 <bitOffset>17</bitOffset>
19488 <bitWidth>1</bitWidth>
19489 </field>
19490 <field>
19491 <name>FB18</name>
19492 <description>Filter bits</description>
19493 <bitOffset>18</bitOffset>
19494 <bitWidth>1</bitWidth>
19495 </field>
19496 <field>
19497 <name>FB19</name>
19498 <description>Filter bits</description>
19499 <bitOffset>19</bitOffset>
19500 <bitWidth>1</bitWidth>
19501 </field>
19502 <field>
19503 <name>FB20</name>
19504 <description>Filter bits</description>
19505 <bitOffset>20</bitOffset>
19506 <bitWidth>1</bitWidth>
19507 </field>
19508 <field>
19509 <name>FB21</name>
19510 <description>Filter bits</description>
19511 <bitOffset>21</bitOffset>
19512 <bitWidth>1</bitWidth>
19513 </field>
19514 <field>
19515 <name>FB22</name>
19516 <description>Filter bits</description>
19517 <bitOffset>22</bitOffset>
19518 <bitWidth>1</bitWidth>
19519 </field>
19520 <field>
19521 <name>FB23</name>
19522 <description>Filter bits</description>
19523 <bitOffset>23</bitOffset>
19524 <bitWidth>1</bitWidth>
19525 </field>
19526 <field>
19527 <name>FB24</name>
19528 <description>Filter bits</description>
19529 <bitOffset>24</bitOffset>
19530 <bitWidth>1</bitWidth>
19531 </field>
19532 <field>
19533 <name>FB25</name>
19534 <description>Filter bits</description>
19535 <bitOffset>25</bitOffset>
19536 <bitWidth>1</bitWidth>
19537 </field>
19538 <field>
19539 <name>FB26</name>
19540 <description>Filter bits</description>
19541 <bitOffset>26</bitOffset>
19542 <bitWidth>1</bitWidth>
19543 </field>
19544 <field>
19545 <name>FB27</name>
19546 <description>Filter bits</description>
19547 <bitOffset>27</bitOffset>
19548 <bitWidth>1</bitWidth>
19549 </field>
19550 <field>
19551 <name>FB28</name>
19552 <description>Filter bits</description>
19553 <bitOffset>28</bitOffset>
19554 <bitWidth>1</bitWidth>
19555 </field>
19556 <field>
19557 <name>FB29</name>
19558 <description>Filter bits</description>
19559 <bitOffset>29</bitOffset>
19560 <bitWidth>1</bitWidth>
19561 </field>
19562 <field>
19563 <name>FB30</name>
19564 <description>Filter bits</description>
19565 <bitOffset>30</bitOffset>
19566 <bitWidth>1</bitWidth>
19567 </field>
19568 <field>
19569 <name>FB31</name>
19570 <description>Filter bits</description>
19571 <bitOffset>31</bitOffset>
19572 <bitWidth>1</bitWidth>
19573 </field>
19574 </fields>
19575 </register>
19576 <register>
19577 <name>F11R1</name>
19578 <displayName>F11R1</displayName>
19579 <description>Filter bank 11 register 1</description>
19580 <addressOffset>0x298</addressOffset>
19581 <size>0x20</size>
19582 <access>read-write</access>
19583 <resetValue>0x00000000</resetValue>
19584 <fields>
19585 <field>
19586 <name>FB0</name>
19587 <description>Filter bits</description>
19588 <bitOffset>0</bitOffset>
19589 <bitWidth>1</bitWidth>
19590 </field>
19591 <field>
19592 <name>FB1</name>
19593 <description>Filter bits</description>
19594 <bitOffset>1</bitOffset>
19595 <bitWidth>1</bitWidth>
19596 </field>
19597 <field>
19598 <name>FB2</name>
19599 <description>Filter bits</description>
19600 <bitOffset>2</bitOffset>
19601 <bitWidth>1</bitWidth>
19602 </field>
19603 <field>
19604 <name>FB3</name>
19605 <description>Filter bits</description>
19606 <bitOffset>3</bitOffset>
19607 <bitWidth>1</bitWidth>
19608 </field>
19609 <field>
19610 <name>FB4</name>
19611 <description>Filter bits</description>
19612 <bitOffset>4</bitOffset>
19613 <bitWidth>1</bitWidth>
19614 </field>
19615 <field>
19616 <name>FB5</name>
19617 <description>Filter bits</description>
19618 <bitOffset>5</bitOffset>
19619 <bitWidth>1</bitWidth>
19620 </field>
19621 <field>
19622 <name>FB6</name>
19623 <description>Filter bits</description>
19624 <bitOffset>6</bitOffset>
19625 <bitWidth>1</bitWidth>
19626 </field>
19627 <field>
19628 <name>FB7</name>
19629 <description>Filter bits</description>
19630 <bitOffset>7</bitOffset>
19631 <bitWidth>1</bitWidth>
19632 </field>
19633 <field>
19634 <name>FB8</name>
19635 <description>Filter bits</description>
19636 <bitOffset>8</bitOffset>
19637 <bitWidth>1</bitWidth>
19638 </field>
19639 <field>
19640 <name>FB9</name>
19641 <description>Filter bits</description>
19642 <bitOffset>9</bitOffset>
19643 <bitWidth>1</bitWidth>
19644 </field>
19645 <field>
19646 <name>FB10</name>
19647 <description>Filter bits</description>
19648 <bitOffset>10</bitOffset>
19649 <bitWidth>1</bitWidth>
19650 </field>
19651 <field>
19652 <name>FB11</name>
19653 <description>Filter bits</description>
19654 <bitOffset>11</bitOffset>
19655 <bitWidth>1</bitWidth>
19656 </field>
19657 <field>
19658 <name>FB12</name>
19659 <description>Filter bits</description>
19660 <bitOffset>12</bitOffset>
19661 <bitWidth>1</bitWidth>
19662 </field>
19663 <field>
19664 <name>FB13</name>
19665 <description>Filter bits</description>
19666 <bitOffset>13</bitOffset>
19667 <bitWidth>1</bitWidth>
19668 </field>
19669 <field>
19670 <name>FB14</name>
19671 <description>Filter bits</description>
19672 <bitOffset>14</bitOffset>
19673 <bitWidth>1</bitWidth>
19674 </field>
19675 <field>
19676 <name>FB15</name>
19677 <description>Filter bits</description>
19678 <bitOffset>15</bitOffset>
19679 <bitWidth>1</bitWidth>
19680 </field>
19681 <field>
19682 <name>FB16</name>
19683 <description>Filter bits</description>
19684 <bitOffset>16</bitOffset>
19685 <bitWidth>1</bitWidth>
19686 </field>
19687 <field>
19688 <name>FB17</name>
19689 <description>Filter bits</description>
19690 <bitOffset>17</bitOffset>
19691 <bitWidth>1</bitWidth>
19692 </field>
19693 <field>
19694 <name>FB18</name>
19695 <description>Filter bits</description>
19696 <bitOffset>18</bitOffset>
19697 <bitWidth>1</bitWidth>
19698 </field>
19699 <field>
19700 <name>FB19</name>
19701 <description>Filter bits</description>
19702 <bitOffset>19</bitOffset>
19703 <bitWidth>1</bitWidth>
19704 </field>
19705 <field>
19706 <name>FB20</name>
19707 <description>Filter bits</description>
19708 <bitOffset>20</bitOffset>
19709 <bitWidth>1</bitWidth>
19710 </field>
19711 <field>
19712 <name>FB21</name>
19713 <description>Filter bits</description>
19714 <bitOffset>21</bitOffset>
19715 <bitWidth>1</bitWidth>
19716 </field>
19717 <field>
19718 <name>FB22</name>
19719 <description>Filter bits</description>
19720 <bitOffset>22</bitOffset>
19721 <bitWidth>1</bitWidth>
19722 </field>
19723 <field>
19724 <name>FB23</name>
19725 <description>Filter bits</description>
19726 <bitOffset>23</bitOffset>
19727 <bitWidth>1</bitWidth>
19728 </field>
19729 <field>
19730 <name>FB24</name>
19731 <description>Filter bits</description>
19732 <bitOffset>24</bitOffset>
19733 <bitWidth>1</bitWidth>
19734 </field>
19735 <field>
19736 <name>FB25</name>
19737 <description>Filter bits</description>
19738 <bitOffset>25</bitOffset>
19739 <bitWidth>1</bitWidth>
19740 </field>
19741 <field>
19742 <name>FB26</name>
19743 <description>Filter bits</description>
19744 <bitOffset>26</bitOffset>
19745 <bitWidth>1</bitWidth>
19746 </field>
19747 <field>
19748 <name>FB27</name>
19749 <description>Filter bits</description>
19750 <bitOffset>27</bitOffset>
19751 <bitWidth>1</bitWidth>
19752 </field>
19753 <field>
19754 <name>FB28</name>
19755 <description>Filter bits</description>
19756 <bitOffset>28</bitOffset>
19757 <bitWidth>1</bitWidth>
19758 </field>
19759 <field>
19760 <name>FB29</name>
19761 <description>Filter bits</description>
19762 <bitOffset>29</bitOffset>
19763 <bitWidth>1</bitWidth>
19764 </field>
19765 <field>
19766 <name>FB30</name>
19767 <description>Filter bits</description>
19768 <bitOffset>30</bitOffset>
19769 <bitWidth>1</bitWidth>
19770 </field>
19771 <field>
19772 <name>FB31</name>
19773 <description>Filter bits</description>
19774 <bitOffset>31</bitOffset>
19775 <bitWidth>1</bitWidth>
19776 </field>
19777 </fields>
19778 </register>
19779 <register>
19780 <name>F11R2</name>
19781 <displayName>F11R2</displayName>
19782 <description>Filter bank 11 register 2</description>
19783 <addressOffset>0x29C</addressOffset>
19784 <size>0x20</size>
19785 <access>read-write</access>
19786 <resetValue>0x00000000</resetValue>
19787 <fields>
19788 <field>
19789 <name>FB0</name>
19790 <description>Filter bits</description>
19791 <bitOffset>0</bitOffset>
19792 <bitWidth>1</bitWidth>
19793 </field>
19794 <field>
19795 <name>FB1</name>
19796 <description>Filter bits</description>
19797 <bitOffset>1</bitOffset>
19798 <bitWidth>1</bitWidth>
19799 </field>
19800 <field>
19801 <name>FB2</name>
19802 <description>Filter bits</description>
19803 <bitOffset>2</bitOffset>
19804 <bitWidth>1</bitWidth>
19805 </field>
19806 <field>
19807 <name>FB3</name>
19808 <description>Filter bits</description>
19809 <bitOffset>3</bitOffset>
19810 <bitWidth>1</bitWidth>
19811 </field>
19812 <field>
19813 <name>FB4</name>
19814 <description>Filter bits</description>
19815 <bitOffset>4</bitOffset>
19816 <bitWidth>1</bitWidth>
19817 </field>
19818 <field>
19819 <name>FB5</name>
19820 <description>Filter bits</description>
19821 <bitOffset>5</bitOffset>
19822 <bitWidth>1</bitWidth>
19823 </field>
19824 <field>
19825 <name>FB6</name>
19826 <description>Filter bits</description>
19827 <bitOffset>6</bitOffset>
19828 <bitWidth>1</bitWidth>
19829 </field>
19830 <field>
19831 <name>FB7</name>
19832 <description>Filter bits</description>
19833 <bitOffset>7</bitOffset>
19834 <bitWidth>1</bitWidth>
19835 </field>
19836 <field>
19837 <name>FB8</name>
19838 <description>Filter bits</description>
19839 <bitOffset>8</bitOffset>
19840 <bitWidth>1</bitWidth>
19841 </field>
19842 <field>
19843 <name>FB9</name>
19844 <description>Filter bits</description>
19845 <bitOffset>9</bitOffset>
19846 <bitWidth>1</bitWidth>
19847 </field>
19848 <field>
19849 <name>FB10</name>
19850 <description>Filter bits</description>
19851 <bitOffset>10</bitOffset>
19852 <bitWidth>1</bitWidth>
19853 </field>
19854 <field>
19855 <name>FB11</name>
19856 <description>Filter bits</description>
19857 <bitOffset>11</bitOffset>
19858 <bitWidth>1</bitWidth>
19859 </field>
19860 <field>
19861 <name>FB12</name>
19862 <description>Filter bits</description>
19863 <bitOffset>12</bitOffset>
19864 <bitWidth>1</bitWidth>
19865 </field>
19866 <field>
19867 <name>FB13</name>
19868 <description>Filter bits</description>
19869 <bitOffset>13</bitOffset>
19870 <bitWidth>1</bitWidth>
19871 </field>
19872 <field>
19873 <name>FB14</name>
19874 <description>Filter bits</description>
19875 <bitOffset>14</bitOffset>
19876 <bitWidth>1</bitWidth>
19877 </field>
19878 <field>
19879 <name>FB15</name>
19880 <description>Filter bits</description>
19881 <bitOffset>15</bitOffset>
19882 <bitWidth>1</bitWidth>
19883 </field>
19884 <field>
19885 <name>FB16</name>
19886 <description>Filter bits</description>
19887 <bitOffset>16</bitOffset>
19888 <bitWidth>1</bitWidth>
19889 </field>
19890 <field>
19891 <name>FB17</name>
19892 <description>Filter bits</description>
19893 <bitOffset>17</bitOffset>
19894 <bitWidth>1</bitWidth>
19895 </field>
19896 <field>
19897 <name>FB18</name>
19898 <description>Filter bits</description>
19899 <bitOffset>18</bitOffset>
19900 <bitWidth>1</bitWidth>
19901 </field>
19902 <field>
19903 <name>FB19</name>
19904 <description>Filter bits</description>
19905 <bitOffset>19</bitOffset>
19906 <bitWidth>1</bitWidth>
19907 </field>
19908 <field>
19909 <name>FB20</name>
19910 <description>Filter bits</description>
19911 <bitOffset>20</bitOffset>
19912 <bitWidth>1</bitWidth>
19913 </field>
19914 <field>
19915 <name>FB21</name>
19916 <description>Filter bits</description>
19917 <bitOffset>21</bitOffset>
19918 <bitWidth>1</bitWidth>
19919 </field>
19920 <field>
19921 <name>FB22</name>
19922 <description>Filter bits</description>
19923 <bitOffset>22</bitOffset>
19924 <bitWidth>1</bitWidth>
19925 </field>
19926 <field>
19927 <name>FB23</name>
19928 <description>Filter bits</description>
19929 <bitOffset>23</bitOffset>
19930 <bitWidth>1</bitWidth>
19931 </field>
19932 <field>
19933 <name>FB24</name>
19934 <description>Filter bits</description>
19935 <bitOffset>24</bitOffset>
19936 <bitWidth>1</bitWidth>
19937 </field>
19938 <field>
19939 <name>FB25</name>
19940 <description>Filter bits</description>
19941 <bitOffset>25</bitOffset>
19942 <bitWidth>1</bitWidth>
19943 </field>
19944 <field>
19945 <name>FB26</name>
19946 <description>Filter bits</description>
19947 <bitOffset>26</bitOffset>
19948 <bitWidth>1</bitWidth>
19949 </field>
19950 <field>
19951 <name>FB27</name>
19952 <description>Filter bits</description>
19953 <bitOffset>27</bitOffset>
19954 <bitWidth>1</bitWidth>
19955 </field>
19956 <field>
19957 <name>FB28</name>
19958 <description>Filter bits</description>
19959 <bitOffset>28</bitOffset>
19960 <bitWidth>1</bitWidth>
19961 </field>
19962 <field>
19963 <name>FB29</name>
19964 <description>Filter bits</description>
19965 <bitOffset>29</bitOffset>
19966 <bitWidth>1</bitWidth>
19967 </field>
19968 <field>
19969 <name>FB30</name>
19970 <description>Filter bits</description>
19971 <bitOffset>30</bitOffset>
19972 <bitWidth>1</bitWidth>
19973 </field>
19974 <field>
19975 <name>FB31</name>
19976 <description>Filter bits</description>
19977 <bitOffset>31</bitOffset>
19978 <bitWidth>1</bitWidth>
19979 </field>
19980 </fields>
19981 </register>
19982 <register>
19983 <name>F12R1</name>
19984 <displayName>F12R1</displayName>
19985 <description>Filter bank 4 register 1</description>
19986 <addressOffset>0x2A0</addressOffset>
19987 <size>0x20</size>
19988 <access>read-write</access>
19989 <resetValue>0x00000000</resetValue>
19990 <fields>
19991 <field>
19992 <name>FB0</name>
19993 <description>Filter bits</description>
19994 <bitOffset>0</bitOffset>
19995 <bitWidth>1</bitWidth>
19996 </field>
19997 <field>
19998 <name>FB1</name>
19999 <description>Filter bits</description>
20000 <bitOffset>1</bitOffset>
20001 <bitWidth>1</bitWidth>
20002 </field>
20003 <field>
20004 <name>FB2</name>
20005 <description>Filter bits</description>
20006 <bitOffset>2</bitOffset>
20007 <bitWidth>1</bitWidth>
20008 </field>
20009 <field>
20010 <name>FB3</name>
20011 <description>Filter bits</description>
20012 <bitOffset>3</bitOffset>
20013 <bitWidth>1</bitWidth>
20014 </field>
20015 <field>
20016 <name>FB4</name>
20017 <description>Filter bits</description>
20018 <bitOffset>4</bitOffset>
20019 <bitWidth>1</bitWidth>
20020 </field>
20021 <field>
20022 <name>FB5</name>
20023 <description>Filter bits</description>
20024 <bitOffset>5</bitOffset>
20025 <bitWidth>1</bitWidth>
20026 </field>
20027 <field>
20028 <name>FB6</name>
20029 <description>Filter bits</description>
20030 <bitOffset>6</bitOffset>
20031 <bitWidth>1</bitWidth>
20032 </field>
20033 <field>
20034 <name>FB7</name>
20035 <description>Filter bits</description>
20036 <bitOffset>7</bitOffset>
20037 <bitWidth>1</bitWidth>
20038 </field>
20039 <field>
20040 <name>FB8</name>
20041 <description>Filter bits</description>
20042 <bitOffset>8</bitOffset>
20043 <bitWidth>1</bitWidth>
20044 </field>
20045 <field>
20046 <name>FB9</name>
20047 <description>Filter bits</description>
20048 <bitOffset>9</bitOffset>
20049 <bitWidth>1</bitWidth>
20050 </field>
20051 <field>
20052 <name>FB10</name>
20053 <description>Filter bits</description>
20054 <bitOffset>10</bitOffset>
20055 <bitWidth>1</bitWidth>
20056 </field>
20057 <field>
20058 <name>FB11</name>
20059 <description>Filter bits</description>
20060 <bitOffset>11</bitOffset>
20061 <bitWidth>1</bitWidth>
20062 </field>
20063 <field>
20064 <name>FB12</name>
20065 <description>Filter bits</description>
20066 <bitOffset>12</bitOffset>
20067 <bitWidth>1</bitWidth>
20068 </field>
20069 <field>
20070 <name>FB13</name>
20071 <description>Filter bits</description>
20072 <bitOffset>13</bitOffset>
20073 <bitWidth>1</bitWidth>
20074 </field>
20075 <field>
20076 <name>FB14</name>
20077 <description>Filter bits</description>
20078 <bitOffset>14</bitOffset>
20079 <bitWidth>1</bitWidth>
20080 </field>
20081 <field>
20082 <name>FB15</name>
20083 <description>Filter bits</description>
20084 <bitOffset>15</bitOffset>
20085 <bitWidth>1</bitWidth>
20086 </field>
20087 <field>
20088 <name>FB16</name>
20089 <description>Filter bits</description>
20090 <bitOffset>16</bitOffset>
20091 <bitWidth>1</bitWidth>
20092 </field>
20093 <field>
20094 <name>FB17</name>
20095 <description>Filter bits</description>
20096 <bitOffset>17</bitOffset>
20097 <bitWidth>1</bitWidth>
20098 </field>
20099 <field>
20100 <name>FB18</name>
20101 <description>Filter bits</description>
20102 <bitOffset>18</bitOffset>
20103 <bitWidth>1</bitWidth>
20104 </field>
20105 <field>
20106 <name>FB19</name>
20107 <description>Filter bits</description>
20108 <bitOffset>19</bitOffset>
20109 <bitWidth>1</bitWidth>
20110 </field>
20111 <field>
20112 <name>FB20</name>
20113 <description>Filter bits</description>
20114 <bitOffset>20</bitOffset>
20115 <bitWidth>1</bitWidth>
20116 </field>
20117 <field>
20118 <name>FB21</name>
20119 <description>Filter bits</description>
20120 <bitOffset>21</bitOffset>
20121 <bitWidth>1</bitWidth>
20122 </field>
20123 <field>
20124 <name>FB22</name>
20125 <description>Filter bits</description>
20126 <bitOffset>22</bitOffset>
20127 <bitWidth>1</bitWidth>
20128 </field>
20129 <field>
20130 <name>FB23</name>
20131 <description>Filter bits</description>
20132 <bitOffset>23</bitOffset>
20133 <bitWidth>1</bitWidth>
20134 </field>
20135 <field>
20136 <name>FB24</name>
20137 <description>Filter bits</description>
20138 <bitOffset>24</bitOffset>
20139 <bitWidth>1</bitWidth>
20140 </field>
20141 <field>
20142 <name>FB25</name>
20143 <description>Filter bits</description>
20144 <bitOffset>25</bitOffset>
20145 <bitWidth>1</bitWidth>
20146 </field>
20147 <field>
20148 <name>FB26</name>
20149 <description>Filter bits</description>
20150 <bitOffset>26</bitOffset>
20151 <bitWidth>1</bitWidth>
20152 </field>
20153 <field>
20154 <name>FB27</name>
20155 <description>Filter bits</description>
20156 <bitOffset>27</bitOffset>
20157 <bitWidth>1</bitWidth>
20158 </field>
20159 <field>
20160 <name>FB28</name>
20161 <description>Filter bits</description>
20162 <bitOffset>28</bitOffset>
20163 <bitWidth>1</bitWidth>
20164 </field>
20165 <field>
20166 <name>FB29</name>
20167 <description>Filter bits</description>
20168 <bitOffset>29</bitOffset>
20169 <bitWidth>1</bitWidth>
20170 </field>
20171 <field>
20172 <name>FB30</name>
20173 <description>Filter bits</description>
20174 <bitOffset>30</bitOffset>
20175 <bitWidth>1</bitWidth>
20176 </field>
20177 <field>
20178 <name>FB31</name>
20179 <description>Filter bits</description>
20180 <bitOffset>31</bitOffset>
20181 <bitWidth>1</bitWidth>
20182 </field>
20183 </fields>
20184 </register>
20185 <register>
20186 <name>F12R2</name>
20187 <displayName>F12R2</displayName>
20188 <description>Filter bank 12 register 2</description>
20189 <addressOffset>0x2A4</addressOffset>
20190 <size>0x20</size>
20191 <access>read-write</access>
20192 <resetValue>0x00000000</resetValue>
20193 <fields>
20194 <field>
20195 <name>FB0</name>
20196 <description>Filter bits</description>
20197 <bitOffset>0</bitOffset>
20198 <bitWidth>1</bitWidth>
20199 </field>
20200 <field>
20201 <name>FB1</name>
20202 <description>Filter bits</description>
20203 <bitOffset>1</bitOffset>
20204 <bitWidth>1</bitWidth>
20205 </field>
20206 <field>
20207 <name>FB2</name>
20208 <description>Filter bits</description>
20209 <bitOffset>2</bitOffset>
20210 <bitWidth>1</bitWidth>
20211 </field>
20212 <field>
20213 <name>FB3</name>
20214 <description>Filter bits</description>
20215 <bitOffset>3</bitOffset>
20216 <bitWidth>1</bitWidth>
20217 </field>
20218 <field>
20219 <name>FB4</name>
20220 <description>Filter bits</description>
20221 <bitOffset>4</bitOffset>
20222 <bitWidth>1</bitWidth>
20223 </field>
20224 <field>
20225 <name>FB5</name>
20226 <description>Filter bits</description>
20227 <bitOffset>5</bitOffset>
20228 <bitWidth>1</bitWidth>
20229 </field>
20230 <field>
20231 <name>FB6</name>
20232 <description>Filter bits</description>
20233 <bitOffset>6</bitOffset>
20234 <bitWidth>1</bitWidth>
20235 </field>
20236 <field>
20237 <name>FB7</name>
20238 <description>Filter bits</description>
20239 <bitOffset>7</bitOffset>
20240 <bitWidth>1</bitWidth>
20241 </field>
20242 <field>
20243 <name>FB8</name>
20244 <description>Filter bits</description>
20245 <bitOffset>8</bitOffset>
20246 <bitWidth>1</bitWidth>
20247 </field>
20248 <field>
20249 <name>FB9</name>
20250 <description>Filter bits</description>
20251 <bitOffset>9</bitOffset>
20252 <bitWidth>1</bitWidth>
20253 </field>
20254 <field>
20255 <name>FB10</name>
20256 <description>Filter bits</description>
20257 <bitOffset>10</bitOffset>
20258 <bitWidth>1</bitWidth>
20259 </field>
20260 <field>
20261 <name>FB11</name>
20262 <description>Filter bits</description>
20263 <bitOffset>11</bitOffset>
20264 <bitWidth>1</bitWidth>
20265 </field>
20266 <field>
20267 <name>FB12</name>
20268 <description>Filter bits</description>
20269 <bitOffset>12</bitOffset>
20270 <bitWidth>1</bitWidth>
20271 </field>
20272 <field>
20273 <name>FB13</name>
20274 <description>Filter bits</description>
20275 <bitOffset>13</bitOffset>
20276 <bitWidth>1</bitWidth>
20277 </field>
20278 <field>
20279 <name>FB14</name>
20280 <description>Filter bits</description>
20281 <bitOffset>14</bitOffset>
20282 <bitWidth>1</bitWidth>
20283 </field>
20284 <field>
20285 <name>FB15</name>
20286 <description>Filter bits</description>
20287 <bitOffset>15</bitOffset>
20288 <bitWidth>1</bitWidth>
20289 </field>
20290 <field>
20291 <name>FB16</name>
20292 <description>Filter bits</description>
20293 <bitOffset>16</bitOffset>
20294 <bitWidth>1</bitWidth>
20295 </field>
20296 <field>
20297 <name>FB17</name>
20298 <description>Filter bits</description>
20299 <bitOffset>17</bitOffset>
20300 <bitWidth>1</bitWidth>
20301 </field>
20302 <field>
20303 <name>FB18</name>
20304 <description>Filter bits</description>
20305 <bitOffset>18</bitOffset>
20306 <bitWidth>1</bitWidth>
20307 </field>
20308 <field>
20309 <name>FB19</name>
20310 <description>Filter bits</description>
20311 <bitOffset>19</bitOffset>
20312 <bitWidth>1</bitWidth>
20313 </field>
20314 <field>
20315 <name>FB20</name>
20316 <description>Filter bits</description>
20317 <bitOffset>20</bitOffset>
20318 <bitWidth>1</bitWidth>
20319 </field>
20320 <field>
20321 <name>FB21</name>
20322 <description>Filter bits</description>
20323 <bitOffset>21</bitOffset>
20324 <bitWidth>1</bitWidth>
20325 </field>
20326 <field>
20327 <name>FB22</name>
20328 <description>Filter bits</description>
20329 <bitOffset>22</bitOffset>
20330 <bitWidth>1</bitWidth>
20331 </field>
20332 <field>
20333 <name>FB23</name>
20334 <description>Filter bits</description>
20335 <bitOffset>23</bitOffset>
20336 <bitWidth>1</bitWidth>
20337 </field>
20338 <field>
20339 <name>FB24</name>
20340 <description>Filter bits</description>
20341 <bitOffset>24</bitOffset>
20342 <bitWidth>1</bitWidth>
20343 </field>
20344 <field>
20345 <name>FB25</name>
20346 <description>Filter bits</description>
20347 <bitOffset>25</bitOffset>
20348 <bitWidth>1</bitWidth>
20349 </field>
20350 <field>
20351 <name>FB26</name>
20352 <description>Filter bits</description>
20353 <bitOffset>26</bitOffset>
20354 <bitWidth>1</bitWidth>
20355 </field>
20356 <field>
20357 <name>FB27</name>
20358 <description>Filter bits</description>
20359 <bitOffset>27</bitOffset>
20360 <bitWidth>1</bitWidth>
20361 </field>
20362 <field>
20363 <name>FB28</name>
20364 <description>Filter bits</description>
20365 <bitOffset>28</bitOffset>
20366 <bitWidth>1</bitWidth>
20367 </field>
20368 <field>
20369 <name>FB29</name>
20370 <description>Filter bits</description>
20371 <bitOffset>29</bitOffset>
20372 <bitWidth>1</bitWidth>
20373 </field>
20374 <field>
20375 <name>FB30</name>
20376 <description>Filter bits</description>
20377 <bitOffset>30</bitOffset>
20378 <bitWidth>1</bitWidth>
20379 </field>
20380 <field>
20381 <name>FB31</name>
20382 <description>Filter bits</description>
20383 <bitOffset>31</bitOffset>
20384 <bitWidth>1</bitWidth>
20385 </field>
20386 </fields>
20387 </register>
20388 <register>
20389 <name>F13R1</name>
20390 <displayName>F13R1</displayName>
20391 <description>Filter bank 13 register 1</description>
20392 <addressOffset>0x2A8</addressOffset>
20393 <size>0x20</size>
20394 <access>read-write</access>
20395 <resetValue>0x00000000</resetValue>
20396 <fields>
20397 <field>
20398 <name>FB0</name>
20399 <description>Filter bits</description>
20400 <bitOffset>0</bitOffset>
20401 <bitWidth>1</bitWidth>
20402 </field>
20403 <field>
20404 <name>FB1</name>
20405 <description>Filter bits</description>
20406 <bitOffset>1</bitOffset>
20407 <bitWidth>1</bitWidth>
20408 </field>
20409 <field>
20410 <name>FB2</name>
20411 <description>Filter bits</description>
20412 <bitOffset>2</bitOffset>
20413 <bitWidth>1</bitWidth>
20414 </field>
20415 <field>
20416 <name>FB3</name>
20417 <description>Filter bits</description>
20418 <bitOffset>3</bitOffset>
20419 <bitWidth>1</bitWidth>
20420 </field>
20421 <field>
20422 <name>FB4</name>
20423 <description>Filter bits</description>
20424 <bitOffset>4</bitOffset>
20425 <bitWidth>1</bitWidth>
20426 </field>
20427 <field>
20428 <name>FB5</name>
20429 <description>Filter bits</description>
20430 <bitOffset>5</bitOffset>
20431 <bitWidth>1</bitWidth>
20432 </field>
20433 <field>
20434 <name>FB6</name>
20435 <description>Filter bits</description>
20436 <bitOffset>6</bitOffset>
20437 <bitWidth>1</bitWidth>
20438 </field>
20439 <field>
20440 <name>FB7</name>
20441 <description>Filter bits</description>
20442 <bitOffset>7</bitOffset>
20443 <bitWidth>1</bitWidth>
20444 </field>
20445 <field>
20446 <name>FB8</name>
20447 <description>Filter bits</description>
20448 <bitOffset>8</bitOffset>
20449 <bitWidth>1</bitWidth>
20450 </field>
20451 <field>
20452 <name>FB9</name>
20453 <description>Filter bits</description>
20454 <bitOffset>9</bitOffset>
20455 <bitWidth>1</bitWidth>
20456 </field>
20457 <field>
20458 <name>FB10</name>
20459 <description>Filter bits</description>
20460 <bitOffset>10</bitOffset>
20461 <bitWidth>1</bitWidth>
20462 </field>
20463 <field>
20464 <name>FB11</name>
20465 <description>Filter bits</description>
20466 <bitOffset>11</bitOffset>
20467 <bitWidth>1</bitWidth>
20468 </field>
20469 <field>
20470 <name>FB12</name>
20471 <description>Filter bits</description>
20472 <bitOffset>12</bitOffset>
20473 <bitWidth>1</bitWidth>
20474 </field>
20475 <field>
20476 <name>FB13</name>
20477 <description>Filter bits</description>
20478 <bitOffset>13</bitOffset>
20479 <bitWidth>1</bitWidth>
20480 </field>
20481 <field>
20482 <name>FB14</name>
20483 <description>Filter bits</description>
20484 <bitOffset>14</bitOffset>
20485 <bitWidth>1</bitWidth>
20486 </field>
20487 <field>
20488 <name>FB15</name>
20489 <description>Filter bits</description>
20490 <bitOffset>15</bitOffset>
20491 <bitWidth>1</bitWidth>
20492 </field>
20493 <field>
20494 <name>FB16</name>
20495 <description>Filter bits</description>
20496 <bitOffset>16</bitOffset>
20497 <bitWidth>1</bitWidth>
20498 </field>
20499 <field>
20500 <name>FB17</name>
20501 <description>Filter bits</description>
20502 <bitOffset>17</bitOffset>
20503 <bitWidth>1</bitWidth>
20504 </field>
20505 <field>
20506 <name>FB18</name>
20507 <description>Filter bits</description>
20508 <bitOffset>18</bitOffset>
20509 <bitWidth>1</bitWidth>
20510 </field>
20511 <field>
20512 <name>FB19</name>
20513 <description>Filter bits</description>
20514 <bitOffset>19</bitOffset>
20515 <bitWidth>1</bitWidth>
20516 </field>
20517 <field>
20518 <name>FB20</name>
20519 <description>Filter bits</description>
20520 <bitOffset>20</bitOffset>
20521 <bitWidth>1</bitWidth>
20522 </field>
20523 <field>
20524 <name>FB21</name>
20525 <description>Filter bits</description>
20526 <bitOffset>21</bitOffset>
20527 <bitWidth>1</bitWidth>
20528 </field>
20529 <field>
20530 <name>FB22</name>
20531 <description>Filter bits</description>
20532 <bitOffset>22</bitOffset>
20533 <bitWidth>1</bitWidth>
20534 </field>
20535 <field>
20536 <name>FB23</name>
20537 <description>Filter bits</description>
20538 <bitOffset>23</bitOffset>
20539 <bitWidth>1</bitWidth>
20540 </field>
20541 <field>
20542 <name>FB24</name>
20543 <description>Filter bits</description>
20544 <bitOffset>24</bitOffset>
20545 <bitWidth>1</bitWidth>
20546 </field>
20547 <field>
20548 <name>FB25</name>
20549 <description>Filter bits</description>
20550 <bitOffset>25</bitOffset>
20551 <bitWidth>1</bitWidth>
20552 </field>
20553 <field>
20554 <name>FB26</name>
20555 <description>Filter bits</description>
20556 <bitOffset>26</bitOffset>
20557 <bitWidth>1</bitWidth>
20558 </field>
20559 <field>
20560 <name>FB27</name>
20561 <description>Filter bits</description>
20562 <bitOffset>27</bitOffset>
20563 <bitWidth>1</bitWidth>
20564 </field>
20565 <field>
20566 <name>FB28</name>
20567 <description>Filter bits</description>
20568 <bitOffset>28</bitOffset>
20569 <bitWidth>1</bitWidth>
20570 </field>
20571 <field>
20572 <name>FB29</name>
20573 <description>Filter bits</description>
20574 <bitOffset>29</bitOffset>
20575 <bitWidth>1</bitWidth>
20576 </field>
20577 <field>
20578 <name>FB30</name>
20579 <description>Filter bits</description>
20580 <bitOffset>30</bitOffset>
20581 <bitWidth>1</bitWidth>
20582 </field>
20583 <field>
20584 <name>FB31</name>
20585 <description>Filter bits</description>
20586 <bitOffset>31</bitOffset>
20587 <bitWidth>1</bitWidth>
20588 </field>
20589 </fields>
20590 </register>
20591 <register>
20592 <name>F13R2</name>
20593 <displayName>F13R2</displayName>
20594 <description>Filter bank 13 register 2</description>
20595 <addressOffset>0x2AC</addressOffset>
20596 <size>0x20</size>
20597 <access>read-write</access>
20598 <resetValue>0x00000000</resetValue>
20599 <fields>
20600 <field>
20601 <name>FB0</name>
20602 <description>Filter bits</description>
20603 <bitOffset>0</bitOffset>
20604 <bitWidth>1</bitWidth>
20605 </field>
20606 <field>
20607 <name>FB1</name>
20608 <description>Filter bits</description>
20609 <bitOffset>1</bitOffset>
20610 <bitWidth>1</bitWidth>
20611 </field>
20612 <field>
20613 <name>FB2</name>
20614 <description>Filter bits</description>
20615 <bitOffset>2</bitOffset>
20616 <bitWidth>1</bitWidth>
20617 </field>
20618 <field>
20619 <name>FB3</name>
20620 <description>Filter bits</description>
20621 <bitOffset>3</bitOffset>
20622 <bitWidth>1</bitWidth>
20623 </field>
20624 <field>
20625 <name>FB4</name>
20626 <description>Filter bits</description>
20627 <bitOffset>4</bitOffset>
20628 <bitWidth>1</bitWidth>
20629 </field>
20630 <field>
20631 <name>FB5</name>
20632 <description>Filter bits</description>
20633 <bitOffset>5</bitOffset>
20634 <bitWidth>1</bitWidth>
20635 </field>
20636 <field>
20637 <name>FB6</name>
20638 <description>Filter bits</description>
20639 <bitOffset>6</bitOffset>
20640 <bitWidth>1</bitWidth>
20641 </field>
20642 <field>
20643 <name>FB7</name>
20644 <description>Filter bits</description>
20645 <bitOffset>7</bitOffset>
20646 <bitWidth>1</bitWidth>
20647 </field>
20648 <field>
20649 <name>FB8</name>
20650 <description>Filter bits</description>
20651 <bitOffset>8</bitOffset>
20652 <bitWidth>1</bitWidth>
20653 </field>
20654 <field>
20655 <name>FB9</name>
20656 <description>Filter bits</description>
20657 <bitOffset>9</bitOffset>
20658 <bitWidth>1</bitWidth>
20659 </field>
20660 <field>
20661 <name>FB10</name>
20662 <description>Filter bits</description>
20663 <bitOffset>10</bitOffset>
20664 <bitWidth>1</bitWidth>
20665 </field>
20666 <field>
20667 <name>FB11</name>
20668 <description>Filter bits</description>
20669 <bitOffset>11</bitOffset>
20670 <bitWidth>1</bitWidth>
20671 </field>
20672 <field>
20673 <name>FB12</name>
20674 <description>Filter bits</description>
20675 <bitOffset>12</bitOffset>
20676 <bitWidth>1</bitWidth>
20677 </field>
20678 <field>
20679 <name>FB13</name>
20680 <description>Filter bits</description>
20681 <bitOffset>13</bitOffset>
20682 <bitWidth>1</bitWidth>
20683 </field>
20684 <field>
20685 <name>FB14</name>
20686 <description>Filter bits</description>
20687 <bitOffset>14</bitOffset>
20688 <bitWidth>1</bitWidth>
20689 </field>
20690 <field>
20691 <name>FB15</name>
20692 <description>Filter bits</description>
20693 <bitOffset>15</bitOffset>
20694 <bitWidth>1</bitWidth>
20695 </field>
20696 <field>
20697 <name>FB16</name>
20698 <description>Filter bits</description>
20699 <bitOffset>16</bitOffset>
20700 <bitWidth>1</bitWidth>
20701 </field>
20702 <field>
20703 <name>FB17</name>
20704 <description>Filter bits</description>
20705 <bitOffset>17</bitOffset>
20706 <bitWidth>1</bitWidth>
20707 </field>
20708 <field>
20709 <name>FB18</name>
20710 <description>Filter bits</description>
20711 <bitOffset>18</bitOffset>
20712 <bitWidth>1</bitWidth>
20713 </field>
20714 <field>
20715 <name>FB19</name>
20716 <description>Filter bits</description>
20717 <bitOffset>19</bitOffset>
20718 <bitWidth>1</bitWidth>
20719 </field>
20720 <field>
20721 <name>FB20</name>
20722 <description>Filter bits</description>
20723 <bitOffset>20</bitOffset>
20724 <bitWidth>1</bitWidth>
20725 </field>
20726 <field>
20727 <name>FB21</name>
20728 <description>Filter bits</description>
20729 <bitOffset>21</bitOffset>
20730 <bitWidth>1</bitWidth>
20731 </field>
20732 <field>
20733 <name>FB22</name>
20734 <description>Filter bits</description>
20735 <bitOffset>22</bitOffset>
20736 <bitWidth>1</bitWidth>
20737 </field>
20738 <field>
20739 <name>FB23</name>
20740 <description>Filter bits</description>
20741 <bitOffset>23</bitOffset>
20742 <bitWidth>1</bitWidth>
20743 </field>
20744 <field>
20745 <name>FB24</name>
20746 <description>Filter bits</description>
20747 <bitOffset>24</bitOffset>
20748 <bitWidth>1</bitWidth>
20749 </field>
20750 <field>
20751 <name>FB25</name>
20752 <description>Filter bits</description>
20753 <bitOffset>25</bitOffset>
20754 <bitWidth>1</bitWidth>
20755 </field>
20756 <field>
20757 <name>FB26</name>
20758 <description>Filter bits</description>
20759 <bitOffset>26</bitOffset>
20760 <bitWidth>1</bitWidth>
20761 </field>
20762 <field>
20763 <name>FB27</name>
20764 <description>Filter bits</description>
20765 <bitOffset>27</bitOffset>
20766 <bitWidth>1</bitWidth>
20767 </field>
20768 <field>
20769 <name>FB28</name>
20770 <description>Filter bits</description>
20771 <bitOffset>28</bitOffset>
20772 <bitWidth>1</bitWidth>
20773 </field>
20774 <field>
20775 <name>FB29</name>
20776 <description>Filter bits</description>
20777 <bitOffset>29</bitOffset>
20778 <bitWidth>1</bitWidth>
20779 </field>
20780 <field>
20781 <name>FB30</name>
20782 <description>Filter bits</description>
20783 <bitOffset>30</bitOffset>
20784 <bitWidth>1</bitWidth>
20785 </field>
20786 <field>
20787 <name>FB31</name>
20788 <description>Filter bits</description>
20789 <bitOffset>31</bitOffset>
20790 <bitWidth>1</bitWidth>
20791 </field>
20792 </fields>
20793 </register>
20794 <register>
20795 <name>F14R1</name>
20796 <displayName>F14R1</displayName>
20797 <description>Filter bank 14 register 1</description>
20798 <addressOffset>0x2B0</addressOffset>
20799 <size>0x20</size>
20800 <access>read-write</access>
20801 <resetValue>0x00000000</resetValue>
20802 <fields>
20803 <field>
20804 <name>FB0</name>
20805 <description>Filter bits</description>
20806 <bitOffset>0</bitOffset>
20807 <bitWidth>1</bitWidth>
20808 </field>
20809 <field>
20810 <name>FB1</name>
20811 <description>Filter bits</description>
20812 <bitOffset>1</bitOffset>
20813 <bitWidth>1</bitWidth>
20814 </field>
20815 <field>
20816 <name>FB2</name>
20817 <description>Filter bits</description>
20818 <bitOffset>2</bitOffset>
20819 <bitWidth>1</bitWidth>
20820 </field>
20821 <field>
20822 <name>FB3</name>
20823 <description>Filter bits</description>
20824 <bitOffset>3</bitOffset>
20825 <bitWidth>1</bitWidth>
20826 </field>
20827 <field>
20828 <name>FB4</name>
20829 <description>Filter bits</description>
20830 <bitOffset>4</bitOffset>
20831 <bitWidth>1</bitWidth>
20832 </field>
20833 <field>
20834 <name>FB5</name>
20835 <description>Filter bits</description>
20836 <bitOffset>5</bitOffset>
20837 <bitWidth>1</bitWidth>
20838 </field>
20839 <field>
20840 <name>FB6</name>
20841 <description>Filter bits</description>
20842 <bitOffset>6</bitOffset>
20843 <bitWidth>1</bitWidth>
20844 </field>
20845 <field>
20846 <name>FB7</name>
20847 <description>Filter bits</description>
20848 <bitOffset>7</bitOffset>
20849 <bitWidth>1</bitWidth>
20850 </field>
20851 <field>
20852 <name>FB8</name>
20853 <description>Filter bits</description>
20854 <bitOffset>8</bitOffset>
20855 <bitWidth>1</bitWidth>
20856 </field>
20857 <field>
20858 <name>FB9</name>
20859 <description>Filter bits</description>
20860 <bitOffset>9</bitOffset>
20861 <bitWidth>1</bitWidth>
20862 </field>
20863 <field>
20864 <name>FB10</name>
20865 <description>Filter bits</description>
20866 <bitOffset>10</bitOffset>
20867 <bitWidth>1</bitWidth>
20868 </field>
20869 <field>
20870 <name>FB11</name>
20871 <description>Filter bits</description>
20872 <bitOffset>11</bitOffset>
20873 <bitWidth>1</bitWidth>
20874 </field>
20875 <field>
20876 <name>FB12</name>
20877 <description>Filter bits</description>
20878 <bitOffset>12</bitOffset>
20879 <bitWidth>1</bitWidth>
20880 </field>
20881 <field>
20882 <name>FB13</name>
20883 <description>Filter bits</description>
20884 <bitOffset>13</bitOffset>
20885 <bitWidth>1</bitWidth>
20886 </field>
20887 <field>
20888 <name>FB14</name>
20889 <description>Filter bits</description>
20890 <bitOffset>14</bitOffset>
20891 <bitWidth>1</bitWidth>
20892 </field>
20893 <field>
20894 <name>FB15</name>
20895 <description>Filter bits</description>
20896 <bitOffset>15</bitOffset>
20897 <bitWidth>1</bitWidth>
20898 </field>
20899 <field>
20900 <name>FB16</name>
20901 <description>Filter bits</description>
20902 <bitOffset>16</bitOffset>
20903 <bitWidth>1</bitWidth>
20904 </field>
20905 <field>
20906 <name>FB17</name>
20907 <description>Filter bits</description>
20908 <bitOffset>17</bitOffset>
20909 <bitWidth>1</bitWidth>
20910 </field>
20911 <field>
20912 <name>FB18</name>
20913 <description>Filter bits</description>
20914 <bitOffset>18</bitOffset>
20915 <bitWidth>1</bitWidth>
20916 </field>
20917 <field>
20918 <name>FB19</name>
20919 <description>Filter bits</description>
20920 <bitOffset>19</bitOffset>
20921 <bitWidth>1</bitWidth>
20922 </field>
20923 <field>
20924 <name>FB20</name>
20925 <description>Filter bits</description>
20926 <bitOffset>20</bitOffset>
20927 <bitWidth>1</bitWidth>
20928 </field>
20929 <field>
20930 <name>FB21</name>
20931 <description>Filter bits</description>
20932 <bitOffset>21</bitOffset>
20933 <bitWidth>1</bitWidth>
20934 </field>
20935 <field>
20936 <name>FB22</name>
20937 <description>Filter bits</description>
20938 <bitOffset>22</bitOffset>
20939 <bitWidth>1</bitWidth>
20940 </field>
20941 <field>
20942 <name>FB23</name>
20943 <description>Filter bits</description>
20944 <bitOffset>23</bitOffset>
20945 <bitWidth>1</bitWidth>
20946 </field>
20947 <field>
20948 <name>FB24</name>
20949 <description>Filter bits</description>
20950 <bitOffset>24</bitOffset>
20951 <bitWidth>1</bitWidth>
20952 </field>
20953 <field>
20954 <name>FB25</name>
20955 <description>Filter bits</description>
20956 <bitOffset>25</bitOffset>
20957 <bitWidth>1</bitWidth>
20958 </field>
20959 <field>
20960 <name>FB26</name>
20961 <description>Filter bits</description>
20962 <bitOffset>26</bitOffset>
20963 <bitWidth>1</bitWidth>
20964 </field>
20965 <field>
20966 <name>FB27</name>
20967 <description>Filter bits</description>
20968 <bitOffset>27</bitOffset>
20969 <bitWidth>1</bitWidth>
20970 </field>
20971 <field>
20972 <name>FB28</name>
20973 <description>Filter bits</description>
20974 <bitOffset>28</bitOffset>
20975 <bitWidth>1</bitWidth>
20976 </field>
20977 <field>
20978 <name>FB29</name>
20979 <description>Filter bits</description>
20980 <bitOffset>29</bitOffset>
20981 <bitWidth>1</bitWidth>
20982 </field>
20983 <field>
20984 <name>FB30</name>
20985 <description>Filter bits</description>
20986 <bitOffset>30</bitOffset>
20987 <bitWidth>1</bitWidth>
20988 </field>
20989 <field>
20990 <name>FB31</name>
20991 <description>Filter bits</description>
20992 <bitOffset>31</bitOffset>
20993 <bitWidth>1</bitWidth>
20994 </field>
20995 </fields>
20996 </register>
20997 <register>
20998 <name>F14R2</name>
20999 <displayName>F14R2</displayName>
21000 <description>Filter bank 14 register 2</description>
21001 <addressOffset>0x2B4</addressOffset>
21002 <size>0x20</size>
21003 <access>read-write</access>
21004 <resetValue>0x00000000</resetValue>
21005 <fields>
21006 <field>
21007 <name>FB0</name>
21008 <description>Filter bits</description>
21009 <bitOffset>0</bitOffset>
21010 <bitWidth>1</bitWidth>
21011 </field>
21012 <field>
21013 <name>FB1</name>
21014 <description>Filter bits</description>
21015 <bitOffset>1</bitOffset>
21016 <bitWidth>1</bitWidth>
21017 </field>
21018 <field>
21019 <name>FB2</name>
21020 <description>Filter bits</description>
21021 <bitOffset>2</bitOffset>
21022 <bitWidth>1</bitWidth>
21023 </field>
21024 <field>
21025 <name>FB3</name>
21026 <description>Filter bits</description>
21027 <bitOffset>3</bitOffset>
21028 <bitWidth>1</bitWidth>
21029 </field>
21030 <field>
21031 <name>FB4</name>
21032 <description>Filter bits</description>
21033 <bitOffset>4</bitOffset>
21034 <bitWidth>1</bitWidth>
21035 </field>
21036 <field>
21037 <name>FB5</name>
21038 <description>Filter bits</description>
21039 <bitOffset>5</bitOffset>
21040 <bitWidth>1</bitWidth>
21041 </field>
21042 <field>
21043 <name>FB6</name>
21044 <description>Filter bits</description>
21045 <bitOffset>6</bitOffset>
21046 <bitWidth>1</bitWidth>
21047 </field>
21048 <field>
21049 <name>FB7</name>
21050 <description>Filter bits</description>
21051 <bitOffset>7</bitOffset>
21052 <bitWidth>1</bitWidth>
21053 </field>
21054 <field>
21055 <name>FB8</name>
21056 <description>Filter bits</description>
21057 <bitOffset>8</bitOffset>
21058 <bitWidth>1</bitWidth>
21059 </field>
21060 <field>
21061 <name>FB9</name>
21062 <description>Filter bits</description>
21063 <bitOffset>9</bitOffset>
21064 <bitWidth>1</bitWidth>
21065 </field>
21066 <field>
21067 <name>FB10</name>
21068 <description>Filter bits</description>
21069 <bitOffset>10</bitOffset>
21070 <bitWidth>1</bitWidth>
21071 </field>
21072 <field>
21073 <name>FB11</name>
21074 <description>Filter bits</description>
21075 <bitOffset>11</bitOffset>
21076 <bitWidth>1</bitWidth>
21077 </field>
21078 <field>
21079 <name>FB12</name>
21080 <description>Filter bits</description>
21081 <bitOffset>12</bitOffset>
21082 <bitWidth>1</bitWidth>
21083 </field>
21084 <field>
21085 <name>FB13</name>
21086 <description>Filter bits</description>
21087 <bitOffset>13</bitOffset>
21088 <bitWidth>1</bitWidth>
21089 </field>
21090 <field>
21091 <name>FB14</name>
21092 <description>Filter bits</description>
21093 <bitOffset>14</bitOffset>
21094 <bitWidth>1</bitWidth>
21095 </field>
21096 <field>
21097 <name>FB15</name>
21098 <description>Filter bits</description>
21099 <bitOffset>15</bitOffset>
21100 <bitWidth>1</bitWidth>
21101 </field>
21102 <field>
21103 <name>FB16</name>
21104 <description>Filter bits</description>
21105 <bitOffset>16</bitOffset>
21106 <bitWidth>1</bitWidth>
21107 </field>
21108 <field>
21109 <name>FB17</name>
21110 <description>Filter bits</description>
21111 <bitOffset>17</bitOffset>
21112 <bitWidth>1</bitWidth>
21113 </field>
21114 <field>
21115 <name>FB18</name>
21116 <description>Filter bits</description>
21117 <bitOffset>18</bitOffset>
21118 <bitWidth>1</bitWidth>
21119 </field>
21120 <field>
21121 <name>FB19</name>
21122 <description>Filter bits</description>
21123 <bitOffset>19</bitOffset>
21124 <bitWidth>1</bitWidth>
21125 </field>
21126 <field>
21127 <name>FB20</name>
21128 <description>Filter bits</description>
21129 <bitOffset>20</bitOffset>
21130 <bitWidth>1</bitWidth>
21131 </field>
21132 <field>
21133 <name>FB21</name>
21134 <description>Filter bits</description>
21135 <bitOffset>21</bitOffset>
21136 <bitWidth>1</bitWidth>
21137 </field>
21138 <field>
21139 <name>FB22</name>
21140 <description>Filter bits</description>
21141 <bitOffset>22</bitOffset>
21142 <bitWidth>1</bitWidth>
21143 </field>
21144 <field>
21145 <name>FB23</name>
21146 <description>Filter bits</description>
21147 <bitOffset>23</bitOffset>
21148 <bitWidth>1</bitWidth>
21149 </field>
21150 <field>
21151 <name>FB24</name>
21152 <description>Filter bits</description>
21153 <bitOffset>24</bitOffset>
21154 <bitWidth>1</bitWidth>
21155 </field>
21156 <field>
21157 <name>FB25</name>
21158 <description>Filter bits</description>
21159 <bitOffset>25</bitOffset>
21160 <bitWidth>1</bitWidth>
21161 </field>
21162 <field>
21163 <name>FB26</name>
21164 <description>Filter bits</description>
21165 <bitOffset>26</bitOffset>
21166 <bitWidth>1</bitWidth>
21167 </field>
21168 <field>
21169 <name>FB27</name>
21170 <description>Filter bits</description>
21171 <bitOffset>27</bitOffset>
21172 <bitWidth>1</bitWidth>
21173 </field>
21174 <field>
21175 <name>FB28</name>
21176 <description>Filter bits</description>
21177 <bitOffset>28</bitOffset>
21178 <bitWidth>1</bitWidth>
21179 </field>
21180 <field>
21181 <name>FB29</name>
21182 <description>Filter bits</description>
21183 <bitOffset>29</bitOffset>
21184 <bitWidth>1</bitWidth>
21185 </field>
21186 <field>
21187 <name>FB30</name>
21188 <description>Filter bits</description>
21189 <bitOffset>30</bitOffset>
21190 <bitWidth>1</bitWidth>
21191 </field>
21192 <field>
21193 <name>FB31</name>
21194 <description>Filter bits</description>
21195 <bitOffset>31</bitOffset>
21196 <bitWidth>1</bitWidth>
21197 </field>
21198 </fields>
21199 </register>
21200 <register>
21201 <name>F15R1</name>
21202 <displayName>F15R1</displayName>
21203 <description>Filter bank 15 register 1</description>
21204 <addressOffset>0x2B8</addressOffset>
21205 <size>0x20</size>
21206 <access>read-write</access>
21207 <resetValue>0x00000000</resetValue>
21208 <fields>
21209 <field>
21210 <name>FB0</name>
21211 <description>Filter bits</description>
21212 <bitOffset>0</bitOffset>
21213 <bitWidth>1</bitWidth>
21214 </field>
21215 <field>
21216 <name>FB1</name>
21217 <description>Filter bits</description>
21218 <bitOffset>1</bitOffset>
21219 <bitWidth>1</bitWidth>
21220 </field>
21221 <field>
21222 <name>FB2</name>
21223 <description>Filter bits</description>
21224 <bitOffset>2</bitOffset>
21225 <bitWidth>1</bitWidth>
21226 </field>
21227 <field>
21228 <name>FB3</name>
21229 <description>Filter bits</description>
21230 <bitOffset>3</bitOffset>
21231 <bitWidth>1</bitWidth>
21232 </field>
21233 <field>
21234 <name>FB4</name>
21235 <description>Filter bits</description>
21236 <bitOffset>4</bitOffset>
21237 <bitWidth>1</bitWidth>
21238 </field>
21239 <field>
21240 <name>FB5</name>
21241 <description>Filter bits</description>
21242 <bitOffset>5</bitOffset>
21243 <bitWidth>1</bitWidth>
21244 </field>
21245 <field>
21246 <name>FB6</name>
21247 <description>Filter bits</description>
21248 <bitOffset>6</bitOffset>
21249 <bitWidth>1</bitWidth>
21250 </field>
21251 <field>
21252 <name>FB7</name>
21253 <description>Filter bits</description>
21254 <bitOffset>7</bitOffset>
21255 <bitWidth>1</bitWidth>
21256 </field>
21257 <field>
21258 <name>FB8</name>
21259 <description>Filter bits</description>
21260 <bitOffset>8</bitOffset>
21261 <bitWidth>1</bitWidth>
21262 </field>
21263 <field>
21264 <name>FB9</name>
21265 <description>Filter bits</description>
21266 <bitOffset>9</bitOffset>
21267 <bitWidth>1</bitWidth>
21268 </field>
21269 <field>
21270 <name>FB10</name>
21271 <description>Filter bits</description>
21272 <bitOffset>10</bitOffset>
21273 <bitWidth>1</bitWidth>
21274 </field>
21275 <field>
21276 <name>FB11</name>
21277 <description>Filter bits</description>
21278 <bitOffset>11</bitOffset>
21279 <bitWidth>1</bitWidth>
21280 </field>
21281 <field>
21282 <name>FB12</name>
21283 <description>Filter bits</description>
21284 <bitOffset>12</bitOffset>
21285 <bitWidth>1</bitWidth>
21286 </field>
21287 <field>
21288 <name>FB13</name>
21289 <description>Filter bits</description>
21290 <bitOffset>13</bitOffset>
21291 <bitWidth>1</bitWidth>
21292 </field>
21293 <field>
21294 <name>FB14</name>
21295 <description>Filter bits</description>
21296 <bitOffset>14</bitOffset>
21297 <bitWidth>1</bitWidth>
21298 </field>
21299 <field>
21300 <name>FB15</name>
21301 <description>Filter bits</description>
21302 <bitOffset>15</bitOffset>
21303 <bitWidth>1</bitWidth>
21304 </field>
21305 <field>
21306 <name>FB16</name>
21307 <description>Filter bits</description>
21308 <bitOffset>16</bitOffset>
21309 <bitWidth>1</bitWidth>
21310 </field>
21311 <field>
21312 <name>FB17</name>
21313 <description>Filter bits</description>
21314 <bitOffset>17</bitOffset>
21315 <bitWidth>1</bitWidth>
21316 </field>
21317 <field>
21318 <name>FB18</name>
21319 <description>Filter bits</description>
21320 <bitOffset>18</bitOffset>
21321 <bitWidth>1</bitWidth>
21322 </field>
21323 <field>
21324 <name>FB19</name>
21325 <description>Filter bits</description>
21326 <bitOffset>19</bitOffset>
21327 <bitWidth>1</bitWidth>
21328 </field>
21329 <field>
21330 <name>FB20</name>
21331 <description>Filter bits</description>
21332 <bitOffset>20</bitOffset>
21333 <bitWidth>1</bitWidth>
21334 </field>
21335 <field>
21336 <name>FB21</name>
21337 <description>Filter bits</description>
21338 <bitOffset>21</bitOffset>
21339 <bitWidth>1</bitWidth>
21340 </field>
21341 <field>
21342 <name>FB22</name>
21343 <description>Filter bits</description>
21344 <bitOffset>22</bitOffset>
21345 <bitWidth>1</bitWidth>
21346 </field>
21347 <field>
21348 <name>FB23</name>
21349 <description>Filter bits</description>
21350 <bitOffset>23</bitOffset>
21351 <bitWidth>1</bitWidth>
21352 </field>
21353 <field>
21354 <name>FB24</name>
21355 <description>Filter bits</description>
21356 <bitOffset>24</bitOffset>
21357 <bitWidth>1</bitWidth>
21358 </field>
21359 <field>
21360 <name>FB25</name>
21361 <description>Filter bits</description>
21362 <bitOffset>25</bitOffset>
21363 <bitWidth>1</bitWidth>
21364 </field>
21365 <field>
21366 <name>FB26</name>
21367 <description>Filter bits</description>
21368 <bitOffset>26</bitOffset>
21369 <bitWidth>1</bitWidth>
21370 </field>
21371 <field>
21372 <name>FB27</name>
21373 <description>Filter bits</description>
21374 <bitOffset>27</bitOffset>
21375 <bitWidth>1</bitWidth>
21376 </field>
21377 <field>
21378 <name>FB28</name>
21379 <description>Filter bits</description>
21380 <bitOffset>28</bitOffset>
21381 <bitWidth>1</bitWidth>
21382 </field>
21383 <field>
21384 <name>FB29</name>
21385 <description>Filter bits</description>
21386 <bitOffset>29</bitOffset>
21387 <bitWidth>1</bitWidth>
21388 </field>
21389 <field>
21390 <name>FB30</name>
21391 <description>Filter bits</description>
21392 <bitOffset>30</bitOffset>
21393 <bitWidth>1</bitWidth>
21394 </field>
21395 <field>
21396 <name>FB31</name>
21397 <description>Filter bits</description>
21398 <bitOffset>31</bitOffset>
21399 <bitWidth>1</bitWidth>
21400 </field>
21401 </fields>
21402 </register>
21403 <register>
21404 <name>F15R2</name>
21405 <displayName>F15R2</displayName>
21406 <description>Filter bank 15 register 2</description>
21407 <addressOffset>0x2BC</addressOffset>
21408 <size>0x20</size>
21409 <access>read-write</access>
21410 <resetValue>0x00000000</resetValue>
21411 <fields>
21412 <field>
21413 <name>FB0</name>
21414 <description>Filter bits</description>
21415 <bitOffset>0</bitOffset>
21416 <bitWidth>1</bitWidth>
21417 </field>
21418 <field>
21419 <name>FB1</name>
21420 <description>Filter bits</description>
21421 <bitOffset>1</bitOffset>
21422 <bitWidth>1</bitWidth>
21423 </field>
21424 <field>
21425 <name>FB2</name>
21426 <description>Filter bits</description>
21427 <bitOffset>2</bitOffset>
21428 <bitWidth>1</bitWidth>
21429 </field>
21430 <field>
21431 <name>FB3</name>
21432 <description>Filter bits</description>
21433 <bitOffset>3</bitOffset>
21434 <bitWidth>1</bitWidth>
21435 </field>
21436 <field>
21437 <name>FB4</name>
21438 <description>Filter bits</description>
21439 <bitOffset>4</bitOffset>
21440 <bitWidth>1</bitWidth>
21441 </field>
21442 <field>
21443 <name>FB5</name>
21444 <description>Filter bits</description>
21445 <bitOffset>5</bitOffset>
21446 <bitWidth>1</bitWidth>
21447 </field>
21448 <field>
21449 <name>FB6</name>
21450 <description>Filter bits</description>
21451 <bitOffset>6</bitOffset>
21452 <bitWidth>1</bitWidth>
21453 </field>
21454 <field>
21455 <name>FB7</name>
21456 <description>Filter bits</description>
21457 <bitOffset>7</bitOffset>
21458 <bitWidth>1</bitWidth>
21459 </field>
21460 <field>
21461 <name>FB8</name>
21462 <description>Filter bits</description>
21463 <bitOffset>8</bitOffset>
21464 <bitWidth>1</bitWidth>
21465 </field>
21466 <field>
21467 <name>FB9</name>
21468 <description>Filter bits</description>
21469 <bitOffset>9</bitOffset>
21470 <bitWidth>1</bitWidth>
21471 </field>
21472 <field>
21473 <name>FB10</name>
21474 <description>Filter bits</description>
21475 <bitOffset>10</bitOffset>
21476 <bitWidth>1</bitWidth>
21477 </field>
21478 <field>
21479 <name>FB11</name>
21480 <description>Filter bits</description>
21481 <bitOffset>11</bitOffset>
21482 <bitWidth>1</bitWidth>
21483 </field>
21484 <field>
21485 <name>FB12</name>
21486 <description>Filter bits</description>
21487 <bitOffset>12</bitOffset>
21488 <bitWidth>1</bitWidth>
21489 </field>
21490 <field>
21491 <name>FB13</name>
21492 <description>Filter bits</description>
21493 <bitOffset>13</bitOffset>
21494 <bitWidth>1</bitWidth>
21495 </field>
21496 <field>
21497 <name>FB14</name>
21498 <description>Filter bits</description>
21499 <bitOffset>14</bitOffset>
21500 <bitWidth>1</bitWidth>
21501 </field>
21502 <field>
21503 <name>FB15</name>
21504 <description>Filter bits</description>
21505 <bitOffset>15</bitOffset>
21506 <bitWidth>1</bitWidth>
21507 </field>
21508 <field>
21509 <name>FB16</name>
21510 <description>Filter bits</description>
21511 <bitOffset>16</bitOffset>
21512 <bitWidth>1</bitWidth>
21513 </field>
21514 <field>
21515 <name>FB17</name>
21516 <description>Filter bits</description>
21517 <bitOffset>17</bitOffset>
21518 <bitWidth>1</bitWidth>
21519 </field>
21520 <field>
21521 <name>FB18</name>
21522 <description>Filter bits</description>
21523 <bitOffset>18</bitOffset>
21524 <bitWidth>1</bitWidth>
21525 </field>
21526 <field>
21527 <name>FB19</name>
21528 <description>Filter bits</description>
21529 <bitOffset>19</bitOffset>
21530 <bitWidth>1</bitWidth>
21531 </field>
21532 <field>
21533 <name>FB20</name>
21534 <description>Filter bits</description>
21535 <bitOffset>20</bitOffset>
21536 <bitWidth>1</bitWidth>
21537 </field>
21538 <field>
21539 <name>FB21</name>
21540 <description>Filter bits</description>
21541 <bitOffset>21</bitOffset>
21542 <bitWidth>1</bitWidth>
21543 </field>
21544 <field>
21545 <name>FB22</name>
21546 <description>Filter bits</description>
21547 <bitOffset>22</bitOffset>
21548 <bitWidth>1</bitWidth>
21549 </field>
21550 <field>
21551 <name>FB23</name>
21552 <description>Filter bits</description>
21553 <bitOffset>23</bitOffset>
21554 <bitWidth>1</bitWidth>
21555 </field>
21556 <field>
21557 <name>FB24</name>
21558 <description>Filter bits</description>
21559 <bitOffset>24</bitOffset>
21560 <bitWidth>1</bitWidth>
21561 </field>
21562 <field>
21563 <name>FB25</name>
21564 <description>Filter bits</description>
21565 <bitOffset>25</bitOffset>
21566 <bitWidth>1</bitWidth>
21567 </field>
21568 <field>
21569 <name>FB26</name>
21570 <description>Filter bits</description>
21571 <bitOffset>26</bitOffset>
21572 <bitWidth>1</bitWidth>
21573 </field>
21574 <field>
21575 <name>FB27</name>
21576 <description>Filter bits</description>
21577 <bitOffset>27</bitOffset>
21578 <bitWidth>1</bitWidth>
21579 </field>
21580 <field>
21581 <name>FB28</name>
21582 <description>Filter bits</description>
21583 <bitOffset>28</bitOffset>
21584 <bitWidth>1</bitWidth>
21585 </field>
21586 <field>
21587 <name>FB29</name>
21588 <description>Filter bits</description>
21589 <bitOffset>29</bitOffset>
21590 <bitWidth>1</bitWidth>
21591 </field>
21592 <field>
21593 <name>FB30</name>
21594 <description>Filter bits</description>
21595 <bitOffset>30</bitOffset>
21596 <bitWidth>1</bitWidth>
21597 </field>
21598 <field>
21599 <name>FB31</name>
21600 <description>Filter bits</description>
21601 <bitOffset>31</bitOffset>
21602 <bitWidth>1</bitWidth>
21603 </field>
21604 </fields>
21605 </register>
21606 <register>
21607 <name>F16R1</name>
21608 <displayName>F16R1</displayName>
21609 <description>Filter bank 16 register 1</description>
21610 <addressOffset>0x2C0</addressOffset>
21611 <size>0x20</size>
21612 <access>read-write</access>
21613 <resetValue>0x00000000</resetValue>
21614 <fields>
21615 <field>
21616 <name>FB0</name>
21617 <description>Filter bits</description>
21618 <bitOffset>0</bitOffset>
21619 <bitWidth>1</bitWidth>
21620 </field>
21621 <field>
21622 <name>FB1</name>
21623 <description>Filter bits</description>
21624 <bitOffset>1</bitOffset>
21625 <bitWidth>1</bitWidth>
21626 </field>
21627 <field>
21628 <name>FB2</name>
21629 <description>Filter bits</description>
21630 <bitOffset>2</bitOffset>
21631 <bitWidth>1</bitWidth>
21632 </field>
21633 <field>
21634 <name>FB3</name>
21635 <description>Filter bits</description>
21636 <bitOffset>3</bitOffset>
21637 <bitWidth>1</bitWidth>
21638 </field>
21639 <field>
21640 <name>FB4</name>
21641 <description>Filter bits</description>
21642 <bitOffset>4</bitOffset>
21643 <bitWidth>1</bitWidth>
21644 </field>
21645 <field>
21646 <name>FB5</name>
21647 <description>Filter bits</description>
21648 <bitOffset>5</bitOffset>
21649 <bitWidth>1</bitWidth>
21650 </field>
21651 <field>
21652 <name>FB6</name>
21653 <description>Filter bits</description>
21654 <bitOffset>6</bitOffset>
21655 <bitWidth>1</bitWidth>
21656 </field>
21657 <field>
21658 <name>FB7</name>
21659 <description>Filter bits</description>
21660 <bitOffset>7</bitOffset>
21661 <bitWidth>1</bitWidth>
21662 </field>
21663 <field>
21664 <name>FB8</name>
21665 <description>Filter bits</description>
21666 <bitOffset>8</bitOffset>
21667 <bitWidth>1</bitWidth>
21668 </field>
21669 <field>
21670 <name>FB9</name>
21671 <description>Filter bits</description>
21672 <bitOffset>9</bitOffset>
21673 <bitWidth>1</bitWidth>
21674 </field>
21675 <field>
21676 <name>FB10</name>
21677 <description>Filter bits</description>
21678 <bitOffset>10</bitOffset>
21679 <bitWidth>1</bitWidth>
21680 </field>
21681 <field>
21682 <name>FB11</name>
21683 <description>Filter bits</description>
21684 <bitOffset>11</bitOffset>
21685 <bitWidth>1</bitWidth>
21686 </field>
21687 <field>
21688 <name>FB12</name>
21689 <description>Filter bits</description>
21690 <bitOffset>12</bitOffset>
21691 <bitWidth>1</bitWidth>
21692 </field>
21693 <field>
21694 <name>FB13</name>
21695 <description>Filter bits</description>
21696 <bitOffset>13</bitOffset>
21697 <bitWidth>1</bitWidth>
21698 </field>
21699 <field>
21700 <name>FB14</name>
21701 <description>Filter bits</description>
21702 <bitOffset>14</bitOffset>
21703 <bitWidth>1</bitWidth>
21704 </field>
21705 <field>
21706 <name>FB15</name>
21707 <description>Filter bits</description>
21708 <bitOffset>15</bitOffset>
21709 <bitWidth>1</bitWidth>
21710 </field>
21711 <field>
21712 <name>FB16</name>
21713 <description>Filter bits</description>
21714 <bitOffset>16</bitOffset>
21715 <bitWidth>1</bitWidth>
21716 </field>
21717 <field>
21718 <name>FB17</name>
21719 <description>Filter bits</description>
21720 <bitOffset>17</bitOffset>
21721 <bitWidth>1</bitWidth>
21722 </field>
21723 <field>
21724 <name>FB18</name>
21725 <description>Filter bits</description>
21726 <bitOffset>18</bitOffset>
21727 <bitWidth>1</bitWidth>
21728 </field>
21729 <field>
21730 <name>FB19</name>
21731 <description>Filter bits</description>
21732 <bitOffset>19</bitOffset>
21733 <bitWidth>1</bitWidth>
21734 </field>
21735 <field>
21736 <name>FB20</name>
21737 <description>Filter bits</description>
21738 <bitOffset>20</bitOffset>
21739 <bitWidth>1</bitWidth>
21740 </field>
21741 <field>
21742 <name>FB21</name>
21743 <description>Filter bits</description>
21744 <bitOffset>21</bitOffset>
21745 <bitWidth>1</bitWidth>
21746 </field>
21747 <field>
21748 <name>FB22</name>
21749 <description>Filter bits</description>
21750 <bitOffset>22</bitOffset>
21751 <bitWidth>1</bitWidth>
21752 </field>
21753 <field>
21754 <name>FB23</name>
21755 <description>Filter bits</description>
21756 <bitOffset>23</bitOffset>
21757 <bitWidth>1</bitWidth>
21758 </field>
21759 <field>
21760 <name>FB24</name>
21761 <description>Filter bits</description>
21762 <bitOffset>24</bitOffset>
21763 <bitWidth>1</bitWidth>
21764 </field>
21765 <field>
21766 <name>FB25</name>
21767 <description>Filter bits</description>
21768 <bitOffset>25</bitOffset>
21769 <bitWidth>1</bitWidth>
21770 </field>
21771 <field>
21772 <name>FB26</name>
21773 <description>Filter bits</description>
21774 <bitOffset>26</bitOffset>
21775 <bitWidth>1</bitWidth>
21776 </field>
21777 <field>
21778 <name>FB27</name>
21779 <description>Filter bits</description>
21780 <bitOffset>27</bitOffset>
21781 <bitWidth>1</bitWidth>
21782 </field>
21783 <field>
21784 <name>FB28</name>
21785 <description>Filter bits</description>
21786 <bitOffset>28</bitOffset>
21787 <bitWidth>1</bitWidth>
21788 </field>
21789 <field>
21790 <name>FB29</name>
21791 <description>Filter bits</description>
21792 <bitOffset>29</bitOffset>
21793 <bitWidth>1</bitWidth>
21794 </field>
21795 <field>
21796 <name>FB30</name>
21797 <description>Filter bits</description>
21798 <bitOffset>30</bitOffset>
21799 <bitWidth>1</bitWidth>
21800 </field>
21801 <field>
21802 <name>FB31</name>
21803 <description>Filter bits</description>
21804 <bitOffset>31</bitOffset>
21805 <bitWidth>1</bitWidth>
21806 </field>
21807 </fields>
21808 </register>
21809 <register>
21810 <name>F16R2</name>
21811 <displayName>F16R2</displayName>
21812 <description>Filter bank 16 register 2</description>
21813 <addressOffset>0x2C4</addressOffset>
21814 <size>0x20</size>
21815 <access>read-write</access>
21816 <resetValue>0x00000000</resetValue>
21817 <fields>
21818 <field>
21819 <name>FB0</name>
21820 <description>Filter bits</description>
21821 <bitOffset>0</bitOffset>
21822 <bitWidth>1</bitWidth>
21823 </field>
21824 <field>
21825 <name>FB1</name>
21826 <description>Filter bits</description>
21827 <bitOffset>1</bitOffset>
21828 <bitWidth>1</bitWidth>
21829 </field>
21830 <field>
21831 <name>FB2</name>
21832 <description>Filter bits</description>
21833 <bitOffset>2</bitOffset>
21834 <bitWidth>1</bitWidth>
21835 </field>
21836 <field>
21837 <name>FB3</name>
21838 <description>Filter bits</description>
21839 <bitOffset>3</bitOffset>
21840 <bitWidth>1</bitWidth>
21841 </field>
21842 <field>
21843 <name>FB4</name>
21844 <description>Filter bits</description>
21845 <bitOffset>4</bitOffset>
21846 <bitWidth>1</bitWidth>
21847 </field>
21848 <field>
21849 <name>FB5</name>
21850 <description>Filter bits</description>
21851 <bitOffset>5</bitOffset>
21852 <bitWidth>1</bitWidth>
21853 </field>
21854 <field>
21855 <name>FB6</name>
21856 <description>Filter bits</description>
21857 <bitOffset>6</bitOffset>
21858 <bitWidth>1</bitWidth>
21859 </field>
21860 <field>
21861 <name>FB7</name>
21862 <description>Filter bits</description>
21863 <bitOffset>7</bitOffset>
21864 <bitWidth>1</bitWidth>
21865 </field>
21866 <field>
21867 <name>FB8</name>
21868 <description>Filter bits</description>
21869 <bitOffset>8</bitOffset>
21870 <bitWidth>1</bitWidth>
21871 </field>
21872 <field>
21873 <name>FB9</name>
21874 <description>Filter bits</description>
21875 <bitOffset>9</bitOffset>
21876 <bitWidth>1</bitWidth>
21877 </field>
21878 <field>
21879 <name>FB10</name>
21880 <description>Filter bits</description>
21881 <bitOffset>10</bitOffset>
21882 <bitWidth>1</bitWidth>
21883 </field>
21884 <field>
21885 <name>FB11</name>
21886 <description>Filter bits</description>
21887 <bitOffset>11</bitOffset>
21888 <bitWidth>1</bitWidth>
21889 </field>
21890 <field>
21891 <name>FB12</name>
21892 <description>Filter bits</description>
21893 <bitOffset>12</bitOffset>
21894 <bitWidth>1</bitWidth>
21895 </field>
21896 <field>
21897 <name>FB13</name>
21898 <description>Filter bits</description>
21899 <bitOffset>13</bitOffset>
21900 <bitWidth>1</bitWidth>
21901 </field>
21902 <field>
21903 <name>FB14</name>
21904 <description>Filter bits</description>
21905 <bitOffset>14</bitOffset>
21906 <bitWidth>1</bitWidth>
21907 </field>
21908 <field>
21909 <name>FB15</name>
21910 <description>Filter bits</description>
21911 <bitOffset>15</bitOffset>
21912 <bitWidth>1</bitWidth>
21913 </field>
21914 <field>
21915 <name>FB16</name>
21916 <description>Filter bits</description>
21917 <bitOffset>16</bitOffset>
21918 <bitWidth>1</bitWidth>
21919 </field>
21920 <field>
21921 <name>FB17</name>
21922 <description>Filter bits</description>
21923 <bitOffset>17</bitOffset>
21924 <bitWidth>1</bitWidth>
21925 </field>
21926 <field>
21927 <name>FB18</name>
21928 <description>Filter bits</description>
21929 <bitOffset>18</bitOffset>
21930 <bitWidth>1</bitWidth>
21931 </field>
21932 <field>
21933 <name>FB19</name>
21934 <description>Filter bits</description>
21935 <bitOffset>19</bitOffset>
21936 <bitWidth>1</bitWidth>
21937 </field>
21938 <field>
21939 <name>FB20</name>
21940 <description>Filter bits</description>
21941 <bitOffset>20</bitOffset>
21942 <bitWidth>1</bitWidth>
21943 </field>
21944 <field>
21945 <name>FB21</name>
21946 <description>Filter bits</description>
21947 <bitOffset>21</bitOffset>
21948 <bitWidth>1</bitWidth>
21949 </field>
21950 <field>
21951 <name>FB22</name>
21952 <description>Filter bits</description>
21953 <bitOffset>22</bitOffset>
21954 <bitWidth>1</bitWidth>
21955 </field>
21956 <field>
21957 <name>FB23</name>
21958 <description>Filter bits</description>
21959 <bitOffset>23</bitOffset>
21960 <bitWidth>1</bitWidth>
21961 </field>
21962 <field>
21963 <name>FB24</name>
21964 <description>Filter bits</description>
21965 <bitOffset>24</bitOffset>
21966 <bitWidth>1</bitWidth>
21967 </field>
21968 <field>
21969 <name>FB25</name>
21970 <description>Filter bits</description>
21971 <bitOffset>25</bitOffset>
21972 <bitWidth>1</bitWidth>
21973 </field>
21974 <field>
21975 <name>FB26</name>
21976 <description>Filter bits</description>
21977 <bitOffset>26</bitOffset>
21978 <bitWidth>1</bitWidth>
21979 </field>
21980 <field>
21981 <name>FB27</name>
21982 <description>Filter bits</description>
21983 <bitOffset>27</bitOffset>
21984 <bitWidth>1</bitWidth>
21985 </field>
21986 <field>
21987 <name>FB28</name>
21988 <description>Filter bits</description>
21989 <bitOffset>28</bitOffset>
21990 <bitWidth>1</bitWidth>
21991 </field>
21992 <field>
21993 <name>FB29</name>
21994 <description>Filter bits</description>
21995 <bitOffset>29</bitOffset>
21996 <bitWidth>1</bitWidth>
21997 </field>
21998 <field>
21999 <name>FB30</name>
22000 <description>Filter bits</description>
22001 <bitOffset>30</bitOffset>
22002 <bitWidth>1</bitWidth>
22003 </field>
22004 <field>
22005 <name>FB31</name>
22006 <description>Filter bits</description>
22007 <bitOffset>31</bitOffset>
22008 <bitWidth>1</bitWidth>
22009 </field>
22010 </fields>
22011 </register>
22012 <register>
22013 <name>F17R1</name>
22014 <displayName>F17R1</displayName>
22015 <description>Filter bank 17 register 1</description>
22016 <addressOffset>0x2C8</addressOffset>
22017 <size>0x20</size>
22018 <access>read-write</access>
22019 <resetValue>0x00000000</resetValue>
22020 <fields>
22021 <field>
22022 <name>FB0</name>
22023 <description>Filter bits</description>
22024 <bitOffset>0</bitOffset>
22025 <bitWidth>1</bitWidth>
22026 </field>
22027 <field>
22028 <name>FB1</name>
22029 <description>Filter bits</description>
22030 <bitOffset>1</bitOffset>
22031 <bitWidth>1</bitWidth>
22032 </field>
22033 <field>
22034 <name>FB2</name>
22035 <description>Filter bits</description>
22036 <bitOffset>2</bitOffset>
22037 <bitWidth>1</bitWidth>
22038 </field>
22039 <field>
22040 <name>FB3</name>
22041 <description>Filter bits</description>
22042 <bitOffset>3</bitOffset>
22043 <bitWidth>1</bitWidth>
22044 </field>
22045 <field>
22046 <name>FB4</name>
22047 <description>Filter bits</description>
22048 <bitOffset>4</bitOffset>
22049 <bitWidth>1</bitWidth>
22050 </field>
22051 <field>
22052 <name>FB5</name>
22053 <description>Filter bits</description>
22054 <bitOffset>5</bitOffset>
22055 <bitWidth>1</bitWidth>
22056 </field>
22057 <field>
22058 <name>FB6</name>
22059 <description>Filter bits</description>
22060 <bitOffset>6</bitOffset>
22061 <bitWidth>1</bitWidth>
22062 </field>
22063 <field>
22064 <name>FB7</name>
22065 <description>Filter bits</description>
22066 <bitOffset>7</bitOffset>
22067 <bitWidth>1</bitWidth>
22068 </field>
22069 <field>
22070 <name>FB8</name>
22071 <description>Filter bits</description>
22072 <bitOffset>8</bitOffset>
22073 <bitWidth>1</bitWidth>
22074 </field>
22075 <field>
22076 <name>FB9</name>
22077 <description>Filter bits</description>
22078 <bitOffset>9</bitOffset>
22079 <bitWidth>1</bitWidth>
22080 </field>
22081 <field>
22082 <name>FB10</name>
22083 <description>Filter bits</description>
22084 <bitOffset>10</bitOffset>
22085 <bitWidth>1</bitWidth>
22086 </field>
22087 <field>
22088 <name>FB11</name>
22089 <description>Filter bits</description>
22090 <bitOffset>11</bitOffset>
22091 <bitWidth>1</bitWidth>
22092 </field>
22093 <field>
22094 <name>FB12</name>
22095 <description>Filter bits</description>
22096 <bitOffset>12</bitOffset>
22097 <bitWidth>1</bitWidth>
22098 </field>
22099 <field>
22100 <name>FB13</name>
22101 <description>Filter bits</description>
22102 <bitOffset>13</bitOffset>
22103 <bitWidth>1</bitWidth>
22104 </field>
22105 <field>
22106 <name>FB14</name>
22107 <description>Filter bits</description>
22108 <bitOffset>14</bitOffset>
22109 <bitWidth>1</bitWidth>
22110 </field>
22111 <field>
22112 <name>FB15</name>
22113 <description>Filter bits</description>
22114 <bitOffset>15</bitOffset>
22115 <bitWidth>1</bitWidth>
22116 </field>
22117 <field>
22118 <name>FB16</name>
22119 <description>Filter bits</description>
22120 <bitOffset>16</bitOffset>
22121 <bitWidth>1</bitWidth>
22122 </field>
22123 <field>
22124 <name>FB17</name>
22125 <description>Filter bits</description>
22126 <bitOffset>17</bitOffset>
22127 <bitWidth>1</bitWidth>
22128 </field>
22129 <field>
22130 <name>FB18</name>
22131 <description>Filter bits</description>
22132 <bitOffset>18</bitOffset>
22133 <bitWidth>1</bitWidth>
22134 </field>
22135 <field>
22136 <name>FB19</name>
22137 <description>Filter bits</description>
22138 <bitOffset>19</bitOffset>
22139 <bitWidth>1</bitWidth>
22140 </field>
22141 <field>
22142 <name>FB20</name>
22143 <description>Filter bits</description>
22144 <bitOffset>20</bitOffset>
22145 <bitWidth>1</bitWidth>
22146 </field>
22147 <field>
22148 <name>FB21</name>
22149 <description>Filter bits</description>
22150 <bitOffset>21</bitOffset>
22151 <bitWidth>1</bitWidth>
22152 </field>
22153 <field>
22154 <name>FB22</name>
22155 <description>Filter bits</description>
22156 <bitOffset>22</bitOffset>
22157 <bitWidth>1</bitWidth>
22158 </field>
22159 <field>
22160 <name>FB23</name>
22161 <description>Filter bits</description>
22162 <bitOffset>23</bitOffset>
22163 <bitWidth>1</bitWidth>
22164 </field>
22165 <field>
22166 <name>FB24</name>
22167 <description>Filter bits</description>
22168 <bitOffset>24</bitOffset>
22169 <bitWidth>1</bitWidth>
22170 </field>
22171 <field>
22172 <name>FB25</name>
22173 <description>Filter bits</description>
22174 <bitOffset>25</bitOffset>
22175 <bitWidth>1</bitWidth>
22176 </field>
22177 <field>
22178 <name>FB26</name>
22179 <description>Filter bits</description>
22180 <bitOffset>26</bitOffset>
22181 <bitWidth>1</bitWidth>
22182 </field>
22183 <field>
22184 <name>FB27</name>
22185 <description>Filter bits</description>
22186 <bitOffset>27</bitOffset>
22187 <bitWidth>1</bitWidth>
22188 </field>
22189 <field>
22190 <name>FB28</name>
22191 <description>Filter bits</description>
22192 <bitOffset>28</bitOffset>
22193 <bitWidth>1</bitWidth>
22194 </field>
22195 <field>
22196 <name>FB29</name>
22197 <description>Filter bits</description>
22198 <bitOffset>29</bitOffset>
22199 <bitWidth>1</bitWidth>
22200 </field>
22201 <field>
22202 <name>FB30</name>
22203 <description>Filter bits</description>
22204 <bitOffset>30</bitOffset>
22205 <bitWidth>1</bitWidth>
22206 </field>
22207 <field>
22208 <name>FB31</name>
22209 <description>Filter bits</description>
22210 <bitOffset>31</bitOffset>
22211 <bitWidth>1</bitWidth>
22212 </field>
22213 </fields>
22214 </register>
22215 <register>
22216 <name>F17R2</name>
22217 <displayName>F17R2</displayName>
22218 <description>Filter bank 17 register 2</description>
22219 <addressOffset>0x2CC</addressOffset>
22220 <size>0x20</size>
22221 <access>read-write</access>
22222 <resetValue>0x00000000</resetValue>
22223 <fields>
22224 <field>
22225 <name>FB0</name>
22226 <description>Filter bits</description>
22227 <bitOffset>0</bitOffset>
22228 <bitWidth>1</bitWidth>
22229 </field>
22230 <field>
22231 <name>FB1</name>
22232 <description>Filter bits</description>
22233 <bitOffset>1</bitOffset>
22234 <bitWidth>1</bitWidth>
22235 </field>
22236 <field>
22237 <name>FB2</name>
22238 <description>Filter bits</description>
22239 <bitOffset>2</bitOffset>
22240 <bitWidth>1</bitWidth>
22241 </field>
22242 <field>
22243 <name>FB3</name>
22244 <description>Filter bits</description>
22245 <bitOffset>3</bitOffset>
22246 <bitWidth>1</bitWidth>
22247 </field>
22248 <field>
22249 <name>FB4</name>
22250 <description>Filter bits</description>
22251 <bitOffset>4</bitOffset>
22252 <bitWidth>1</bitWidth>
22253 </field>
22254 <field>
22255 <name>FB5</name>
22256 <description>Filter bits</description>
22257 <bitOffset>5</bitOffset>
22258 <bitWidth>1</bitWidth>
22259 </field>
22260 <field>
22261 <name>FB6</name>
22262 <description>Filter bits</description>
22263 <bitOffset>6</bitOffset>
22264 <bitWidth>1</bitWidth>
22265 </field>
22266 <field>
22267 <name>FB7</name>
22268 <description>Filter bits</description>
22269 <bitOffset>7</bitOffset>
22270 <bitWidth>1</bitWidth>
22271 </field>
22272 <field>
22273 <name>FB8</name>
22274 <description>Filter bits</description>
22275 <bitOffset>8</bitOffset>
22276 <bitWidth>1</bitWidth>
22277 </field>
22278 <field>
22279 <name>FB9</name>
22280 <description>Filter bits</description>
22281 <bitOffset>9</bitOffset>
22282 <bitWidth>1</bitWidth>
22283 </field>
22284 <field>
22285 <name>FB10</name>
22286 <description>Filter bits</description>
22287 <bitOffset>10</bitOffset>
22288 <bitWidth>1</bitWidth>
22289 </field>
22290 <field>
22291 <name>FB11</name>
22292 <description>Filter bits</description>
22293 <bitOffset>11</bitOffset>
22294 <bitWidth>1</bitWidth>
22295 </field>
22296 <field>
22297 <name>FB12</name>
22298 <description>Filter bits</description>
22299 <bitOffset>12</bitOffset>
22300 <bitWidth>1</bitWidth>
22301 </field>
22302 <field>
22303 <name>FB13</name>
22304 <description>Filter bits</description>
22305 <bitOffset>13</bitOffset>
22306 <bitWidth>1</bitWidth>
22307 </field>
22308 <field>
22309 <name>FB14</name>
22310 <description>Filter bits</description>
22311 <bitOffset>14</bitOffset>
22312 <bitWidth>1</bitWidth>
22313 </field>
22314 <field>
22315 <name>FB15</name>
22316 <description>Filter bits</description>
22317 <bitOffset>15</bitOffset>
22318 <bitWidth>1</bitWidth>
22319 </field>
22320 <field>
22321 <name>FB16</name>
22322 <description>Filter bits</description>
22323 <bitOffset>16</bitOffset>
22324 <bitWidth>1</bitWidth>
22325 </field>
22326 <field>
22327 <name>FB17</name>
22328 <description>Filter bits</description>
22329 <bitOffset>17</bitOffset>
22330 <bitWidth>1</bitWidth>
22331 </field>
22332 <field>
22333 <name>FB18</name>
22334 <description>Filter bits</description>
22335 <bitOffset>18</bitOffset>
22336 <bitWidth>1</bitWidth>
22337 </field>
22338 <field>
22339 <name>FB19</name>
22340 <description>Filter bits</description>
22341 <bitOffset>19</bitOffset>
22342 <bitWidth>1</bitWidth>
22343 </field>
22344 <field>
22345 <name>FB20</name>
22346 <description>Filter bits</description>
22347 <bitOffset>20</bitOffset>
22348 <bitWidth>1</bitWidth>
22349 </field>
22350 <field>
22351 <name>FB21</name>
22352 <description>Filter bits</description>
22353 <bitOffset>21</bitOffset>
22354 <bitWidth>1</bitWidth>
22355 </field>
22356 <field>
22357 <name>FB22</name>
22358 <description>Filter bits</description>
22359 <bitOffset>22</bitOffset>
22360 <bitWidth>1</bitWidth>
22361 </field>
22362 <field>
22363 <name>FB23</name>
22364 <description>Filter bits</description>
22365 <bitOffset>23</bitOffset>
22366 <bitWidth>1</bitWidth>
22367 </field>
22368 <field>
22369 <name>FB24</name>
22370 <description>Filter bits</description>
22371 <bitOffset>24</bitOffset>
22372 <bitWidth>1</bitWidth>
22373 </field>
22374 <field>
22375 <name>FB25</name>
22376 <description>Filter bits</description>
22377 <bitOffset>25</bitOffset>
22378 <bitWidth>1</bitWidth>
22379 </field>
22380 <field>
22381 <name>FB26</name>
22382 <description>Filter bits</description>
22383 <bitOffset>26</bitOffset>
22384 <bitWidth>1</bitWidth>
22385 </field>
22386 <field>
22387 <name>FB27</name>
22388 <description>Filter bits</description>
22389 <bitOffset>27</bitOffset>
22390 <bitWidth>1</bitWidth>
22391 </field>
22392 <field>
22393 <name>FB28</name>
22394 <description>Filter bits</description>
22395 <bitOffset>28</bitOffset>
22396 <bitWidth>1</bitWidth>
22397 </field>
22398 <field>
22399 <name>FB29</name>
22400 <description>Filter bits</description>
22401 <bitOffset>29</bitOffset>
22402 <bitWidth>1</bitWidth>
22403 </field>
22404 <field>
22405 <name>FB30</name>
22406 <description>Filter bits</description>
22407 <bitOffset>30</bitOffset>
22408 <bitWidth>1</bitWidth>
22409 </field>
22410 <field>
22411 <name>FB31</name>
22412 <description>Filter bits</description>
22413 <bitOffset>31</bitOffset>
22414 <bitWidth>1</bitWidth>
22415 </field>
22416 </fields>
22417 </register>
22418 <register>
22419 <name>F18R1</name>
22420 <displayName>F18R1</displayName>
22421 <description>Filter bank 18 register 1</description>
22422 <addressOffset>0x2D0</addressOffset>
22423 <size>0x20</size>
22424 <access>read-write</access>
22425 <resetValue>0x00000000</resetValue>
22426 <fields>
22427 <field>
22428 <name>FB0</name>
22429 <description>Filter bits</description>
22430 <bitOffset>0</bitOffset>
22431 <bitWidth>1</bitWidth>
22432 </field>
22433 <field>
22434 <name>FB1</name>
22435 <description>Filter bits</description>
22436 <bitOffset>1</bitOffset>
22437 <bitWidth>1</bitWidth>
22438 </field>
22439 <field>
22440 <name>FB2</name>
22441 <description>Filter bits</description>
22442 <bitOffset>2</bitOffset>
22443 <bitWidth>1</bitWidth>
22444 </field>
22445 <field>
22446 <name>FB3</name>
22447 <description>Filter bits</description>
22448 <bitOffset>3</bitOffset>
22449 <bitWidth>1</bitWidth>
22450 </field>
22451 <field>
22452 <name>FB4</name>
22453 <description>Filter bits</description>
22454 <bitOffset>4</bitOffset>
22455 <bitWidth>1</bitWidth>
22456 </field>
22457 <field>
22458 <name>FB5</name>
22459 <description>Filter bits</description>
22460 <bitOffset>5</bitOffset>
22461 <bitWidth>1</bitWidth>
22462 </field>
22463 <field>
22464 <name>FB6</name>
22465 <description>Filter bits</description>
22466 <bitOffset>6</bitOffset>
22467 <bitWidth>1</bitWidth>
22468 </field>
22469 <field>
22470 <name>FB7</name>
22471 <description>Filter bits</description>
22472 <bitOffset>7</bitOffset>
22473 <bitWidth>1</bitWidth>
22474 </field>
22475 <field>
22476 <name>FB8</name>
22477 <description>Filter bits</description>
22478 <bitOffset>8</bitOffset>
22479 <bitWidth>1</bitWidth>
22480 </field>
22481 <field>
22482 <name>FB9</name>
22483 <description>Filter bits</description>
22484 <bitOffset>9</bitOffset>
22485 <bitWidth>1</bitWidth>
22486 </field>
22487 <field>
22488 <name>FB10</name>
22489 <description>Filter bits</description>
22490 <bitOffset>10</bitOffset>
22491 <bitWidth>1</bitWidth>
22492 </field>
22493 <field>
22494 <name>FB11</name>
22495 <description>Filter bits</description>
22496 <bitOffset>11</bitOffset>
22497 <bitWidth>1</bitWidth>
22498 </field>
22499 <field>
22500 <name>FB12</name>
22501 <description>Filter bits</description>
22502 <bitOffset>12</bitOffset>
22503 <bitWidth>1</bitWidth>
22504 </field>
22505 <field>
22506 <name>FB13</name>
22507 <description>Filter bits</description>
22508 <bitOffset>13</bitOffset>
22509 <bitWidth>1</bitWidth>
22510 </field>
22511 <field>
22512 <name>FB14</name>
22513 <description>Filter bits</description>
22514 <bitOffset>14</bitOffset>
22515 <bitWidth>1</bitWidth>
22516 </field>
22517 <field>
22518 <name>FB15</name>
22519 <description>Filter bits</description>
22520 <bitOffset>15</bitOffset>
22521 <bitWidth>1</bitWidth>
22522 </field>
22523 <field>
22524 <name>FB16</name>
22525 <description>Filter bits</description>
22526 <bitOffset>16</bitOffset>
22527 <bitWidth>1</bitWidth>
22528 </field>
22529 <field>
22530 <name>FB17</name>
22531 <description>Filter bits</description>
22532 <bitOffset>17</bitOffset>
22533 <bitWidth>1</bitWidth>
22534 </field>
22535 <field>
22536 <name>FB18</name>
22537 <description>Filter bits</description>
22538 <bitOffset>18</bitOffset>
22539 <bitWidth>1</bitWidth>
22540 </field>
22541 <field>
22542 <name>FB19</name>
22543 <description>Filter bits</description>
22544 <bitOffset>19</bitOffset>
22545 <bitWidth>1</bitWidth>
22546 </field>
22547 <field>
22548 <name>FB20</name>
22549 <description>Filter bits</description>
22550 <bitOffset>20</bitOffset>
22551 <bitWidth>1</bitWidth>
22552 </field>
22553 <field>
22554 <name>FB21</name>
22555 <description>Filter bits</description>
22556 <bitOffset>21</bitOffset>
22557 <bitWidth>1</bitWidth>
22558 </field>
22559 <field>
22560 <name>FB22</name>
22561 <description>Filter bits</description>
22562 <bitOffset>22</bitOffset>
22563 <bitWidth>1</bitWidth>
22564 </field>
22565 <field>
22566 <name>FB23</name>
22567 <description>Filter bits</description>
22568 <bitOffset>23</bitOffset>
22569 <bitWidth>1</bitWidth>
22570 </field>
22571 <field>
22572 <name>FB24</name>
22573 <description>Filter bits</description>
22574 <bitOffset>24</bitOffset>
22575 <bitWidth>1</bitWidth>
22576 </field>
22577 <field>
22578 <name>FB25</name>
22579 <description>Filter bits</description>
22580 <bitOffset>25</bitOffset>
22581 <bitWidth>1</bitWidth>
22582 </field>
22583 <field>
22584 <name>FB26</name>
22585 <description>Filter bits</description>
22586 <bitOffset>26</bitOffset>
22587 <bitWidth>1</bitWidth>
22588 </field>
22589 <field>
22590 <name>FB27</name>
22591 <description>Filter bits</description>
22592 <bitOffset>27</bitOffset>
22593 <bitWidth>1</bitWidth>
22594 </field>
22595 <field>
22596 <name>FB28</name>
22597 <description>Filter bits</description>
22598 <bitOffset>28</bitOffset>
22599 <bitWidth>1</bitWidth>
22600 </field>
22601 <field>
22602 <name>FB29</name>
22603 <description>Filter bits</description>
22604 <bitOffset>29</bitOffset>
22605 <bitWidth>1</bitWidth>
22606 </field>
22607 <field>
22608 <name>FB30</name>
22609 <description>Filter bits</description>
22610 <bitOffset>30</bitOffset>
22611 <bitWidth>1</bitWidth>
22612 </field>
22613 <field>
22614 <name>FB31</name>
22615 <description>Filter bits</description>
22616 <bitOffset>31</bitOffset>
22617 <bitWidth>1</bitWidth>
22618 </field>
22619 </fields>
22620 </register>
22621 <register>
22622 <name>F18R2</name>
22623 <displayName>F18R2</displayName>
22624 <description>Filter bank 18 register 2</description>
22625 <addressOffset>0x2D4</addressOffset>
22626 <size>0x20</size>
22627 <access>read-write</access>
22628 <resetValue>0x00000000</resetValue>
22629 <fields>
22630 <field>
22631 <name>FB0</name>
22632 <description>Filter bits</description>
22633 <bitOffset>0</bitOffset>
22634 <bitWidth>1</bitWidth>
22635 </field>
22636 <field>
22637 <name>FB1</name>
22638 <description>Filter bits</description>
22639 <bitOffset>1</bitOffset>
22640 <bitWidth>1</bitWidth>
22641 </field>
22642 <field>
22643 <name>FB2</name>
22644 <description>Filter bits</description>
22645 <bitOffset>2</bitOffset>
22646 <bitWidth>1</bitWidth>
22647 </field>
22648 <field>
22649 <name>FB3</name>
22650 <description>Filter bits</description>
22651 <bitOffset>3</bitOffset>
22652 <bitWidth>1</bitWidth>
22653 </field>
22654 <field>
22655 <name>FB4</name>
22656 <description>Filter bits</description>
22657 <bitOffset>4</bitOffset>
22658 <bitWidth>1</bitWidth>
22659 </field>
22660 <field>
22661 <name>FB5</name>
22662 <description>Filter bits</description>
22663 <bitOffset>5</bitOffset>
22664 <bitWidth>1</bitWidth>
22665 </field>
22666 <field>
22667 <name>FB6</name>
22668 <description>Filter bits</description>
22669 <bitOffset>6</bitOffset>
22670 <bitWidth>1</bitWidth>
22671 </field>
22672 <field>
22673 <name>FB7</name>
22674 <description>Filter bits</description>
22675 <bitOffset>7</bitOffset>
22676 <bitWidth>1</bitWidth>
22677 </field>
22678 <field>
22679 <name>FB8</name>
22680 <description>Filter bits</description>
22681 <bitOffset>8</bitOffset>
22682 <bitWidth>1</bitWidth>
22683 </field>
22684 <field>
22685 <name>FB9</name>
22686 <description>Filter bits</description>
22687 <bitOffset>9</bitOffset>
22688 <bitWidth>1</bitWidth>
22689 </field>
22690 <field>
22691 <name>FB10</name>
22692 <description>Filter bits</description>
22693 <bitOffset>10</bitOffset>
22694 <bitWidth>1</bitWidth>
22695 </field>
22696 <field>
22697 <name>FB11</name>
22698 <description>Filter bits</description>
22699 <bitOffset>11</bitOffset>
22700 <bitWidth>1</bitWidth>
22701 </field>
22702 <field>
22703 <name>FB12</name>
22704 <description>Filter bits</description>
22705 <bitOffset>12</bitOffset>
22706 <bitWidth>1</bitWidth>
22707 </field>
22708 <field>
22709 <name>FB13</name>
22710 <description>Filter bits</description>
22711 <bitOffset>13</bitOffset>
22712 <bitWidth>1</bitWidth>
22713 </field>
22714 <field>
22715 <name>FB14</name>
22716 <description>Filter bits</description>
22717 <bitOffset>14</bitOffset>
22718 <bitWidth>1</bitWidth>
22719 </field>
22720 <field>
22721 <name>FB15</name>
22722 <description>Filter bits</description>
22723 <bitOffset>15</bitOffset>
22724 <bitWidth>1</bitWidth>
22725 </field>
22726 <field>
22727 <name>FB16</name>
22728 <description>Filter bits</description>
22729 <bitOffset>16</bitOffset>
22730 <bitWidth>1</bitWidth>
22731 </field>
22732 <field>
22733 <name>FB17</name>
22734 <description>Filter bits</description>
22735 <bitOffset>17</bitOffset>
22736 <bitWidth>1</bitWidth>
22737 </field>
22738 <field>
22739 <name>FB18</name>
22740 <description>Filter bits</description>
22741 <bitOffset>18</bitOffset>
22742 <bitWidth>1</bitWidth>
22743 </field>
22744 <field>
22745 <name>FB19</name>
22746 <description>Filter bits</description>
22747 <bitOffset>19</bitOffset>
22748 <bitWidth>1</bitWidth>
22749 </field>
22750 <field>
22751 <name>FB20</name>
22752 <description>Filter bits</description>
22753 <bitOffset>20</bitOffset>
22754 <bitWidth>1</bitWidth>
22755 </field>
22756 <field>
22757 <name>FB21</name>
22758 <description>Filter bits</description>
22759 <bitOffset>21</bitOffset>
22760 <bitWidth>1</bitWidth>
22761 </field>
22762 <field>
22763 <name>FB22</name>
22764 <description>Filter bits</description>
22765 <bitOffset>22</bitOffset>
22766 <bitWidth>1</bitWidth>
22767 </field>
22768 <field>
22769 <name>FB23</name>
22770 <description>Filter bits</description>
22771 <bitOffset>23</bitOffset>
22772 <bitWidth>1</bitWidth>
22773 </field>
22774 <field>
22775 <name>FB24</name>
22776 <description>Filter bits</description>
22777 <bitOffset>24</bitOffset>
22778 <bitWidth>1</bitWidth>
22779 </field>
22780 <field>
22781 <name>FB25</name>
22782 <description>Filter bits</description>
22783 <bitOffset>25</bitOffset>
22784 <bitWidth>1</bitWidth>
22785 </field>
22786 <field>
22787 <name>FB26</name>
22788 <description>Filter bits</description>
22789 <bitOffset>26</bitOffset>
22790 <bitWidth>1</bitWidth>
22791 </field>
22792 <field>
22793 <name>FB27</name>
22794 <description>Filter bits</description>
22795 <bitOffset>27</bitOffset>
22796 <bitWidth>1</bitWidth>
22797 </field>
22798 <field>
22799 <name>FB28</name>
22800 <description>Filter bits</description>
22801 <bitOffset>28</bitOffset>
22802 <bitWidth>1</bitWidth>
22803 </field>
22804 <field>
22805 <name>FB29</name>
22806 <description>Filter bits</description>
22807 <bitOffset>29</bitOffset>
22808 <bitWidth>1</bitWidth>
22809 </field>
22810 <field>
22811 <name>FB30</name>
22812 <description>Filter bits</description>
22813 <bitOffset>30</bitOffset>
22814 <bitWidth>1</bitWidth>
22815 </field>
22816 <field>
22817 <name>FB31</name>
22818 <description>Filter bits</description>
22819 <bitOffset>31</bitOffset>
22820 <bitWidth>1</bitWidth>
22821 </field>
22822 </fields>
22823 </register>
22824 <register>
22825 <name>F19R1</name>
22826 <displayName>F19R1</displayName>
22827 <description>Filter bank 19 register 1</description>
22828 <addressOffset>0x2D8</addressOffset>
22829 <size>0x20</size>
22830 <access>read-write</access>
22831 <resetValue>0x00000000</resetValue>
22832 <fields>
22833 <field>
22834 <name>FB0</name>
22835 <description>Filter bits</description>
22836 <bitOffset>0</bitOffset>
22837 <bitWidth>1</bitWidth>
22838 </field>
22839 <field>
22840 <name>FB1</name>
22841 <description>Filter bits</description>
22842 <bitOffset>1</bitOffset>
22843 <bitWidth>1</bitWidth>
22844 </field>
22845 <field>
22846 <name>FB2</name>
22847 <description>Filter bits</description>
22848 <bitOffset>2</bitOffset>
22849 <bitWidth>1</bitWidth>
22850 </field>
22851 <field>
22852 <name>FB3</name>
22853 <description>Filter bits</description>
22854 <bitOffset>3</bitOffset>
22855 <bitWidth>1</bitWidth>
22856 </field>
22857 <field>
22858 <name>FB4</name>
22859 <description>Filter bits</description>
22860 <bitOffset>4</bitOffset>
22861 <bitWidth>1</bitWidth>
22862 </field>
22863 <field>
22864 <name>FB5</name>
22865 <description>Filter bits</description>
22866 <bitOffset>5</bitOffset>
22867 <bitWidth>1</bitWidth>
22868 </field>
22869 <field>
22870 <name>FB6</name>
22871 <description>Filter bits</description>
22872 <bitOffset>6</bitOffset>
22873 <bitWidth>1</bitWidth>
22874 </field>
22875 <field>
22876 <name>FB7</name>
22877 <description>Filter bits</description>
22878 <bitOffset>7</bitOffset>
22879 <bitWidth>1</bitWidth>
22880 </field>
22881 <field>
22882 <name>FB8</name>
22883 <description>Filter bits</description>
22884 <bitOffset>8</bitOffset>
22885 <bitWidth>1</bitWidth>
22886 </field>
22887 <field>
22888 <name>FB9</name>
22889 <description>Filter bits</description>
22890 <bitOffset>9</bitOffset>
22891 <bitWidth>1</bitWidth>
22892 </field>
22893 <field>
22894 <name>FB10</name>
22895 <description>Filter bits</description>
22896 <bitOffset>10</bitOffset>
22897 <bitWidth>1</bitWidth>
22898 </field>
22899 <field>
22900 <name>FB11</name>
22901 <description>Filter bits</description>
22902 <bitOffset>11</bitOffset>
22903 <bitWidth>1</bitWidth>
22904 </field>
22905 <field>
22906 <name>FB12</name>
22907 <description>Filter bits</description>
22908 <bitOffset>12</bitOffset>
22909 <bitWidth>1</bitWidth>
22910 </field>
22911 <field>
22912 <name>FB13</name>
22913 <description>Filter bits</description>
22914 <bitOffset>13</bitOffset>
22915 <bitWidth>1</bitWidth>
22916 </field>
22917 <field>
22918 <name>FB14</name>
22919 <description>Filter bits</description>
22920 <bitOffset>14</bitOffset>
22921 <bitWidth>1</bitWidth>
22922 </field>
22923 <field>
22924 <name>FB15</name>
22925 <description>Filter bits</description>
22926 <bitOffset>15</bitOffset>
22927 <bitWidth>1</bitWidth>
22928 </field>
22929 <field>
22930 <name>FB16</name>
22931 <description>Filter bits</description>
22932 <bitOffset>16</bitOffset>
22933 <bitWidth>1</bitWidth>
22934 </field>
22935 <field>
22936 <name>FB17</name>
22937 <description>Filter bits</description>
22938 <bitOffset>17</bitOffset>
22939 <bitWidth>1</bitWidth>
22940 </field>
22941 <field>
22942 <name>FB18</name>
22943 <description>Filter bits</description>
22944 <bitOffset>18</bitOffset>
22945 <bitWidth>1</bitWidth>
22946 </field>
22947 <field>
22948 <name>FB19</name>
22949 <description>Filter bits</description>
22950 <bitOffset>19</bitOffset>
22951 <bitWidth>1</bitWidth>
22952 </field>
22953 <field>
22954 <name>FB20</name>
22955 <description>Filter bits</description>
22956 <bitOffset>20</bitOffset>
22957 <bitWidth>1</bitWidth>
22958 </field>
22959 <field>
22960 <name>FB21</name>
22961 <description>Filter bits</description>
22962 <bitOffset>21</bitOffset>
22963 <bitWidth>1</bitWidth>
22964 </field>
22965 <field>
22966 <name>FB22</name>
22967 <description>Filter bits</description>
22968 <bitOffset>22</bitOffset>
22969 <bitWidth>1</bitWidth>
22970 </field>
22971 <field>
22972 <name>FB23</name>
22973 <description>Filter bits</description>
22974 <bitOffset>23</bitOffset>
22975 <bitWidth>1</bitWidth>
22976 </field>
22977 <field>
22978 <name>FB24</name>
22979 <description>Filter bits</description>
22980 <bitOffset>24</bitOffset>
22981 <bitWidth>1</bitWidth>
22982 </field>
22983 <field>
22984 <name>FB25</name>
22985 <description>Filter bits</description>
22986 <bitOffset>25</bitOffset>
22987 <bitWidth>1</bitWidth>
22988 </field>
22989 <field>
22990 <name>FB26</name>
22991 <description>Filter bits</description>
22992 <bitOffset>26</bitOffset>
22993 <bitWidth>1</bitWidth>
22994 </field>
22995 <field>
22996 <name>FB27</name>
22997 <description>Filter bits</description>
22998 <bitOffset>27</bitOffset>
22999 <bitWidth>1</bitWidth>
23000 </field>
23001 <field>
23002 <name>FB28</name>
23003 <description>Filter bits</description>
23004 <bitOffset>28</bitOffset>
23005 <bitWidth>1</bitWidth>
23006 </field>
23007 <field>
23008 <name>FB29</name>
23009 <description>Filter bits</description>
23010 <bitOffset>29</bitOffset>
23011 <bitWidth>1</bitWidth>
23012 </field>
23013 <field>
23014 <name>FB30</name>
23015 <description>Filter bits</description>
23016 <bitOffset>30</bitOffset>
23017 <bitWidth>1</bitWidth>
23018 </field>
23019 <field>
23020 <name>FB31</name>
23021 <description>Filter bits</description>
23022 <bitOffset>31</bitOffset>
23023 <bitWidth>1</bitWidth>
23024 </field>
23025 </fields>
23026 </register>
23027 <register>
23028 <name>F19R2</name>
23029 <displayName>F19R2</displayName>
23030 <description>Filter bank 19 register 2</description>
23031 <addressOffset>0x2DC</addressOffset>
23032 <size>0x20</size>
23033 <access>read-write</access>
23034 <resetValue>0x00000000</resetValue>
23035 <fields>
23036 <field>
23037 <name>FB0</name>
23038 <description>Filter bits</description>
23039 <bitOffset>0</bitOffset>
23040 <bitWidth>1</bitWidth>
23041 </field>
23042 <field>
23043 <name>FB1</name>
23044 <description>Filter bits</description>
23045 <bitOffset>1</bitOffset>
23046 <bitWidth>1</bitWidth>
23047 </field>
23048 <field>
23049 <name>FB2</name>
23050 <description>Filter bits</description>
23051 <bitOffset>2</bitOffset>
23052 <bitWidth>1</bitWidth>
23053 </field>
23054 <field>
23055 <name>FB3</name>
23056 <description>Filter bits</description>
23057 <bitOffset>3</bitOffset>
23058 <bitWidth>1</bitWidth>
23059 </field>
23060 <field>
23061 <name>FB4</name>
23062 <description>Filter bits</description>
23063 <bitOffset>4</bitOffset>
23064 <bitWidth>1</bitWidth>
23065 </field>
23066 <field>
23067 <name>FB5</name>
23068 <description>Filter bits</description>
23069 <bitOffset>5</bitOffset>
23070 <bitWidth>1</bitWidth>
23071 </field>
23072 <field>
23073 <name>FB6</name>
23074 <description>Filter bits</description>
23075 <bitOffset>6</bitOffset>
23076 <bitWidth>1</bitWidth>
23077 </field>
23078 <field>
23079 <name>FB7</name>
23080 <description>Filter bits</description>
23081 <bitOffset>7</bitOffset>
23082 <bitWidth>1</bitWidth>
23083 </field>
23084 <field>
23085 <name>FB8</name>
23086 <description>Filter bits</description>
23087 <bitOffset>8</bitOffset>
23088 <bitWidth>1</bitWidth>
23089 </field>
23090 <field>
23091 <name>FB9</name>
23092 <description>Filter bits</description>
23093 <bitOffset>9</bitOffset>
23094 <bitWidth>1</bitWidth>
23095 </field>
23096 <field>
23097 <name>FB10</name>
23098 <description>Filter bits</description>
23099 <bitOffset>10</bitOffset>
23100 <bitWidth>1</bitWidth>
23101 </field>
23102 <field>
23103 <name>FB11</name>
23104 <description>Filter bits</description>
23105 <bitOffset>11</bitOffset>
23106 <bitWidth>1</bitWidth>
23107 </field>
23108 <field>
23109 <name>FB12</name>
23110 <description>Filter bits</description>
23111 <bitOffset>12</bitOffset>
23112 <bitWidth>1</bitWidth>
23113 </field>
23114 <field>
23115 <name>FB13</name>
23116 <description>Filter bits</description>
23117 <bitOffset>13</bitOffset>
23118 <bitWidth>1</bitWidth>
23119 </field>
23120 <field>
23121 <name>FB14</name>
23122 <description>Filter bits</description>
23123 <bitOffset>14</bitOffset>
23124 <bitWidth>1</bitWidth>
23125 </field>
23126 <field>
23127 <name>FB15</name>
23128 <description>Filter bits</description>
23129 <bitOffset>15</bitOffset>
23130 <bitWidth>1</bitWidth>
23131 </field>
23132 <field>
23133 <name>FB16</name>
23134 <description>Filter bits</description>
23135 <bitOffset>16</bitOffset>
23136 <bitWidth>1</bitWidth>
23137 </field>
23138 <field>
23139 <name>FB17</name>
23140 <description>Filter bits</description>
23141 <bitOffset>17</bitOffset>
23142 <bitWidth>1</bitWidth>
23143 </field>
23144 <field>
23145 <name>FB18</name>
23146 <description>Filter bits</description>
23147 <bitOffset>18</bitOffset>
23148 <bitWidth>1</bitWidth>
23149 </field>
23150 <field>
23151 <name>FB19</name>
23152 <description>Filter bits</description>
23153 <bitOffset>19</bitOffset>
23154 <bitWidth>1</bitWidth>
23155 </field>
23156 <field>
23157 <name>FB20</name>
23158 <description>Filter bits</description>
23159 <bitOffset>20</bitOffset>
23160 <bitWidth>1</bitWidth>
23161 </field>
23162 <field>
23163 <name>FB21</name>
23164 <description>Filter bits</description>
23165 <bitOffset>21</bitOffset>
23166 <bitWidth>1</bitWidth>
23167 </field>
23168 <field>
23169 <name>FB22</name>
23170 <description>Filter bits</description>
23171 <bitOffset>22</bitOffset>
23172 <bitWidth>1</bitWidth>
23173 </field>
23174 <field>
23175 <name>FB23</name>
23176 <description>Filter bits</description>
23177 <bitOffset>23</bitOffset>
23178 <bitWidth>1</bitWidth>
23179 </field>
23180 <field>
23181 <name>FB24</name>
23182 <description>Filter bits</description>
23183 <bitOffset>24</bitOffset>
23184 <bitWidth>1</bitWidth>
23185 </field>
23186 <field>
23187 <name>FB25</name>
23188 <description>Filter bits</description>
23189 <bitOffset>25</bitOffset>
23190 <bitWidth>1</bitWidth>
23191 </field>
23192 <field>
23193 <name>FB26</name>
23194 <description>Filter bits</description>
23195 <bitOffset>26</bitOffset>
23196 <bitWidth>1</bitWidth>
23197 </field>
23198 <field>
23199 <name>FB27</name>
23200 <description>Filter bits</description>
23201 <bitOffset>27</bitOffset>
23202 <bitWidth>1</bitWidth>
23203 </field>
23204 <field>
23205 <name>FB28</name>
23206 <description>Filter bits</description>
23207 <bitOffset>28</bitOffset>
23208 <bitWidth>1</bitWidth>
23209 </field>
23210 <field>
23211 <name>FB29</name>
23212 <description>Filter bits</description>
23213 <bitOffset>29</bitOffset>
23214 <bitWidth>1</bitWidth>
23215 </field>
23216 <field>
23217 <name>FB30</name>
23218 <description>Filter bits</description>
23219 <bitOffset>30</bitOffset>
23220 <bitWidth>1</bitWidth>
23221 </field>
23222 <field>
23223 <name>FB31</name>
23224 <description>Filter bits</description>
23225 <bitOffset>31</bitOffset>
23226 <bitWidth>1</bitWidth>
23227 </field>
23228 </fields>
23229 </register>
23230 <register>
23231 <name>F20R1</name>
23232 <displayName>F20R1</displayName>
23233 <description>Filter bank 20 register 1</description>
23234 <addressOffset>0x2E0</addressOffset>
23235 <size>0x20</size>
23236 <access>read-write</access>
23237 <resetValue>0x00000000</resetValue>
23238 <fields>
23239 <field>
23240 <name>FB0</name>
23241 <description>Filter bits</description>
23242 <bitOffset>0</bitOffset>
23243 <bitWidth>1</bitWidth>
23244 </field>
23245 <field>
23246 <name>FB1</name>
23247 <description>Filter bits</description>
23248 <bitOffset>1</bitOffset>
23249 <bitWidth>1</bitWidth>
23250 </field>
23251 <field>
23252 <name>FB2</name>
23253 <description>Filter bits</description>
23254 <bitOffset>2</bitOffset>
23255 <bitWidth>1</bitWidth>
23256 </field>
23257 <field>
23258 <name>FB3</name>
23259 <description>Filter bits</description>
23260 <bitOffset>3</bitOffset>
23261 <bitWidth>1</bitWidth>
23262 </field>
23263 <field>
23264 <name>FB4</name>
23265 <description>Filter bits</description>
23266 <bitOffset>4</bitOffset>
23267 <bitWidth>1</bitWidth>
23268 </field>
23269 <field>
23270 <name>FB5</name>
23271 <description>Filter bits</description>
23272 <bitOffset>5</bitOffset>
23273 <bitWidth>1</bitWidth>
23274 </field>
23275 <field>
23276 <name>FB6</name>
23277 <description>Filter bits</description>
23278 <bitOffset>6</bitOffset>
23279 <bitWidth>1</bitWidth>
23280 </field>
23281 <field>
23282 <name>FB7</name>
23283 <description>Filter bits</description>
23284 <bitOffset>7</bitOffset>
23285 <bitWidth>1</bitWidth>
23286 </field>
23287 <field>
23288 <name>FB8</name>
23289 <description>Filter bits</description>
23290 <bitOffset>8</bitOffset>
23291 <bitWidth>1</bitWidth>
23292 </field>
23293 <field>
23294 <name>FB9</name>
23295 <description>Filter bits</description>
23296 <bitOffset>9</bitOffset>
23297 <bitWidth>1</bitWidth>
23298 </field>
23299 <field>
23300 <name>FB10</name>
23301 <description>Filter bits</description>
23302 <bitOffset>10</bitOffset>
23303 <bitWidth>1</bitWidth>
23304 </field>
23305 <field>
23306 <name>FB11</name>
23307 <description>Filter bits</description>
23308 <bitOffset>11</bitOffset>
23309 <bitWidth>1</bitWidth>
23310 </field>
23311 <field>
23312 <name>FB12</name>
23313 <description>Filter bits</description>
23314 <bitOffset>12</bitOffset>
23315 <bitWidth>1</bitWidth>
23316 </field>
23317 <field>
23318 <name>FB13</name>
23319 <description>Filter bits</description>
23320 <bitOffset>13</bitOffset>
23321 <bitWidth>1</bitWidth>
23322 </field>
23323 <field>
23324 <name>FB14</name>
23325 <description>Filter bits</description>
23326 <bitOffset>14</bitOffset>
23327 <bitWidth>1</bitWidth>
23328 </field>
23329 <field>
23330 <name>FB15</name>
23331 <description>Filter bits</description>
23332 <bitOffset>15</bitOffset>
23333 <bitWidth>1</bitWidth>
23334 </field>
23335 <field>
23336 <name>FB16</name>
23337 <description>Filter bits</description>
23338 <bitOffset>16</bitOffset>
23339 <bitWidth>1</bitWidth>
23340 </field>
23341 <field>
23342 <name>FB17</name>
23343 <description>Filter bits</description>
23344 <bitOffset>17</bitOffset>
23345 <bitWidth>1</bitWidth>
23346 </field>
23347 <field>
23348 <name>FB18</name>
23349 <description>Filter bits</description>
23350 <bitOffset>18</bitOffset>
23351 <bitWidth>1</bitWidth>
23352 </field>
23353 <field>
23354 <name>FB19</name>
23355 <description>Filter bits</description>
23356 <bitOffset>19</bitOffset>
23357 <bitWidth>1</bitWidth>
23358 </field>
23359 <field>
23360 <name>FB20</name>
23361 <description>Filter bits</description>
23362 <bitOffset>20</bitOffset>
23363 <bitWidth>1</bitWidth>
23364 </field>
23365 <field>
23366 <name>FB21</name>
23367 <description>Filter bits</description>
23368 <bitOffset>21</bitOffset>
23369 <bitWidth>1</bitWidth>
23370 </field>
23371 <field>
23372 <name>FB22</name>
23373 <description>Filter bits</description>
23374 <bitOffset>22</bitOffset>
23375 <bitWidth>1</bitWidth>
23376 </field>
23377 <field>
23378 <name>FB23</name>
23379 <description>Filter bits</description>
23380 <bitOffset>23</bitOffset>
23381 <bitWidth>1</bitWidth>
23382 </field>
23383 <field>
23384 <name>FB24</name>
23385 <description>Filter bits</description>
23386 <bitOffset>24</bitOffset>
23387 <bitWidth>1</bitWidth>
23388 </field>
23389 <field>
23390 <name>FB25</name>
23391 <description>Filter bits</description>
23392 <bitOffset>25</bitOffset>
23393 <bitWidth>1</bitWidth>
23394 </field>
23395 <field>
23396 <name>FB26</name>
23397 <description>Filter bits</description>
23398 <bitOffset>26</bitOffset>
23399 <bitWidth>1</bitWidth>
23400 </field>
23401 <field>
23402 <name>FB27</name>
23403 <description>Filter bits</description>
23404 <bitOffset>27</bitOffset>
23405 <bitWidth>1</bitWidth>
23406 </field>
23407 <field>
23408 <name>FB28</name>
23409 <description>Filter bits</description>
23410 <bitOffset>28</bitOffset>
23411 <bitWidth>1</bitWidth>
23412 </field>
23413 <field>
23414 <name>FB29</name>
23415 <description>Filter bits</description>
23416 <bitOffset>29</bitOffset>
23417 <bitWidth>1</bitWidth>
23418 </field>
23419 <field>
23420 <name>FB30</name>
23421 <description>Filter bits</description>
23422 <bitOffset>30</bitOffset>
23423 <bitWidth>1</bitWidth>
23424 </field>
23425 <field>
23426 <name>FB31</name>
23427 <description>Filter bits</description>
23428 <bitOffset>31</bitOffset>
23429 <bitWidth>1</bitWidth>
23430 </field>
23431 </fields>
23432 </register>
23433 <register>
23434 <name>F20R2</name>
23435 <displayName>F20R2</displayName>
23436 <description>Filter bank 20 register 2</description>
23437 <addressOffset>0x2E4</addressOffset>
23438 <size>0x20</size>
23439 <access>read-write</access>
23440 <resetValue>0x00000000</resetValue>
23441 <fields>
23442 <field>
23443 <name>FB0</name>
23444 <description>Filter bits</description>
23445 <bitOffset>0</bitOffset>
23446 <bitWidth>1</bitWidth>
23447 </field>
23448 <field>
23449 <name>FB1</name>
23450 <description>Filter bits</description>
23451 <bitOffset>1</bitOffset>
23452 <bitWidth>1</bitWidth>
23453 </field>
23454 <field>
23455 <name>FB2</name>
23456 <description>Filter bits</description>
23457 <bitOffset>2</bitOffset>
23458 <bitWidth>1</bitWidth>
23459 </field>
23460 <field>
23461 <name>FB3</name>
23462 <description>Filter bits</description>
23463 <bitOffset>3</bitOffset>
23464 <bitWidth>1</bitWidth>
23465 </field>
23466 <field>
23467 <name>FB4</name>
23468 <description>Filter bits</description>
23469 <bitOffset>4</bitOffset>
23470 <bitWidth>1</bitWidth>
23471 </field>
23472 <field>
23473 <name>FB5</name>
23474 <description>Filter bits</description>
23475 <bitOffset>5</bitOffset>
23476 <bitWidth>1</bitWidth>
23477 </field>
23478 <field>
23479 <name>FB6</name>
23480 <description>Filter bits</description>
23481 <bitOffset>6</bitOffset>
23482 <bitWidth>1</bitWidth>
23483 </field>
23484 <field>
23485 <name>FB7</name>
23486 <description>Filter bits</description>
23487 <bitOffset>7</bitOffset>
23488 <bitWidth>1</bitWidth>
23489 </field>
23490 <field>
23491 <name>FB8</name>
23492 <description>Filter bits</description>
23493 <bitOffset>8</bitOffset>
23494 <bitWidth>1</bitWidth>
23495 </field>
23496 <field>
23497 <name>FB9</name>
23498 <description>Filter bits</description>
23499 <bitOffset>9</bitOffset>
23500 <bitWidth>1</bitWidth>
23501 </field>
23502 <field>
23503 <name>FB10</name>
23504 <description>Filter bits</description>
23505 <bitOffset>10</bitOffset>
23506 <bitWidth>1</bitWidth>
23507 </field>
23508 <field>
23509 <name>FB11</name>
23510 <description>Filter bits</description>
23511 <bitOffset>11</bitOffset>
23512 <bitWidth>1</bitWidth>
23513 </field>
23514 <field>
23515 <name>FB12</name>
23516 <description>Filter bits</description>
23517 <bitOffset>12</bitOffset>
23518 <bitWidth>1</bitWidth>
23519 </field>
23520 <field>
23521 <name>FB13</name>
23522 <description>Filter bits</description>
23523 <bitOffset>13</bitOffset>
23524 <bitWidth>1</bitWidth>
23525 </field>
23526 <field>
23527 <name>FB14</name>
23528 <description>Filter bits</description>
23529 <bitOffset>14</bitOffset>
23530 <bitWidth>1</bitWidth>
23531 </field>
23532 <field>
23533 <name>FB15</name>
23534 <description>Filter bits</description>
23535 <bitOffset>15</bitOffset>
23536 <bitWidth>1</bitWidth>
23537 </field>
23538 <field>
23539 <name>FB16</name>
23540 <description>Filter bits</description>
23541 <bitOffset>16</bitOffset>
23542 <bitWidth>1</bitWidth>
23543 </field>
23544 <field>
23545 <name>FB17</name>
23546 <description>Filter bits</description>
23547 <bitOffset>17</bitOffset>
23548 <bitWidth>1</bitWidth>
23549 </field>
23550 <field>
23551 <name>FB18</name>
23552 <description>Filter bits</description>
23553 <bitOffset>18</bitOffset>
23554 <bitWidth>1</bitWidth>
23555 </field>
23556 <field>
23557 <name>FB19</name>
23558 <description>Filter bits</description>
23559 <bitOffset>19</bitOffset>
23560 <bitWidth>1</bitWidth>
23561 </field>
23562 <field>
23563 <name>FB20</name>
23564 <description>Filter bits</description>
23565 <bitOffset>20</bitOffset>
23566 <bitWidth>1</bitWidth>
23567 </field>
23568 <field>
23569 <name>FB21</name>
23570 <description>Filter bits</description>
23571 <bitOffset>21</bitOffset>
23572 <bitWidth>1</bitWidth>
23573 </field>
23574 <field>
23575 <name>FB22</name>
23576 <description>Filter bits</description>
23577 <bitOffset>22</bitOffset>
23578 <bitWidth>1</bitWidth>
23579 </field>
23580 <field>
23581 <name>FB23</name>
23582 <description>Filter bits</description>
23583 <bitOffset>23</bitOffset>
23584 <bitWidth>1</bitWidth>
23585 </field>
23586 <field>
23587 <name>FB24</name>
23588 <description>Filter bits</description>
23589 <bitOffset>24</bitOffset>
23590 <bitWidth>1</bitWidth>
23591 </field>
23592 <field>
23593 <name>FB25</name>
23594 <description>Filter bits</description>
23595 <bitOffset>25</bitOffset>
23596 <bitWidth>1</bitWidth>
23597 </field>
23598 <field>
23599 <name>FB26</name>
23600 <description>Filter bits</description>
23601 <bitOffset>26</bitOffset>
23602 <bitWidth>1</bitWidth>
23603 </field>
23604 <field>
23605 <name>FB27</name>
23606 <description>Filter bits</description>
23607 <bitOffset>27</bitOffset>
23608 <bitWidth>1</bitWidth>
23609 </field>
23610 <field>
23611 <name>FB28</name>
23612 <description>Filter bits</description>
23613 <bitOffset>28</bitOffset>
23614 <bitWidth>1</bitWidth>
23615 </field>
23616 <field>
23617 <name>FB29</name>
23618 <description>Filter bits</description>
23619 <bitOffset>29</bitOffset>
23620 <bitWidth>1</bitWidth>
23621 </field>
23622 <field>
23623 <name>FB30</name>
23624 <description>Filter bits</description>
23625 <bitOffset>30</bitOffset>
23626 <bitWidth>1</bitWidth>
23627 </field>
23628 <field>
23629 <name>FB31</name>
23630 <description>Filter bits</description>
23631 <bitOffset>31</bitOffset>
23632 <bitWidth>1</bitWidth>
23633 </field>
23634 </fields>
23635 </register>
23636 <register>
23637 <name>F21R1</name>
23638 <displayName>F21R1</displayName>
23639 <description>Filter bank 21 register 1</description>
23640 <addressOffset>0x2E8</addressOffset>
23641 <size>0x20</size>
23642 <access>read-write</access>
23643 <resetValue>0x00000000</resetValue>
23644 <fields>
23645 <field>
23646 <name>FB0</name>
23647 <description>Filter bits</description>
23648 <bitOffset>0</bitOffset>
23649 <bitWidth>1</bitWidth>
23650 </field>
23651 <field>
23652 <name>FB1</name>
23653 <description>Filter bits</description>
23654 <bitOffset>1</bitOffset>
23655 <bitWidth>1</bitWidth>
23656 </field>
23657 <field>
23658 <name>FB2</name>
23659 <description>Filter bits</description>
23660 <bitOffset>2</bitOffset>
23661 <bitWidth>1</bitWidth>
23662 </field>
23663 <field>
23664 <name>FB3</name>
23665 <description>Filter bits</description>
23666 <bitOffset>3</bitOffset>
23667 <bitWidth>1</bitWidth>
23668 </field>
23669 <field>
23670 <name>FB4</name>
23671 <description>Filter bits</description>
23672 <bitOffset>4</bitOffset>
23673 <bitWidth>1</bitWidth>
23674 </field>
23675 <field>
23676 <name>FB5</name>
23677 <description>Filter bits</description>
23678 <bitOffset>5</bitOffset>
23679 <bitWidth>1</bitWidth>
23680 </field>
23681 <field>
23682 <name>FB6</name>
23683 <description>Filter bits</description>
23684 <bitOffset>6</bitOffset>
23685 <bitWidth>1</bitWidth>
23686 </field>
23687 <field>
23688 <name>FB7</name>
23689 <description>Filter bits</description>
23690 <bitOffset>7</bitOffset>
23691 <bitWidth>1</bitWidth>
23692 </field>
23693 <field>
23694 <name>FB8</name>
23695 <description>Filter bits</description>
23696 <bitOffset>8</bitOffset>
23697 <bitWidth>1</bitWidth>
23698 </field>
23699 <field>
23700 <name>FB9</name>
23701 <description>Filter bits</description>
23702 <bitOffset>9</bitOffset>
23703 <bitWidth>1</bitWidth>
23704 </field>
23705 <field>
23706 <name>FB10</name>
23707 <description>Filter bits</description>
23708 <bitOffset>10</bitOffset>
23709 <bitWidth>1</bitWidth>
23710 </field>
23711 <field>
23712 <name>FB11</name>
23713 <description>Filter bits</description>
23714 <bitOffset>11</bitOffset>
23715 <bitWidth>1</bitWidth>
23716 </field>
23717 <field>
23718 <name>FB12</name>
23719 <description>Filter bits</description>
23720 <bitOffset>12</bitOffset>
23721 <bitWidth>1</bitWidth>
23722 </field>
23723 <field>
23724 <name>FB13</name>
23725 <description>Filter bits</description>
23726 <bitOffset>13</bitOffset>
23727 <bitWidth>1</bitWidth>
23728 </field>
23729 <field>
23730 <name>FB14</name>
23731 <description>Filter bits</description>
23732 <bitOffset>14</bitOffset>
23733 <bitWidth>1</bitWidth>
23734 </field>
23735 <field>
23736 <name>FB15</name>
23737 <description>Filter bits</description>
23738 <bitOffset>15</bitOffset>
23739 <bitWidth>1</bitWidth>
23740 </field>
23741 <field>
23742 <name>FB16</name>
23743 <description>Filter bits</description>
23744 <bitOffset>16</bitOffset>
23745 <bitWidth>1</bitWidth>
23746 </field>
23747 <field>
23748 <name>FB17</name>
23749 <description>Filter bits</description>
23750 <bitOffset>17</bitOffset>
23751 <bitWidth>1</bitWidth>
23752 </field>
23753 <field>
23754 <name>FB18</name>
23755 <description>Filter bits</description>
23756 <bitOffset>18</bitOffset>
23757 <bitWidth>1</bitWidth>
23758 </field>
23759 <field>
23760 <name>FB19</name>
23761 <description>Filter bits</description>
23762 <bitOffset>19</bitOffset>
23763 <bitWidth>1</bitWidth>
23764 </field>
23765 <field>
23766 <name>FB20</name>
23767 <description>Filter bits</description>
23768 <bitOffset>20</bitOffset>
23769 <bitWidth>1</bitWidth>
23770 </field>
23771 <field>
23772 <name>FB21</name>
23773 <description>Filter bits</description>
23774 <bitOffset>21</bitOffset>
23775 <bitWidth>1</bitWidth>
23776 </field>
23777 <field>
23778 <name>FB22</name>
23779 <description>Filter bits</description>
23780 <bitOffset>22</bitOffset>
23781 <bitWidth>1</bitWidth>
23782 </field>
23783 <field>
23784 <name>FB23</name>
23785 <description>Filter bits</description>
23786 <bitOffset>23</bitOffset>
23787 <bitWidth>1</bitWidth>
23788 </field>
23789 <field>
23790 <name>FB24</name>
23791 <description>Filter bits</description>
23792 <bitOffset>24</bitOffset>
23793 <bitWidth>1</bitWidth>
23794 </field>
23795 <field>
23796 <name>FB25</name>
23797 <description>Filter bits</description>
23798 <bitOffset>25</bitOffset>
23799 <bitWidth>1</bitWidth>
23800 </field>
23801 <field>
23802 <name>FB26</name>
23803 <description>Filter bits</description>
23804 <bitOffset>26</bitOffset>
23805 <bitWidth>1</bitWidth>
23806 </field>
23807 <field>
23808 <name>FB27</name>
23809 <description>Filter bits</description>
23810 <bitOffset>27</bitOffset>
23811 <bitWidth>1</bitWidth>
23812 </field>
23813 <field>
23814 <name>FB28</name>
23815 <description>Filter bits</description>
23816 <bitOffset>28</bitOffset>
23817 <bitWidth>1</bitWidth>
23818 </field>
23819 <field>
23820 <name>FB29</name>
23821 <description>Filter bits</description>
23822 <bitOffset>29</bitOffset>
23823 <bitWidth>1</bitWidth>
23824 </field>
23825 <field>
23826 <name>FB30</name>
23827 <description>Filter bits</description>
23828 <bitOffset>30</bitOffset>
23829 <bitWidth>1</bitWidth>
23830 </field>
23831 <field>
23832 <name>FB31</name>
23833 <description>Filter bits</description>
23834 <bitOffset>31</bitOffset>
23835 <bitWidth>1</bitWidth>
23836 </field>
23837 </fields>
23838 </register>
23839 <register>
23840 <name>F21R2</name>
23841 <displayName>F21R2</displayName>
23842 <description>Filter bank 21 register 2</description>
23843 <addressOffset>0x2EC</addressOffset>
23844 <size>0x20</size>
23845 <access>read-write</access>
23846 <resetValue>0x00000000</resetValue>
23847 <fields>
23848 <field>
23849 <name>FB0</name>
23850 <description>Filter bits</description>
23851 <bitOffset>0</bitOffset>
23852 <bitWidth>1</bitWidth>
23853 </field>
23854 <field>
23855 <name>FB1</name>
23856 <description>Filter bits</description>
23857 <bitOffset>1</bitOffset>
23858 <bitWidth>1</bitWidth>
23859 </field>
23860 <field>
23861 <name>FB2</name>
23862 <description>Filter bits</description>
23863 <bitOffset>2</bitOffset>
23864 <bitWidth>1</bitWidth>
23865 </field>
23866 <field>
23867 <name>FB3</name>
23868 <description>Filter bits</description>
23869 <bitOffset>3</bitOffset>
23870 <bitWidth>1</bitWidth>
23871 </field>
23872 <field>
23873 <name>FB4</name>
23874 <description>Filter bits</description>
23875 <bitOffset>4</bitOffset>
23876 <bitWidth>1</bitWidth>
23877 </field>
23878 <field>
23879 <name>FB5</name>
23880 <description>Filter bits</description>
23881 <bitOffset>5</bitOffset>
23882 <bitWidth>1</bitWidth>
23883 </field>
23884 <field>
23885 <name>FB6</name>
23886 <description>Filter bits</description>
23887 <bitOffset>6</bitOffset>
23888 <bitWidth>1</bitWidth>
23889 </field>
23890 <field>
23891 <name>FB7</name>
23892 <description>Filter bits</description>
23893 <bitOffset>7</bitOffset>
23894 <bitWidth>1</bitWidth>
23895 </field>
23896 <field>
23897 <name>FB8</name>
23898 <description>Filter bits</description>
23899 <bitOffset>8</bitOffset>
23900 <bitWidth>1</bitWidth>
23901 </field>
23902 <field>
23903 <name>FB9</name>
23904 <description>Filter bits</description>
23905 <bitOffset>9</bitOffset>
23906 <bitWidth>1</bitWidth>
23907 </field>
23908 <field>
23909 <name>FB10</name>
23910 <description>Filter bits</description>
23911 <bitOffset>10</bitOffset>
23912 <bitWidth>1</bitWidth>
23913 </field>
23914 <field>
23915 <name>FB11</name>
23916 <description>Filter bits</description>
23917 <bitOffset>11</bitOffset>
23918 <bitWidth>1</bitWidth>
23919 </field>
23920 <field>
23921 <name>FB12</name>
23922 <description>Filter bits</description>
23923 <bitOffset>12</bitOffset>
23924 <bitWidth>1</bitWidth>
23925 </field>
23926 <field>
23927 <name>FB13</name>
23928 <description>Filter bits</description>
23929 <bitOffset>13</bitOffset>
23930 <bitWidth>1</bitWidth>
23931 </field>
23932 <field>
23933 <name>FB14</name>
23934 <description>Filter bits</description>
23935 <bitOffset>14</bitOffset>
23936 <bitWidth>1</bitWidth>
23937 </field>
23938 <field>
23939 <name>FB15</name>
23940 <description>Filter bits</description>
23941 <bitOffset>15</bitOffset>
23942 <bitWidth>1</bitWidth>
23943 </field>
23944 <field>
23945 <name>FB16</name>
23946 <description>Filter bits</description>
23947 <bitOffset>16</bitOffset>
23948 <bitWidth>1</bitWidth>
23949 </field>
23950 <field>
23951 <name>FB17</name>
23952 <description>Filter bits</description>
23953 <bitOffset>17</bitOffset>
23954 <bitWidth>1</bitWidth>
23955 </field>
23956 <field>
23957 <name>FB18</name>
23958 <description>Filter bits</description>
23959 <bitOffset>18</bitOffset>
23960 <bitWidth>1</bitWidth>
23961 </field>
23962 <field>
23963 <name>FB19</name>
23964 <description>Filter bits</description>
23965 <bitOffset>19</bitOffset>
23966 <bitWidth>1</bitWidth>
23967 </field>
23968 <field>
23969 <name>FB20</name>
23970 <description>Filter bits</description>
23971 <bitOffset>20</bitOffset>
23972 <bitWidth>1</bitWidth>
23973 </field>
23974 <field>
23975 <name>FB21</name>
23976 <description>Filter bits</description>
23977 <bitOffset>21</bitOffset>
23978 <bitWidth>1</bitWidth>
23979 </field>
23980 <field>
23981 <name>FB22</name>
23982 <description>Filter bits</description>
23983 <bitOffset>22</bitOffset>
23984 <bitWidth>1</bitWidth>
23985 </field>
23986 <field>
23987 <name>FB23</name>
23988 <description>Filter bits</description>
23989 <bitOffset>23</bitOffset>
23990 <bitWidth>1</bitWidth>
23991 </field>
23992 <field>
23993 <name>FB24</name>
23994 <description>Filter bits</description>
23995 <bitOffset>24</bitOffset>
23996 <bitWidth>1</bitWidth>
23997 </field>
23998 <field>
23999 <name>FB25</name>
24000 <description>Filter bits</description>
24001 <bitOffset>25</bitOffset>
24002 <bitWidth>1</bitWidth>
24003 </field>
24004 <field>
24005 <name>FB26</name>
24006 <description>Filter bits</description>
24007 <bitOffset>26</bitOffset>
24008 <bitWidth>1</bitWidth>
24009 </field>
24010 <field>
24011 <name>FB27</name>
24012 <description>Filter bits</description>
24013 <bitOffset>27</bitOffset>
24014 <bitWidth>1</bitWidth>
24015 </field>
24016 <field>
24017 <name>FB28</name>
24018 <description>Filter bits</description>
24019 <bitOffset>28</bitOffset>
24020 <bitWidth>1</bitWidth>
24021 </field>
24022 <field>
24023 <name>FB29</name>
24024 <description>Filter bits</description>
24025 <bitOffset>29</bitOffset>
24026 <bitWidth>1</bitWidth>
24027 </field>
24028 <field>
24029 <name>FB30</name>
24030 <description>Filter bits</description>
24031 <bitOffset>30</bitOffset>
24032 <bitWidth>1</bitWidth>
24033 </field>
24034 <field>
24035 <name>FB31</name>
24036 <description>Filter bits</description>
24037 <bitOffset>31</bitOffset>
24038 <bitWidth>1</bitWidth>
24039 </field>
24040 </fields>
24041 </register>
24042 <register>
24043 <name>F22R1</name>
24044 <displayName>F22R1</displayName>
24045 <description>Filter bank 22 register 1</description>
24046 <addressOffset>0x2F0</addressOffset>
24047 <size>0x20</size>
24048 <access>read-write</access>
24049 <resetValue>0x00000000</resetValue>
24050 <fields>
24051 <field>
24052 <name>FB0</name>
24053 <description>Filter bits</description>
24054 <bitOffset>0</bitOffset>
24055 <bitWidth>1</bitWidth>
24056 </field>
24057 <field>
24058 <name>FB1</name>
24059 <description>Filter bits</description>
24060 <bitOffset>1</bitOffset>
24061 <bitWidth>1</bitWidth>
24062 </field>
24063 <field>
24064 <name>FB2</name>
24065 <description>Filter bits</description>
24066 <bitOffset>2</bitOffset>
24067 <bitWidth>1</bitWidth>
24068 </field>
24069 <field>
24070 <name>FB3</name>
24071 <description>Filter bits</description>
24072 <bitOffset>3</bitOffset>
24073 <bitWidth>1</bitWidth>
24074 </field>
24075 <field>
24076 <name>FB4</name>
24077 <description>Filter bits</description>
24078 <bitOffset>4</bitOffset>
24079 <bitWidth>1</bitWidth>
24080 </field>
24081 <field>
24082 <name>FB5</name>
24083 <description>Filter bits</description>
24084 <bitOffset>5</bitOffset>
24085 <bitWidth>1</bitWidth>
24086 </field>
24087 <field>
24088 <name>FB6</name>
24089 <description>Filter bits</description>
24090 <bitOffset>6</bitOffset>
24091 <bitWidth>1</bitWidth>
24092 </field>
24093 <field>
24094 <name>FB7</name>
24095 <description>Filter bits</description>
24096 <bitOffset>7</bitOffset>
24097 <bitWidth>1</bitWidth>
24098 </field>
24099 <field>
24100 <name>FB8</name>
24101 <description>Filter bits</description>
24102 <bitOffset>8</bitOffset>
24103 <bitWidth>1</bitWidth>
24104 </field>
24105 <field>
24106 <name>FB9</name>
24107 <description>Filter bits</description>
24108 <bitOffset>9</bitOffset>
24109 <bitWidth>1</bitWidth>
24110 </field>
24111 <field>
24112 <name>FB10</name>
24113 <description>Filter bits</description>
24114 <bitOffset>10</bitOffset>
24115 <bitWidth>1</bitWidth>
24116 </field>
24117 <field>
24118 <name>FB11</name>
24119 <description>Filter bits</description>
24120 <bitOffset>11</bitOffset>
24121 <bitWidth>1</bitWidth>
24122 </field>
24123 <field>
24124 <name>FB12</name>
24125 <description>Filter bits</description>
24126 <bitOffset>12</bitOffset>
24127 <bitWidth>1</bitWidth>
24128 </field>
24129 <field>
24130 <name>FB13</name>
24131 <description>Filter bits</description>
24132 <bitOffset>13</bitOffset>
24133 <bitWidth>1</bitWidth>
24134 </field>
24135 <field>
24136 <name>FB14</name>
24137 <description>Filter bits</description>
24138 <bitOffset>14</bitOffset>
24139 <bitWidth>1</bitWidth>
24140 </field>
24141 <field>
24142 <name>FB15</name>
24143 <description>Filter bits</description>
24144 <bitOffset>15</bitOffset>
24145 <bitWidth>1</bitWidth>
24146 </field>
24147 <field>
24148 <name>FB16</name>
24149 <description>Filter bits</description>
24150 <bitOffset>16</bitOffset>
24151 <bitWidth>1</bitWidth>
24152 </field>
24153 <field>
24154 <name>FB17</name>
24155 <description>Filter bits</description>
24156 <bitOffset>17</bitOffset>
24157 <bitWidth>1</bitWidth>
24158 </field>
24159 <field>
24160 <name>FB18</name>
24161 <description>Filter bits</description>
24162 <bitOffset>18</bitOffset>
24163 <bitWidth>1</bitWidth>
24164 </field>
24165 <field>
24166 <name>FB19</name>
24167 <description>Filter bits</description>
24168 <bitOffset>19</bitOffset>
24169 <bitWidth>1</bitWidth>
24170 </field>
24171 <field>
24172 <name>FB20</name>
24173 <description>Filter bits</description>
24174 <bitOffset>20</bitOffset>
24175 <bitWidth>1</bitWidth>
24176 </field>
24177 <field>
24178 <name>FB21</name>
24179 <description>Filter bits</description>
24180 <bitOffset>21</bitOffset>
24181 <bitWidth>1</bitWidth>
24182 </field>
24183 <field>
24184 <name>FB22</name>
24185 <description>Filter bits</description>
24186 <bitOffset>22</bitOffset>
24187 <bitWidth>1</bitWidth>
24188 </field>
24189 <field>
24190 <name>FB23</name>
24191 <description>Filter bits</description>
24192 <bitOffset>23</bitOffset>
24193 <bitWidth>1</bitWidth>
24194 </field>
24195 <field>
24196 <name>FB24</name>
24197 <description>Filter bits</description>
24198 <bitOffset>24</bitOffset>
24199 <bitWidth>1</bitWidth>
24200 </field>
24201 <field>
24202 <name>FB25</name>
24203 <description>Filter bits</description>
24204 <bitOffset>25</bitOffset>
24205 <bitWidth>1</bitWidth>
24206 </field>
24207 <field>
24208 <name>FB26</name>
24209 <description>Filter bits</description>
24210 <bitOffset>26</bitOffset>
24211 <bitWidth>1</bitWidth>
24212 </field>
24213 <field>
24214 <name>FB27</name>
24215 <description>Filter bits</description>
24216 <bitOffset>27</bitOffset>
24217 <bitWidth>1</bitWidth>
24218 </field>
24219 <field>
24220 <name>FB28</name>
24221 <description>Filter bits</description>
24222 <bitOffset>28</bitOffset>
24223 <bitWidth>1</bitWidth>
24224 </field>
24225 <field>
24226 <name>FB29</name>
24227 <description>Filter bits</description>
24228 <bitOffset>29</bitOffset>
24229 <bitWidth>1</bitWidth>
24230 </field>
24231 <field>
24232 <name>FB30</name>
24233 <description>Filter bits</description>
24234 <bitOffset>30</bitOffset>
24235 <bitWidth>1</bitWidth>
24236 </field>
24237 <field>
24238 <name>FB31</name>
24239 <description>Filter bits</description>
24240 <bitOffset>31</bitOffset>
24241 <bitWidth>1</bitWidth>
24242 </field>
24243 </fields>
24244 </register>
24245 <register>
24246 <name>F22R2</name>
24247 <displayName>F22R2</displayName>
24248 <description>Filter bank 22 register 2</description>
24249 <addressOffset>0x2F4</addressOffset>
24250 <size>0x20</size>
24251 <access>read-write</access>
24252 <resetValue>0x00000000</resetValue>
24253 <fields>
24254 <field>
24255 <name>FB0</name>
24256 <description>Filter bits</description>
24257 <bitOffset>0</bitOffset>
24258 <bitWidth>1</bitWidth>
24259 </field>
24260 <field>
24261 <name>FB1</name>
24262 <description>Filter bits</description>
24263 <bitOffset>1</bitOffset>
24264 <bitWidth>1</bitWidth>
24265 </field>
24266 <field>
24267 <name>FB2</name>
24268 <description>Filter bits</description>
24269 <bitOffset>2</bitOffset>
24270 <bitWidth>1</bitWidth>
24271 </field>
24272 <field>
24273 <name>FB3</name>
24274 <description>Filter bits</description>
24275 <bitOffset>3</bitOffset>
24276 <bitWidth>1</bitWidth>
24277 </field>
24278 <field>
24279 <name>FB4</name>
24280 <description>Filter bits</description>
24281 <bitOffset>4</bitOffset>
24282 <bitWidth>1</bitWidth>
24283 </field>
24284 <field>
24285 <name>FB5</name>
24286 <description>Filter bits</description>
24287 <bitOffset>5</bitOffset>
24288 <bitWidth>1</bitWidth>
24289 </field>
24290 <field>
24291 <name>FB6</name>
24292 <description>Filter bits</description>
24293 <bitOffset>6</bitOffset>
24294 <bitWidth>1</bitWidth>
24295 </field>
24296 <field>
24297 <name>FB7</name>
24298 <description>Filter bits</description>
24299 <bitOffset>7</bitOffset>
24300 <bitWidth>1</bitWidth>
24301 </field>
24302 <field>
24303 <name>FB8</name>
24304 <description>Filter bits</description>
24305 <bitOffset>8</bitOffset>
24306 <bitWidth>1</bitWidth>
24307 </field>
24308 <field>
24309 <name>FB9</name>
24310 <description>Filter bits</description>
24311 <bitOffset>9</bitOffset>
24312 <bitWidth>1</bitWidth>
24313 </field>
24314 <field>
24315 <name>FB10</name>
24316 <description>Filter bits</description>
24317 <bitOffset>10</bitOffset>
24318 <bitWidth>1</bitWidth>
24319 </field>
24320 <field>
24321 <name>FB11</name>
24322 <description>Filter bits</description>
24323 <bitOffset>11</bitOffset>
24324 <bitWidth>1</bitWidth>
24325 </field>
24326 <field>
24327 <name>FB12</name>
24328 <description>Filter bits</description>
24329 <bitOffset>12</bitOffset>
24330 <bitWidth>1</bitWidth>
24331 </field>
24332 <field>
24333 <name>FB13</name>
24334 <description>Filter bits</description>
24335 <bitOffset>13</bitOffset>
24336 <bitWidth>1</bitWidth>
24337 </field>
24338 <field>
24339 <name>FB14</name>
24340 <description>Filter bits</description>
24341 <bitOffset>14</bitOffset>
24342 <bitWidth>1</bitWidth>
24343 </field>
24344 <field>
24345 <name>FB15</name>
24346 <description>Filter bits</description>
24347 <bitOffset>15</bitOffset>
24348 <bitWidth>1</bitWidth>
24349 </field>
24350 <field>
24351 <name>FB16</name>
24352 <description>Filter bits</description>
24353 <bitOffset>16</bitOffset>
24354 <bitWidth>1</bitWidth>
24355 </field>
24356 <field>
24357 <name>FB17</name>
24358 <description>Filter bits</description>
24359 <bitOffset>17</bitOffset>
24360 <bitWidth>1</bitWidth>
24361 </field>
24362 <field>
24363 <name>FB18</name>
24364 <description>Filter bits</description>
24365 <bitOffset>18</bitOffset>
24366 <bitWidth>1</bitWidth>
24367 </field>
24368 <field>
24369 <name>FB19</name>
24370 <description>Filter bits</description>
24371 <bitOffset>19</bitOffset>
24372 <bitWidth>1</bitWidth>
24373 </field>
24374 <field>
24375 <name>FB20</name>
24376 <description>Filter bits</description>
24377 <bitOffset>20</bitOffset>
24378 <bitWidth>1</bitWidth>
24379 </field>
24380 <field>
24381 <name>FB21</name>
24382 <description>Filter bits</description>
24383 <bitOffset>21</bitOffset>
24384 <bitWidth>1</bitWidth>
24385 </field>
24386 <field>
24387 <name>FB22</name>
24388 <description>Filter bits</description>
24389 <bitOffset>22</bitOffset>
24390 <bitWidth>1</bitWidth>
24391 </field>
24392 <field>
24393 <name>FB23</name>
24394 <description>Filter bits</description>
24395 <bitOffset>23</bitOffset>
24396 <bitWidth>1</bitWidth>
24397 </field>
24398 <field>
24399 <name>FB24</name>
24400 <description>Filter bits</description>
24401 <bitOffset>24</bitOffset>
24402 <bitWidth>1</bitWidth>
24403 </field>
24404 <field>
24405 <name>FB25</name>
24406 <description>Filter bits</description>
24407 <bitOffset>25</bitOffset>
24408 <bitWidth>1</bitWidth>
24409 </field>
24410 <field>
24411 <name>FB26</name>
24412 <description>Filter bits</description>
24413 <bitOffset>26</bitOffset>
24414 <bitWidth>1</bitWidth>
24415 </field>
24416 <field>
24417 <name>FB27</name>
24418 <description>Filter bits</description>
24419 <bitOffset>27</bitOffset>
24420 <bitWidth>1</bitWidth>
24421 </field>
24422 <field>
24423 <name>FB28</name>
24424 <description>Filter bits</description>
24425 <bitOffset>28</bitOffset>
24426 <bitWidth>1</bitWidth>
24427 </field>
24428 <field>
24429 <name>FB29</name>
24430 <description>Filter bits</description>
24431 <bitOffset>29</bitOffset>
24432 <bitWidth>1</bitWidth>
24433 </field>
24434 <field>
24435 <name>FB30</name>
24436 <description>Filter bits</description>
24437 <bitOffset>30</bitOffset>
24438 <bitWidth>1</bitWidth>
24439 </field>
24440 <field>
24441 <name>FB31</name>
24442 <description>Filter bits</description>
24443 <bitOffset>31</bitOffset>
24444 <bitWidth>1</bitWidth>
24445 </field>
24446 </fields>
24447 </register>
24448 <register>
24449 <name>F23R1</name>
24450 <displayName>F23R1</displayName>
24451 <description>Filter bank 23 register 1</description>
24452 <addressOffset>0x2F8</addressOffset>
24453 <size>0x20</size>
24454 <access>read-write</access>
24455 <resetValue>0x00000000</resetValue>
24456 <fields>
24457 <field>
24458 <name>FB0</name>
24459 <description>Filter bits</description>
24460 <bitOffset>0</bitOffset>
24461 <bitWidth>1</bitWidth>
24462 </field>
24463 <field>
24464 <name>FB1</name>
24465 <description>Filter bits</description>
24466 <bitOffset>1</bitOffset>
24467 <bitWidth>1</bitWidth>
24468 </field>
24469 <field>
24470 <name>FB2</name>
24471 <description>Filter bits</description>
24472 <bitOffset>2</bitOffset>
24473 <bitWidth>1</bitWidth>
24474 </field>
24475 <field>
24476 <name>FB3</name>
24477 <description>Filter bits</description>
24478 <bitOffset>3</bitOffset>
24479 <bitWidth>1</bitWidth>
24480 </field>
24481 <field>
24482 <name>FB4</name>
24483 <description>Filter bits</description>
24484 <bitOffset>4</bitOffset>
24485 <bitWidth>1</bitWidth>
24486 </field>
24487 <field>
24488 <name>FB5</name>
24489 <description>Filter bits</description>
24490 <bitOffset>5</bitOffset>
24491 <bitWidth>1</bitWidth>
24492 </field>
24493 <field>
24494 <name>FB6</name>
24495 <description>Filter bits</description>
24496 <bitOffset>6</bitOffset>
24497 <bitWidth>1</bitWidth>
24498 </field>
24499 <field>
24500 <name>FB7</name>
24501 <description>Filter bits</description>
24502 <bitOffset>7</bitOffset>
24503 <bitWidth>1</bitWidth>
24504 </field>
24505 <field>
24506 <name>FB8</name>
24507 <description>Filter bits</description>
24508 <bitOffset>8</bitOffset>
24509 <bitWidth>1</bitWidth>
24510 </field>
24511 <field>
24512 <name>FB9</name>
24513 <description>Filter bits</description>
24514 <bitOffset>9</bitOffset>
24515 <bitWidth>1</bitWidth>
24516 </field>
24517 <field>
24518 <name>FB10</name>
24519 <description>Filter bits</description>
24520 <bitOffset>10</bitOffset>
24521 <bitWidth>1</bitWidth>
24522 </field>
24523 <field>
24524 <name>FB11</name>
24525 <description>Filter bits</description>
24526 <bitOffset>11</bitOffset>
24527 <bitWidth>1</bitWidth>
24528 </field>
24529 <field>
24530 <name>FB12</name>
24531 <description>Filter bits</description>
24532 <bitOffset>12</bitOffset>
24533 <bitWidth>1</bitWidth>
24534 </field>
24535 <field>
24536 <name>FB13</name>
24537 <description>Filter bits</description>
24538 <bitOffset>13</bitOffset>
24539 <bitWidth>1</bitWidth>
24540 </field>
24541 <field>
24542 <name>FB14</name>
24543 <description>Filter bits</description>
24544 <bitOffset>14</bitOffset>
24545 <bitWidth>1</bitWidth>
24546 </field>
24547 <field>
24548 <name>FB15</name>
24549 <description>Filter bits</description>
24550 <bitOffset>15</bitOffset>
24551 <bitWidth>1</bitWidth>
24552 </field>
24553 <field>
24554 <name>FB16</name>
24555 <description>Filter bits</description>
24556 <bitOffset>16</bitOffset>
24557 <bitWidth>1</bitWidth>
24558 </field>
24559 <field>
24560 <name>FB17</name>
24561 <description>Filter bits</description>
24562 <bitOffset>17</bitOffset>
24563 <bitWidth>1</bitWidth>
24564 </field>
24565 <field>
24566 <name>FB18</name>
24567 <description>Filter bits</description>
24568 <bitOffset>18</bitOffset>
24569 <bitWidth>1</bitWidth>
24570 </field>
24571 <field>
24572 <name>FB19</name>
24573 <description>Filter bits</description>
24574 <bitOffset>19</bitOffset>
24575 <bitWidth>1</bitWidth>
24576 </field>
24577 <field>
24578 <name>FB20</name>
24579 <description>Filter bits</description>
24580 <bitOffset>20</bitOffset>
24581 <bitWidth>1</bitWidth>
24582 </field>
24583 <field>
24584 <name>FB21</name>
24585 <description>Filter bits</description>
24586 <bitOffset>21</bitOffset>
24587 <bitWidth>1</bitWidth>
24588 </field>
24589 <field>
24590 <name>FB22</name>
24591 <description>Filter bits</description>
24592 <bitOffset>22</bitOffset>
24593 <bitWidth>1</bitWidth>
24594 </field>
24595 <field>
24596 <name>FB23</name>
24597 <description>Filter bits</description>
24598 <bitOffset>23</bitOffset>
24599 <bitWidth>1</bitWidth>
24600 </field>
24601 <field>
24602 <name>FB24</name>
24603 <description>Filter bits</description>
24604 <bitOffset>24</bitOffset>
24605 <bitWidth>1</bitWidth>
24606 </field>
24607 <field>
24608 <name>FB25</name>
24609 <description>Filter bits</description>
24610 <bitOffset>25</bitOffset>
24611 <bitWidth>1</bitWidth>
24612 </field>
24613 <field>
24614 <name>FB26</name>
24615 <description>Filter bits</description>
24616 <bitOffset>26</bitOffset>
24617 <bitWidth>1</bitWidth>
24618 </field>
24619 <field>
24620 <name>FB27</name>
24621 <description>Filter bits</description>
24622 <bitOffset>27</bitOffset>
24623 <bitWidth>1</bitWidth>
24624 </field>
24625 <field>
24626 <name>FB28</name>
24627 <description>Filter bits</description>
24628 <bitOffset>28</bitOffset>
24629 <bitWidth>1</bitWidth>
24630 </field>
24631 <field>
24632 <name>FB29</name>
24633 <description>Filter bits</description>
24634 <bitOffset>29</bitOffset>
24635 <bitWidth>1</bitWidth>
24636 </field>
24637 <field>
24638 <name>FB30</name>
24639 <description>Filter bits</description>
24640 <bitOffset>30</bitOffset>
24641 <bitWidth>1</bitWidth>
24642 </field>
24643 <field>
24644 <name>FB31</name>
24645 <description>Filter bits</description>
24646 <bitOffset>31</bitOffset>
24647 <bitWidth>1</bitWidth>
24648 </field>
24649 </fields>
24650 </register>
24651 <register>
24652 <name>F23R2</name>
24653 <displayName>F23R2</displayName>
24654 <description>Filter bank 23 register 2</description>
24655 <addressOffset>0x2FC</addressOffset>
24656 <size>0x20</size>
24657 <access>read-write</access>
24658 <resetValue>0x00000000</resetValue>
24659 <fields>
24660 <field>
24661 <name>FB0</name>
24662 <description>Filter bits</description>
24663 <bitOffset>0</bitOffset>
24664 <bitWidth>1</bitWidth>
24665 </field>
24666 <field>
24667 <name>FB1</name>
24668 <description>Filter bits</description>
24669 <bitOffset>1</bitOffset>
24670 <bitWidth>1</bitWidth>
24671 </field>
24672 <field>
24673 <name>FB2</name>
24674 <description>Filter bits</description>
24675 <bitOffset>2</bitOffset>
24676 <bitWidth>1</bitWidth>
24677 </field>
24678 <field>
24679 <name>FB3</name>
24680 <description>Filter bits</description>
24681 <bitOffset>3</bitOffset>
24682 <bitWidth>1</bitWidth>
24683 </field>
24684 <field>
24685 <name>FB4</name>
24686 <description>Filter bits</description>
24687 <bitOffset>4</bitOffset>
24688 <bitWidth>1</bitWidth>
24689 </field>
24690 <field>
24691 <name>FB5</name>
24692 <description>Filter bits</description>
24693 <bitOffset>5</bitOffset>
24694 <bitWidth>1</bitWidth>
24695 </field>
24696 <field>
24697 <name>FB6</name>
24698 <description>Filter bits</description>
24699 <bitOffset>6</bitOffset>
24700 <bitWidth>1</bitWidth>
24701 </field>
24702 <field>
24703 <name>FB7</name>
24704 <description>Filter bits</description>
24705 <bitOffset>7</bitOffset>
24706 <bitWidth>1</bitWidth>
24707 </field>
24708 <field>
24709 <name>FB8</name>
24710 <description>Filter bits</description>
24711 <bitOffset>8</bitOffset>
24712 <bitWidth>1</bitWidth>
24713 </field>
24714 <field>
24715 <name>FB9</name>
24716 <description>Filter bits</description>
24717 <bitOffset>9</bitOffset>
24718 <bitWidth>1</bitWidth>
24719 </field>
24720 <field>
24721 <name>FB10</name>
24722 <description>Filter bits</description>
24723 <bitOffset>10</bitOffset>
24724 <bitWidth>1</bitWidth>
24725 </field>
24726 <field>
24727 <name>FB11</name>
24728 <description>Filter bits</description>
24729 <bitOffset>11</bitOffset>
24730 <bitWidth>1</bitWidth>
24731 </field>
24732 <field>
24733 <name>FB12</name>
24734 <description>Filter bits</description>
24735 <bitOffset>12</bitOffset>
24736 <bitWidth>1</bitWidth>
24737 </field>
24738 <field>
24739 <name>FB13</name>
24740 <description>Filter bits</description>
24741 <bitOffset>13</bitOffset>
24742 <bitWidth>1</bitWidth>
24743 </field>
24744 <field>
24745 <name>FB14</name>
24746 <description>Filter bits</description>
24747 <bitOffset>14</bitOffset>
24748 <bitWidth>1</bitWidth>
24749 </field>
24750 <field>
24751 <name>FB15</name>
24752 <description>Filter bits</description>
24753 <bitOffset>15</bitOffset>
24754 <bitWidth>1</bitWidth>
24755 </field>
24756 <field>
24757 <name>FB16</name>
24758 <description>Filter bits</description>
24759 <bitOffset>16</bitOffset>
24760 <bitWidth>1</bitWidth>
24761 </field>
24762 <field>
24763 <name>FB17</name>
24764 <description>Filter bits</description>
24765 <bitOffset>17</bitOffset>
24766 <bitWidth>1</bitWidth>
24767 </field>
24768 <field>
24769 <name>FB18</name>
24770 <description>Filter bits</description>
24771 <bitOffset>18</bitOffset>
24772 <bitWidth>1</bitWidth>
24773 </field>
24774 <field>
24775 <name>FB19</name>
24776 <description>Filter bits</description>
24777 <bitOffset>19</bitOffset>
24778 <bitWidth>1</bitWidth>
24779 </field>
24780 <field>
24781 <name>FB20</name>
24782 <description>Filter bits</description>
24783 <bitOffset>20</bitOffset>
24784 <bitWidth>1</bitWidth>
24785 </field>
24786 <field>
24787 <name>FB21</name>
24788 <description>Filter bits</description>
24789 <bitOffset>21</bitOffset>
24790 <bitWidth>1</bitWidth>
24791 </field>
24792 <field>
24793 <name>FB22</name>
24794 <description>Filter bits</description>
24795 <bitOffset>22</bitOffset>
24796 <bitWidth>1</bitWidth>
24797 </field>
24798 <field>
24799 <name>FB23</name>
24800 <description>Filter bits</description>
24801 <bitOffset>23</bitOffset>
24802 <bitWidth>1</bitWidth>
24803 </field>
24804 <field>
24805 <name>FB24</name>
24806 <description>Filter bits</description>
24807 <bitOffset>24</bitOffset>
24808 <bitWidth>1</bitWidth>
24809 </field>
24810 <field>
24811 <name>FB25</name>
24812 <description>Filter bits</description>
24813 <bitOffset>25</bitOffset>
24814 <bitWidth>1</bitWidth>
24815 </field>
24816 <field>
24817 <name>FB26</name>
24818 <description>Filter bits</description>
24819 <bitOffset>26</bitOffset>
24820 <bitWidth>1</bitWidth>
24821 </field>
24822 <field>
24823 <name>FB27</name>
24824 <description>Filter bits</description>
24825 <bitOffset>27</bitOffset>
24826 <bitWidth>1</bitWidth>
24827 </field>
24828 <field>
24829 <name>FB28</name>
24830 <description>Filter bits</description>
24831 <bitOffset>28</bitOffset>
24832 <bitWidth>1</bitWidth>
24833 </field>
24834 <field>
24835 <name>FB29</name>
24836 <description>Filter bits</description>
24837 <bitOffset>29</bitOffset>
24838 <bitWidth>1</bitWidth>
24839 </field>
24840 <field>
24841 <name>FB30</name>
24842 <description>Filter bits</description>
24843 <bitOffset>30</bitOffset>
24844 <bitWidth>1</bitWidth>
24845 </field>
24846 <field>
24847 <name>FB31</name>
24848 <description>Filter bits</description>
24849 <bitOffset>31</bitOffset>
24850 <bitWidth>1</bitWidth>
24851 </field>
24852 </fields>
24853 </register>
24854 <register>
24855 <name>F24R1</name>
24856 <displayName>F24R1</displayName>
24857 <description>Filter bank 24 register 1</description>
24858 <addressOffset>0x300</addressOffset>
24859 <size>0x20</size>
24860 <access>read-write</access>
24861 <resetValue>0x00000000</resetValue>
24862 <fields>
24863 <field>
24864 <name>FB0</name>
24865 <description>Filter bits</description>
24866 <bitOffset>0</bitOffset>
24867 <bitWidth>1</bitWidth>
24868 </field>
24869 <field>
24870 <name>FB1</name>
24871 <description>Filter bits</description>
24872 <bitOffset>1</bitOffset>
24873 <bitWidth>1</bitWidth>
24874 </field>
24875 <field>
24876 <name>FB2</name>
24877 <description>Filter bits</description>
24878 <bitOffset>2</bitOffset>
24879 <bitWidth>1</bitWidth>
24880 </field>
24881 <field>
24882 <name>FB3</name>
24883 <description>Filter bits</description>
24884 <bitOffset>3</bitOffset>
24885 <bitWidth>1</bitWidth>
24886 </field>
24887 <field>
24888 <name>FB4</name>
24889 <description>Filter bits</description>
24890 <bitOffset>4</bitOffset>
24891 <bitWidth>1</bitWidth>
24892 </field>
24893 <field>
24894 <name>FB5</name>
24895 <description>Filter bits</description>
24896 <bitOffset>5</bitOffset>
24897 <bitWidth>1</bitWidth>
24898 </field>
24899 <field>
24900 <name>FB6</name>
24901 <description>Filter bits</description>
24902 <bitOffset>6</bitOffset>
24903 <bitWidth>1</bitWidth>
24904 </field>
24905 <field>
24906 <name>FB7</name>
24907 <description>Filter bits</description>
24908 <bitOffset>7</bitOffset>
24909 <bitWidth>1</bitWidth>
24910 </field>
24911 <field>
24912 <name>FB8</name>
24913 <description>Filter bits</description>
24914 <bitOffset>8</bitOffset>
24915 <bitWidth>1</bitWidth>
24916 </field>
24917 <field>
24918 <name>FB9</name>
24919 <description>Filter bits</description>
24920 <bitOffset>9</bitOffset>
24921 <bitWidth>1</bitWidth>
24922 </field>
24923 <field>
24924 <name>FB10</name>
24925 <description>Filter bits</description>
24926 <bitOffset>10</bitOffset>
24927 <bitWidth>1</bitWidth>
24928 </field>
24929 <field>
24930 <name>FB11</name>
24931 <description>Filter bits</description>
24932 <bitOffset>11</bitOffset>
24933 <bitWidth>1</bitWidth>
24934 </field>
24935 <field>
24936 <name>FB12</name>
24937 <description>Filter bits</description>
24938 <bitOffset>12</bitOffset>
24939 <bitWidth>1</bitWidth>
24940 </field>
24941 <field>
24942 <name>FB13</name>
24943 <description>Filter bits</description>
24944 <bitOffset>13</bitOffset>
24945 <bitWidth>1</bitWidth>
24946 </field>
24947 <field>
24948 <name>FB14</name>
24949 <description>Filter bits</description>
24950 <bitOffset>14</bitOffset>
24951 <bitWidth>1</bitWidth>
24952 </field>
24953 <field>
24954 <name>FB15</name>
24955 <description>Filter bits</description>
24956 <bitOffset>15</bitOffset>
24957 <bitWidth>1</bitWidth>
24958 </field>
24959 <field>
24960 <name>FB16</name>
24961 <description>Filter bits</description>
24962 <bitOffset>16</bitOffset>
24963 <bitWidth>1</bitWidth>
24964 </field>
24965 <field>
24966 <name>FB17</name>
24967 <description>Filter bits</description>
24968 <bitOffset>17</bitOffset>
24969 <bitWidth>1</bitWidth>
24970 </field>
24971 <field>
24972 <name>FB18</name>
24973 <description>Filter bits</description>
24974 <bitOffset>18</bitOffset>
24975 <bitWidth>1</bitWidth>
24976 </field>
24977 <field>
24978 <name>FB19</name>
24979 <description>Filter bits</description>
24980 <bitOffset>19</bitOffset>
24981 <bitWidth>1</bitWidth>
24982 </field>
24983 <field>
24984 <name>FB20</name>
24985 <description>Filter bits</description>
24986 <bitOffset>20</bitOffset>
24987 <bitWidth>1</bitWidth>
24988 </field>
24989 <field>
24990 <name>FB21</name>
24991 <description>Filter bits</description>
24992 <bitOffset>21</bitOffset>
24993 <bitWidth>1</bitWidth>
24994 </field>
24995 <field>
24996 <name>FB22</name>
24997 <description>Filter bits</description>
24998 <bitOffset>22</bitOffset>
24999 <bitWidth>1</bitWidth>
25000 </field>
25001 <field>
25002 <name>FB23</name>
25003 <description>Filter bits</description>
25004 <bitOffset>23</bitOffset>
25005 <bitWidth>1</bitWidth>
25006 </field>
25007 <field>
25008 <name>FB24</name>
25009 <description>Filter bits</description>
25010 <bitOffset>24</bitOffset>
25011 <bitWidth>1</bitWidth>
25012 </field>
25013 <field>
25014 <name>FB25</name>
25015 <description>Filter bits</description>
25016 <bitOffset>25</bitOffset>
25017 <bitWidth>1</bitWidth>
25018 </field>
25019 <field>
25020 <name>FB26</name>
25021 <description>Filter bits</description>
25022 <bitOffset>26</bitOffset>
25023 <bitWidth>1</bitWidth>
25024 </field>
25025 <field>
25026 <name>FB27</name>
25027 <description>Filter bits</description>
25028 <bitOffset>27</bitOffset>
25029 <bitWidth>1</bitWidth>
25030 </field>
25031 <field>
25032 <name>FB28</name>
25033 <description>Filter bits</description>
25034 <bitOffset>28</bitOffset>
25035 <bitWidth>1</bitWidth>
25036 </field>
25037 <field>
25038 <name>FB29</name>
25039 <description>Filter bits</description>
25040 <bitOffset>29</bitOffset>
25041 <bitWidth>1</bitWidth>
25042 </field>
25043 <field>
25044 <name>FB30</name>
25045 <description>Filter bits</description>
25046 <bitOffset>30</bitOffset>
25047 <bitWidth>1</bitWidth>
25048 </field>
25049 <field>
25050 <name>FB31</name>
25051 <description>Filter bits</description>
25052 <bitOffset>31</bitOffset>
25053 <bitWidth>1</bitWidth>
25054 </field>
25055 </fields>
25056 </register>
25057 <register>
25058 <name>F24R2</name>
25059 <displayName>F24R2</displayName>
25060 <description>Filter bank 24 register 2</description>
25061 <addressOffset>0x304</addressOffset>
25062 <size>0x20</size>
25063 <access>read-write</access>
25064 <resetValue>0x00000000</resetValue>
25065 <fields>
25066 <field>
25067 <name>FB0</name>
25068 <description>Filter bits</description>
25069 <bitOffset>0</bitOffset>
25070 <bitWidth>1</bitWidth>
25071 </field>
25072 <field>
25073 <name>FB1</name>
25074 <description>Filter bits</description>
25075 <bitOffset>1</bitOffset>
25076 <bitWidth>1</bitWidth>
25077 </field>
25078 <field>
25079 <name>FB2</name>
25080 <description>Filter bits</description>
25081 <bitOffset>2</bitOffset>
25082 <bitWidth>1</bitWidth>
25083 </field>
25084 <field>
25085 <name>FB3</name>
25086 <description>Filter bits</description>
25087 <bitOffset>3</bitOffset>
25088 <bitWidth>1</bitWidth>
25089 </field>
25090 <field>
25091 <name>FB4</name>
25092 <description>Filter bits</description>
25093 <bitOffset>4</bitOffset>
25094 <bitWidth>1</bitWidth>
25095 </field>
25096 <field>
25097 <name>FB5</name>
25098 <description>Filter bits</description>
25099 <bitOffset>5</bitOffset>
25100 <bitWidth>1</bitWidth>
25101 </field>
25102 <field>
25103 <name>FB6</name>
25104 <description>Filter bits</description>
25105 <bitOffset>6</bitOffset>
25106 <bitWidth>1</bitWidth>
25107 </field>
25108 <field>
25109 <name>FB7</name>
25110 <description>Filter bits</description>
25111 <bitOffset>7</bitOffset>
25112 <bitWidth>1</bitWidth>
25113 </field>
25114 <field>
25115 <name>FB8</name>
25116 <description>Filter bits</description>
25117 <bitOffset>8</bitOffset>
25118 <bitWidth>1</bitWidth>
25119 </field>
25120 <field>
25121 <name>FB9</name>
25122 <description>Filter bits</description>
25123 <bitOffset>9</bitOffset>
25124 <bitWidth>1</bitWidth>
25125 </field>
25126 <field>
25127 <name>FB10</name>
25128 <description>Filter bits</description>
25129 <bitOffset>10</bitOffset>
25130 <bitWidth>1</bitWidth>
25131 </field>
25132 <field>
25133 <name>FB11</name>
25134 <description>Filter bits</description>
25135 <bitOffset>11</bitOffset>
25136 <bitWidth>1</bitWidth>
25137 </field>
25138 <field>
25139 <name>FB12</name>
25140 <description>Filter bits</description>
25141 <bitOffset>12</bitOffset>
25142 <bitWidth>1</bitWidth>
25143 </field>
25144 <field>
25145 <name>FB13</name>
25146 <description>Filter bits</description>
25147 <bitOffset>13</bitOffset>
25148 <bitWidth>1</bitWidth>
25149 </field>
25150 <field>
25151 <name>FB14</name>
25152 <description>Filter bits</description>
25153 <bitOffset>14</bitOffset>
25154 <bitWidth>1</bitWidth>
25155 </field>
25156 <field>
25157 <name>FB15</name>
25158 <description>Filter bits</description>
25159 <bitOffset>15</bitOffset>
25160 <bitWidth>1</bitWidth>
25161 </field>
25162 <field>
25163 <name>FB16</name>
25164 <description>Filter bits</description>
25165 <bitOffset>16</bitOffset>
25166 <bitWidth>1</bitWidth>
25167 </field>
25168 <field>
25169 <name>FB17</name>
25170 <description>Filter bits</description>
25171 <bitOffset>17</bitOffset>
25172 <bitWidth>1</bitWidth>
25173 </field>
25174 <field>
25175 <name>FB18</name>
25176 <description>Filter bits</description>
25177 <bitOffset>18</bitOffset>
25178 <bitWidth>1</bitWidth>
25179 </field>
25180 <field>
25181 <name>FB19</name>
25182 <description>Filter bits</description>
25183 <bitOffset>19</bitOffset>
25184 <bitWidth>1</bitWidth>
25185 </field>
25186 <field>
25187 <name>FB20</name>
25188 <description>Filter bits</description>
25189 <bitOffset>20</bitOffset>
25190 <bitWidth>1</bitWidth>
25191 </field>
25192 <field>
25193 <name>FB21</name>
25194 <description>Filter bits</description>
25195 <bitOffset>21</bitOffset>
25196 <bitWidth>1</bitWidth>
25197 </field>
25198 <field>
25199 <name>FB22</name>
25200 <description>Filter bits</description>
25201 <bitOffset>22</bitOffset>
25202 <bitWidth>1</bitWidth>
25203 </field>
25204 <field>
25205 <name>FB23</name>
25206 <description>Filter bits</description>
25207 <bitOffset>23</bitOffset>
25208 <bitWidth>1</bitWidth>
25209 </field>
25210 <field>
25211 <name>FB24</name>
25212 <description>Filter bits</description>
25213 <bitOffset>24</bitOffset>
25214 <bitWidth>1</bitWidth>
25215 </field>
25216 <field>
25217 <name>FB25</name>
25218 <description>Filter bits</description>
25219 <bitOffset>25</bitOffset>
25220 <bitWidth>1</bitWidth>
25221 </field>
25222 <field>
25223 <name>FB26</name>
25224 <description>Filter bits</description>
25225 <bitOffset>26</bitOffset>
25226 <bitWidth>1</bitWidth>
25227 </field>
25228 <field>
25229 <name>FB27</name>
25230 <description>Filter bits</description>
25231 <bitOffset>27</bitOffset>
25232 <bitWidth>1</bitWidth>
25233 </field>
25234 <field>
25235 <name>FB28</name>
25236 <description>Filter bits</description>
25237 <bitOffset>28</bitOffset>
25238 <bitWidth>1</bitWidth>
25239 </field>
25240 <field>
25241 <name>FB29</name>
25242 <description>Filter bits</description>
25243 <bitOffset>29</bitOffset>
25244 <bitWidth>1</bitWidth>
25245 </field>
25246 <field>
25247 <name>FB30</name>
25248 <description>Filter bits</description>
25249 <bitOffset>30</bitOffset>
25250 <bitWidth>1</bitWidth>
25251 </field>
25252 <field>
25253 <name>FB31</name>
25254 <description>Filter bits</description>
25255 <bitOffset>31</bitOffset>
25256 <bitWidth>1</bitWidth>
25257 </field>
25258 </fields>
25259 </register>
25260 <register>
25261 <name>F25R1</name>
25262 <displayName>F25R1</displayName>
25263 <description>Filter bank 25 register 1</description>
25264 <addressOffset>0x308</addressOffset>
25265 <size>0x20</size>
25266 <access>read-write</access>
25267 <resetValue>0x00000000</resetValue>
25268 <fields>
25269 <field>
25270 <name>FB0</name>
25271 <description>Filter bits</description>
25272 <bitOffset>0</bitOffset>
25273 <bitWidth>1</bitWidth>
25274 </field>
25275 <field>
25276 <name>FB1</name>
25277 <description>Filter bits</description>
25278 <bitOffset>1</bitOffset>
25279 <bitWidth>1</bitWidth>
25280 </field>
25281 <field>
25282 <name>FB2</name>
25283 <description>Filter bits</description>
25284 <bitOffset>2</bitOffset>
25285 <bitWidth>1</bitWidth>
25286 </field>
25287 <field>
25288 <name>FB3</name>
25289 <description>Filter bits</description>
25290 <bitOffset>3</bitOffset>
25291 <bitWidth>1</bitWidth>
25292 </field>
25293 <field>
25294 <name>FB4</name>
25295 <description>Filter bits</description>
25296 <bitOffset>4</bitOffset>
25297 <bitWidth>1</bitWidth>
25298 </field>
25299 <field>
25300 <name>FB5</name>
25301 <description>Filter bits</description>
25302 <bitOffset>5</bitOffset>
25303 <bitWidth>1</bitWidth>
25304 </field>
25305 <field>
25306 <name>FB6</name>
25307 <description>Filter bits</description>
25308 <bitOffset>6</bitOffset>
25309 <bitWidth>1</bitWidth>
25310 </field>
25311 <field>
25312 <name>FB7</name>
25313 <description>Filter bits</description>
25314 <bitOffset>7</bitOffset>
25315 <bitWidth>1</bitWidth>
25316 </field>
25317 <field>
25318 <name>FB8</name>
25319 <description>Filter bits</description>
25320 <bitOffset>8</bitOffset>
25321 <bitWidth>1</bitWidth>
25322 </field>
25323 <field>
25324 <name>FB9</name>
25325 <description>Filter bits</description>
25326 <bitOffset>9</bitOffset>
25327 <bitWidth>1</bitWidth>
25328 </field>
25329 <field>
25330 <name>FB10</name>
25331 <description>Filter bits</description>
25332 <bitOffset>10</bitOffset>
25333 <bitWidth>1</bitWidth>
25334 </field>
25335 <field>
25336 <name>FB11</name>
25337 <description>Filter bits</description>
25338 <bitOffset>11</bitOffset>
25339 <bitWidth>1</bitWidth>
25340 </field>
25341 <field>
25342 <name>FB12</name>
25343 <description>Filter bits</description>
25344 <bitOffset>12</bitOffset>
25345 <bitWidth>1</bitWidth>
25346 </field>
25347 <field>
25348 <name>FB13</name>
25349 <description>Filter bits</description>
25350 <bitOffset>13</bitOffset>
25351 <bitWidth>1</bitWidth>
25352 </field>
25353 <field>
25354 <name>FB14</name>
25355 <description>Filter bits</description>
25356 <bitOffset>14</bitOffset>
25357 <bitWidth>1</bitWidth>
25358 </field>
25359 <field>
25360 <name>FB15</name>
25361 <description>Filter bits</description>
25362 <bitOffset>15</bitOffset>
25363 <bitWidth>1</bitWidth>
25364 </field>
25365 <field>
25366 <name>FB16</name>
25367 <description>Filter bits</description>
25368 <bitOffset>16</bitOffset>
25369 <bitWidth>1</bitWidth>
25370 </field>
25371 <field>
25372 <name>FB17</name>
25373 <description>Filter bits</description>
25374 <bitOffset>17</bitOffset>
25375 <bitWidth>1</bitWidth>
25376 </field>
25377 <field>
25378 <name>FB18</name>
25379 <description>Filter bits</description>
25380 <bitOffset>18</bitOffset>
25381 <bitWidth>1</bitWidth>
25382 </field>
25383 <field>
25384 <name>FB19</name>
25385 <description>Filter bits</description>
25386 <bitOffset>19</bitOffset>
25387 <bitWidth>1</bitWidth>
25388 </field>
25389 <field>
25390 <name>FB20</name>
25391 <description>Filter bits</description>
25392 <bitOffset>20</bitOffset>
25393 <bitWidth>1</bitWidth>
25394 </field>
25395 <field>
25396 <name>FB21</name>
25397 <description>Filter bits</description>
25398 <bitOffset>21</bitOffset>
25399 <bitWidth>1</bitWidth>
25400 </field>
25401 <field>
25402 <name>FB22</name>
25403 <description>Filter bits</description>
25404 <bitOffset>22</bitOffset>
25405 <bitWidth>1</bitWidth>
25406 </field>
25407 <field>
25408 <name>FB23</name>
25409 <description>Filter bits</description>
25410 <bitOffset>23</bitOffset>
25411 <bitWidth>1</bitWidth>
25412 </field>
25413 <field>
25414 <name>FB24</name>
25415 <description>Filter bits</description>
25416 <bitOffset>24</bitOffset>
25417 <bitWidth>1</bitWidth>
25418 </field>
25419 <field>
25420 <name>FB25</name>
25421 <description>Filter bits</description>
25422 <bitOffset>25</bitOffset>
25423 <bitWidth>1</bitWidth>
25424 </field>
25425 <field>
25426 <name>FB26</name>
25427 <description>Filter bits</description>
25428 <bitOffset>26</bitOffset>
25429 <bitWidth>1</bitWidth>
25430 </field>
25431 <field>
25432 <name>FB27</name>
25433 <description>Filter bits</description>
25434 <bitOffset>27</bitOffset>
25435 <bitWidth>1</bitWidth>
25436 </field>
25437 <field>
25438 <name>FB28</name>
25439 <description>Filter bits</description>
25440 <bitOffset>28</bitOffset>
25441 <bitWidth>1</bitWidth>
25442 </field>
25443 <field>
25444 <name>FB29</name>
25445 <description>Filter bits</description>
25446 <bitOffset>29</bitOffset>
25447 <bitWidth>1</bitWidth>
25448 </field>
25449 <field>
25450 <name>FB30</name>
25451 <description>Filter bits</description>
25452 <bitOffset>30</bitOffset>
25453 <bitWidth>1</bitWidth>
25454 </field>
25455 <field>
25456 <name>FB31</name>
25457 <description>Filter bits</description>
25458 <bitOffset>31</bitOffset>
25459 <bitWidth>1</bitWidth>
25460 </field>
25461 </fields>
25462 </register>
25463 <register>
25464 <name>F25R2</name>
25465 <displayName>F25R2</displayName>
25466 <description>Filter bank 25 register 2</description>
25467 <addressOffset>0x30C</addressOffset>
25468 <size>0x20</size>
25469 <access>read-write</access>
25470 <resetValue>0x00000000</resetValue>
25471 <fields>
25472 <field>
25473 <name>FB0</name>
25474 <description>Filter bits</description>
25475 <bitOffset>0</bitOffset>
25476 <bitWidth>1</bitWidth>
25477 </field>
25478 <field>
25479 <name>FB1</name>
25480 <description>Filter bits</description>
25481 <bitOffset>1</bitOffset>
25482 <bitWidth>1</bitWidth>
25483 </field>
25484 <field>
25485 <name>FB2</name>
25486 <description>Filter bits</description>
25487 <bitOffset>2</bitOffset>
25488 <bitWidth>1</bitWidth>
25489 </field>
25490 <field>
25491 <name>FB3</name>
25492 <description>Filter bits</description>
25493 <bitOffset>3</bitOffset>
25494 <bitWidth>1</bitWidth>
25495 </field>
25496 <field>
25497 <name>FB4</name>
25498 <description>Filter bits</description>
25499 <bitOffset>4</bitOffset>
25500 <bitWidth>1</bitWidth>
25501 </field>
25502 <field>
25503 <name>FB5</name>
25504 <description>Filter bits</description>
25505 <bitOffset>5</bitOffset>
25506 <bitWidth>1</bitWidth>
25507 </field>
25508 <field>
25509 <name>FB6</name>
25510 <description>Filter bits</description>
25511 <bitOffset>6</bitOffset>
25512 <bitWidth>1</bitWidth>
25513 </field>
25514 <field>
25515 <name>FB7</name>
25516 <description>Filter bits</description>
25517 <bitOffset>7</bitOffset>
25518 <bitWidth>1</bitWidth>
25519 </field>
25520 <field>
25521 <name>FB8</name>
25522 <description>Filter bits</description>
25523 <bitOffset>8</bitOffset>
25524 <bitWidth>1</bitWidth>
25525 </field>
25526 <field>
25527 <name>FB9</name>
25528 <description>Filter bits</description>
25529 <bitOffset>9</bitOffset>
25530 <bitWidth>1</bitWidth>
25531 </field>
25532 <field>
25533 <name>FB10</name>
25534 <description>Filter bits</description>
25535 <bitOffset>10</bitOffset>
25536 <bitWidth>1</bitWidth>
25537 </field>
25538 <field>
25539 <name>FB11</name>
25540 <description>Filter bits</description>
25541 <bitOffset>11</bitOffset>
25542 <bitWidth>1</bitWidth>
25543 </field>
25544 <field>
25545 <name>FB12</name>
25546 <description>Filter bits</description>
25547 <bitOffset>12</bitOffset>
25548 <bitWidth>1</bitWidth>
25549 </field>
25550 <field>
25551 <name>FB13</name>
25552 <description>Filter bits</description>
25553 <bitOffset>13</bitOffset>
25554 <bitWidth>1</bitWidth>
25555 </field>
25556 <field>
25557 <name>FB14</name>
25558 <description>Filter bits</description>
25559 <bitOffset>14</bitOffset>
25560 <bitWidth>1</bitWidth>
25561 </field>
25562 <field>
25563 <name>FB15</name>
25564 <description>Filter bits</description>
25565 <bitOffset>15</bitOffset>
25566 <bitWidth>1</bitWidth>
25567 </field>
25568 <field>
25569 <name>FB16</name>
25570 <description>Filter bits</description>
25571 <bitOffset>16</bitOffset>
25572 <bitWidth>1</bitWidth>
25573 </field>
25574 <field>
25575 <name>FB17</name>
25576 <description>Filter bits</description>
25577 <bitOffset>17</bitOffset>
25578 <bitWidth>1</bitWidth>
25579 </field>
25580 <field>
25581 <name>FB18</name>
25582 <description>Filter bits</description>
25583 <bitOffset>18</bitOffset>
25584 <bitWidth>1</bitWidth>
25585 </field>
25586 <field>
25587 <name>FB19</name>
25588 <description>Filter bits</description>
25589 <bitOffset>19</bitOffset>
25590 <bitWidth>1</bitWidth>
25591 </field>
25592 <field>
25593 <name>FB20</name>
25594 <description>Filter bits</description>
25595 <bitOffset>20</bitOffset>
25596 <bitWidth>1</bitWidth>
25597 </field>
25598 <field>
25599 <name>FB21</name>
25600 <description>Filter bits</description>
25601 <bitOffset>21</bitOffset>
25602 <bitWidth>1</bitWidth>
25603 </field>
25604 <field>
25605 <name>FB22</name>
25606 <description>Filter bits</description>
25607 <bitOffset>22</bitOffset>
25608 <bitWidth>1</bitWidth>
25609 </field>
25610 <field>
25611 <name>FB23</name>
25612 <description>Filter bits</description>
25613 <bitOffset>23</bitOffset>
25614 <bitWidth>1</bitWidth>
25615 </field>
25616 <field>
25617 <name>FB24</name>
25618 <description>Filter bits</description>
25619 <bitOffset>24</bitOffset>
25620 <bitWidth>1</bitWidth>
25621 </field>
25622 <field>
25623 <name>FB25</name>
25624 <description>Filter bits</description>
25625 <bitOffset>25</bitOffset>
25626 <bitWidth>1</bitWidth>
25627 </field>
25628 <field>
25629 <name>FB26</name>
25630 <description>Filter bits</description>
25631 <bitOffset>26</bitOffset>
25632 <bitWidth>1</bitWidth>
25633 </field>
25634 <field>
25635 <name>FB27</name>
25636 <description>Filter bits</description>
25637 <bitOffset>27</bitOffset>
25638 <bitWidth>1</bitWidth>
25639 </field>
25640 <field>
25641 <name>FB28</name>
25642 <description>Filter bits</description>
25643 <bitOffset>28</bitOffset>
25644 <bitWidth>1</bitWidth>
25645 </field>
25646 <field>
25647 <name>FB29</name>
25648 <description>Filter bits</description>
25649 <bitOffset>29</bitOffset>
25650 <bitWidth>1</bitWidth>
25651 </field>
25652 <field>
25653 <name>FB30</name>
25654 <description>Filter bits</description>
25655 <bitOffset>30</bitOffset>
25656 <bitWidth>1</bitWidth>
25657 </field>
25658 <field>
25659 <name>FB31</name>
25660 <description>Filter bits</description>
25661 <bitOffset>31</bitOffset>
25662 <bitWidth>1</bitWidth>
25663 </field>
25664 </fields>
25665 </register>
25666 <register>
25667 <name>F26R1</name>
25668 <displayName>F26R1</displayName>
25669 <description>Filter bank 26 register 1</description>
25670 <addressOffset>0x310</addressOffset>
25671 <size>0x20</size>
25672 <access>read-write</access>
25673 <resetValue>0x00000000</resetValue>
25674 <fields>
25675 <field>
25676 <name>FB0</name>
25677 <description>Filter bits</description>
25678 <bitOffset>0</bitOffset>
25679 <bitWidth>1</bitWidth>
25680 </field>
25681 <field>
25682 <name>FB1</name>
25683 <description>Filter bits</description>
25684 <bitOffset>1</bitOffset>
25685 <bitWidth>1</bitWidth>
25686 </field>
25687 <field>
25688 <name>FB2</name>
25689 <description>Filter bits</description>
25690 <bitOffset>2</bitOffset>
25691 <bitWidth>1</bitWidth>
25692 </field>
25693 <field>
25694 <name>FB3</name>
25695 <description>Filter bits</description>
25696 <bitOffset>3</bitOffset>
25697 <bitWidth>1</bitWidth>
25698 </field>
25699 <field>
25700 <name>FB4</name>
25701 <description>Filter bits</description>
25702 <bitOffset>4</bitOffset>
25703 <bitWidth>1</bitWidth>
25704 </field>
25705 <field>
25706 <name>FB5</name>
25707 <description>Filter bits</description>
25708 <bitOffset>5</bitOffset>
25709 <bitWidth>1</bitWidth>
25710 </field>
25711 <field>
25712 <name>FB6</name>
25713 <description>Filter bits</description>
25714 <bitOffset>6</bitOffset>
25715 <bitWidth>1</bitWidth>
25716 </field>
25717 <field>
25718 <name>FB7</name>
25719 <description>Filter bits</description>
25720 <bitOffset>7</bitOffset>
25721 <bitWidth>1</bitWidth>
25722 </field>
25723 <field>
25724 <name>FB8</name>
25725 <description>Filter bits</description>
25726 <bitOffset>8</bitOffset>
25727 <bitWidth>1</bitWidth>
25728 </field>
25729 <field>
25730 <name>FB9</name>
25731 <description>Filter bits</description>
25732 <bitOffset>9</bitOffset>
25733 <bitWidth>1</bitWidth>
25734 </field>
25735 <field>
25736 <name>FB10</name>
25737 <description>Filter bits</description>
25738 <bitOffset>10</bitOffset>
25739 <bitWidth>1</bitWidth>
25740 </field>
25741 <field>
25742 <name>FB11</name>
25743 <description>Filter bits</description>
25744 <bitOffset>11</bitOffset>
25745 <bitWidth>1</bitWidth>
25746 </field>
25747 <field>
25748 <name>FB12</name>
25749 <description>Filter bits</description>
25750 <bitOffset>12</bitOffset>
25751 <bitWidth>1</bitWidth>
25752 </field>
25753 <field>
25754 <name>FB13</name>
25755 <description>Filter bits</description>
25756 <bitOffset>13</bitOffset>
25757 <bitWidth>1</bitWidth>
25758 </field>
25759 <field>
25760 <name>FB14</name>
25761 <description>Filter bits</description>
25762 <bitOffset>14</bitOffset>
25763 <bitWidth>1</bitWidth>
25764 </field>
25765 <field>
25766 <name>FB15</name>
25767 <description>Filter bits</description>
25768 <bitOffset>15</bitOffset>
25769 <bitWidth>1</bitWidth>
25770 </field>
25771 <field>
25772 <name>FB16</name>
25773 <description>Filter bits</description>
25774 <bitOffset>16</bitOffset>
25775 <bitWidth>1</bitWidth>
25776 </field>
25777 <field>
25778 <name>FB17</name>
25779 <description>Filter bits</description>
25780 <bitOffset>17</bitOffset>
25781 <bitWidth>1</bitWidth>
25782 </field>
25783 <field>
25784 <name>FB18</name>
25785 <description>Filter bits</description>
25786 <bitOffset>18</bitOffset>
25787 <bitWidth>1</bitWidth>
25788 </field>
25789 <field>
25790 <name>FB19</name>
25791 <description>Filter bits</description>
25792 <bitOffset>19</bitOffset>
25793 <bitWidth>1</bitWidth>
25794 </field>
25795 <field>
25796 <name>FB20</name>
25797 <description>Filter bits</description>
25798 <bitOffset>20</bitOffset>
25799 <bitWidth>1</bitWidth>
25800 </field>
25801 <field>
25802 <name>FB21</name>
25803 <description>Filter bits</description>
25804 <bitOffset>21</bitOffset>
25805 <bitWidth>1</bitWidth>
25806 </field>
25807 <field>
25808 <name>FB22</name>
25809 <description>Filter bits</description>
25810 <bitOffset>22</bitOffset>
25811 <bitWidth>1</bitWidth>
25812 </field>
25813 <field>
25814 <name>FB23</name>
25815 <description>Filter bits</description>
25816 <bitOffset>23</bitOffset>
25817 <bitWidth>1</bitWidth>
25818 </field>
25819 <field>
25820 <name>FB24</name>
25821 <description>Filter bits</description>
25822 <bitOffset>24</bitOffset>
25823 <bitWidth>1</bitWidth>
25824 </field>
25825 <field>
25826 <name>FB25</name>
25827 <description>Filter bits</description>
25828 <bitOffset>25</bitOffset>
25829 <bitWidth>1</bitWidth>
25830 </field>
25831 <field>
25832 <name>FB26</name>
25833 <description>Filter bits</description>
25834 <bitOffset>26</bitOffset>
25835 <bitWidth>1</bitWidth>
25836 </field>
25837 <field>
25838 <name>FB27</name>
25839 <description>Filter bits</description>
25840 <bitOffset>27</bitOffset>
25841 <bitWidth>1</bitWidth>
25842 </field>
25843 <field>
25844 <name>FB28</name>
25845 <description>Filter bits</description>
25846 <bitOffset>28</bitOffset>
25847 <bitWidth>1</bitWidth>
25848 </field>
25849 <field>
25850 <name>FB29</name>
25851 <description>Filter bits</description>
25852 <bitOffset>29</bitOffset>
25853 <bitWidth>1</bitWidth>
25854 </field>
25855 <field>
25856 <name>FB30</name>
25857 <description>Filter bits</description>
25858 <bitOffset>30</bitOffset>
25859 <bitWidth>1</bitWidth>
25860 </field>
25861 <field>
25862 <name>FB31</name>
25863 <description>Filter bits</description>
25864 <bitOffset>31</bitOffset>
25865 <bitWidth>1</bitWidth>
25866 </field>
25867 </fields>
25868 </register>
25869 <register>
25870 <name>F26R2</name>
25871 <displayName>F26R2</displayName>
25872 <description>Filter bank 26 register 2</description>
25873 <addressOffset>0x314</addressOffset>
25874 <size>0x20</size>
25875 <access>read-write</access>
25876 <resetValue>0x00000000</resetValue>
25877 <fields>
25878 <field>
25879 <name>FB0</name>
25880 <description>Filter bits</description>
25881 <bitOffset>0</bitOffset>
25882 <bitWidth>1</bitWidth>
25883 </field>
25884 <field>
25885 <name>FB1</name>
25886 <description>Filter bits</description>
25887 <bitOffset>1</bitOffset>
25888 <bitWidth>1</bitWidth>
25889 </field>
25890 <field>
25891 <name>FB2</name>
25892 <description>Filter bits</description>
25893 <bitOffset>2</bitOffset>
25894 <bitWidth>1</bitWidth>
25895 </field>
25896 <field>
25897 <name>FB3</name>
25898 <description>Filter bits</description>
25899 <bitOffset>3</bitOffset>
25900 <bitWidth>1</bitWidth>
25901 </field>
25902 <field>
25903 <name>FB4</name>
25904 <description>Filter bits</description>
25905 <bitOffset>4</bitOffset>
25906 <bitWidth>1</bitWidth>
25907 </field>
25908 <field>
25909 <name>FB5</name>
25910 <description>Filter bits</description>
25911 <bitOffset>5</bitOffset>
25912 <bitWidth>1</bitWidth>
25913 </field>
25914 <field>
25915 <name>FB6</name>
25916 <description>Filter bits</description>
25917 <bitOffset>6</bitOffset>
25918 <bitWidth>1</bitWidth>
25919 </field>
25920 <field>
25921 <name>FB7</name>
25922 <description>Filter bits</description>
25923 <bitOffset>7</bitOffset>
25924 <bitWidth>1</bitWidth>
25925 </field>
25926 <field>
25927 <name>FB8</name>
25928 <description>Filter bits</description>
25929 <bitOffset>8</bitOffset>
25930 <bitWidth>1</bitWidth>
25931 </field>
25932 <field>
25933 <name>FB9</name>
25934 <description>Filter bits</description>
25935 <bitOffset>9</bitOffset>
25936 <bitWidth>1</bitWidth>
25937 </field>
25938 <field>
25939 <name>FB10</name>
25940 <description>Filter bits</description>
25941 <bitOffset>10</bitOffset>
25942 <bitWidth>1</bitWidth>
25943 </field>
25944 <field>
25945 <name>FB11</name>
25946 <description>Filter bits</description>
25947 <bitOffset>11</bitOffset>
25948 <bitWidth>1</bitWidth>
25949 </field>
25950 <field>
25951 <name>FB12</name>
25952 <description>Filter bits</description>
25953 <bitOffset>12</bitOffset>
25954 <bitWidth>1</bitWidth>
25955 </field>
25956 <field>
25957 <name>FB13</name>
25958 <description>Filter bits</description>
25959 <bitOffset>13</bitOffset>
25960 <bitWidth>1</bitWidth>
25961 </field>
25962 <field>
25963 <name>FB14</name>
25964 <description>Filter bits</description>
25965 <bitOffset>14</bitOffset>
25966 <bitWidth>1</bitWidth>
25967 </field>
25968 <field>
25969 <name>FB15</name>
25970 <description>Filter bits</description>
25971 <bitOffset>15</bitOffset>
25972 <bitWidth>1</bitWidth>
25973 </field>
25974 <field>
25975 <name>FB16</name>
25976 <description>Filter bits</description>
25977 <bitOffset>16</bitOffset>
25978 <bitWidth>1</bitWidth>
25979 </field>
25980 <field>
25981 <name>FB17</name>
25982 <description>Filter bits</description>
25983 <bitOffset>17</bitOffset>
25984 <bitWidth>1</bitWidth>
25985 </field>
25986 <field>
25987 <name>FB18</name>
25988 <description>Filter bits</description>
25989 <bitOffset>18</bitOffset>
25990 <bitWidth>1</bitWidth>
25991 </field>
25992 <field>
25993 <name>FB19</name>
25994 <description>Filter bits</description>
25995 <bitOffset>19</bitOffset>
25996 <bitWidth>1</bitWidth>
25997 </field>
25998 <field>
25999 <name>FB20</name>
26000 <description>Filter bits</description>
26001 <bitOffset>20</bitOffset>
26002 <bitWidth>1</bitWidth>
26003 </field>
26004 <field>
26005 <name>FB21</name>
26006 <description>Filter bits</description>
26007 <bitOffset>21</bitOffset>
26008 <bitWidth>1</bitWidth>
26009 </field>
26010 <field>
26011 <name>FB22</name>
26012 <description>Filter bits</description>
26013 <bitOffset>22</bitOffset>
26014 <bitWidth>1</bitWidth>
26015 </field>
26016 <field>
26017 <name>FB23</name>
26018 <description>Filter bits</description>
26019 <bitOffset>23</bitOffset>
26020 <bitWidth>1</bitWidth>
26021 </field>
26022 <field>
26023 <name>FB24</name>
26024 <description>Filter bits</description>
26025 <bitOffset>24</bitOffset>
26026 <bitWidth>1</bitWidth>
26027 </field>
26028 <field>
26029 <name>FB25</name>
26030 <description>Filter bits</description>
26031 <bitOffset>25</bitOffset>
26032 <bitWidth>1</bitWidth>
26033 </field>
26034 <field>
26035 <name>FB26</name>
26036 <description>Filter bits</description>
26037 <bitOffset>26</bitOffset>
26038 <bitWidth>1</bitWidth>
26039 </field>
26040 <field>
26041 <name>FB27</name>
26042 <description>Filter bits</description>
26043 <bitOffset>27</bitOffset>
26044 <bitWidth>1</bitWidth>
26045 </field>
26046 <field>
26047 <name>FB28</name>
26048 <description>Filter bits</description>
26049 <bitOffset>28</bitOffset>
26050 <bitWidth>1</bitWidth>
26051 </field>
26052 <field>
26053 <name>FB29</name>
26054 <description>Filter bits</description>
26055 <bitOffset>29</bitOffset>
26056 <bitWidth>1</bitWidth>
26057 </field>
26058 <field>
26059 <name>FB30</name>
26060 <description>Filter bits</description>
26061 <bitOffset>30</bitOffset>
26062 <bitWidth>1</bitWidth>
26063 </field>
26064 <field>
26065 <name>FB31</name>
26066 <description>Filter bits</description>
26067 <bitOffset>31</bitOffset>
26068 <bitWidth>1</bitWidth>
26069 </field>
26070 </fields>
26071 </register>
26072 <register>
26073 <name>F27R1</name>
26074 <displayName>F27R1</displayName>
26075 <description>Filter bank 27 register 1</description>
26076 <addressOffset>0x318</addressOffset>
26077 <size>0x20</size>
26078 <access>read-write</access>
26079 <resetValue>0x00000000</resetValue>
26080 <fields>
26081 <field>
26082 <name>FB0</name>
26083 <description>Filter bits</description>
26084 <bitOffset>0</bitOffset>
26085 <bitWidth>1</bitWidth>
26086 </field>
26087 <field>
26088 <name>FB1</name>
26089 <description>Filter bits</description>
26090 <bitOffset>1</bitOffset>
26091 <bitWidth>1</bitWidth>
26092 </field>
26093 <field>
26094 <name>FB2</name>
26095 <description>Filter bits</description>
26096 <bitOffset>2</bitOffset>
26097 <bitWidth>1</bitWidth>
26098 </field>
26099 <field>
26100 <name>FB3</name>
26101 <description>Filter bits</description>
26102 <bitOffset>3</bitOffset>
26103 <bitWidth>1</bitWidth>
26104 </field>
26105 <field>
26106 <name>FB4</name>
26107 <description>Filter bits</description>
26108 <bitOffset>4</bitOffset>
26109 <bitWidth>1</bitWidth>
26110 </field>
26111 <field>
26112 <name>FB5</name>
26113 <description>Filter bits</description>
26114 <bitOffset>5</bitOffset>
26115 <bitWidth>1</bitWidth>
26116 </field>
26117 <field>
26118 <name>FB6</name>
26119 <description>Filter bits</description>
26120 <bitOffset>6</bitOffset>
26121 <bitWidth>1</bitWidth>
26122 </field>
26123 <field>
26124 <name>FB7</name>
26125 <description>Filter bits</description>
26126 <bitOffset>7</bitOffset>
26127 <bitWidth>1</bitWidth>
26128 </field>
26129 <field>
26130 <name>FB8</name>
26131 <description>Filter bits</description>
26132 <bitOffset>8</bitOffset>
26133 <bitWidth>1</bitWidth>
26134 </field>
26135 <field>
26136 <name>FB9</name>
26137 <description>Filter bits</description>
26138 <bitOffset>9</bitOffset>
26139 <bitWidth>1</bitWidth>
26140 </field>
26141 <field>
26142 <name>FB10</name>
26143 <description>Filter bits</description>
26144 <bitOffset>10</bitOffset>
26145 <bitWidth>1</bitWidth>
26146 </field>
26147 <field>
26148 <name>FB11</name>
26149 <description>Filter bits</description>
26150 <bitOffset>11</bitOffset>
26151 <bitWidth>1</bitWidth>
26152 </field>
26153 <field>
26154 <name>FB12</name>
26155 <description>Filter bits</description>
26156 <bitOffset>12</bitOffset>
26157 <bitWidth>1</bitWidth>
26158 </field>
26159 <field>
26160 <name>FB13</name>
26161 <description>Filter bits</description>
26162 <bitOffset>13</bitOffset>
26163 <bitWidth>1</bitWidth>
26164 </field>
26165 <field>
26166 <name>FB14</name>
26167 <description>Filter bits</description>
26168 <bitOffset>14</bitOffset>
26169 <bitWidth>1</bitWidth>
26170 </field>
26171 <field>
26172 <name>FB15</name>
26173 <description>Filter bits</description>
26174 <bitOffset>15</bitOffset>
26175 <bitWidth>1</bitWidth>
26176 </field>
26177 <field>
26178 <name>FB16</name>
26179 <description>Filter bits</description>
26180 <bitOffset>16</bitOffset>
26181 <bitWidth>1</bitWidth>
26182 </field>
26183 <field>
26184 <name>FB17</name>
26185 <description>Filter bits</description>
26186 <bitOffset>17</bitOffset>
26187 <bitWidth>1</bitWidth>
26188 </field>
26189 <field>
26190 <name>FB18</name>
26191 <description>Filter bits</description>
26192 <bitOffset>18</bitOffset>
26193 <bitWidth>1</bitWidth>
26194 </field>
26195 <field>
26196 <name>FB19</name>
26197 <description>Filter bits</description>
26198 <bitOffset>19</bitOffset>
26199 <bitWidth>1</bitWidth>
26200 </field>
26201 <field>
26202 <name>FB20</name>
26203 <description>Filter bits</description>
26204 <bitOffset>20</bitOffset>
26205 <bitWidth>1</bitWidth>
26206 </field>
26207 <field>
26208 <name>FB21</name>
26209 <description>Filter bits</description>
26210 <bitOffset>21</bitOffset>
26211 <bitWidth>1</bitWidth>
26212 </field>
26213 <field>
26214 <name>FB22</name>
26215 <description>Filter bits</description>
26216 <bitOffset>22</bitOffset>
26217 <bitWidth>1</bitWidth>
26218 </field>
26219 <field>
26220 <name>FB23</name>
26221 <description>Filter bits</description>
26222 <bitOffset>23</bitOffset>
26223 <bitWidth>1</bitWidth>
26224 </field>
26225 <field>
26226 <name>FB24</name>
26227 <description>Filter bits</description>
26228 <bitOffset>24</bitOffset>
26229 <bitWidth>1</bitWidth>
26230 </field>
26231 <field>
26232 <name>FB25</name>
26233 <description>Filter bits</description>
26234 <bitOffset>25</bitOffset>
26235 <bitWidth>1</bitWidth>
26236 </field>
26237 <field>
26238 <name>FB26</name>
26239 <description>Filter bits</description>
26240 <bitOffset>26</bitOffset>
26241 <bitWidth>1</bitWidth>
26242 </field>
26243 <field>
26244 <name>FB27</name>
26245 <description>Filter bits</description>
26246 <bitOffset>27</bitOffset>
26247 <bitWidth>1</bitWidth>
26248 </field>
26249 <field>
26250 <name>FB28</name>
26251 <description>Filter bits</description>
26252 <bitOffset>28</bitOffset>
26253 <bitWidth>1</bitWidth>
26254 </field>
26255 <field>
26256 <name>FB29</name>
26257 <description>Filter bits</description>
26258 <bitOffset>29</bitOffset>
26259 <bitWidth>1</bitWidth>
26260 </field>
26261 <field>
26262 <name>FB30</name>
26263 <description>Filter bits</description>
26264 <bitOffset>30</bitOffset>
26265 <bitWidth>1</bitWidth>
26266 </field>
26267 <field>
26268 <name>FB31</name>
26269 <description>Filter bits</description>
26270 <bitOffset>31</bitOffset>
26271 <bitWidth>1</bitWidth>
26272 </field>
26273 </fields>
26274 </register>
26275 <register>
26276 <name>F27R2</name>
26277 <displayName>F27R2</displayName>
26278 <description>Filter bank 27 register 2</description>
26279 <addressOffset>0x31C</addressOffset>
26280 <size>0x20</size>
26281 <access>read-write</access>
26282 <resetValue>0x00000000</resetValue>
26283 <fields>
26284 <field>
26285 <name>FB0</name>
26286 <description>Filter bits</description>
26287 <bitOffset>0</bitOffset>
26288 <bitWidth>1</bitWidth>
26289 </field>
26290 <field>
26291 <name>FB1</name>
26292 <description>Filter bits</description>
26293 <bitOffset>1</bitOffset>
26294 <bitWidth>1</bitWidth>
26295 </field>
26296 <field>
26297 <name>FB2</name>
26298 <description>Filter bits</description>
26299 <bitOffset>2</bitOffset>
26300 <bitWidth>1</bitWidth>
26301 </field>
26302 <field>
26303 <name>FB3</name>
26304 <description>Filter bits</description>
26305 <bitOffset>3</bitOffset>
26306 <bitWidth>1</bitWidth>
26307 </field>
26308 <field>
26309 <name>FB4</name>
26310 <description>Filter bits</description>
26311 <bitOffset>4</bitOffset>
26312 <bitWidth>1</bitWidth>
26313 </field>
26314 <field>
26315 <name>FB5</name>
26316 <description>Filter bits</description>
26317 <bitOffset>5</bitOffset>
26318 <bitWidth>1</bitWidth>
26319 </field>
26320 <field>
26321 <name>FB6</name>
26322 <description>Filter bits</description>
26323 <bitOffset>6</bitOffset>
26324 <bitWidth>1</bitWidth>
26325 </field>
26326 <field>
26327 <name>FB7</name>
26328 <description>Filter bits</description>
26329 <bitOffset>7</bitOffset>
26330 <bitWidth>1</bitWidth>
26331 </field>
26332 <field>
26333 <name>FB8</name>
26334 <description>Filter bits</description>
26335 <bitOffset>8</bitOffset>
26336 <bitWidth>1</bitWidth>
26337 </field>
26338 <field>
26339 <name>FB9</name>
26340 <description>Filter bits</description>
26341 <bitOffset>9</bitOffset>
26342 <bitWidth>1</bitWidth>
26343 </field>
26344 <field>
26345 <name>FB10</name>
26346 <description>Filter bits</description>
26347 <bitOffset>10</bitOffset>
26348 <bitWidth>1</bitWidth>
26349 </field>
26350 <field>
26351 <name>FB11</name>
26352 <description>Filter bits</description>
26353 <bitOffset>11</bitOffset>
26354 <bitWidth>1</bitWidth>
26355 </field>
26356 <field>
26357 <name>FB12</name>
26358 <description>Filter bits</description>
26359 <bitOffset>12</bitOffset>
26360 <bitWidth>1</bitWidth>
26361 </field>
26362 <field>
26363 <name>FB13</name>
26364 <description>Filter bits</description>
26365 <bitOffset>13</bitOffset>
26366 <bitWidth>1</bitWidth>
26367 </field>
26368 <field>
26369 <name>FB14</name>
26370 <description>Filter bits</description>
26371 <bitOffset>14</bitOffset>
26372 <bitWidth>1</bitWidth>
26373 </field>
26374 <field>
26375 <name>FB15</name>
26376 <description>Filter bits</description>
26377 <bitOffset>15</bitOffset>
26378 <bitWidth>1</bitWidth>
26379 </field>
26380 <field>
26381 <name>FB16</name>
26382 <description>Filter bits</description>
26383 <bitOffset>16</bitOffset>
26384 <bitWidth>1</bitWidth>
26385 </field>
26386 <field>
26387 <name>FB17</name>
26388 <description>Filter bits</description>
26389 <bitOffset>17</bitOffset>
26390 <bitWidth>1</bitWidth>
26391 </field>
26392 <field>
26393 <name>FB18</name>
26394 <description>Filter bits</description>
26395 <bitOffset>18</bitOffset>
26396 <bitWidth>1</bitWidth>
26397 </field>
26398 <field>
26399 <name>FB19</name>
26400 <description>Filter bits</description>
26401 <bitOffset>19</bitOffset>
26402 <bitWidth>1</bitWidth>
26403 </field>
26404 <field>
26405 <name>FB20</name>
26406 <description>Filter bits</description>
26407 <bitOffset>20</bitOffset>
26408 <bitWidth>1</bitWidth>
26409 </field>
26410 <field>
26411 <name>FB21</name>
26412 <description>Filter bits</description>
26413 <bitOffset>21</bitOffset>
26414 <bitWidth>1</bitWidth>
26415 </field>
26416 <field>
26417 <name>FB22</name>
26418 <description>Filter bits</description>
26419 <bitOffset>22</bitOffset>
26420 <bitWidth>1</bitWidth>
26421 </field>
26422 <field>
26423 <name>FB23</name>
26424 <description>Filter bits</description>
26425 <bitOffset>23</bitOffset>
26426 <bitWidth>1</bitWidth>
26427 </field>
26428 <field>
26429 <name>FB24</name>
26430 <description>Filter bits</description>
26431 <bitOffset>24</bitOffset>
26432 <bitWidth>1</bitWidth>
26433 </field>
26434 <field>
26435 <name>FB25</name>
26436 <description>Filter bits</description>
26437 <bitOffset>25</bitOffset>
26438 <bitWidth>1</bitWidth>
26439 </field>
26440 <field>
26441 <name>FB26</name>
26442 <description>Filter bits</description>
26443 <bitOffset>26</bitOffset>
26444 <bitWidth>1</bitWidth>
26445 </field>
26446 <field>
26447 <name>FB27</name>
26448 <description>Filter bits</description>
26449 <bitOffset>27</bitOffset>
26450 <bitWidth>1</bitWidth>
26451 </field>
26452 <field>
26453 <name>FB28</name>
26454 <description>Filter bits</description>
26455 <bitOffset>28</bitOffset>
26456 <bitWidth>1</bitWidth>
26457 </field>
26458 <field>
26459 <name>FB29</name>
26460 <description>Filter bits</description>
26461 <bitOffset>29</bitOffset>
26462 <bitWidth>1</bitWidth>
26463 </field>
26464 <field>
26465 <name>FB30</name>
26466 <description>Filter bits</description>
26467 <bitOffset>30</bitOffset>
26468 <bitWidth>1</bitWidth>
26469 </field>
26470 <field>
26471 <name>FB31</name>
26472 <description>Filter bits</description>
26473 <bitOffset>31</bitOffset>
26474 <bitWidth>1</bitWidth>
26475 </field>
26476 </fields>
26477 </register>
26478 </registers>
26479 </peripheral>
26480 <peripheral>
26481 <name>USB_FS</name>
26482 <description>Universal serial bus full-speed device
26483 interface</description>
26484 <groupName>USB_FS</groupName>
26485 <baseAddress>0x40005C00</baseAddress>
26486 <addressBlock>
26487 <offset>0x0</offset>
26488 <size>0x400</size>
26489 <usage>registers</usage>
26490 </addressBlock>
26491 <interrupt>
26492 <name>USB_WKUP</name>
26493 <description>USB wakeup from Suspend</description>
26494 <value>42</value>
26495 </interrupt>
26496 <interrupt>
26497 <name>USB_HP</name>
26498 <description>USB High priority interrupt</description>
26499 <value>74</value>
26500 </interrupt>
26501 <interrupt>
26502 <name>USB_LP</name>
26503 <description>USB Low priority interrupt</description>
26504 <value>75</value>
26505 </interrupt>
26506 <registers>
26507 <register>
26508 <name>USB_EP0R</name>
26509 <displayName>USB_EP0R</displayName>
26510 <description>endpoint 0 register</description>
26511 <addressOffset>0x0</addressOffset>
26512 <size>0x20</size>
26513 <resetValue>0x00000000</resetValue>
26514 <fields>
26515 <field>
26516 <name>EA</name>
26517 <description>Endpoint address</description>
26518 <bitOffset>0</bitOffset>
26519 <bitWidth>4</bitWidth>
26520 <access>read-write</access>
26521 </field>
26522 <field>
26523 <name>STAT_TX</name>
26524 <description>Status bits, for transmission
26525 transfers</description>
26526 <bitOffset>4</bitOffset>
26527 <bitWidth>2</bitWidth>
26528 <access>read-write</access>
26529 </field>
26530 <field>
26531 <name>DTOG_TX</name>
26532 <description>Data Toggle, for transmission
26533 transfers</description>
26534 <bitOffset>6</bitOffset>
26535 <bitWidth>1</bitWidth>
26536 <access>read-write</access>
26537 </field>
26538 <field>
26539 <name>CTR_TX</name>
26540 <description>Correct Transfer for
26541 transmission</description>
26542 <bitOffset>7</bitOffset>
26543 <bitWidth>1</bitWidth>
26544 <access>read-write</access>
26545 </field>
26546 <field>
26547 <name>EP_KIND</name>
26548 <description>Endpoint kind</description>
26549 <bitOffset>8</bitOffset>
26550 <bitWidth>1</bitWidth>
26551 <access>read-write</access>
26552 </field>
26553 <field>
26554 <name>EP_TYPE</name>
26555 <description>Endpoint type</description>
26556 <bitOffset>9</bitOffset>
26557 <bitWidth>2</bitWidth>
26558 <access>read-write</access>
26559 </field>
26560 <field>
26561 <name>SETUP</name>
26562 <description>Setup transaction
26563 completed</description>
26564 <bitOffset>11</bitOffset>
26565 <bitWidth>1</bitWidth>
26566 <access>read-only</access>
26567 </field>
26568 <field>
26569 <name>STAT_RX</name>
26570 <description>Status bits, for reception
26571 transfers</description>
26572 <bitOffset>12</bitOffset>
26573 <bitWidth>2</bitWidth>
26574 <access>read-write</access>
26575 </field>
26576 <field>
26577 <name>DTOG_RX</name>
26578 <description>Data Toggle, for reception
26579 transfers</description>
26580 <bitOffset>14</bitOffset>
26581 <bitWidth>1</bitWidth>
26582 <access>read-write</access>
26583 </field>
26584 <field>
26585 <name>CTR_RX</name>
26586 <description>Correct transfer for
26587 reception</description>
26588 <bitOffset>15</bitOffset>
26589 <bitWidth>1</bitWidth>
26590 <access>read-write</access>
26591 </field>
26592 </fields>
26593 </register>
26594 <register>
26595 <name>USB_EP1R</name>
26596 <displayName>USB_EP1R</displayName>
26597 <description>endpoint 1 register</description>
26598 <addressOffset>0x4</addressOffset>
26599 <size>0x20</size>
26600 <resetValue>0x00000000</resetValue>
26601 <fields>
26602 <field>
26603 <name>EA</name>
26604 <description>Endpoint address</description>
26605 <bitOffset>0</bitOffset>
26606 <bitWidth>4</bitWidth>
26607 <access>read-write</access>
26608 </field>
26609 <field>
26610 <name>STAT_TX</name>
26611 <description>Status bits, for transmission
26612 transfers</description>
26613 <bitOffset>4</bitOffset>
26614 <bitWidth>2</bitWidth>
26615 <access>read-write</access>
26616 </field>
26617 <field>
26618 <name>DTOG_TX</name>
26619 <description>Data Toggle, for transmission
26620 transfers</description>
26621 <bitOffset>6</bitOffset>
26622 <bitWidth>1</bitWidth>
26623 <access>read-write</access>
26624 </field>
26625 <field>
26626 <name>CTR_TX</name>
26627 <description>Correct Transfer for
26628 transmission</description>
26629 <bitOffset>7</bitOffset>
26630 <bitWidth>1</bitWidth>
26631 <access>read-write</access>
26632 </field>
26633 <field>
26634 <name>EP_KIND</name>
26635 <description>Endpoint kind</description>
26636 <bitOffset>8</bitOffset>
26637 <bitWidth>1</bitWidth>
26638 <access>read-write</access>
26639 </field>
26640 <field>
26641 <name>EP_TYPE</name>
26642 <description>Endpoint type</description>
26643 <bitOffset>9</bitOffset>
26644 <bitWidth>2</bitWidth>
26645 <access>read-write</access>
26646 </field>
26647 <field>
26648 <name>SETUP</name>
26649 <description>Setup transaction
26650 completed</description>
26651 <bitOffset>11</bitOffset>
26652 <bitWidth>1</bitWidth>
26653 <access>read-only</access>
26654 </field>
26655 <field>
26656 <name>STAT_RX</name>
26657 <description>Status bits, for reception
26658 transfers</description>
26659 <bitOffset>12</bitOffset>
26660 <bitWidth>2</bitWidth>
26661 <access>read-write</access>
26662 </field>
26663 <field>
26664 <name>DTOG_RX</name>
26665 <description>Data Toggle, for reception
26666 transfers</description>
26667 <bitOffset>14</bitOffset>
26668 <bitWidth>1</bitWidth>
26669 <access>read-write</access>
26670 </field>
26671 <field>
26672 <name>CTR_RX</name>
26673 <description>Correct transfer for
26674 reception</description>
26675 <bitOffset>15</bitOffset>
26676 <bitWidth>1</bitWidth>
26677 <access>read-write</access>
26678 </field>
26679 </fields>
26680 </register>
26681 <register>
26682 <name>USB_EP2R</name>
26683 <displayName>USB_EP2R</displayName>
26684 <description>endpoint 2 register</description>
26685 <addressOffset>0x8</addressOffset>
26686 <size>0x20</size>
26687 <resetValue>0x00000000</resetValue>
26688 <fields>
26689 <field>
26690 <name>EA</name>
26691 <description>Endpoint address</description>
26692 <bitOffset>0</bitOffset>
26693 <bitWidth>4</bitWidth>
26694 <access>read-write</access>
26695 </field>
26696 <field>
26697 <name>STAT_TX</name>
26698 <description>Status bits, for transmission
26699 transfers</description>
26700 <bitOffset>4</bitOffset>
26701 <bitWidth>2</bitWidth>
26702 <access>read-write</access>
26703 </field>
26704 <field>
26705 <name>DTOG_TX</name>
26706 <description>Data Toggle, for transmission
26707 transfers</description>
26708 <bitOffset>6</bitOffset>
26709 <bitWidth>1</bitWidth>
26710 <access>read-write</access>
26711 </field>
26712 <field>
26713 <name>CTR_TX</name>
26714 <description>Correct Transfer for
26715 transmission</description>
26716 <bitOffset>7</bitOffset>
26717 <bitWidth>1</bitWidth>
26718 <access>read-write</access>
26719 </field>
26720 <field>
26721 <name>EP_KIND</name>
26722 <description>Endpoint kind</description>
26723 <bitOffset>8</bitOffset>
26724 <bitWidth>1</bitWidth>
26725 <access>read-write</access>
26726 </field>
26727 <field>
26728 <name>EP_TYPE</name>
26729 <description>Endpoint type</description>
26730 <bitOffset>9</bitOffset>
26731 <bitWidth>2</bitWidth>
26732 <access>read-write</access>
26733 </field>
26734 <field>
26735 <name>SETUP</name>
26736 <description>Setup transaction
26737 completed</description>
26738 <bitOffset>11</bitOffset>
26739 <bitWidth>1</bitWidth>
26740 <access>read-only</access>
26741 </field>
26742 <field>
26743 <name>STAT_RX</name>
26744 <description>Status bits, for reception
26745 transfers</description>
26746 <bitOffset>12</bitOffset>
26747 <bitWidth>2</bitWidth>
26748 <access>read-write</access>
26749 </field>
26750 <field>
26751 <name>DTOG_RX</name>
26752 <description>Data Toggle, for reception
26753 transfers</description>
26754 <bitOffset>14</bitOffset>
26755 <bitWidth>1</bitWidth>
26756 <access>read-write</access>
26757 </field>
26758 <field>
26759 <name>CTR_RX</name>
26760 <description>Correct transfer for
26761 reception</description>
26762 <bitOffset>15</bitOffset>
26763 <bitWidth>1</bitWidth>
26764 <access>read-write</access>
26765 </field>
26766 </fields>
26767 </register>
26768 <register>
26769 <name>USB_EP3R</name>
26770 <displayName>USB_EP3R</displayName>
26771 <description>endpoint 3 register</description>
26772 <addressOffset>0xC</addressOffset>
26773 <size>0x20</size>
26774 <resetValue>0x00000000</resetValue>
26775 <fields>
26776 <field>
26777 <name>EA</name>
26778 <description>Endpoint address</description>
26779 <bitOffset>0</bitOffset>
26780 <bitWidth>4</bitWidth>
26781 <access>read-write</access>
26782 </field>
26783 <field>
26784 <name>STAT_TX</name>
26785 <description>Status bits, for transmission
26786 transfers</description>
26787 <bitOffset>4</bitOffset>
26788 <bitWidth>2</bitWidth>
26789 <access>read-write</access>
26790 </field>
26791 <field>
26792 <name>DTOG_TX</name>
26793 <description>Data Toggle, for transmission
26794 transfers</description>
26795 <bitOffset>6</bitOffset>
26796 <bitWidth>1</bitWidth>
26797 <access>read-write</access>
26798 </field>
26799 <field>
26800 <name>CTR_TX</name>
26801 <description>Correct Transfer for
26802 transmission</description>
26803 <bitOffset>7</bitOffset>
26804 <bitWidth>1</bitWidth>
26805 <access>read-write</access>
26806 </field>
26807 <field>
26808 <name>EP_KIND</name>
26809 <description>Endpoint kind</description>
26810 <bitOffset>8</bitOffset>
26811 <bitWidth>1</bitWidth>
26812 <access>read-write</access>
26813 </field>
26814 <field>
26815 <name>EP_TYPE</name>
26816 <description>Endpoint type</description>
26817 <bitOffset>9</bitOffset>
26818 <bitWidth>2</bitWidth>
26819 <access>read-write</access>
26820 </field>
26821 <field>
26822 <name>SETUP</name>
26823 <description>Setup transaction
26824 completed</description>
26825 <bitOffset>11</bitOffset>
26826 <bitWidth>1</bitWidth>
26827 <access>read-only</access>
26828 </field>
26829 <field>
26830 <name>STAT_RX</name>
26831 <description>Status bits, for reception
26832 transfers</description>
26833 <bitOffset>12</bitOffset>
26834 <bitWidth>2</bitWidth>
26835 <access>read-write</access>
26836 </field>
26837 <field>
26838 <name>DTOG_RX</name>
26839 <description>Data Toggle, for reception
26840 transfers</description>
26841 <bitOffset>14</bitOffset>
26842 <bitWidth>1</bitWidth>
26843 <access>read-write</access>
26844 </field>
26845 <field>
26846 <name>CTR_RX</name>
26847 <description>Correct transfer for
26848 reception</description>
26849 <bitOffset>15</bitOffset>
26850 <bitWidth>1</bitWidth>
26851 <access>read-write</access>
26852 </field>
26853 </fields>
26854 </register>
26855 <register>
26856 <name>USB_EP4R</name>
26857 <displayName>USB_EP4R</displayName>
26858 <description>endpoint 4 register</description>
26859 <addressOffset>0x10</addressOffset>
26860 <size>0x20</size>
26861 <resetValue>0x00000000</resetValue>
26862 <fields>
26863 <field>
26864 <name>EA</name>
26865 <description>Endpoint address</description>
26866 <bitOffset>0</bitOffset>
26867 <bitWidth>4</bitWidth>
26868 <access>read-write</access>
26869 </field>
26870 <field>
26871 <name>STAT_TX</name>
26872 <description>Status bits, for transmission
26873 transfers</description>
26874 <bitOffset>4</bitOffset>
26875 <bitWidth>2</bitWidth>
26876 <access>read-write</access>
26877 </field>
26878 <field>
26879 <name>DTOG_TX</name>
26880 <description>Data Toggle, for transmission
26881 transfers</description>
26882 <bitOffset>6</bitOffset>
26883 <bitWidth>1</bitWidth>
26884 <access>read-write</access>
26885 </field>
26886 <field>
26887 <name>CTR_TX</name>
26888 <description>Correct Transfer for
26889 transmission</description>
26890 <bitOffset>7</bitOffset>
26891 <bitWidth>1</bitWidth>
26892 <access>read-write</access>
26893 </field>
26894 <field>
26895 <name>EP_KIND</name>
26896 <description>Endpoint kind</description>
26897 <bitOffset>8</bitOffset>
26898 <bitWidth>1</bitWidth>
26899 <access>read-write</access>
26900 </field>
26901 <field>
26902 <name>EP_TYPE</name>
26903 <description>Endpoint type</description>
26904 <bitOffset>9</bitOffset>
26905 <bitWidth>2</bitWidth>
26906 <access>read-write</access>
26907 </field>
26908 <field>
26909 <name>SETUP</name>
26910 <description>Setup transaction
26911 completed</description>
26912 <bitOffset>11</bitOffset>
26913 <bitWidth>1</bitWidth>
26914 <access>read-only</access>
26915 </field>
26916 <field>
26917 <name>STAT_RX</name>
26918 <description>Status bits, for reception
26919 transfers</description>
26920 <bitOffset>12</bitOffset>
26921 <bitWidth>2</bitWidth>
26922 <access>read-write</access>
26923 </field>
26924 <field>
26925 <name>DTOG_RX</name>
26926 <description>Data Toggle, for reception
26927 transfers</description>
26928 <bitOffset>14</bitOffset>
26929 <bitWidth>1</bitWidth>
26930 <access>read-write</access>
26931 </field>
26932 <field>
26933 <name>CTR_RX</name>
26934 <description>Correct transfer for
26935 reception</description>
26936 <bitOffset>15</bitOffset>
26937 <bitWidth>1</bitWidth>
26938 <access>read-write</access>
26939 </field>
26940 </fields>
26941 </register>
26942 <register>
26943 <name>USB_EP5R</name>
26944 <displayName>USB_EP5R</displayName>
26945 <description>endpoint 5 register</description>
26946 <addressOffset>0x14</addressOffset>
26947 <size>0x20</size>
26948 <resetValue>0x00000000</resetValue>
26949 <fields>
26950 <field>
26951 <name>EA</name>
26952 <description>Endpoint address</description>
26953 <bitOffset>0</bitOffset>
26954 <bitWidth>4</bitWidth>
26955 <access>read-write</access>
26956 </field>
26957 <field>
26958 <name>STAT_TX</name>
26959 <description>Status bits, for transmission
26960 transfers</description>
26961 <bitOffset>4</bitOffset>
26962 <bitWidth>2</bitWidth>
26963 <access>read-write</access>
26964 </field>
26965 <field>
26966 <name>DTOG_TX</name>
26967 <description>Data Toggle, for transmission
26968 transfers</description>
26969 <bitOffset>6</bitOffset>
26970 <bitWidth>1</bitWidth>
26971 <access>read-write</access>
26972 </field>
26973 <field>
26974 <name>CTR_TX</name>
26975 <description>Correct Transfer for
26976 transmission</description>
26977 <bitOffset>7</bitOffset>
26978 <bitWidth>1</bitWidth>
26979 <access>read-write</access>
26980 </field>
26981 <field>
26982 <name>EP_KIND</name>
26983 <description>Endpoint kind</description>
26984 <bitOffset>8</bitOffset>
26985 <bitWidth>1</bitWidth>
26986 <access>read-write</access>
26987 </field>
26988 <field>
26989 <name>EP_TYPE</name>
26990 <description>Endpoint type</description>
26991 <bitOffset>9</bitOffset>
26992 <bitWidth>2</bitWidth>
26993 <access>read-write</access>
26994 </field>
26995 <field>
26996 <name>SETUP</name>
26997 <description>Setup transaction
26998 completed</description>
26999 <bitOffset>11</bitOffset>
27000 <bitWidth>1</bitWidth>
27001 <access>read-only</access>
27002 </field>
27003 <field>
27004 <name>STAT_RX</name>
27005 <description>Status bits, for reception
27006 transfers</description>
27007 <bitOffset>12</bitOffset>
27008 <bitWidth>2</bitWidth>
27009 <access>read-write</access>
27010 </field>
27011 <field>
27012 <name>DTOG_RX</name>
27013 <description>Data Toggle, for reception
27014 transfers</description>
27015 <bitOffset>14</bitOffset>
27016 <bitWidth>1</bitWidth>
27017 <access>read-write</access>
27018 </field>
27019 <field>
27020 <name>CTR_RX</name>
27021 <description>Correct transfer for
27022 reception</description>
27023 <bitOffset>15</bitOffset>
27024 <bitWidth>1</bitWidth>
27025 <access>read-write</access>
27026 </field>
27027 </fields>
27028 </register>
27029 <register>
27030 <name>USB_EP6R</name>
27031 <displayName>USB_EP6R</displayName>
27032 <description>endpoint 6 register</description>
27033 <addressOffset>0x18</addressOffset>
27034 <size>0x20</size>
27035 <resetValue>0x00000000</resetValue>
27036 <fields>
27037 <field>
27038 <name>EA</name>
27039 <description>Endpoint address</description>
27040 <bitOffset>0</bitOffset>
27041 <bitWidth>4</bitWidth>
27042 <access>read-write</access>
27043 </field>
27044 <field>
27045 <name>STAT_TX</name>
27046 <description>Status bits, for transmission
27047 transfers</description>
27048 <bitOffset>4</bitOffset>
27049 <bitWidth>2</bitWidth>
27050 <access>read-write</access>
27051 </field>
27052 <field>
27053 <name>DTOG_TX</name>
27054 <description>Data Toggle, for transmission
27055 transfers</description>
27056 <bitOffset>6</bitOffset>
27057 <bitWidth>1</bitWidth>
27058 <access>read-write</access>
27059 </field>
27060 <field>
27061 <name>CTR_TX</name>
27062 <description>Correct Transfer for
27063 transmission</description>
27064 <bitOffset>7</bitOffset>
27065 <bitWidth>1</bitWidth>
27066 <access>read-write</access>
27067 </field>
27068 <field>
27069 <name>EP_KIND</name>
27070 <description>Endpoint kind</description>
27071 <bitOffset>8</bitOffset>
27072 <bitWidth>1</bitWidth>
27073 <access>read-write</access>
27074 </field>
27075 <field>
27076 <name>EP_TYPE</name>
27077 <description>Endpoint type</description>
27078 <bitOffset>9</bitOffset>
27079 <bitWidth>2</bitWidth>
27080 <access>read-write</access>
27081 </field>
27082 <field>
27083 <name>SETUP</name>
27084 <description>Setup transaction
27085 completed</description>
27086 <bitOffset>11</bitOffset>
27087 <bitWidth>1</bitWidth>
27088 <access>read-only</access>
27089 </field>
27090 <field>
27091 <name>STAT_RX</name>
27092 <description>Status bits, for reception
27093 transfers</description>
27094 <bitOffset>12</bitOffset>
27095 <bitWidth>2</bitWidth>
27096 <access>read-write</access>
27097 </field>
27098 <field>
27099 <name>DTOG_RX</name>
27100 <description>Data Toggle, for reception
27101 transfers</description>
27102 <bitOffset>14</bitOffset>
27103 <bitWidth>1</bitWidth>
27104 <access>read-write</access>
27105 </field>
27106 <field>
27107 <name>CTR_RX</name>
27108 <description>Correct transfer for
27109 reception</description>
27110 <bitOffset>15</bitOffset>
27111 <bitWidth>1</bitWidth>
27112 <access>read-write</access>
27113 </field>
27114 </fields>
27115 </register>
27116 <register>
27117 <name>USB_EP7R</name>
27118 <displayName>USB_EP7R</displayName>
27119 <description>endpoint 7 register</description>
27120 <addressOffset>0x1C</addressOffset>
27121 <size>0x20</size>
27122 <resetValue>0x00000000</resetValue>
27123 <fields>
27124 <field>
27125 <name>EA</name>
27126 <description>Endpoint address</description>
27127 <bitOffset>0</bitOffset>
27128 <bitWidth>4</bitWidth>
27129 <access>read-write</access>
27130 </field>
27131 <field>
27132 <name>STAT_TX</name>
27133 <description>Status bits, for transmission
27134 transfers</description>
27135 <bitOffset>4</bitOffset>
27136 <bitWidth>2</bitWidth>
27137 <access>read-write</access>
27138 </field>
27139 <field>
27140 <name>DTOG_TX</name>
27141 <description>Data Toggle, for transmission
27142 transfers</description>
27143 <bitOffset>6</bitOffset>
27144 <bitWidth>1</bitWidth>
27145 <access>read-write</access>
27146 </field>
27147 <field>
27148 <name>CTR_TX</name>
27149 <description>Correct Transfer for
27150 transmission</description>
27151 <bitOffset>7</bitOffset>
27152 <bitWidth>1</bitWidth>
27153 <access>read-write</access>
27154 </field>
27155 <field>
27156 <name>EP_KIND</name>
27157 <description>Endpoint kind</description>
27158 <bitOffset>8</bitOffset>
27159 <bitWidth>1</bitWidth>
27160 <access>read-write</access>
27161 </field>
27162 <field>
27163 <name>EP_TYPE</name>
27164 <description>Endpoint type</description>
27165 <bitOffset>9</bitOffset>
27166 <bitWidth>2</bitWidth>
27167 <access>read-write</access>
27168 </field>
27169 <field>
27170 <name>SETUP</name>
27171 <description>Setup transaction
27172 completed</description>
27173 <bitOffset>11</bitOffset>
27174 <bitWidth>1</bitWidth>
27175 <access>read-only</access>
27176 </field>
27177 <field>
27178 <name>STAT_RX</name>
27179 <description>Status bits, for reception
27180 transfers</description>
27181 <bitOffset>12</bitOffset>
27182 <bitWidth>2</bitWidth>
27183 <access>read-write</access>
27184 </field>
27185 <field>
27186 <name>DTOG_RX</name>
27187 <description>Data Toggle, for reception
27188 transfers</description>
27189 <bitOffset>14</bitOffset>
27190 <bitWidth>1</bitWidth>
27191 <access>read-write</access>
27192 </field>
27193 <field>
27194 <name>CTR_RX</name>
27195 <description>Correct transfer for
27196 reception</description>
27197 <bitOffset>15</bitOffset>
27198 <bitWidth>1</bitWidth>
27199 <access>read-write</access>
27200 </field>
27201 </fields>
27202 </register>
27203 <register>
27204 <name>USB_CNTR</name>
27205 <displayName>USB_CNTR</displayName>
27206 <description>control register</description>
27207 <addressOffset>0x40</addressOffset>
27208 <size>0x20</size>
27209 <access>read-write</access>
27210 <resetValue>0x00000003</resetValue>
27211 <fields>
27212 <field>
27213 <name>FRES</name>
27214 <description>Force USB Reset</description>
27215 <bitOffset>0</bitOffset>
27216 <bitWidth>1</bitWidth>
27217 </field>
27218 <field>
27219 <name>PDWN</name>
27220 <description>Power down</description>
27221 <bitOffset>1</bitOffset>
27222 <bitWidth>1</bitWidth>
27223 </field>
27224 <field>
27225 <name>LPMODE</name>
27226 <description>Low-power mode</description>
27227 <bitOffset>2</bitOffset>
27228 <bitWidth>1</bitWidth>
27229 </field>
27230 <field>
27231 <name>FSUSP</name>
27232 <description>Force suspend</description>
27233 <bitOffset>3</bitOffset>
27234 <bitWidth>1</bitWidth>
27235 </field>
27236 <field>
27237 <name>RESUME</name>
27238 <description>Resume request</description>
27239 <bitOffset>4</bitOffset>
27240 <bitWidth>1</bitWidth>
27241 </field>
27242 <field>
27243 <name>ESOFM</name>
27244 <description>Expected start of frame interrupt
27245 mask</description>
27246 <bitOffset>8</bitOffset>
27247 <bitWidth>1</bitWidth>
27248 </field>
27249 <field>
27250 <name>SOFM</name>
27251 <description>Start of frame interrupt
27252 mask</description>
27253 <bitOffset>9</bitOffset>
27254 <bitWidth>1</bitWidth>
27255 </field>
27256 <field>
27257 <name>RESETM</name>
27258 <description>USB reset interrupt mask</description>
27259 <bitOffset>10</bitOffset>
27260 <bitWidth>1</bitWidth>
27261 </field>
27262 <field>
27263 <name>SUSPM</name>
27264 <description>Suspend mode interrupt
27265 mask</description>
27266 <bitOffset>11</bitOffset>
27267 <bitWidth>1</bitWidth>
27268 </field>
27269 <field>
27270 <name>WKUPM</name>
27271 <description>Wakeup interrupt mask</description>
27272 <bitOffset>12</bitOffset>
27273 <bitWidth>1</bitWidth>
27274 </field>
27275 <field>
27276 <name>ERRM</name>
27277 <description>Error interrupt mask</description>
27278 <bitOffset>13</bitOffset>
27279 <bitWidth>1</bitWidth>
27280 </field>
27281 <field>
27282 <name>PMAOVRM</name>
27283 <description>Packet memory area over / underrun
27284 interrupt mask</description>
27285 <bitOffset>14</bitOffset>
27286 <bitWidth>1</bitWidth>
27287 </field>
27288 <field>
27289 <name>CTRM</name>
27290 <description>Correct transfer interrupt
27291 mask</description>
27292 <bitOffset>15</bitOffset>
27293 <bitWidth>1</bitWidth>
27294 </field>
27295 </fields>
27296 </register>
27297 <register>
27298 <name>ISTR</name>
27299 <displayName>ISTR</displayName>
27300 <description>interrupt status register</description>
27301 <addressOffset>0x44</addressOffset>
27302 <size>0x20</size>
27303 <resetValue>0x00000000</resetValue>
27304 <fields>
27305 <field>
27306 <name>EP_ID</name>
27307 <description>Endpoint Identifier</description>
27308 <bitOffset>0</bitOffset>
27309 <bitWidth>4</bitWidth>
27310 <access>read-only</access>
27311 </field>
27312 <field>
27313 <name>DIR</name>
27314 <description>Direction of transaction</description>
27315 <bitOffset>4</bitOffset>
27316 <bitWidth>1</bitWidth>
27317 <access>read-only</access>
27318 </field>
27319 <field>
27320 <name>ESOF</name>
27321 <description>Expected start frame</description>
27322 <bitOffset>8</bitOffset>
27323 <bitWidth>1</bitWidth>
27324 <access>read-write</access>
27325 </field>
27326 <field>
27327 <name>SOF</name>
27328 <description>start of frame</description>
27329 <bitOffset>9</bitOffset>
27330 <bitWidth>1</bitWidth>
27331 <access>read-write</access>
27332 </field>
27333 <field>
27334 <name>RESET</name>
27335 <description>reset request</description>
27336 <bitOffset>10</bitOffset>
27337 <bitWidth>1</bitWidth>
27338 <access>read-write</access>
27339 </field>
27340 <field>
27341 <name>SUSP</name>
27342 <description>Suspend mode request</description>
27343 <bitOffset>11</bitOffset>
27344 <bitWidth>1</bitWidth>
27345 <access>read-write</access>
27346 </field>
27347 <field>
27348 <name>WKUP</name>
27349 <description>Wakeup</description>
27350 <bitOffset>12</bitOffset>
27351 <bitWidth>1</bitWidth>
27352 <access>read-write</access>
27353 </field>
27354 <field>
27355 <name>ERR</name>
27356 <description>Error</description>
27357 <bitOffset>13</bitOffset>
27358 <bitWidth>1</bitWidth>
27359 <access>read-write</access>
27360 </field>
27361 <field>
27362 <name>PMAOVR</name>
27363 <description>Packet memory area over /
27364 underrun</description>
27365 <bitOffset>14</bitOffset>
27366 <bitWidth>1</bitWidth>
27367 <access>read-write</access>
27368 </field>
27369 <field>
27370 <name>CTR</name>
27371 <description>Correct transfer</description>
27372 <bitOffset>15</bitOffset>
27373 <bitWidth>1</bitWidth>
27374 <access>read-only</access>
27375 </field>
27376 </fields>
27377 </register>
27378 <register>
27379 <name>FNR</name>
27380 <displayName>FNR</displayName>
27381 <description>frame number register</description>
27382 <addressOffset>0x48</addressOffset>
27383 <size>0x20</size>
27384 <access>read-only</access>
27385 <resetValue>0x0000</resetValue>
27386 <fields>
27387 <field>
27388 <name>FN</name>
27389 <description>Frame number</description>
27390 <bitOffset>0</bitOffset>
27391 <bitWidth>11</bitWidth>
27392 </field>
27393 <field>
27394 <name>LSOF</name>
27395 <description>Lost SOF</description>
27396 <bitOffset>11</bitOffset>
27397 <bitWidth>2</bitWidth>
27398 </field>
27399 <field>
27400 <name>LCK</name>
27401 <description>Locked</description>
27402 <bitOffset>13</bitOffset>
27403 <bitWidth>1</bitWidth>
27404 </field>
27405 <field>
27406 <name>RXDM</name>
27407 <description>Receive data - line status</description>
27408 <bitOffset>14</bitOffset>
27409 <bitWidth>1</bitWidth>
27410 </field>
27411 <field>
27412 <name>RXDP</name>
27413 <description>Receive data + line status</description>
27414 <bitOffset>15</bitOffset>
27415 <bitWidth>1</bitWidth>
27416 </field>
27417 </fields>
27418 </register>
27419 <register>
27420 <name>DADDR</name>
27421 <displayName>DADDR</displayName>
27422 <description>device address</description>
27423 <addressOffset>0x4C</addressOffset>
27424 <size>0x20</size>
27425 <access>read-write</access>
27426 <resetValue>0x0000</resetValue>
27427 <fields>
27428 <field>
27429 <name>ADD</name>
27430 <description>Device address</description>
27431 <bitOffset>0</bitOffset>
27432 <bitWidth>1</bitWidth>
27433 </field>
27434 <field>
27435 <name>ADD1</name>
27436 <description>Device address</description>
27437 <bitOffset>1</bitOffset>
27438 <bitWidth>1</bitWidth>
27439 </field>
27440 <field>
27441 <name>ADD2</name>
27442 <description>Device address</description>
27443 <bitOffset>2</bitOffset>
27444 <bitWidth>1</bitWidth>
27445 </field>
27446 <field>
27447 <name>ADD3</name>
27448 <description>Device address</description>
27449 <bitOffset>3</bitOffset>
27450 <bitWidth>1</bitWidth>
27451 </field>
27452 <field>
27453 <name>ADD4</name>
27454 <description>Device address</description>
27455 <bitOffset>4</bitOffset>
27456 <bitWidth>1</bitWidth>
27457 </field>
27458 <field>
27459 <name>ADD5</name>
27460 <description>Device address</description>
27461 <bitOffset>5</bitOffset>
27462 <bitWidth>1</bitWidth>
27463 </field>
27464 <field>
27465 <name>ADD6</name>
27466 <description>Device address</description>
27467 <bitOffset>6</bitOffset>
27468 <bitWidth>1</bitWidth>
27469 </field>
27470 <field>
27471 <name>EF</name>
27472 <description>Enable function</description>
27473 <bitOffset>7</bitOffset>
27474 <bitWidth>1</bitWidth>
27475 </field>
27476 </fields>
27477 </register>
27478 <register>
27479 <name>BTABLE</name>
27480 <displayName>BTABLE</displayName>
27481 <description>Buffer table address</description>
27482 <addressOffset>0x50</addressOffset>
27483 <size>0x20</size>
27484 <access>read-write</access>
27485 <resetValue>0x0000</resetValue>
27486 <fields>
27487 <field>
27488 <name>BTABLE</name>
27489 <description>Buffer table</description>
27490 <bitOffset>3</bitOffset>
27491 <bitWidth>13</bitWidth>
27492 </field>
27493 </fields>
27494 </register>
27495 </registers>
27496 </peripheral>
27497 <peripheral>
27498 <name>I2C1</name>
27499 <description>Inter-integrated circuit</description>
27500 <groupName>I2C</groupName>
27501 <baseAddress>0x40005400</baseAddress>
27502 <addressBlock>
27503 <offset>0x0</offset>
27504 <size>0x400</size>
27505 <usage>registers</usage>
27506 </addressBlock>
27507 <interrupt>
27508 <name>I2C1_EV_EXTI23</name>
27509 <description>I2C1 event interrupt and EXTI Line23
27510 interrupt</description>
27511 <value>31</value>
27512 </interrupt>
27513 <interrupt>
27514 <name>I2C1_ER</name>
27515 <description>I2C1 error interrupt</description>
27516 <value>32</value>
27517 </interrupt>
27518 <registers>
27519 <register>
27520 <name>CR1</name>
27521 <displayName>CR1</displayName>
27522 <description>Control register 1</description>
27523 <addressOffset>0x0</addressOffset>
27524 <size>0x20</size>
27525 <resetValue>0x00000000</resetValue>
27526 <fields>
27527 <field>
27528 <name>PE</name>
27529 <description>Peripheral enable</description>
27530 <bitOffset>0</bitOffset>
27531 <bitWidth>1</bitWidth>
27532 <access>read-write</access>
27533 </field>
27534 <field>
27535 <name>TXIE</name>
27536 <description>TX Interrupt enable</description>
27537 <bitOffset>1</bitOffset>
27538 <bitWidth>1</bitWidth>
27539 <access>read-write</access>
27540 </field>
27541 <field>
27542 <name>RXIE</name>
27543 <description>RX Interrupt enable</description>
27544 <bitOffset>2</bitOffset>
27545 <bitWidth>1</bitWidth>
27546 <access>read-write</access>
27547 </field>
27548 <field>
27549 <name>ADDRIE</name>
27550 <description>Address match interrupt enable (slave
27551 only)</description>
27552 <bitOffset>3</bitOffset>
27553 <bitWidth>1</bitWidth>
27554 <access>read-write</access>
27555 </field>
27556 <field>
27557 <name>NACKIE</name>
27558 <description>Not acknowledge received interrupt
27559 enable</description>
27560 <bitOffset>4</bitOffset>
27561 <bitWidth>1</bitWidth>
27562 <access>read-write</access>
27563 </field>
27564 <field>
27565 <name>STOPIE</name>
27566 <description>STOP detection Interrupt
27567 enable</description>
27568 <bitOffset>5</bitOffset>
27569 <bitWidth>1</bitWidth>
27570 <access>read-write</access>
27571 </field>
27572 <field>
27573 <name>TCIE</name>
27574 <description>Transfer Complete interrupt
27575 enable</description>
27576 <bitOffset>6</bitOffset>
27577 <bitWidth>1</bitWidth>
27578 <access>read-write</access>
27579 </field>
27580 <field>
27581 <name>ERRIE</name>
27582 <description>Error interrupts enable</description>
27583 <bitOffset>7</bitOffset>
27584 <bitWidth>1</bitWidth>
27585 <access>read-write</access>
27586 </field>
27587 <field>
27588 <name>DNF</name>
27589 <description>Digital noise filter</description>
27590 <bitOffset>8</bitOffset>
27591 <bitWidth>4</bitWidth>
27592 <access>read-write</access>
27593 </field>
27594 <field>
27595 <name>ANFOFF</name>
27596 <description>Analog noise filter OFF</description>
27597 <bitOffset>12</bitOffset>
27598 <bitWidth>1</bitWidth>
27599 <access>read-write</access>
27600 </field>
27601 <field>
27602 <name>SWRST</name>
27603 <description>Software reset</description>
27604 <bitOffset>13</bitOffset>
27605 <bitWidth>1</bitWidth>
27606 <access>write-only</access>
27607 </field>
27608 <field>
27609 <name>TXDMAEN</name>
27610 <description>DMA transmission requests
27611 enable</description>
27612 <bitOffset>14</bitOffset>
27613 <bitWidth>1</bitWidth>
27614 <access>read-write</access>
27615 </field>
27616 <field>
27617 <name>RXDMAEN</name>
27618 <description>DMA reception requests
27619 enable</description>
27620 <bitOffset>15</bitOffset>
27621 <bitWidth>1</bitWidth>
27622 <access>read-write</access>
27623 </field>
27624 <field>
27625 <name>SBC</name>
27626 <description>Slave byte control</description>
27627 <bitOffset>16</bitOffset>
27628 <bitWidth>1</bitWidth>
27629 <access>read-write</access>
27630 </field>
27631 <field>
27632 <name>NOSTRETCH</name>
27633 <description>Clock stretching disable</description>
27634 <bitOffset>17</bitOffset>
27635 <bitWidth>1</bitWidth>
27636 <access>read-write</access>
27637 </field>
27638 <field>
27639 <name>WUPEN</name>
27640 <description>Wakeup from STOP enable</description>
27641 <bitOffset>18</bitOffset>
27642 <bitWidth>1</bitWidth>
27643 <access>read-write</access>
27644 </field>
27645 <field>
27646 <name>GCEN</name>
27647 <description>General call enable</description>
27648 <bitOffset>19</bitOffset>
27649 <bitWidth>1</bitWidth>
27650 <access>read-write</access>
27651 </field>
27652 <field>
27653 <name>SMBHEN</name>
27654 <description>SMBus Host address enable</description>
27655 <bitOffset>20</bitOffset>
27656 <bitWidth>1</bitWidth>
27657 <access>read-write</access>
27658 </field>
27659 <field>
27660 <name>SMBDEN</name>
27661 <description>SMBus Device Default address
27662 enable</description>
27663 <bitOffset>21</bitOffset>
27664 <bitWidth>1</bitWidth>
27665 <access>read-write</access>
27666 </field>
27667 <field>
27668 <name>ALERTEN</name>
27669 <description>SMBUS alert enable</description>
27670 <bitOffset>22</bitOffset>
27671 <bitWidth>1</bitWidth>
27672 <access>read-write</access>
27673 </field>
27674 <field>
27675 <name>PECEN</name>
27676 <description>PEC enable</description>
27677 <bitOffset>23</bitOffset>
27678 <bitWidth>1</bitWidth>
27679 <access>read-write</access>
27680 </field>
27681 </fields>
27682 </register>
27683 <register>
27684 <name>CR2</name>
27685 <displayName>CR2</displayName>
27686 <description>Control register 2</description>
27687 <addressOffset>0x4</addressOffset>
27688 <size>0x20</size>
27689 <access>read-write</access>
27690 <resetValue>0x00000000</resetValue>
27691 <fields>
27692 <field>
27693 <name>PECBYTE</name>
27694 <description>Packet error checking byte</description>
27695 <bitOffset>26</bitOffset>
27696 <bitWidth>1</bitWidth>
27697 </field>
27698 <field>
27699 <name>AUTOEND</name>
27700 <description>Automatic end mode (master
27701 mode)</description>
27702 <bitOffset>25</bitOffset>
27703 <bitWidth>1</bitWidth>
27704 </field>
27705 <field>
27706 <name>RELOAD</name>
27707 <description>NBYTES reload mode</description>
27708 <bitOffset>24</bitOffset>
27709 <bitWidth>1</bitWidth>
27710 </field>
27711 <field>
27712 <name>NBYTES</name>
27713 <description>Number of bytes</description>
27714 <bitOffset>16</bitOffset>
27715 <bitWidth>8</bitWidth>
27716 </field>
27717 <field>
27718 <name>NACK</name>
27719 <description>NACK generation (slave
27720 mode)</description>
27721 <bitOffset>15</bitOffset>
27722 <bitWidth>1</bitWidth>
27723 </field>
27724 <field>
27725 <name>STOP</name>
27726 <description>Stop generation (master
27727 mode)</description>
27728 <bitOffset>14</bitOffset>
27729 <bitWidth>1</bitWidth>
27730 </field>
27731 <field>
27732 <name>START</name>
27733 <description>Start generation</description>
27734 <bitOffset>13</bitOffset>
27735 <bitWidth>1</bitWidth>
27736 </field>
27737 <field>
27738 <name>HEAD10R</name>
27739 <description>10-bit address header only read
27740 direction (master receiver mode)</description>
27741 <bitOffset>12</bitOffset>
27742 <bitWidth>1</bitWidth>
27743 </field>
27744 <field>
27745 <name>ADD10</name>
27746 <description>10-bit addressing mode (master
27747 mode)</description>
27748 <bitOffset>11</bitOffset>
27749 <bitWidth>1</bitWidth>
27750 </field>
27751 <field>
27752 <name>RD_WRN</name>
27753 <description>Transfer direction (master
27754 mode)</description>
27755 <bitOffset>10</bitOffset>
27756 <bitWidth>1</bitWidth>
27757 </field>
27758 <field>
27759 <name>SADD8</name>
27760 <description>Slave address bit 9:8 (master
27761 mode)</description>
27762 <bitOffset>8</bitOffset>
27763 <bitWidth>2</bitWidth>
27764 </field>
27765 <field>
27766 <name>SADD1</name>
27767 <description>Slave address bit 7:1 (master
27768 mode)</description>
27769 <bitOffset>1</bitOffset>
27770 <bitWidth>7</bitWidth>
27771 </field>
27772 <field>
27773 <name>SADD0</name>
27774 <description>Slave address bit 0 (master
27775 mode)</description>
27776 <bitOffset>0</bitOffset>
27777 <bitWidth>1</bitWidth>
27778 </field>
27779 </fields>
27780 </register>
27781 <register>
27782 <name>OAR1</name>
27783 <displayName>OAR1</displayName>
27784 <description>Own address register 1</description>
27785 <addressOffset>0x8</addressOffset>
27786 <size>0x20</size>
27787 <access>read-write</access>
27788 <resetValue>0x00000000</resetValue>
27789 <fields>
27790 <field>
27791 <name>OA1_0</name>
27792 <description>Interface address</description>
27793 <bitOffset>0</bitOffset>
27794 <bitWidth>1</bitWidth>
27795 </field>
27796 <field>
27797 <name>OA1_1</name>
27798 <description>Interface address</description>
27799 <bitOffset>1</bitOffset>
27800 <bitWidth>7</bitWidth>
27801 </field>
27802 <field>
27803 <name>OA1_8</name>
27804 <description>Interface address</description>
27805 <bitOffset>8</bitOffset>
27806 <bitWidth>2</bitWidth>
27807 </field>
27808 <field>
27809 <name>OA1MODE</name>
27810 <description>Own Address 1 10-bit mode</description>
27811 <bitOffset>10</bitOffset>
27812 <bitWidth>1</bitWidth>
27813 </field>
27814 <field>
27815 <name>OA1EN</name>
27816 <description>Own Address 1 enable</description>
27817 <bitOffset>15</bitOffset>
27818 <bitWidth>1</bitWidth>
27819 </field>
27820 </fields>
27821 </register>
27822 <register>
27823 <name>OAR2</name>
27824 <displayName>OAR2</displayName>
27825 <description>Own address register 2</description>
27826 <addressOffset>0xC</addressOffset>
27827 <size>0x20</size>
27828 <access>read-write</access>
27829 <resetValue>0x00000000</resetValue>
27830 <fields>
27831 <field>
27832 <name>OA2</name>
27833 <description>Interface address</description>
27834 <bitOffset>1</bitOffset>
27835 <bitWidth>7</bitWidth>
27836 </field>
27837 <field>
27838 <name>OA2MSK</name>
27839 <description>Own Address 2 masks</description>
27840 <bitOffset>8</bitOffset>
27841 <bitWidth>3</bitWidth>
27842 </field>
27843 <field>
27844 <name>OA2EN</name>
27845 <description>Own Address 2 enable</description>
27846 <bitOffset>15</bitOffset>
27847 <bitWidth>1</bitWidth>
27848 </field>
27849 </fields>
27850 </register>
27851 <register>
27852 <name>TIMINGR</name>
27853 <displayName>TIMINGR</displayName>
27854 <description>Timing register</description>
27855 <addressOffset>0x10</addressOffset>
27856 <size>0x20</size>
27857 <access>read-write</access>
27858 <resetValue>0x00000000</resetValue>
27859 <fields>
27860 <field>
27861 <name>SCLL</name>
27862 <description>SCL low period (master
27863 mode)</description>
27864 <bitOffset>0</bitOffset>
27865 <bitWidth>8</bitWidth>
27866 </field>
27867 <field>
27868 <name>SCLH</name>
27869 <description>SCL high period (master
27870 mode)</description>
27871 <bitOffset>8</bitOffset>
27872 <bitWidth>8</bitWidth>
27873 </field>
27874 <field>
27875 <name>SDADEL</name>
27876 <description>Data hold time</description>
27877 <bitOffset>16</bitOffset>
27878 <bitWidth>4</bitWidth>
27879 </field>
27880 <field>
27881 <name>SCLDEL</name>
27882 <description>Data setup time</description>
27883 <bitOffset>20</bitOffset>
27884 <bitWidth>4</bitWidth>
27885 </field>
27886 <field>
27887 <name>PRESC</name>
27888 <description>Timing prescaler</description>
27889 <bitOffset>28</bitOffset>
27890 <bitWidth>4</bitWidth>
27891 </field>
27892 </fields>
27893 </register>
27894 <register>
27895 <name>TIMEOUTR</name>
27896 <displayName>TIMEOUTR</displayName>
27897 <description>Status register 1</description>
27898 <addressOffset>0x14</addressOffset>
27899 <size>0x20</size>
27900 <access>read-write</access>
27901 <resetValue>0x00000000</resetValue>
27902 <fields>
27903 <field>
27904 <name>TIMEOUTA</name>
27905 <description>Bus timeout A</description>
27906 <bitOffset>0</bitOffset>
27907 <bitWidth>12</bitWidth>
27908 </field>
27909 <field>
27910 <name>TIDLE</name>
27911 <description>Idle clock timeout
27912 detection</description>
27913 <bitOffset>12</bitOffset>
27914 <bitWidth>1</bitWidth>
27915 </field>
27916 <field>
27917 <name>TIMOUTEN</name>
27918 <description>Clock timeout enable</description>
27919 <bitOffset>15</bitOffset>
27920 <bitWidth>1</bitWidth>
27921 </field>
27922 <field>
27923 <name>TIMEOUTB</name>
27924 <description>Bus timeout B</description>
27925 <bitOffset>16</bitOffset>
27926 <bitWidth>12</bitWidth>
27927 </field>
27928 <field>
27929 <name>TEXTEN</name>
27930 <description>Extended clock timeout
27931 enable</description>
27932 <bitOffset>31</bitOffset>
27933 <bitWidth>1</bitWidth>
27934 </field>
27935 </fields>
27936 </register>
27937 <register>
27938 <name>ISR</name>
27939 <displayName>ISR</displayName>
27940 <description>Interrupt and Status register</description>
27941 <addressOffset>0x18</addressOffset>
27942 <size>0x20</size>
27943 <resetValue>0x00000001</resetValue>
27944 <fields>
27945 <field>
27946 <name>ADDCODE</name>
27947 <description>Address match code (Slave
27948 mode)</description>
27949 <bitOffset>17</bitOffset>
27950 <bitWidth>7</bitWidth>
27951 <access>read-only</access>
27952 </field>
27953 <field>
27954 <name>DIR</name>
27955 <description>Transfer direction (Slave
27956 mode)</description>
27957 <bitOffset>16</bitOffset>
27958 <bitWidth>1</bitWidth>
27959 <access>read-only</access>
27960 </field>
27961 <field>
27962 <name>BUSY</name>
27963 <description>Bus busy</description>
27964 <bitOffset>15</bitOffset>
27965 <bitWidth>1</bitWidth>
27966 <access>read-only</access>
27967 </field>
27968 <field>
27969 <name>ALERT</name>
27970 <description>SMBus alert</description>
27971 <bitOffset>13</bitOffset>
27972 <bitWidth>1</bitWidth>
27973 <access>read-only</access>
27974 </field>
27975 <field>
27976 <name>TIMEOUT</name>
27977 <description>Timeout or t_low detection
27978 flag</description>
27979 <bitOffset>12</bitOffset>
27980 <bitWidth>1</bitWidth>
27981 <access>read-only</access>
27982 </field>
27983 <field>
27984 <name>PECERR</name>
27985 <description>PEC Error in reception</description>
27986 <bitOffset>11</bitOffset>
27987 <bitWidth>1</bitWidth>
27988 <access>read-only</access>
27989 </field>
27990 <field>
27991 <name>OVR</name>
27992 <description>Overrun/Underrun (slave
27993 mode)</description>
27994 <bitOffset>10</bitOffset>
27995 <bitWidth>1</bitWidth>
27996 <access>read-only</access>
27997 </field>
27998 <field>
27999 <name>ARLO</name>
28000 <description>Arbitration lost</description>
28001 <bitOffset>9</bitOffset>
28002 <bitWidth>1</bitWidth>
28003 <access>read-only</access>
28004 </field>
28005 <field>
28006 <name>BERR</name>
28007 <description>Bus error</description>
28008 <bitOffset>8</bitOffset>
28009 <bitWidth>1</bitWidth>
28010 <access>read-only</access>
28011 </field>
28012 <field>
28013 <name>TCR</name>
28014 <description>Transfer Complete Reload</description>
28015 <bitOffset>7</bitOffset>
28016 <bitWidth>1</bitWidth>
28017 <access>read-only</access>
28018 </field>
28019 <field>
28020 <name>TC</name>
28021 <description>Transfer Complete (master
28022 mode)</description>
28023 <bitOffset>6</bitOffset>
28024 <bitWidth>1</bitWidth>
28025 <access>read-only</access>
28026 </field>
28027 <field>
28028 <name>STOPF</name>
28029 <description>Stop detection flag</description>
28030 <bitOffset>5</bitOffset>
28031 <bitWidth>1</bitWidth>
28032 <access>read-only</access>
28033 </field>
28034 <field>
28035 <name>NACKF</name>
28036 <description>Not acknowledge received
28037 flag</description>
28038 <bitOffset>4</bitOffset>
28039 <bitWidth>1</bitWidth>
28040 <access>read-only</access>
28041 </field>
28042 <field>
28043 <name>ADDR</name>
28044 <description>Address matched (slave
28045 mode)</description>
28046 <bitOffset>3</bitOffset>
28047 <bitWidth>1</bitWidth>
28048 <access>read-only</access>
28049 </field>
28050 <field>
28051 <name>RXNE</name>
28052 <description>Receive data register not empty
28053 (receivers)</description>
28054 <bitOffset>2</bitOffset>
28055 <bitWidth>1</bitWidth>
28056 <access>read-only</access>
28057 </field>
28058 <field>
28059 <name>TXIS</name>
28060 <description>Transmit interrupt status
28061 (transmitters)</description>
28062 <bitOffset>1</bitOffset>
28063 <bitWidth>1</bitWidth>
28064 <access>read-write</access>
28065 </field>
28066 <field>
28067 <name>TXE</name>
28068 <description>Transmit data register empty
28069 (transmitters)</description>
28070 <bitOffset>0</bitOffset>
28071 <bitWidth>1</bitWidth>
28072 <access>read-write</access>
28073 </field>
28074 </fields>
28075 </register>
28076 <register>
28077 <name>ICR</name>
28078 <displayName>ICR</displayName>
28079 <description>Interrupt clear register</description>
28080 <addressOffset>0x1C</addressOffset>
28081 <size>0x20</size>
28082 <access>write-only</access>
28083 <resetValue>0x00000000</resetValue>
28084 <fields>
28085 <field>
28086 <name>ALERTCF</name>
28087 <description>Alert flag clear</description>
28088 <bitOffset>13</bitOffset>
28089 <bitWidth>1</bitWidth>
28090 </field>
28091 <field>
28092 <name>TIMOUTCF</name>
28093 <description>Timeout detection flag
28094 clear</description>
28095 <bitOffset>12</bitOffset>
28096 <bitWidth>1</bitWidth>
28097 </field>
28098 <field>
28099 <name>PECCF</name>
28100 <description>PEC Error flag clear</description>
28101 <bitOffset>11</bitOffset>
28102 <bitWidth>1</bitWidth>
28103 </field>
28104 <field>
28105 <name>OVRCF</name>
28106 <description>Overrun/Underrun flag
28107 clear</description>
28108 <bitOffset>10</bitOffset>
28109 <bitWidth>1</bitWidth>
28110 </field>
28111 <field>
28112 <name>ARLOCF</name>
28113 <description>Arbitration lost flag
28114 clear</description>
28115 <bitOffset>9</bitOffset>
28116 <bitWidth>1</bitWidth>
28117 </field>
28118 <field>
28119 <name>BERRCF</name>
28120 <description>Bus error flag clear</description>
28121 <bitOffset>8</bitOffset>
28122 <bitWidth>1</bitWidth>
28123 </field>
28124 <field>
28125 <name>STOPCF</name>
28126 <description>Stop detection flag clear</description>
28127 <bitOffset>5</bitOffset>
28128 <bitWidth>1</bitWidth>
28129 </field>
28130 <field>
28131 <name>NACKCF</name>
28132 <description>Not Acknowledge flag clear</description>
28133 <bitOffset>4</bitOffset>
28134 <bitWidth>1</bitWidth>
28135 </field>
28136 <field>
28137 <name>ADDRCF</name>
28138 <description>Address Matched flag clear</description>
28139 <bitOffset>3</bitOffset>
28140 <bitWidth>1</bitWidth>
28141 </field>
28142 </fields>
28143 </register>
28144 <register>
28145 <name>PECR</name>
28146 <displayName>PECR</displayName>
28147 <description>PEC register</description>
28148 <addressOffset>0x20</addressOffset>
28149 <size>0x20</size>
28150 <access>read-only</access>
28151 <resetValue>0x00000000</resetValue>
28152 <fields>
28153 <field>
28154 <name>PEC</name>
28155 <description>Packet error checking
28156 register</description>
28157 <bitOffset>0</bitOffset>
28158 <bitWidth>8</bitWidth>
28159 </field>
28160 </fields>
28161 </register>
28162 <register>
28163 <name>RXDR</name>
28164 <displayName>RXDR</displayName>
28165 <description>Receive data register</description>
28166 <addressOffset>0x24</addressOffset>
28167 <size>0x20</size>
28168 <access>read-only</access>
28169 <resetValue>0x00000000</resetValue>
28170 <fields>
28171 <field>
28172 <name>RXDATA</name>
28173 <description>8-bit receive data</description>
28174 <bitOffset>0</bitOffset>
28175 <bitWidth>8</bitWidth>
28176 </field>
28177 </fields>
28178 </register>
28179 <register>
28180 <name>TXDR</name>
28181 <displayName>TXDR</displayName>
28182 <description>Transmit data register</description>
28183 <addressOffset>0x28</addressOffset>
28184 <size>0x20</size>
28185 <access>read-write</access>
28186 <resetValue>0x00000000</resetValue>
28187 <fields>
28188 <field>
28189 <name>TXDATA</name>
28190 <description>8-bit transmit data</description>
28191 <bitOffset>0</bitOffset>
28192 <bitWidth>8</bitWidth>
28193 </field>
28194 </fields>
28195 </register>
28196 </registers>
28197 </peripheral>
28198 <peripheral derivedFrom="I2C1">
28199 <name>I2C2</name>
28200 <baseAddress>0x40005800</baseAddress>
28201 <interrupt>
28202 <name>I2C2_EV_EXTI24</name>
28203 <description>I2C2 event interrupt &amp; EXTI Line24
28204 interrupt</description>
28205 <value>33</value>
28206 </interrupt>
28207 <interrupt>
28208 <name>I2C2_ER</name>
28209 <description>I2C2 error interrupt</description>
28210 <value>34</value>
28211 </interrupt>
28212 </peripheral>
28213 <peripheral derivedFrom="I2C1">
28214 <name>I2C3</name>
28215 <baseAddress>0x40007800</baseAddress>
28216 <interrupt>
28217 <name>I2C2_EV_EXTI24</name>
28218 <description>I2C2 event interrupt &amp; EXTI Line24
28219 interrupt</description>
28220 <value>33</value>
28221 </interrupt>
28222 <interrupt>
28223 <name>I2C2_ER</name>
28224 <description>I2C2 error interrupt</description>
28225 <value>34</value>
28226 </interrupt>
28227 <interrupt>
28228 <name>I2C3_EV</name>
28229 <description>I2C3 Event interrupt</description>
28230 <value>72</value>
28231 </interrupt>
28232 <interrupt>
28233 <name>I2C3_ER</name>
28234 <description>I2C3 Error interrupt</description>
28235 <value>73</value>
28236 </interrupt>
28237 </peripheral>
28238 <peripheral>
28239 <name>IWDG</name>
28240 <description>Independent watchdog</description>
28241 <groupName>IWDG</groupName>
28242 <baseAddress>0x40003000</baseAddress>
28243 <addressBlock>
28244 <offset>0x0</offset>
28245 <size>0x400</size>
28246 <usage>registers</usage>
28247 </addressBlock>
28248 <registers>
28249 <register>
28250 <name>KR</name>
28251 <displayName>KR</displayName>
28252 <description>Key register</description>
28253 <addressOffset>0x0</addressOffset>
28254 <size>0x20</size>
28255 <access>write-only</access>
28256 <resetValue>0x00000000</resetValue>
28257 <fields>
28258 <field>
28259 <name>KEY</name>
28260 <description>Key value</description>
28261 <bitOffset>0</bitOffset>
28262 <bitWidth>16</bitWidth>
28263 </field>
28264 </fields>
28265 </register>
28266 <register>
28267 <name>PR</name>
28268 <displayName>PR</displayName>
28269 <description>Prescaler register</description>
28270 <addressOffset>0x4</addressOffset>
28271 <size>0x20</size>
28272 <access>read-write</access>
28273 <resetValue>0x00000000</resetValue>
28274 <fields>
28275 <field>
28276 <name>PR</name>
28277 <description>Prescaler divider</description>
28278 <bitOffset>0</bitOffset>
28279 <bitWidth>3</bitWidth>
28280 </field>
28281 </fields>
28282 </register>
28283 <register>
28284 <name>RLR</name>
28285 <displayName>RLR</displayName>
28286 <description>Reload register</description>
28287 <addressOffset>0x8</addressOffset>
28288 <size>0x20</size>
28289 <access>read-write</access>
28290 <resetValue>0x00000FFF</resetValue>
28291 <fields>
28292 <field>
28293 <name>RL</name>
28294 <description>Watchdog counter reload
28295 value</description>
28296 <bitOffset>0</bitOffset>
28297 <bitWidth>12</bitWidth>
28298 </field>
28299 </fields>
28300 </register>
28301 <register>
28302 <name>SR</name>
28303 <displayName>SR</displayName>
28304 <description>Status register</description>
28305 <addressOffset>0xC</addressOffset>
28306 <size>0x20</size>
28307 <access>read-only</access>
28308 <resetValue>0x00000000</resetValue>
28309 <fields>
28310 <field>
28311 <name>PVU</name>
28312 <description>Watchdog prescaler value
28313 update</description>
28314 <bitOffset>0</bitOffset>
28315 <bitWidth>1</bitWidth>
28316 </field>
28317 <field>
28318 <name>RVU</name>
28319 <description>Watchdog counter reload value
28320 update</description>
28321 <bitOffset>1</bitOffset>
28322 <bitWidth>1</bitWidth>
28323 </field>
28324 <field>
28325 <name>WVU</name>
28326 <description>Watchdog counter window value
28327 update</description>
28328 <bitOffset>2</bitOffset>
28329 <bitWidth>1</bitWidth>
28330 </field>
28331 </fields>
28332 </register>
28333 <register>
28334 <name>WINR</name>
28335 <displayName>WINR</displayName>
28336 <description>Window register</description>
28337 <addressOffset>0x10</addressOffset>
28338 <size>0x20</size>
28339 <access>read-write</access>
28340 <resetValue>0x00000FFF</resetValue>
28341 <fields>
28342 <field>
28343 <name>WIN</name>
28344 <description>Watchdog counter window
28345 value</description>
28346 <bitOffset>0</bitOffset>
28347 <bitWidth>12</bitWidth>
28348 </field>
28349 </fields>
28350 </register>
28351 </registers>
28352 </peripheral>
28353 <peripheral>
28354 <name>WWDG</name>
28355 <description>Window watchdog</description>
28356 <groupName>WWDG</groupName>
28357 <baseAddress>0x40002C00</baseAddress>
28358 <addressBlock>
28359 <offset>0x0</offset>
28360 <size>0x400</size>
28361 <usage>registers</usage>
28362 </addressBlock>
28363 <interrupt>
28364 <name>WWDG</name>
28365 <description>Window Watchdog interrupt</description>
28366 <value>0</value>
28367 </interrupt>
28368 <registers>
28369 <register>
28370 <name>CR</name>
28371 <displayName>CR</displayName>
28372 <description>Control register</description>
28373 <addressOffset>0x0</addressOffset>
28374 <size>0x20</size>
28375 <access>read-write</access>
28376 <resetValue>0x0000007F</resetValue>
28377 <fields>
28378 <field>
28379 <name>T</name>
28380 <description>7-bit counter</description>
28381 <bitOffset>0</bitOffset>
28382 <bitWidth>7</bitWidth>
28383 </field>
28384 <field>
28385 <name>WDGA</name>
28386 <description>Activation bit</description>
28387 <bitOffset>7</bitOffset>
28388 <bitWidth>1</bitWidth>
28389 </field>
28390 </fields>
28391 </register>
28392 <register>
28393 <name>CFR</name>
28394 <displayName>CFR</displayName>
28395 <description>Configuration register</description>
28396 <addressOffset>0x4</addressOffset>
28397 <size>0x20</size>
28398 <access>read-write</access>
28399 <resetValue>0x0000007F</resetValue>
28400 <fields>
28401 <field>
28402 <name>EWI</name>
28403 <description>Early wakeup interrupt</description>
28404 <bitOffset>9</bitOffset>
28405 <bitWidth>1</bitWidth>
28406 </field>
28407 <field>
28408 <name>WDGTB</name>
28409 <description>Timer base</description>
28410 <bitOffset>7</bitOffset>
28411 <bitWidth>2</bitWidth>
28412 </field>
28413 <field>
28414 <name>W</name>
28415 <description>7-bit window value</description>
28416 <bitOffset>0</bitOffset>
28417 <bitWidth>7</bitWidth>
28418 </field>
28419 </fields>
28420 </register>
28421 <register>
28422 <name>SR</name>
28423 <displayName>SR</displayName>
28424 <description>Status register</description>
28425 <addressOffset>0x8</addressOffset>
28426 <size>0x20</size>
28427 <access>read-write</access>
28428 <resetValue>0x00000000</resetValue>
28429 <fields>
28430 <field>
28431 <name>EWIF</name>
28432 <description>Early wakeup interrupt
28433 flag</description>
28434 <bitOffset>0</bitOffset>
28435 <bitWidth>1</bitWidth>
28436 </field>
28437 </fields>
28438 </register>
28439 </registers>
28440 </peripheral>
28441 <peripheral>
28442 <name>RTC</name>
28443 <description>Real-time clock</description>
28444 <groupName>RTC</groupName>
28445 <baseAddress>0x40002800</baseAddress>
28446 <addressBlock>
28447 <offset>0x0</offset>
28448 <size>0x400</size>
28449 <usage>registers</usage>
28450 </addressBlock>
28451 <interrupt>
28452 <name>RTC_WKUP</name>
28453 <description>RTC Wakeup interrupt through the EXTI
28454 line</description>
28455 <value>3</value>
28456 </interrupt>
28457 <interrupt>
28458 <name>RTCAlarm</name>
28459 <description>RTC alarm interrupt</description>
28460 <value>41</value>
28461 </interrupt>
28462 <registers>
28463 <register>
28464 <name>TR</name>
28465 <displayName>TR</displayName>
28466 <description>time register</description>
28467 <addressOffset>0x0</addressOffset>
28468 <size>0x20</size>
28469 <access>read-write</access>
28470 <resetValue>0x00000000</resetValue>
28471 <fields>
28472 <field>
28473 <name>PM</name>
28474 <description>AM/PM notation</description>
28475 <bitOffset>22</bitOffset>
28476 <bitWidth>1</bitWidth>
28477 </field>
28478 <field>
28479 <name>HT</name>
28480 <description>Hour tens in BCD format</description>
28481 <bitOffset>20</bitOffset>
28482 <bitWidth>2</bitWidth>
28483 </field>
28484 <field>
28485 <name>HU</name>
28486 <description>Hour units in BCD format</description>
28487 <bitOffset>16</bitOffset>
28488 <bitWidth>4</bitWidth>
28489 </field>
28490 <field>
28491 <name>MNT</name>
28492 <description>Minute tens in BCD format</description>
28493 <bitOffset>12</bitOffset>
28494 <bitWidth>3</bitWidth>
28495 </field>
28496 <field>
28497 <name>MNU</name>
28498 <description>Minute units in BCD format</description>
28499 <bitOffset>8</bitOffset>
28500 <bitWidth>4</bitWidth>
28501 </field>
28502 <field>
28503 <name>ST</name>
28504 <description>Second tens in BCD format</description>
28505 <bitOffset>4</bitOffset>
28506 <bitWidth>3</bitWidth>
28507 </field>
28508 <field>
28509 <name>SU</name>
28510 <description>Second units in BCD format</description>
28511 <bitOffset>0</bitOffset>
28512 <bitWidth>4</bitWidth>
28513 </field>
28514 </fields>
28515 </register>
28516 <register>
28517 <name>DR</name>
28518 <displayName>DR</displayName>
28519 <description>date register</description>
28520 <addressOffset>0x4</addressOffset>
28521 <size>0x20</size>
28522 <access>read-write</access>
28523 <resetValue>0x00002101</resetValue>
28524 <fields>
28525 <field>
28526 <name>YT</name>
28527 <description>Year tens in BCD format</description>
28528 <bitOffset>20</bitOffset>
28529 <bitWidth>4</bitWidth>
28530 </field>
28531 <field>
28532 <name>YU</name>
28533 <description>Year units in BCD format</description>
28534 <bitOffset>16</bitOffset>
28535 <bitWidth>4</bitWidth>
28536 </field>
28537 <field>
28538 <name>WDU</name>
28539 <description>Week day units</description>
28540 <bitOffset>13</bitOffset>
28541 <bitWidth>3</bitWidth>
28542 </field>
28543 <field>
28544 <name>MT</name>
28545 <description>Month tens in BCD format</description>
28546 <bitOffset>12</bitOffset>
28547 <bitWidth>1</bitWidth>
28548 </field>
28549 <field>
28550 <name>MU</name>
28551 <description>Month units in BCD format</description>
28552 <bitOffset>8</bitOffset>
28553 <bitWidth>4</bitWidth>
28554 </field>
28555 <field>
28556 <name>DT</name>
28557 <description>Date tens in BCD format</description>
28558 <bitOffset>4</bitOffset>
28559 <bitWidth>2</bitWidth>
28560 </field>
28561 <field>
28562 <name>DU</name>
28563 <description>Date units in BCD format</description>
28564 <bitOffset>0</bitOffset>
28565 <bitWidth>4</bitWidth>
28566 </field>
28567 </fields>
28568 </register>
28569 <register>
28570 <name>CR</name>
28571 <displayName>CR</displayName>
28572 <description>control register</description>
28573 <addressOffset>0x8</addressOffset>
28574 <size>0x20</size>
28575 <access>read-write</access>
28576 <resetValue>0x00000000</resetValue>
28577 <fields>
28578 <field>
28579 <name>WCKSEL</name>
28580 <description>Wakeup clock selection</description>
28581 <bitOffset>0</bitOffset>
28582 <bitWidth>3</bitWidth>
28583 </field>
28584 <field>
28585 <name>TSEDGE</name>
28586 <description>Time-stamp event active
28587 edge</description>
28588 <bitOffset>3</bitOffset>
28589 <bitWidth>1</bitWidth>
28590 </field>
28591 <field>
28592 <name>REFCKON</name>
28593 <description>Reference clock detection enable (50 or
28594 60 Hz)</description>
28595 <bitOffset>4</bitOffset>
28596 <bitWidth>1</bitWidth>
28597 </field>
28598 <field>
28599 <name>BYPSHAD</name>
28600 <description>Bypass the shadow
28601 registers</description>
28602 <bitOffset>5</bitOffset>
28603 <bitWidth>1</bitWidth>
28604 </field>
28605 <field>
28606 <name>FMT</name>
28607 <description>Hour format</description>
28608 <bitOffset>6</bitOffset>
28609 <bitWidth>1</bitWidth>
28610 </field>
28611 <field>
28612 <name>ALRAE</name>
28613 <description>Alarm A enable</description>
28614 <bitOffset>8</bitOffset>
28615 <bitWidth>1</bitWidth>
28616 </field>
28617 <field>
28618 <name>ALRBE</name>
28619 <description>Alarm B enable</description>
28620 <bitOffset>9</bitOffset>
28621 <bitWidth>1</bitWidth>
28622 </field>
28623 <field>
28624 <name>WUTE</name>
28625 <description>Wakeup timer enable</description>
28626 <bitOffset>10</bitOffset>
28627 <bitWidth>1</bitWidth>
28628 </field>
28629 <field>
28630 <name>TSE</name>
28631 <description>Time stamp enable</description>
28632 <bitOffset>11</bitOffset>
28633 <bitWidth>1</bitWidth>
28634 </field>
28635 <field>
28636 <name>ALRAIE</name>
28637 <description>Alarm A interrupt enable</description>
28638 <bitOffset>12</bitOffset>
28639 <bitWidth>1</bitWidth>
28640 </field>
28641 <field>
28642 <name>ALRBIE</name>
28643 <description>Alarm B interrupt enable</description>
28644 <bitOffset>13</bitOffset>
28645 <bitWidth>1</bitWidth>
28646 </field>
28647 <field>
28648 <name>WUTIE</name>
28649 <description>Wakeup timer interrupt
28650 enable</description>
28651 <bitOffset>14</bitOffset>
28652 <bitWidth>1</bitWidth>
28653 </field>
28654 <field>
28655 <name>TSIE</name>
28656 <description>Time-stamp interrupt
28657 enable</description>
28658 <bitOffset>15</bitOffset>
28659 <bitWidth>1</bitWidth>
28660 </field>
28661 <field>
28662 <name>ADD1H</name>
28663 <description>Add 1 hour (summer time
28664 change)</description>
28665 <bitOffset>16</bitOffset>
28666 <bitWidth>1</bitWidth>
28667 </field>
28668 <field>
28669 <name>SUB1H</name>
28670 <description>Subtract 1 hour (winter time
28671 change)</description>
28672 <bitOffset>17</bitOffset>
28673 <bitWidth>1</bitWidth>
28674 </field>
28675 <field>
28676 <name>BKP</name>
28677 <description>Backup</description>
28678 <bitOffset>18</bitOffset>
28679 <bitWidth>1</bitWidth>
28680 </field>
28681 <field>
28682 <name>COSEL</name>
28683 <description>Calibration output
28684 selection</description>
28685 <bitOffset>19</bitOffset>
28686 <bitWidth>1</bitWidth>
28687 </field>
28688 <field>
28689 <name>POL</name>
28690 <description>Output polarity</description>
28691 <bitOffset>20</bitOffset>
28692 <bitWidth>1</bitWidth>
28693 </field>
28694 <field>
28695 <name>OSEL</name>
28696 <description>Output selection</description>
28697 <bitOffset>21</bitOffset>
28698 <bitWidth>2</bitWidth>
28699 </field>
28700 <field>
28701 <name>COE</name>
28702 <description>Calibration output enable</description>
28703 <bitOffset>23</bitOffset>
28704 <bitWidth>1</bitWidth>
28705 </field>
28706 </fields>
28707 </register>
28708 <register>
28709 <name>ISR</name>
28710 <displayName>ISR</displayName>
28711 <description>initialization and status
28712 register</description>
28713 <addressOffset>0xC</addressOffset>
28714 <size>0x20</size>
28715 <resetValue>0x00000007</resetValue>
28716 <fields>
28717 <field>
28718 <name>ALRAWF</name>
28719 <description>Alarm A write flag</description>
28720 <bitOffset>0</bitOffset>
28721 <bitWidth>1</bitWidth>
28722 <access>read-only</access>
28723 </field>
28724 <field>
28725 <name>ALRBWF</name>
28726 <description>Alarm B write flag</description>
28727 <bitOffset>1</bitOffset>
28728 <bitWidth>1</bitWidth>
28729 <access>read-only</access>
28730 </field>
28731 <field>
28732 <name>WUTWF</name>
28733 <description>Wakeup timer write flag</description>
28734 <bitOffset>2</bitOffset>
28735 <bitWidth>1</bitWidth>
28736 <access>read-only</access>
28737 </field>
28738 <field>
28739 <name>SHPF</name>
28740 <description>Shift operation pending</description>
28741 <bitOffset>3</bitOffset>
28742 <bitWidth>1</bitWidth>
28743 <access>read-write</access>
28744 </field>
28745 <field>
28746 <name>INITS</name>
28747 <description>Initialization status flag</description>
28748 <bitOffset>4</bitOffset>
28749 <bitWidth>1</bitWidth>
28750 <access>read-only</access>
28751 </field>
28752 <field>
28753 <name>RSF</name>
28754 <description>Registers synchronization
28755 flag</description>
28756 <bitOffset>5</bitOffset>
28757 <bitWidth>1</bitWidth>
28758 <access>read-write</access>
28759 </field>
28760 <field>
28761 <name>INITF</name>
28762 <description>Initialization flag</description>
28763 <bitOffset>6</bitOffset>
28764 <bitWidth>1</bitWidth>
28765 <access>read-only</access>
28766 </field>
28767 <field>
28768 <name>INIT</name>
28769 <description>Initialization mode</description>
28770 <bitOffset>7</bitOffset>
28771 <bitWidth>1</bitWidth>
28772 <access>read-write</access>
28773 </field>
28774 <field>
28775 <name>ALRAF</name>
28776 <description>Alarm A flag</description>
28777 <bitOffset>8</bitOffset>
28778 <bitWidth>1</bitWidth>
28779 <access>read-write</access>
28780 </field>
28781 <field>
28782 <name>ALRBF</name>
28783 <description>Alarm B flag</description>
28784 <bitOffset>9</bitOffset>
28785 <bitWidth>1</bitWidth>
28786 <access>read-write</access>
28787 </field>
28788 <field>
28789 <name>WUTF</name>
28790 <description>Wakeup timer flag</description>
28791 <bitOffset>10</bitOffset>
28792 <bitWidth>1</bitWidth>
28793 <access>read-write</access>
28794 </field>
28795 <field>
28796 <name>TSF</name>
28797 <description>Time-stamp flag</description>
28798 <bitOffset>11</bitOffset>
28799 <bitWidth>1</bitWidth>
28800 <access>read-write</access>
28801 </field>
28802 <field>
28803 <name>TSOVF</name>
28804 <description>Time-stamp overflow flag</description>
28805 <bitOffset>12</bitOffset>
28806 <bitWidth>1</bitWidth>
28807 <access>read-write</access>
28808 </field>
28809 <field>
28810 <name>TAMP1F</name>
28811 <description>Tamper detection flag</description>
28812 <bitOffset>13</bitOffset>
28813 <bitWidth>1</bitWidth>
28814 <access>read-write</access>
28815 </field>
28816 <field>
28817 <name>TAMP2F</name>
28818 <description>RTC_TAMP2 detection flag</description>
28819 <bitOffset>14</bitOffset>
28820 <bitWidth>1</bitWidth>
28821 <access>read-write</access>
28822 </field>
28823 <field>
28824 <name>TAMP3F</name>
28825 <description>RTC_TAMP3 detection flag</description>
28826 <bitOffset>15</bitOffset>
28827 <bitWidth>1</bitWidth>
28828 <access>read-write</access>
28829 </field>
28830 <field>
28831 <name>RECALPF</name>
28832 <description>Recalibration pending Flag</description>
28833 <bitOffset>16</bitOffset>
28834 <bitWidth>1</bitWidth>
28835 <access>read-only</access>
28836 </field>
28837 </fields>
28838 </register>
28839 <register>
28840 <name>PRER</name>
28841 <displayName>PRER</displayName>
28842 <description>prescaler register</description>
28843 <addressOffset>0x10</addressOffset>
28844 <size>0x20</size>
28845 <access>read-write</access>
28846 <resetValue>0x007F00FF</resetValue>
28847 <fields>
28848 <field>
28849 <name>PREDIV_A</name>
28850 <description>Asynchronous prescaler
28851 factor</description>
28852 <bitOffset>16</bitOffset>
28853 <bitWidth>7</bitWidth>
28854 </field>
28855 <field>
28856 <name>PREDIV_S</name>
28857 <description>Synchronous prescaler
28858 factor</description>
28859 <bitOffset>0</bitOffset>
28860 <bitWidth>15</bitWidth>
28861 </field>
28862 </fields>
28863 </register>
28864 <register>
28865 <name>WUTR</name>
28866 <displayName>WUTR</displayName>
28867 <description>wakeup timer register</description>
28868 <addressOffset>0x14</addressOffset>
28869 <size>0x20</size>
28870 <access>read-write</access>
28871 <resetValue>0x0000FFFF</resetValue>
28872 <fields>
28873 <field>
28874 <name>WUT</name>
28875 <description>Wakeup auto-reload value
28876 bits</description>
28877 <bitOffset>0</bitOffset>
28878 <bitWidth>16</bitWidth>
28879 </field>
28880 </fields>
28881 </register>
28882 <register>
28883 <name>ALRMAR</name>
28884 <displayName>ALRMAR</displayName>
28885 <description>alarm A register</description>
28886 <addressOffset>0x1C</addressOffset>
28887 <size>0x20</size>
28888 <access>read-write</access>
28889 <resetValue>0x00000000</resetValue>
28890 <fields>
28891 <field>
28892 <name>MSK4</name>
28893 <description>Alarm A date mask</description>
28894 <bitOffset>31</bitOffset>
28895 <bitWidth>1</bitWidth>
28896 </field>
28897 <field>
28898 <name>WDSEL</name>
28899 <description>Week day selection</description>
28900 <bitOffset>30</bitOffset>
28901 <bitWidth>1</bitWidth>
28902 </field>
28903 <field>
28904 <name>DT</name>
28905 <description>Date tens in BCD format</description>
28906 <bitOffset>28</bitOffset>
28907 <bitWidth>2</bitWidth>
28908 </field>
28909 <field>
28910 <name>DU</name>
28911 <description>Date units or day in BCD
28912 format</description>
28913 <bitOffset>24</bitOffset>
28914 <bitWidth>4</bitWidth>
28915 </field>
28916 <field>
28917 <name>MSK3</name>
28918 <description>Alarm A hours mask</description>
28919 <bitOffset>23</bitOffset>
28920 <bitWidth>1</bitWidth>
28921 </field>
28922 <field>
28923 <name>PM</name>
28924 <description>AM/PM notation</description>
28925 <bitOffset>22</bitOffset>
28926 <bitWidth>1</bitWidth>
28927 </field>
28928 <field>
28929 <name>HT</name>
28930 <description>Hour tens in BCD format</description>
28931 <bitOffset>20</bitOffset>
28932 <bitWidth>2</bitWidth>
28933 </field>
28934 <field>
28935 <name>HU</name>
28936 <description>Hour units in BCD format</description>
28937 <bitOffset>16</bitOffset>
28938 <bitWidth>4</bitWidth>
28939 </field>
28940 <field>
28941 <name>MSK2</name>
28942 <description>Alarm A minutes mask</description>
28943 <bitOffset>15</bitOffset>
28944 <bitWidth>1</bitWidth>
28945 </field>
28946 <field>
28947 <name>MNT</name>
28948 <description>Minute tens in BCD format</description>
28949 <bitOffset>12</bitOffset>
28950 <bitWidth>3</bitWidth>
28951 </field>
28952 <field>
28953 <name>MNU</name>
28954 <description>Minute units in BCD format</description>
28955 <bitOffset>8</bitOffset>
28956 <bitWidth>4</bitWidth>
28957 </field>
28958 <field>
28959 <name>MSK1</name>
28960 <description>Alarm A seconds mask</description>
28961 <bitOffset>7</bitOffset>
28962 <bitWidth>1</bitWidth>
28963 </field>
28964 <field>
28965 <name>ST</name>
28966 <description>Second tens in BCD format</description>
28967 <bitOffset>4</bitOffset>
28968 <bitWidth>3</bitWidth>
28969 </field>
28970 <field>
28971 <name>SU</name>
28972 <description>Second units in BCD format</description>
28973 <bitOffset>0</bitOffset>
28974 <bitWidth>4</bitWidth>
28975 </field>
28976 </fields>
28977 </register>
28978 <register>
28979 <name>ALRMBR</name>
28980 <displayName>ALRMBR</displayName>
28981 <description>alarm B register</description>
28982 <addressOffset>0x20</addressOffset>
28983 <size>0x20</size>
28984 <access>read-write</access>
28985 <resetValue>0x00000000</resetValue>
28986 <fields>
28987 <field>
28988 <name>MSK4</name>
28989 <description>Alarm B date mask</description>
28990 <bitOffset>31</bitOffset>
28991 <bitWidth>1</bitWidth>
28992 </field>
28993 <field>
28994 <name>WDSEL</name>
28995 <description>Week day selection</description>
28996 <bitOffset>30</bitOffset>
28997 <bitWidth>1</bitWidth>
28998 </field>
28999 <field>
29000 <name>DT</name>
29001 <description>Date tens in BCD format</description>
29002 <bitOffset>28</bitOffset>
29003 <bitWidth>2</bitWidth>
29004 </field>
29005 <field>
29006 <name>DU</name>
29007 <description>Date units or day in BCD
29008 format</description>
29009 <bitOffset>24</bitOffset>
29010 <bitWidth>4</bitWidth>
29011 </field>
29012 <field>
29013 <name>MSK3</name>
29014 <description>Alarm B hours mask</description>
29015 <bitOffset>23</bitOffset>
29016 <bitWidth>1</bitWidth>
29017 </field>
29018 <field>
29019 <name>PM</name>
29020 <description>AM/PM notation</description>
29021 <bitOffset>22</bitOffset>
29022 <bitWidth>1</bitWidth>
29023 </field>
29024 <field>
29025 <name>HT</name>
29026 <description>Hour tens in BCD format</description>
29027 <bitOffset>20</bitOffset>
29028 <bitWidth>2</bitWidth>
29029 </field>
29030 <field>
29031 <name>HU</name>
29032 <description>Hour units in BCD format</description>
29033 <bitOffset>16</bitOffset>
29034 <bitWidth>4</bitWidth>
29035 </field>
29036 <field>
29037 <name>MSK2</name>
29038 <description>Alarm B minutes mask</description>
29039 <bitOffset>15</bitOffset>
29040 <bitWidth>1</bitWidth>
29041 </field>
29042 <field>
29043 <name>MNT</name>
29044 <description>Minute tens in BCD format</description>
29045 <bitOffset>12</bitOffset>
29046 <bitWidth>3</bitWidth>
29047 </field>
29048 <field>
29049 <name>MNU</name>
29050 <description>Minute units in BCD format</description>
29051 <bitOffset>8</bitOffset>
29052 <bitWidth>4</bitWidth>
29053 </field>
29054 <field>
29055 <name>MSK1</name>
29056 <description>Alarm B seconds mask</description>
29057 <bitOffset>7</bitOffset>
29058 <bitWidth>1</bitWidth>
29059 </field>
29060 <field>
29061 <name>ST</name>
29062 <description>Second tens in BCD format</description>
29063 <bitOffset>4</bitOffset>
29064 <bitWidth>3</bitWidth>
29065 </field>
29066 <field>
29067 <name>SU</name>
29068 <description>Second units in BCD format</description>
29069 <bitOffset>0</bitOffset>
29070 <bitWidth>4</bitWidth>
29071 </field>
29072 </fields>
29073 </register>
29074 <register>
29075 <name>WPR</name>
29076 <displayName>WPR</displayName>
29077 <description>write protection register</description>
29078 <addressOffset>0x24</addressOffset>
29079 <size>0x20</size>
29080 <access>write-only</access>
29081 <resetValue>0x00000000</resetValue>
29082 <fields>
29083 <field>
29084 <name>KEY</name>
29085 <description>Write protection key</description>
29086 <bitOffset>0</bitOffset>
29087 <bitWidth>8</bitWidth>
29088 </field>
29089 </fields>
29090 </register>
29091 <register>
29092 <name>SSR</name>
29093 <displayName>SSR</displayName>
29094 <description>sub second register</description>
29095 <addressOffset>0x28</addressOffset>
29096 <size>0x20</size>
29097 <access>read-only</access>
29098 <resetValue>0x00000000</resetValue>
29099 <fields>
29100 <field>
29101 <name>SS</name>
29102 <description>Sub second value</description>
29103 <bitOffset>0</bitOffset>
29104 <bitWidth>16</bitWidth>
29105 </field>
29106 </fields>
29107 </register>
29108 <register>
29109 <name>SHIFTR</name>
29110 <displayName>SHIFTR</displayName>
29111 <description>shift control register</description>
29112 <addressOffset>0x2C</addressOffset>
29113 <size>0x20</size>
29114 <access>write-only</access>
29115 <resetValue>0x00000000</resetValue>
29116 <fields>
29117 <field>
29118 <name>ADD1S</name>
29119 <description>Add one second</description>
29120 <bitOffset>31</bitOffset>
29121 <bitWidth>1</bitWidth>
29122 </field>
29123 <field>
29124 <name>SUBFS</name>
29125 <description>Subtract a fraction of a
29126 second</description>
29127 <bitOffset>0</bitOffset>
29128 <bitWidth>15</bitWidth>
29129 </field>
29130 </fields>
29131 </register>
29132 <register>
29133 <name>TSTR</name>
29134 <displayName>TSTR</displayName>
29135 <description>time stamp time register</description>
29136 <addressOffset>0x30</addressOffset>
29137 <size>0x20</size>
29138 <access>read-only</access>
29139 <resetValue>0x00000000</resetValue>
29140 <fields>
29141 <field>
29142 <name>SU</name>
29143 <description>Second units in BCD format</description>
29144 <bitOffset>0</bitOffset>
29145 <bitWidth>4</bitWidth>
29146 </field>
29147 <field>
29148 <name>ST</name>
29149 <description>Second tens in BCD format</description>
29150 <bitOffset>4</bitOffset>
29151 <bitWidth>3</bitWidth>
29152 </field>
29153 <field>
29154 <name>MNU</name>
29155 <description>Minute units in BCD format</description>
29156 <bitOffset>8</bitOffset>
29157 <bitWidth>4</bitWidth>
29158 </field>
29159 <field>
29160 <name>MNT</name>
29161 <description>Minute tens in BCD format</description>
29162 <bitOffset>12</bitOffset>
29163 <bitWidth>3</bitWidth>
29164 </field>
29165 <field>
29166 <name>HU</name>
29167 <description>Hour units in BCD format</description>
29168 <bitOffset>16</bitOffset>
29169 <bitWidth>4</bitWidth>
29170 </field>
29171 <field>
29172 <name>HT</name>
29173 <description>Hour tens in BCD format</description>
29174 <bitOffset>20</bitOffset>
29175 <bitWidth>2</bitWidth>
29176 </field>
29177 <field>
29178 <name>PM</name>
29179 <description>AM/PM notation</description>
29180 <bitOffset>22</bitOffset>
29181 <bitWidth>1</bitWidth>
29182 </field>
29183 </fields>
29184 </register>
29185 <register>
29186 <name>TSDR</name>
29187 <displayName>TSDR</displayName>
29188 <description>time stamp date register</description>
29189 <addressOffset>0x34</addressOffset>
29190 <size>0x20</size>
29191 <access>read-only</access>
29192 <resetValue>0x00000000</resetValue>
29193 <fields>
29194 <field>
29195 <name>WDU</name>
29196 <description>Week day units</description>
29197 <bitOffset>13</bitOffset>
29198 <bitWidth>3</bitWidth>
29199 </field>
29200 <field>
29201 <name>MT</name>
29202 <description>Month tens in BCD format</description>
29203 <bitOffset>12</bitOffset>
29204 <bitWidth>1</bitWidth>
29205 </field>
29206 <field>
29207 <name>MU</name>
29208 <description>Month units in BCD format</description>
29209 <bitOffset>8</bitOffset>
29210 <bitWidth>4</bitWidth>
29211 </field>
29212 <field>
29213 <name>DT</name>
29214 <description>Date tens in BCD format</description>
29215 <bitOffset>4</bitOffset>
29216 <bitWidth>2</bitWidth>
29217 </field>
29218 <field>
29219 <name>DU</name>
29220 <description>Date units in BCD format</description>
29221 <bitOffset>0</bitOffset>
29222 <bitWidth>4</bitWidth>
29223 </field>
29224 </fields>
29225 </register>
29226 <register>
29227 <name>TSSSR</name>
29228 <displayName>TSSSR</displayName>
29229 <description>timestamp sub second register</description>
29230 <addressOffset>0x38</addressOffset>
29231 <size>0x20</size>
29232 <access>read-only</access>
29233 <resetValue>0x00000000</resetValue>
29234 <fields>
29235 <field>
29236 <name>SS</name>
29237 <description>Sub second value</description>
29238 <bitOffset>0</bitOffset>
29239 <bitWidth>16</bitWidth>
29240 </field>
29241 </fields>
29242 </register>
29243 <register>
29244 <name>CALR</name>
29245 <displayName>CALR</displayName>
29246 <description>calibration register</description>
29247 <addressOffset>0x3C</addressOffset>
29248 <size>0x20</size>
29249 <access>read-write</access>
29250 <resetValue>0x00000000</resetValue>
29251 <fields>
29252 <field>
29253 <name>CALP</name>
29254 <description>Increase frequency of RTC by 488.5
29255 ppm</description>
29256 <bitOffset>15</bitOffset>
29257 <bitWidth>1</bitWidth>
29258 </field>
29259 <field>
29260 <name>CALW8</name>
29261 <description>Use an 8-second calibration cycle
29262 period</description>
29263 <bitOffset>14</bitOffset>
29264 <bitWidth>1</bitWidth>
29265 </field>
29266 <field>
29267 <name>CALW16</name>
29268 <description>Use a 16-second calibration cycle
29269 period</description>
29270 <bitOffset>13</bitOffset>
29271 <bitWidth>1</bitWidth>
29272 </field>
29273 <field>
29274 <name>CALM</name>
29275 <description>Calibration minus</description>
29276 <bitOffset>0</bitOffset>
29277 <bitWidth>9</bitWidth>
29278 </field>
29279 </fields>
29280 </register>
29281 <register>
29282 <name>TAFCR</name>
29283 <displayName>TAFCR</displayName>
29284 <description>tamper and alternate function configuration
29285 register</description>
29286 <addressOffset>0x40</addressOffset>
29287 <size>0x20</size>
29288 <access>read-write</access>
29289 <resetValue>0x00000000</resetValue>
29290 <fields>
29291 <field>
29292 <name>TAMP1E</name>
29293 <description>Tamper 1 detection enable</description>
29294 <bitOffset>0</bitOffset>
29295 <bitWidth>1</bitWidth>
29296 </field>
29297 <field>
29298 <name>TAMP1TRG</name>
29299 <description>Active level for tamper 1</description>
29300 <bitOffset>1</bitOffset>
29301 <bitWidth>1</bitWidth>
29302 </field>
29303 <field>
29304 <name>TAMPIE</name>
29305 <description>Tamper interrupt enable</description>
29306 <bitOffset>2</bitOffset>
29307 <bitWidth>1</bitWidth>
29308 </field>
29309 <field>
29310 <name>TAMP2E</name>
29311 <description>Tamper 2 detection enable</description>
29312 <bitOffset>3</bitOffset>
29313 <bitWidth>1</bitWidth>
29314 </field>
29315 <field>
29316 <name>TAMP2TRG</name>
29317 <description>Active level for tamper 2</description>
29318 <bitOffset>4</bitOffset>
29319 <bitWidth>1</bitWidth>
29320 </field>
29321 <field>
29322 <name>TAMP3E</name>
29323 <description>Tamper 3 detection enable</description>
29324 <bitOffset>5</bitOffset>
29325 <bitWidth>1</bitWidth>
29326 </field>
29327 <field>
29328 <name>TAMP3TRG</name>
29329 <description>Active level for tamper 3</description>
29330 <bitOffset>6</bitOffset>
29331 <bitWidth>1</bitWidth>
29332 </field>
29333 <field>
29334 <name>TAMPTS</name>
29335 <description>Activate timestamp on tamper detection
29336 event</description>
29337 <bitOffset>7</bitOffset>
29338 <bitWidth>1</bitWidth>
29339 </field>
29340 <field>
29341 <name>TAMPFREQ</name>
29342 <description>Tamper sampling frequency</description>
29343 <bitOffset>8</bitOffset>
29344 <bitWidth>3</bitWidth>
29345 </field>
29346 <field>
29347 <name>TAMPFLT</name>
29348 <description>Tamper filter count</description>
29349 <bitOffset>11</bitOffset>
29350 <bitWidth>2</bitWidth>
29351 </field>
29352 <field>
29353 <name>TAMPPRCH</name>
29354 <description>Tamper precharge duration</description>
29355 <bitOffset>13</bitOffset>
29356 <bitWidth>2</bitWidth>
29357 </field>
29358 <field>
29359 <name>TAMPPUDIS</name>
29360 <description>TAMPER pull-up disable</description>
29361 <bitOffset>15</bitOffset>
29362 <bitWidth>1</bitWidth>
29363 </field>
29364 <field>
29365 <name>PC13VALUE</name>
29366 <description>PC13 value</description>
29367 <bitOffset>18</bitOffset>
29368 <bitWidth>1</bitWidth>
29369 </field>
29370 <field>
29371 <name>PC13MODE</name>
29372 <description>PC13 mode</description>
29373 <bitOffset>19</bitOffset>
29374 <bitWidth>1</bitWidth>
29375 </field>
29376 <field>
29377 <name>PC14VALUE</name>
29378 <description>PC14 value</description>
29379 <bitOffset>20</bitOffset>
29380 <bitWidth>1</bitWidth>
29381 </field>
29382 <field>
29383 <name>PC14MODE</name>
29384 <description>PC 14 mode</description>
29385 <bitOffset>21</bitOffset>
29386 <bitWidth>1</bitWidth>
29387 </field>
29388 <field>
29389 <name>PC15VALUE</name>
29390 <description>PC15 value</description>
29391 <bitOffset>22</bitOffset>
29392 <bitWidth>1</bitWidth>
29393 </field>
29394 <field>
29395 <name>PC15MODE</name>
29396 <description>PC15 mode</description>
29397 <bitOffset>23</bitOffset>
29398 <bitWidth>1</bitWidth>
29399 </field>
29400 </fields>
29401 </register>
29402 <register>
29403 <name>ALRMASSR</name>
29404 <displayName>ALRMASSR</displayName>
29405 <description>alarm A sub second register</description>
29406 <addressOffset>0x44</addressOffset>
29407 <size>0x20</size>
29408 <access>read-write</access>
29409 <resetValue>0x00000000</resetValue>
29410 <fields>
29411 <field>
29412 <name>MASKSS</name>
29413 <description>Mask the most-significant bits starting
29414 at this bit</description>
29415 <bitOffset>24</bitOffset>
29416 <bitWidth>4</bitWidth>
29417 </field>
29418 <field>
29419 <name>SS</name>
29420 <description>Sub seconds value</description>
29421 <bitOffset>0</bitOffset>
29422 <bitWidth>15</bitWidth>
29423 </field>
29424 </fields>
29425 </register>
29426 <register>
29427 <name>ALRMBSSR</name>
29428 <displayName>ALRMBSSR</displayName>
29429 <description>alarm B sub second register</description>
29430 <addressOffset>0x48</addressOffset>
29431 <size>0x20</size>
29432 <access>read-write</access>
29433 <resetValue>0x00000000</resetValue>
29434 <fields>
29435 <field>
29436 <name>MASKSS</name>
29437 <description>Mask the most-significant bits starting
29438 at this bit</description>
29439 <bitOffset>24</bitOffset>
29440 <bitWidth>4</bitWidth>
29441 </field>
29442 <field>
29443 <name>SS</name>
29444 <description>Sub seconds value</description>
29445 <bitOffset>0</bitOffset>
29446 <bitWidth>15</bitWidth>
29447 </field>
29448 </fields>
29449 </register>
29450 <register>
29451 <name>BKP0R</name>
29452 <displayName>BKP0R</displayName>
29453 <description>backup register</description>
29454 <addressOffset>0x50</addressOffset>
29455 <size>0x20</size>
29456 <access>read-write</access>
29457 <resetValue>0x00000000</resetValue>
29458 <fields>
29459 <field>
29460 <name>BKP</name>
29461 <description>BKP</description>
29462 <bitOffset>0</bitOffset>
29463 <bitWidth>32</bitWidth>
29464 </field>
29465 </fields>
29466 </register>
29467 <register>
29468 <name>BKP1R</name>
29469 <displayName>BKP1R</displayName>
29470 <description>backup register</description>
29471 <addressOffset>0x54</addressOffset>
29472 <size>0x20</size>
29473 <access>read-write</access>
29474 <resetValue>0x00000000</resetValue>
29475 <fields>
29476 <field>
29477 <name>BKP</name>
29478 <description>BKP</description>
29479 <bitOffset>0</bitOffset>
29480 <bitWidth>32</bitWidth>
29481 </field>
29482 </fields>
29483 </register>
29484 <register>
29485 <name>BKP2R</name>
29486 <displayName>BKP2R</displayName>
29487 <description>backup register</description>
29488 <addressOffset>0x58</addressOffset>
29489 <size>0x20</size>
29490 <access>read-write</access>
29491 <resetValue>0x00000000</resetValue>
29492 <fields>
29493 <field>
29494 <name>BKP</name>
29495 <description>BKP</description>
29496 <bitOffset>0</bitOffset>
29497 <bitWidth>32</bitWidth>
29498 </field>
29499 </fields>
29500 </register>
29501 <register>
29502 <name>BKP3R</name>
29503 <displayName>BKP3R</displayName>
29504 <description>backup register</description>
29505 <addressOffset>0x5C</addressOffset>
29506 <size>0x20</size>
29507 <access>read-write</access>
29508 <resetValue>0x00000000</resetValue>
29509 <fields>
29510 <field>
29511 <name>BKP</name>
29512 <description>BKP</description>
29513 <bitOffset>0</bitOffset>
29514 <bitWidth>32</bitWidth>
29515 </field>
29516 </fields>
29517 </register>
29518 <register>
29519 <name>BKP4R</name>
29520 <displayName>BKP4R</displayName>
29521 <description>backup register</description>
29522 <addressOffset>0x60</addressOffset>
29523 <size>0x20</size>
29524 <access>read-write</access>
29525 <resetValue>0x00000000</resetValue>
29526 <fields>
29527 <field>
29528 <name>BKP</name>
29529 <description>BKP</description>
29530 <bitOffset>0</bitOffset>
29531 <bitWidth>32</bitWidth>
29532 </field>
29533 </fields>
29534 </register>
29535 <register>
29536 <name>BKP5R</name>
29537 <displayName>BKP5R</displayName>
29538 <description>backup register</description>
29539 <addressOffset>0x64</addressOffset>
29540 <size>0x20</size>
29541 <access>read-write</access>
29542 <resetValue>0x00000000</resetValue>
29543 <fields>
29544 <field>
29545 <name>BKP</name>
29546 <description>BKP</description>
29547 <bitOffset>0</bitOffset>
29548 <bitWidth>32</bitWidth>
29549 </field>
29550 </fields>
29551 </register>
29552 <register>
29553 <name>BKP6R</name>
29554 <displayName>BKP6R</displayName>
29555 <description>backup register</description>
29556 <addressOffset>0x68</addressOffset>
29557 <size>0x20</size>
29558 <access>read-write</access>
29559 <resetValue>0x00000000</resetValue>
29560 <fields>
29561 <field>
29562 <name>BKP</name>
29563 <description>BKP</description>
29564 <bitOffset>0</bitOffset>
29565 <bitWidth>32</bitWidth>
29566 </field>
29567 </fields>
29568 </register>
29569 <register>
29570 <name>BKP7R</name>
29571 <displayName>BKP7R</displayName>
29572 <description>backup register</description>
29573 <addressOffset>0x6C</addressOffset>
29574 <size>0x20</size>
29575 <access>read-write</access>
29576 <resetValue>0x00000000</resetValue>
29577 <fields>
29578 <field>
29579 <name>BKP</name>
29580 <description>BKP</description>
29581 <bitOffset>0</bitOffset>
29582 <bitWidth>32</bitWidth>
29583 </field>
29584 </fields>
29585 </register>
29586 <register>
29587 <name>BKP8R</name>
29588 <displayName>BKP8R</displayName>
29589 <description>backup register</description>
29590 <addressOffset>0x70</addressOffset>
29591 <size>0x20</size>
29592 <access>read-write</access>
29593 <resetValue>0x00000000</resetValue>
29594 <fields>
29595 <field>
29596 <name>BKP</name>
29597 <description>BKP</description>
29598 <bitOffset>0</bitOffset>
29599 <bitWidth>32</bitWidth>
29600 </field>
29601 </fields>
29602 </register>
29603 <register>
29604 <name>BKP9R</name>
29605 <displayName>BKP9R</displayName>
29606 <description>backup register</description>
29607 <addressOffset>0x74</addressOffset>
29608 <size>0x20</size>
29609 <access>read-write</access>
29610 <resetValue>0x00000000</resetValue>
29611 <fields>
29612 <field>
29613 <name>BKP</name>
29614 <description>BKP</description>
29615 <bitOffset>0</bitOffset>
29616 <bitWidth>32</bitWidth>
29617 </field>
29618 </fields>
29619 </register>
29620 <register>
29621 <name>BKP10R</name>
29622 <displayName>BKP10R</displayName>
29623 <description>backup register</description>
29624 <addressOffset>0x78</addressOffset>
29625 <size>0x20</size>
29626 <access>read-write</access>
29627 <resetValue>0x00000000</resetValue>
29628 <fields>
29629 <field>
29630 <name>BKP</name>
29631 <description>BKP</description>
29632 <bitOffset>0</bitOffset>
29633 <bitWidth>32</bitWidth>
29634 </field>
29635 </fields>
29636 </register>
29637 <register>
29638 <name>BKP11R</name>
29639 <displayName>BKP11R</displayName>
29640 <description>backup register</description>
29641 <addressOffset>0x7C</addressOffset>
29642 <size>0x20</size>
29643 <access>read-write</access>
29644 <resetValue>0x00000000</resetValue>
29645 <fields>
29646 <field>
29647 <name>BKP</name>
29648 <description>BKP</description>
29649 <bitOffset>0</bitOffset>
29650 <bitWidth>32</bitWidth>
29651 </field>
29652 </fields>
29653 </register>
29654 <register>
29655 <name>BKP12R</name>
29656 <displayName>BKP12R</displayName>
29657 <description>backup register</description>
29658 <addressOffset>0x80</addressOffset>
29659 <size>0x20</size>
29660 <access>read-write</access>
29661 <resetValue>0x00000000</resetValue>
29662 <fields>
29663 <field>
29664 <name>BKP</name>
29665 <description>BKP</description>
29666 <bitOffset>0</bitOffset>
29667 <bitWidth>32</bitWidth>
29668 </field>
29669 </fields>
29670 </register>
29671 <register>
29672 <name>BKP13R</name>
29673 <displayName>BKP13R</displayName>
29674 <description>backup register</description>
29675 <addressOffset>0x84</addressOffset>
29676 <size>0x20</size>
29677 <access>read-write</access>
29678 <resetValue>0x00000000</resetValue>
29679 <fields>
29680 <field>
29681 <name>BKP</name>
29682 <description>BKP</description>
29683 <bitOffset>0</bitOffset>
29684 <bitWidth>32</bitWidth>
29685 </field>
29686 </fields>
29687 </register>
29688 <register>
29689 <name>BKP14R</name>
29690 <displayName>BKP14R</displayName>
29691 <description>backup register</description>
29692 <addressOffset>0x88</addressOffset>
29693 <size>0x20</size>
29694 <access>read-write</access>
29695 <resetValue>0x00000000</resetValue>
29696 <fields>
29697 <field>
29698 <name>BKP</name>
29699 <description>BKP</description>
29700 <bitOffset>0</bitOffset>
29701 <bitWidth>32</bitWidth>
29702 </field>
29703 </fields>
29704 </register>
29705 <register>
29706 <name>BKP15R</name>
29707 <displayName>BKP15R</displayName>
29708 <description>backup register</description>
29709 <addressOffset>0x8C</addressOffset>
29710 <size>0x20</size>
29711 <access>read-write</access>
29712 <resetValue>0x00000000</resetValue>
29713 <fields>
29714 <field>
29715 <name>BKP</name>
29716 <description>BKP</description>
29717 <bitOffset>0</bitOffset>
29718 <bitWidth>32</bitWidth>
29719 </field>
29720 </fields>
29721 </register>
29722 <register>
29723 <name>BKP16R</name>
29724 <displayName>BKP16R</displayName>
29725 <description>backup register</description>
29726 <addressOffset>0x90</addressOffset>
29727 <size>0x20</size>
29728 <access>read-write</access>
29729 <resetValue>0x00000000</resetValue>
29730 <fields>
29731 <field>
29732 <name>BKP</name>
29733 <description>BKP</description>
29734 <bitOffset>0</bitOffset>
29735 <bitWidth>32</bitWidth>
29736 </field>
29737 </fields>
29738 </register>
29739 <register>
29740 <name>BKP17R</name>
29741 <displayName>BKP17R</displayName>
29742 <description>backup register</description>
29743 <addressOffset>0x94</addressOffset>
29744 <size>0x20</size>
29745 <access>read-write</access>
29746 <resetValue>0x00000000</resetValue>
29747 <fields>
29748 <field>
29749 <name>BKP</name>
29750 <description>BKP</description>
29751 <bitOffset>0</bitOffset>
29752 <bitWidth>32</bitWidth>
29753 </field>
29754 </fields>
29755 </register>
29756 <register>
29757 <name>BKP18R</name>
29758 <displayName>BKP18R</displayName>
29759 <description>backup register</description>
29760 <addressOffset>0x98</addressOffset>
29761 <size>0x20</size>
29762 <access>read-write</access>
29763 <resetValue>0x00000000</resetValue>
29764 <fields>
29765 <field>
29766 <name>BKP</name>
29767 <description>BKP</description>
29768 <bitOffset>0</bitOffset>
29769 <bitWidth>32</bitWidth>
29770 </field>
29771 </fields>
29772 </register>
29773 <register>
29774 <name>BKP19R</name>
29775 <displayName>BKP19R</displayName>
29776 <description>backup register</description>
29777 <addressOffset>0x9C</addressOffset>
29778 <size>0x20</size>
29779 <access>read-write</access>
29780 <resetValue>0x00000000</resetValue>
29781 <fields>
29782 <field>
29783 <name>BKP</name>
29784 <description>BKP</description>
29785 <bitOffset>0</bitOffset>
29786 <bitWidth>32</bitWidth>
29787 </field>
29788 </fields>
29789 </register>
29790 <register>
29791 <name>BKP20R</name>
29792 <displayName>BKP20R</displayName>
29793 <description>backup register</description>
29794 <addressOffset>0xA0</addressOffset>
29795 <size>0x20</size>
29796 <access>read-write</access>
29797 <resetValue>0x00000000</resetValue>
29798 <fields>
29799 <field>
29800 <name>BKP</name>
29801 <description>BKP</description>
29802 <bitOffset>0</bitOffset>
29803 <bitWidth>32</bitWidth>
29804 </field>
29805 </fields>
29806 </register>
29807 <register>
29808 <name>BKP21R</name>
29809 <displayName>BKP21R</displayName>
29810 <description>backup register</description>
29811 <addressOffset>0xA4</addressOffset>
29812 <size>0x20</size>
29813 <access>read-write</access>
29814 <resetValue>0x00000000</resetValue>
29815 <fields>
29816 <field>
29817 <name>BKP</name>
29818 <description>BKP</description>
29819 <bitOffset>0</bitOffset>
29820 <bitWidth>32</bitWidth>
29821 </field>
29822 </fields>
29823 </register>
29824 <register>
29825 <name>BKP22R</name>
29826 <displayName>BKP22R</displayName>
29827 <description>backup register</description>
29828 <addressOffset>0xA8</addressOffset>
29829 <size>0x20</size>
29830 <access>read-write</access>
29831 <resetValue>0x00000000</resetValue>
29832 <fields>
29833 <field>
29834 <name>BKP</name>
29835 <description>BKP</description>
29836 <bitOffset>0</bitOffset>
29837 <bitWidth>32</bitWidth>
29838 </field>
29839 </fields>
29840 </register>
29841 <register>
29842 <name>BKP23R</name>
29843 <displayName>BKP23R</displayName>
29844 <description>backup register</description>
29845 <addressOffset>0xAC</addressOffset>
29846 <size>0x20</size>
29847 <access>read-write</access>
29848 <resetValue>0x00000000</resetValue>
29849 <fields>
29850 <field>
29851 <name>BKP</name>
29852 <description>BKP</description>
29853 <bitOffset>0</bitOffset>
29854 <bitWidth>32</bitWidth>
29855 </field>
29856 </fields>
29857 </register>
29858 <register>
29859 <name>BKP24R</name>
29860 <displayName>BKP24R</displayName>
29861 <description>backup register</description>
29862 <addressOffset>0xB0</addressOffset>
29863 <size>0x20</size>
29864 <access>read-write</access>
29865 <resetValue>0x00000000</resetValue>
29866 <fields>
29867 <field>
29868 <name>BKP</name>
29869 <description>BKP</description>
29870 <bitOffset>0</bitOffset>
29871 <bitWidth>32</bitWidth>
29872 </field>
29873 </fields>
29874 </register>
29875 <register>
29876 <name>BKP25R</name>
29877 <displayName>BKP25R</displayName>
29878 <description>backup register</description>
29879 <addressOffset>0xB4</addressOffset>
29880 <size>0x20</size>
29881 <access>read-write</access>
29882 <resetValue>0x00000000</resetValue>
29883 <fields>
29884 <field>
29885 <name>BKP</name>
29886 <description>BKP</description>
29887 <bitOffset>0</bitOffset>
29888 <bitWidth>32</bitWidth>
29889 </field>
29890 </fields>
29891 </register>
29892 <register>
29893 <name>BKP26R</name>
29894 <displayName>BKP26R</displayName>
29895 <description>backup register</description>
29896 <addressOffset>0xB8</addressOffset>
29897 <size>0x20</size>
29898 <access>read-write</access>
29899 <resetValue>0x00000000</resetValue>
29900 <fields>
29901 <field>
29902 <name>BKP</name>
29903 <description>BKP</description>
29904 <bitOffset>0</bitOffset>
29905 <bitWidth>32</bitWidth>
29906 </field>
29907 </fields>
29908 </register>
29909 <register>
29910 <name>BKP27R</name>
29911 <displayName>BKP27R</displayName>
29912 <description>backup register</description>
29913 <addressOffset>0xBC</addressOffset>
29914 <size>0x20</size>
29915 <access>read-write</access>
29916 <resetValue>0x00000000</resetValue>
29917 <fields>
29918 <field>
29919 <name>BKP</name>
29920 <description>BKP</description>
29921 <bitOffset>0</bitOffset>
29922 <bitWidth>32</bitWidth>
29923 </field>
29924 </fields>
29925 </register>
29926 <register>
29927 <name>BKP28R</name>
29928 <displayName>BKP28R</displayName>
29929 <description>backup register</description>
29930 <addressOffset>0xC0</addressOffset>
29931 <size>0x20</size>
29932 <access>read-write</access>
29933 <resetValue>0x00000000</resetValue>
29934 <fields>
29935 <field>
29936 <name>BKP</name>
29937 <description>BKP</description>
29938 <bitOffset>0</bitOffset>
29939 <bitWidth>32</bitWidth>
29940 </field>
29941 </fields>
29942 </register>
29943 <register>
29944 <name>BKP29R</name>
29945 <displayName>BKP29R</displayName>
29946 <description>backup register</description>
29947 <addressOffset>0xC4</addressOffset>
29948 <size>0x20</size>
29949 <access>read-write</access>
29950 <resetValue>0x00000000</resetValue>
29951 <fields>
29952 <field>
29953 <name>BKP</name>
29954 <description>BKP</description>
29955 <bitOffset>0</bitOffset>
29956 <bitWidth>32</bitWidth>
29957 </field>
29958 </fields>
29959 </register>
29960 <register>
29961 <name>BKP30R</name>
29962 <displayName>BKP30R</displayName>
29963 <description>backup register</description>
29964 <addressOffset>0xC8</addressOffset>
29965 <size>0x20</size>
29966 <access>read-write</access>
29967 <resetValue>0x00000000</resetValue>
29968 <fields>
29969 <field>
29970 <name>BKP</name>
29971 <description>BKP</description>
29972 <bitOffset>0</bitOffset>
29973 <bitWidth>32</bitWidth>
29974 </field>
29975 </fields>
29976 </register>
29977 <register>
29978 <name>BKP31R</name>
29979 <displayName>BKP31R</displayName>
29980 <description>backup register</description>
29981 <addressOffset>0xCC</addressOffset>
29982 <size>0x20</size>
29983 <access>read-write</access>
29984 <resetValue>0x00000000</resetValue>
29985 <fields>
29986 <field>
29987 <name>BKP</name>
29988 <description>BKP</description>
29989 <bitOffset>0</bitOffset>
29990 <bitWidth>32</bitWidth>
29991 </field>
29992 </fields>
29993 </register>
29994 </registers>
29995 </peripheral>
29996 <peripheral>
29997 <name>TIM6</name>
29998 <description>Basic timers</description>
29999 <groupName>TIMs</groupName>
30000 <baseAddress>0x40001000</baseAddress>
30001 <addressBlock>
30002 <offset>0x0</offset>
30003 <size>0x400</size>
30004 <usage>registers</usage>
30005 </addressBlock>
30006 <interrupt>
30007 <name>TIM6_DACUNDER</name>
30008 <description>TIM6 global and DAC12 underrun
30009 interrupts</description>
30010 <value>54</value>
30011 </interrupt>
30012 <registers>
30013 <register>
30014 <name>CR1</name>
30015 <displayName>CR1</displayName>
30016 <description>control register 1</description>
30017 <addressOffset>0x0</addressOffset>
30018 <size>0x20</size>
30019 <access>read-write</access>
30020 <resetValue>0x0000</resetValue>
30021 <fields>
30022 <field>
30023 <name>CEN</name>
30024 <description>Counter enable</description>
30025 <bitOffset>0</bitOffset>
30026 <bitWidth>1</bitWidth>
30027 </field>
30028 <field>
30029 <name>UDIS</name>
30030 <description>Update disable</description>
30031 <bitOffset>1</bitOffset>
30032 <bitWidth>1</bitWidth>
30033 </field>
30034 <field>
30035 <name>URS</name>
30036 <description>Update request source</description>
30037 <bitOffset>2</bitOffset>
30038 <bitWidth>1</bitWidth>
30039 </field>
30040 <field>
30041 <name>OPM</name>
30042 <description>One-pulse mode</description>
30043 <bitOffset>3</bitOffset>
30044 <bitWidth>1</bitWidth>
30045 </field>
30046 <field>
30047 <name>ARPE</name>
30048 <description>Auto-reload preload enable</description>
30049 <bitOffset>7</bitOffset>
30050 <bitWidth>1</bitWidth>
30051 </field>
30052 <field>
30053 <name>UIFREMAP</name>
30054 <description>UIF status bit remapping</description>
30055 <bitOffset>11</bitOffset>
30056 <bitWidth>1</bitWidth>
30057 </field>
30058 </fields>
30059 </register>
30060 <register>
30061 <name>CR2</name>
30062 <displayName>CR2</displayName>
30063 <description>control register 2</description>
30064 <addressOffset>0x4</addressOffset>
30065 <size>0x20</size>
30066 <access>read-write</access>
30067 <resetValue>0x0000</resetValue>
30068 <fields>
30069 <field>
30070 <name>MMS</name>
30071 <description>Master mode selection</description>
30072 <bitOffset>4</bitOffset>
30073 <bitWidth>3</bitWidth>
30074 </field>
30075 </fields>
30076 </register>
30077 <register>
30078 <name>DIER</name>
30079 <displayName>DIER</displayName>
30080 <description>DMA/Interrupt enable register</description>
30081 <addressOffset>0xC</addressOffset>
30082 <size>0x20</size>
30083 <access>read-write</access>
30084 <resetValue>0x0000</resetValue>
30085 <fields>
30086 <field>
30087 <name>UDE</name>
30088 <description>Update DMA request enable</description>
30089 <bitOffset>8</bitOffset>
30090 <bitWidth>1</bitWidth>
30091 </field>
30092 <field>
30093 <name>UIE</name>
30094 <description>Update interrupt enable</description>
30095 <bitOffset>0</bitOffset>
30096 <bitWidth>1</bitWidth>
30097 </field>
30098 </fields>
30099 </register>
30100 <register>
30101 <name>SR</name>
30102 <displayName>SR</displayName>
30103 <description>status register</description>
30104 <addressOffset>0x10</addressOffset>
30105 <size>0x20</size>
30106 <access>read-write</access>
30107 <resetValue>0x0000</resetValue>
30108 <fields>
30109 <field>
30110 <name>UIF</name>
30111 <description>Update interrupt flag</description>
30112 <bitOffset>0</bitOffset>
30113 <bitWidth>1</bitWidth>
30114 </field>
30115 </fields>
30116 </register>
30117 <register>
30118 <name>EGR</name>
30119 <displayName>EGR</displayName>
30120 <description>event generation register</description>
30121 <addressOffset>0x14</addressOffset>
30122 <size>0x20</size>
30123 <access>write-only</access>
30124 <resetValue>0x0000</resetValue>
30125 <fields>
30126 <field>
30127 <name>UG</name>
30128 <description>Update generation</description>
30129 <bitOffset>0</bitOffset>
30130 <bitWidth>1</bitWidth>
30131 </field>
30132 </fields>
30133 </register>
30134 <register>
30135 <name>CNT</name>
30136 <displayName>CNT</displayName>
30137 <description>counter</description>
30138 <addressOffset>0x24</addressOffset>
30139 <size>0x20</size>
30140 <resetValue>0x00000000</resetValue>
30141 <fields>
30142 <field>
30143 <name>CNT</name>
30144 <description>Low counter value</description>
30145 <bitOffset>0</bitOffset>
30146 <bitWidth>16</bitWidth>
30147 <access>read-write</access>
30148 </field>
30149 <field>
30150 <name>UIFCPY</name>
30151 <description>UIF Copy</description>
30152 <bitOffset>31</bitOffset>
30153 <bitWidth>1</bitWidth>
30154 <access>read-only</access>
30155 </field>
30156 </fields>
30157 </register>
30158 <register>
30159 <name>PSC</name>
30160 <displayName>PSC</displayName>
30161 <description>prescaler</description>
30162 <addressOffset>0x28</addressOffset>
30163 <size>0x20</size>
30164 <access>read-write</access>
30165 <resetValue>0x0000</resetValue>
30166 <fields>
30167 <field>
30168 <name>PSC</name>
30169 <description>Prescaler value</description>
30170 <bitOffset>0</bitOffset>
30171 <bitWidth>16</bitWidth>
30172 </field>
30173 </fields>
30174 </register>
30175 <register>
30176 <name>ARR</name>
30177 <displayName>ARR</displayName>
30178 <description>auto-reload register</description>
30179 <addressOffset>0x2C</addressOffset>
30180 <size>0x20</size>
30181 <access>read-write</access>
30182 <resetValue>0x00000000</resetValue>
30183 <fields>
30184 <field>
30185 <name>ARR</name>
30186 <description>Low Auto-reload value</description>
30187 <bitOffset>0</bitOffset>
30188 <bitWidth>16</bitWidth>
30189 </field>
30190 </fields>
30191 </register>
30192 </registers>
30193 </peripheral>
30194 <peripheral derivedFrom="TIM6">
30195 <name>TIM7</name>
30196 <baseAddress>0x40001400</baseAddress>
30197 <interrupt>
30198 <name>TIM7</name>
30199 <description>TIM7 global interrupt</description>
30200 <value>55</value>
30201 </interrupt>
30202 </peripheral>
30203 <peripheral>
30204 <name>DAC</name>
30205 <description>Digital-to-analog converter</description>
30206 <groupName>DAC</groupName>
30207 <baseAddress>0x40007400</baseAddress>
30208 <addressBlock>
30209 <offset>0x0</offset>
30210 <size>0x400</size>
30211 <usage>registers</usage>
30212 </addressBlock>
30213 <interrupt>
30214 <name>TIM6_DACUNDER</name>
30215 <description>TIM6 global and DAC12 underrun
30216 interrupts</description>
30217 <value>54</value>
30218 </interrupt>
30219 <registers>
30220 <register>
30221 <name>CR</name>
30222 <displayName>CR</displayName>
30223 <description>control register</description>
30224 <addressOffset>0x0</addressOffset>
30225 <size>0x20</size>
30226 <access>read-write</access>
30227 <resetValue>0x00000000</resetValue>
30228 <fields>
30229 <field>
30230 <name>DMAUDRIE2</name>
30231 <description>DAC channel2 DMA underrun interrupt
30232 enable</description>
30233 <bitOffset>29</bitOffset>
30234 <bitWidth>1</bitWidth>
30235 </field>
30236 <field>
30237 <name>DMAEN2</name>
30238 <description>DAC channel2 DMA enable</description>
30239 <bitOffset>28</bitOffset>
30240 <bitWidth>1</bitWidth>
30241 </field>
30242 <field>
30243 <name>MAMP2</name>
30244 <description>DAC channel2 mask/amplitude
30245 selector</description>
30246 <bitOffset>24</bitOffset>
30247 <bitWidth>4</bitWidth>
30248 </field>
30249 <field>
30250 <name>WAVE2</name>
30251 <description>DAC channel2 noise/triangle wave
30252 generation enable</description>
30253 <bitOffset>22</bitOffset>
30254 <bitWidth>2</bitWidth>
30255 </field>
30256 <field>
30257 <name>TSEL2</name>
30258 <description>DAC channel2 trigger
30259 selection</description>
30260 <bitOffset>19</bitOffset>
30261 <bitWidth>3</bitWidth>
30262 </field>
30263 <field>
30264 <name>TEN2</name>
30265 <description>DAC channel2 trigger
30266 enable</description>
30267 <bitOffset>18</bitOffset>
30268 <bitWidth>1</bitWidth>
30269 </field>
30270 <field>
30271 <name>BOFF2</name>
30272 <description>DAC channel2 output buffer
30273 disable</description>
30274 <bitOffset>17</bitOffset>
30275 <bitWidth>1</bitWidth>
30276 </field>
30277 <field>
30278 <name>EN2</name>
30279 <description>DAC channel2 enable</description>
30280 <bitOffset>16</bitOffset>
30281 <bitWidth>1</bitWidth>
30282 </field>
30283 <field>
30284 <name>DMAUDRIE1</name>
30285 <description>DAC channel1 DMA Underrun Interrupt
30286 enable</description>
30287 <bitOffset>13</bitOffset>
30288 <bitWidth>1</bitWidth>
30289 </field>
30290 <field>
30291 <name>DMAEN1</name>
30292 <description>DAC channel1 DMA enable</description>
30293 <bitOffset>12</bitOffset>
30294 <bitWidth>1</bitWidth>
30295 </field>
30296 <field>
30297 <name>MAMP1</name>
30298 <description>DAC channel1 mask/amplitude
30299 selector</description>
30300 <bitOffset>8</bitOffset>
30301 <bitWidth>4</bitWidth>
30302 </field>
30303 <field>
30304 <name>WAVE1</name>
30305 <description>DAC channel1 noise/triangle wave
30306 generation enable</description>
30307 <bitOffset>6</bitOffset>
30308 <bitWidth>2</bitWidth>
30309 </field>
30310 <field>
30311 <name>TSEL1</name>
30312 <description>DAC channel1 trigger
30313 selection</description>
30314 <bitOffset>3</bitOffset>
30315 <bitWidth>3</bitWidth>
30316 </field>
30317 <field>
30318 <name>TEN1</name>
30319 <description>DAC channel1 trigger
30320 enable</description>
30321 <bitOffset>2</bitOffset>
30322 <bitWidth>1</bitWidth>
30323 </field>
30324 <field>
30325 <name>BOFF1</name>
30326 <description>DAC channel1 output buffer
30327 disable</description>
30328 <bitOffset>1</bitOffset>
30329 <bitWidth>1</bitWidth>
30330 </field>
30331 <field>
30332 <name>EN1</name>
30333 <description>DAC channel1 enable</description>
30334 <bitOffset>0</bitOffset>
30335 <bitWidth>1</bitWidth>
30336 </field>
30337 </fields>
30338 </register>
30339 <register>
30340 <name>SWTRIGR</name>
30341 <displayName>SWTRIGR</displayName>
30342 <description>software trigger register</description>
30343 <addressOffset>0x4</addressOffset>
30344 <size>0x20</size>
30345 <access>write-only</access>
30346 <resetValue>0x00000000</resetValue>
30347 <fields>
30348 <field>
30349 <name>SWTRIG2</name>
30350 <description>DAC channel2 software
30351 trigger</description>
30352 <bitOffset>1</bitOffset>
30353 <bitWidth>1</bitWidth>
30354 </field>
30355 <field>
30356 <name>SWTRIG1</name>
30357 <description>DAC channel1 software
30358 trigger</description>
30359 <bitOffset>0</bitOffset>
30360 <bitWidth>1</bitWidth>
30361 </field>
30362 </fields>
30363 </register>
30364 <register>
30365 <name>DHR12R1</name>
30366 <displayName>DHR12R1</displayName>
30367 <description>channel1 12-bit right-aligned data holding
30368 register</description>
30369 <addressOffset>0x8</addressOffset>
30370 <size>0x20</size>
30371 <access>read-write</access>
30372 <resetValue>0x00000000</resetValue>
30373 <fields>
30374 <field>
30375 <name>DACC1DHR</name>
30376 <description>DAC channel1 12-bit right-aligned
30377 data</description>
30378 <bitOffset>0</bitOffset>
30379 <bitWidth>12</bitWidth>
30380 </field>
30381 </fields>
30382 </register>
30383 <register>
30384 <name>DHR12L1</name>
30385 <displayName>DHR12L1</displayName>
30386 <description>channel1 12-bit left aligned data holding
30387 register</description>
30388 <addressOffset>0xC</addressOffset>
30389 <size>0x20</size>
30390 <access>read-write</access>
30391 <resetValue>0x00000000</resetValue>
30392 <fields>
30393 <field>
30394 <name>DACC1DHR</name>
30395 <description>DAC channel1 12-bit left-aligned
30396 data</description>
30397 <bitOffset>4</bitOffset>
30398 <bitWidth>12</bitWidth>
30399 </field>
30400 </fields>
30401 </register>
30402 <register>
30403 <name>DHR8R1</name>
30404 <displayName>DHR8R1</displayName>
30405 <description>channel1 8-bit right aligned data holding
30406 register</description>
30407 <addressOffset>0x10</addressOffset>
30408 <size>0x20</size>
30409 <access>read-write</access>
30410 <resetValue>0x00000000</resetValue>
30411 <fields>
30412 <field>
30413 <name>DACC1DHR</name>
30414 <description>DAC channel1 8-bit right-aligned
30415 data</description>
30416 <bitOffset>0</bitOffset>
30417 <bitWidth>8</bitWidth>
30418 </field>
30419 </fields>
30420 </register>
30421 <register>
30422 <name>DHR12R2</name>
30423 <displayName>DHR12R2</displayName>
30424 <description>channel2 12-bit right aligned data holding
30425 register</description>
30426 <addressOffset>0x14</addressOffset>
30427 <size>0x20</size>
30428 <access>read-write</access>
30429 <resetValue>0x00000000</resetValue>
30430 <fields>
30431 <field>
30432 <name>DACC2DHR</name>
30433 <description>DAC channel2 12-bit right-aligned
30434 data</description>
30435 <bitOffset>0</bitOffset>
30436 <bitWidth>12</bitWidth>
30437 </field>
30438 </fields>
30439 </register>
30440 <register>
30441 <name>DHR12L2</name>
30442 <displayName>DHR12L2</displayName>
30443 <description>channel2 12-bit left aligned data holding
30444 register</description>
30445 <addressOffset>0x18</addressOffset>
30446 <size>0x20</size>
30447 <access>read-write</access>
30448 <resetValue>0x00000000</resetValue>
30449 <fields>
30450 <field>
30451 <name>DACC2DHR</name>
30452 <description>DAC channel2 12-bit left-aligned
30453 data</description>
30454 <bitOffset>4</bitOffset>
30455 <bitWidth>12</bitWidth>
30456 </field>
30457 </fields>
30458 </register>
30459 <register>
30460 <name>DHR8R2</name>
30461 <displayName>DHR8R2</displayName>
30462 <description>channel2 8-bit right-aligned data holding
30463 register</description>
30464 <addressOffset>0x1C</addressOffset>
30465 <size>0x20</size>
30466 <access>read-write</access>
30467 <resetValue>0x00000000</resetValue>
30468 <fields>
30469 <field>
30470 <name>DACC2DHR</name>
30471 <description>DAC channel2 8-bit right-aligned
30472 data</description>
30473 <bitOffset>0</bitOffset>
30474 <bitWidth>8</bitWidth>
30475 </field>
30476 </fields>
30477 </register>
30478 <register>
30479 <name>DHR12RD</name>
30480 <displayName>DHR12RD</displayName>
30481 <description>Dual DAC 12-bit right-aligned data holding
30482 register</description>
30483 <addressOffset>0x20</addressOffset>
30484 <size>0x20</size>
30485 <access>read-write</access>
30486 <resetValue>0x00000000</resetValue>
30487 <fields>
30488 <field>
30489 <name>DACC2DHR</name>
30490 <description>DAC channel2 12-bit right-aligned
30491 data</description>
30492 <bitOffset>16</bitOffset>
30493 <bitWidth>12</bitWidth>
30494 </field>
30495 <field>
30496 <name>DACC1DHR</name>
30497 <description>DAC channel1 12-bit right-aligned
30498 data</description>
30499 <bitOffset>0</bitOffset>
30500 <bitWidth>12</bitWidth>
30501 </field>
30502 </fields>
30503 </register>
30504 <register>
30505 <name>DHR12LD</name>
30506 <displayName>DHR12LD</displayName>
30507 <description>DUAL DAC 12-bit left aligned data holding
30508 register</description>
30509 <addressOffset>0x24</addressOffset>
30510 <size>0x20</size>
30511 <access>read-write</access>
30512 <resetValue>0x00000000</resetValue>
30513 <fields>
30514 <field>
30515 <name>DACC2DHR</name>
30516 <description>DAC channel2 12-bit left-aligned
30517 data</description>
30518 <bitOffset>20</bitOffset>
30519 <bitWidth>12</bitWidth>
30520 </field>
30521 <field>
30522 <name>DACC1DHR</name>
30523 <description>DAC channel1 12-bit left-aligned
30524 data</description>
30525 <bitOffset>4</bitOffset>
30526 <bitWidth>12</bitWidth>
30527 </field>
30528 </fields>
30529 </register>
30530 <register>
30531 <name>DHR8RD</name>
30532 <displayName>DHR8RD</displayName>
30533 <description>DUAL DAC 8-bit right aligned data holding
30534 register</description>
30535 <addressOffset>0x28</addressOffset>
30536 <size>0x20</size>
30537 <access>read-write</access>
30538 <resetValue>0x00000000</resetValue>
30539 <fields>
30540 <field>
30541 <name>DACC2DHR</name>
30542 <description>DAC channel2 8-bit right-aligned
30543 data</description>
30544 <bitOffset>8</bitOffset>
30545 <bitWidth>8</bitWidth>
30546 </field>
30547 <field>
30548 <name>DACC1DHR</name>
30549 <description>DAC channel1 8-bit right-aligned
30550 data</description>
30551 <bitOffset>0</bitOffset>
30552 <bitWidth>8</bitWidth>
30553 </field>
30554 </fields>
30555 </register>
30556 <register>
30557 <name>DOR1</name>
30558 <displayName>DOR1</displayName>
30559 <description>channel1 data output register</description>
30560 <addressOffset>0x2C</addressOffset>
30561 <size>0x20</size>
30562 <access>read-only</access>
30563 <resetValue>0x00000000</resetValue>
30564 <fields>
30565 <field>
30566 <name>DACC1DOR</name>
30567 <description>DAC channel1 data output</description>
30568 <bitOffset>0</bitOffset>
30569 <bitWidth>12</bitWidth>
30570 </field>
30571 </fields>
30572 </register>
30573 <register>
30574 <name>DOR2</name>
30575 <displayName>DOR2</displayName>
30576 <description>channel2 data output register</description>
30577 <addressOffset>0x30</addressOffset>
30578 <size>0x20</size>
30579 <access>read-only</access>
30580 <resetValue>0x00000000</resetValue>
30581 <fields>
30582 <field>
30583 <name>DACC2DOR</name>
30584 <description>DAC channel2 data output</description>
30585 <bitOffset>0</bitOffset>
30586 <bitWidth>12</bitWidth>
30587 </field>
30588 </fields>
30589 </register>
30590 <register>
30591 <name>SR</name>
30592 <displayName>SR</displayName>
30593 <description>status register</description>
30594 <addressOffset>0x34</addressOffset>
30595 <size>0x20</size>
30596 <access>read-write</access>
30597 <resetValue>0x00000000</resetValue>
30598 <fields>
30599 <field>
30600 <name>DMAUDR2</name>
30601 <description>DAC channel2 DMA underrun
30602 flag</description>
30603 <bitOffset>29</bitOffset>
30604 <bitWidth>1</bitWidth>
30605 </field>
30606 <field>
30607 <name>DMAUDR1</name>
30608 <description>DAC channel1 DMA underrun
30609 flag</description>
30610 <bitOffset>13</bitOffset>
30611 <bitWidth>1</bitWidth>
30612 </field>
30613 </fields>
30614 </register>
30615 </registers>
30616 </peripheral>
30617 <peripheral>
30618 <name>DBGMCU</name>
30619 <description>Debug support</description>
30620 <groupName>DBGMCU</groupName>
30621 <baseAddress>0xE0042000</baseAddress>
30622 <addressBlock>
30623 <offset>0x0</offset>
30624 <size>0x400</size>
30625 <usage>registers</usage>
30626 </addressBlock>
30627 <registers>
30628 <register>
30629 <name>IDCODE</name>
30630 <displayName>IDCODE</displayName>
30631 <description>MCU Device ID Code Register</description>
30632 <addressOffset>0x0</addressOffset>
30633 <size>0x20</size>
30634 <access>read-only</access>
30635 <resetValue>0x0</resetValue>
30636 <fields>
30637 <field>
30638 <name>DEV_ID</name>
30639 <description>Device Identifier</description>
30640 <bitOffset>0</bitOffset>
30641 <bitWidth>12</bitWidth>
30642 </field>
30643 <field>
30644 <name>REV_ID</name>
30645 <description>Revision Identifier</description>
30646 <bitOffset>16</bitOffset>
30647 <bitWidth>16</bitWidth>
30648 </field>
30649 </fields>
30650 </register>
30651 <register>
30652 <name>CR</name>
30653 <displayName>CR</displayName>
30654 <description>Debug MCU Configuration
30655 Register</description>
30656 <addressOffset>0x4</addressOffset>
30657 <size>0x20</size>
30658 <access>read-write</access>
30659 <resetValue>0x0</resetValue>
30660 <fields>
30661 <field>
30662 <name>DBG_SLEEP</name>
30663 <description>Debug Sleep mode</description>
30664 <bitOffset>0</bitOffset>
30665 <bitWidth>1</bitWidth>
30666 </field>
30667 <field>
30668 <name>DBG_STOP</name>
30669 <description>Debug Stop Mode</description>
30670 <bitOffset>1</bitOffset>
30671 <bitWidth>1</bitWidth>
30672 </field>
30673 <field>
30674 <name>DBG_STANDBY</name>
30675 <description>Debug Standby Mode</description>
30676 <bitOffset>2</bitOffset>
30677 <bitWidth>1</bitWidth>
30678 </field>
30679 <field>
30680 <name>TRACE_IOEN</name>
30681 <description>Trace pin assignment
30682 control</description>
30683 <bitOffset>5</bitOffset>
30684 <bitWidth>1</bitWidth>
30685 </field>
30686 <field>
30687 <name>TRACE_MODE</name>
30688 <description>Trace pin assignment
30689 control</description>
30690 <bitOffset>6</bitOffset>
30691 <bitWidth>2</bitWidth>
30692 </field>
30693 </fields>
30694 </register>
30695 <register>
30696 <name>APB1FZ</name>
30697 <displayName>APB1FZ</displayName>
30698 <description>APB Low Freeze Register</description>
30699 <addressOffset>0x8</addressOffset>
30700 <size>0x20</size>
30701 <access>read-write</access>
30702 <resetValue>0x0</resetValue>
30703 <fields>
30704 <field>
30705 <name>DBG_TIM2_STOP</name>
30706 <description>Debug Timer 2 stopped when Core is
30707 halted</description>
30708 <bitOffset>0</bitOffset>
30709 <bitWidth>1</bitWidth>
30710 </field>
30711 <field>
30712 <name>DBG_TIM3_STOP</name>
30713 <description>Debug Timer 3 stopped when Core is
30714 halted</description>
30715 <bitOffset>1</bitOffset>
30716 <bitWidth>1</bitWidth>
30717 </field>
30718 <field>
30719 <name>DBG_TIM4_STOP</name>
30720 <description>Debug Timer 4 stopped when Core is
30721 halted</description>
30722 <bitOffset>2</bitOffset>
30723 <bitWidth>1</bitWidth>
30724 </field>
30725 <field>
30726 <name>DBG_TIM5_STOP</name>
30727 <description>Debug Timer 5 stopped when Core is
30728 halted</description>
30729 <bitOffset>3</bitOffset>
30730 <bitWidth>1</bitWidth>
30731 </field>
30732 <field>
30733 <name>DBG_TIM6_STOP</name>
30734 <description>Debug Timer 6 stopped when Core is
30735 halted</description>
30736 <bitOffset>4</bitOffset>
30737 <bitWidth>1</bitWidth>
30738 </field>
30739 <field>
30740 <name>DBG_TIM7_STOP</name>
30741 <description>Debug Timer 7 stopped when Core is
30742 halted</description>
30743 <bitOffset>5</bitOffset>
30744 <bitWidth>1</bitWidth>
30745 </field>
30746 <field>
30747 <name>DBG_TIM12_STOP</name>
30748 <description>Debug Timer 12 stopped when Core is
30749 halted</description>
30750 <bitOffset>6</bitOffset>
30751 <bitWidth>1</bitWidth>
30752 </field>
30753 <field>
30754 <name>DBG_TIM13_STOP</name>
30755 <description>Debug Timer 13 stopped when Core is
30756 halted</description>
30757 <bitOffset>7</bitOffset>
30758 <bitWidth>1</bitWidth>
30759 </field>
30760 <field>
30761 <name>DBG_TIMER14_STOP</name>
30762 <description>Debug Timer 14 stopped when Core is
30763 halted</description>
30764 <bitOffset>8</bitOffset>
30765 <bitWidth>1</bitWidth>
30766 </field>
30767 <field>
30768 <name>DBG_TIM18_STOP</name>
30769 <description>Debug Timer 18 stopped when Core is
30770 halted</description>
30771 <bitOffset>9</bitOffset>
30772 <bitWidth>1</bitWidth>
30773 </field>
30774 <field>
30775 <name>DBG_RTC_STOP</name>
30776 <description>Debug RTC stopped when Core is
30777 halted</description>
30778 <bitOffset>10</bitOffset>
30779 <bitWidth>1</bitWidth>
30780 </field>
30781 <field>
30782 <name>DBG_WWDG_STOP</name>
30783 <description>Debug Window Wachdog stopped when Core
30784 is halted</description>
30785 <bitOffset>11</bitOffset>
30786 <bitWidth>1</bitWidth>
30787 </field>
30788 <field>
30789 <name>DBG_IWDG_STOP</name>
30790 <description>Debug Independent Wachdog stopped when
30791 Core is halted</description>
30792 <bitOffset>12</bitOffset>
30793 <bitWidth>1</bitWidth>
30794 </field>
30795 <field>
30796 <name>I2C1_SMBUS_TIMEOUT</name>
30797 <description>SMBUS timeout mode stopped when Core is
30798 halted</description>
30799 <bitOffset>21</bitOffset>
30800 <bitWidth>1</bitWidth>
30801 </field>
30802 <field>
30803 <name>I2C2_SMBUS_TIMEOUT</name>
30804 <description>SMBUS timeout mode stopped when Core is
30805 halted</description>
30806 <bitOffset>22</bitOffset>
30807 <bitWidth>1</bitWidth>
30808 </field>
30809 <field>
30810 <name>DBG_CAN_STOP</name>
30811 <description>Debug CAN stopped when core is
30812 halted</description>
30813 <bitOffset>25</bitOffset>
30814 <bitWidth>1</bitWidth>
30815 </field>
30816 </fields>
30817 </register>
30818 <register>
30819 <name>APB2FZ</name>
30820 <displayName>APB2FZ</displayName>
30821 <description>APB High Freeze Register</description>
30822 <addressOffset>0xC</addressOffset>
30823 <size>0x20</size>
30824 <access>read-write</access>
30825 <resetValue>0x0</resetValue>
30826 <fields>
30827 <field>
30828 <name>DBG_TIM15_STOP</name>
30829 <description>Debug Timer 15 stopped when Core is
30830 halted</description>
30831 <bitOffset>2</bitOffset>
30832 <bitWidth>1</bitWidth>
30833 </field>
30834 <field>
30835 <name>DBG_TIM16_STOP</name>
30836 <description>Debug Timer 16 stopped when Core is
30837 halted</description>
30838 <bitOffset>3</bitOffset>
30839 <bitWidth>1</bitWidth>
30840 </field>
30841 <field>
30842 <name>DBG_TIM17_STO</name>
30843 <description>Debug Timer 17 stopped when Core is
30844 halted</description>
30845 <bitOffset>4</bitOffset>
30846 <bitWidth>1</bitWidth>
30847 </field>
30848 <field>
30849 <name>DBG_TIM19_STOP</name>
30850 <description>Debug Timer 19 stopped when Core is
30851 halted</description>
30852 <bitOffset>5</bitOffset>
30853 <bitWidth>1</bitWidth>
30854 </field>
30855 </fields>
30856 </register>
30857 </registers>
30858 </peripheral>
30859 <peripheral>
30860 <name>TIM1</name>
30861 <description>Advanced timer</description>
30862 <groupName>TIMs</groupName>
30863 <baseAddress>0x40012C00</baseAddress>
30864 <addressBlock>
30865 <offset>0x0</offset>
30866 <size>0x400</size>
30867 <usage>registers</usage>
30868 </addressBlock>
30869 <interrupt>
30870 <name>TIM1_CC</name>
30871 <description>TIM1 capture compare interrupt</description>
30872 <value>27</value>
30873 </interrupt>
30874 <registers>
30875 <register>
30876 <name>CR1</name>
30877 <displayName>CR1</displayName>
30878 <description>control register 1</description>
30879 <addressOffset>0x0</addressOffset>
30880 <size>0x20</size>
30881 <access>read-write</access>
30882 <resetValue>0x0000</resetValue>
30883 <fields>
30884 <field>
30885 <name>CEN</name>
30886 <description>Counter enable</description>
30887 <bitOffset>0</bitOffset>
30888 <bitWidth>1</bitWidth>
30889 </field>
30890 <field>
30891 <name>UDIS</name>
30892 <description>Update disable</description>
30893 <bitOffset>1</bitOffset>
30894 <bitWidth>1</bitWidth>
30895 </field>
30896 <field>
30897 <name>URS</name>
30898 <description>Update request source</description>
30899 <bitOffset>2</bitOffset>
30900 <bitWidth>1</bitWidth>
30901 </field>
30902 <field>
30903 <name>OPM</name>
30904 <description>One-pulse mode</description>
30905 <bitOffset>3</bitOffset>
30906 <bitWidth>1</bitWidth>
30907 </field>
30908 <field>
30909 <name>DIR</name>
30910 <description>Direction</description>
30911 <bitOffset>4</bitOffset>
30912 <bitWidth>1</bitWidth>
30913 </field>
30914 <field>
30915 <name>CMS</name>
30916 <description>Center-aligned mode
30917 selection</description>
30918 <bitOffset>5</bitOffset>
30919 <bitWidth>2</bitWidth>
30920 </field>
30921 <field>
30922 <name>ARPE</name>
30923 <description>Auto-reload preload enable</description>
30924 <bitOffset>7</bitOffset>
30925 <bitWidth>1</bitWidth>
30926 </field>
30927 <field>
30928 <name>CKD</name>
30929 <description>Clock division</description>
30930 <bitOffset>8</bitOffset>
30931 <bitWidth>2</bitWidth>
30932 </field>
30933 <field>
30934 <name>UIFREMAP</name>
30935 <description>UIF status bit remapping</description>
30936 <bitOffset>11</bitOffset>
30937 <bitWidth>1</bitWidth>
30938 </field>
30939 </fields>
30940 </register>
30941 <register>
30942 <name>CR2</name>
30943 <displayName>CR2</displayName>
30944 <description>control register 2</description>
30945 <addressOffset>0x4</addressOffset>
30946 <size>0x20</size>
30947 <access>read-write</access>
30948 <resetValue>0x0000</resetValue>
30949 <fields>
30950 <field>
30951 <name>CCPC</name>
30952 <description>Capture/compare preloaded
30953 control</description>
30954 <bitOffset>0</bitOffset>
30955 <bitWidth>1</bitWidth>
30956 </field>
30957 <field>
30958 <name>CCUS</name>
30959 <description>Capture/compare control update
30960 selection</description>
30961 <bitOffset>2</bitOffset>
30962 <bitWidth>1</bitWidth>
30963 </field>
30964 <field>
30965 <name>CCDS</name>
30966 <description>Capture/compare DMA
30967 selection</description>
30968 <bitOffset>3</bitOffset>
30969 <bitWidth>1</bitWidth>
30970 </field>
30971 <field>
30972 <name>MMS</name>
30973 <description>Master mode selection</description>
30974 <bitOffset>4</bitOffset>
30975 <bitWidth>3</bitWidth>
30976 </field>
30977 <field>
30978 <name>TI1S</name>
30979 <description>TI1 selection</description>
30980 <bitOffset>7</bitOffset>
30981 <bitWidth>1</bitWidth>
30982 </field>
30983 <field>
30984 <name>OIS1</name>
30985 <description>Output Idle state 1</description>
30986 <bitOffset>8</bitOffset>
30987 <bitWidth>1</bitWidth>
30988 </field>
30989 <field>
30990 <name>OIS1N</name>
30991 <description>Output Idle state 1</description>
30992 <bitOffset>9</bitOffset>
30993 <bitWidth>1</bitWidth>
30994 </field>
30995 <field>
30996 <name>OIS2</name>
30997 <description>Output Idle state 2</description>
30998 <bitOffset>10</bitOffset>
30999 <bitWidth>1</bitWidth>
31000 </field>
31001 <field>
31002 <name>OIS2N</name>
31003 <description>Output Idle state 2</description>
31004 <bitOffset>11</bitOffset>
31005 <bitWidth>1</bitWidth>
31006 </field>
31007 <field>
31008 <name>OIS3</name>
31009 <description>Output Idle state 3</description>
31010 <bitOffset>12</bitOffset>
31011 <bitWidth>1</bitWidth>
31012 </field>
31013 <field>
31014 <name>OIS3N</name>
31015 <description>Output Idle state 3</description>
31016 <bitOffset>13</bitOffset>
31017 <bitWidth>1</bitWidth>
31018 </field>
31019 <field>
31020 <name>OIS4</name>
31021 <description>Output Idle state 4</description>
31022 <bitOffset>14</bitOffset>
31023 <bitWidth>1</bitWidth>
31024 </field>
31025 <field>
31026 <name>OIS5</name>
31027 <description>Output Idle state 5</description>
31028 <bitOffset>16</bitOffset>
31029 <bitWidth>1</bitWidth>
31030 </field>
31031 <field>
31032 <name>OIS6</name>
31033 <description>Output Idle state 6</description>
31034 <bitOffset>18</bitOffset>
31035 <bitWidth>1</bitWidth>
31036 </field>
31037 <field>
31038 <name>MMS2</name>
31039 <description>Master mode selection 2</description>
31040 <bitOffset>20</bitOffset>
31041 <bitWidth>4</bitWidth>
31042 </field>
31043 </fields>
31044 </register>
31045 <register>
31046 <name>SMCR</name>
31047 <displayName>SMCR</displayName>
31048 <description>slave mode control register</description>
31049 <addressOffset>0x8</addressOffset>
31050 <size>0x20</size>
31051 <access>read-write</access>
31052 <resetValue>0x0000</resetValue>
31053 <fields>
31054 <field>
31055 <name>SMS</name>
31056 <description>Slave mode selection</description>
31057 <bitOffset>0</bitOffset>
31058 <bitWidth>3</bitWidth>
31059 </field>
31060 <field>
31061 <name>OCCS</name>
31062 <description>OCREF clear selection</description>
31063 <bitOffset>3</bitOffset>
31064 <bitWidth>1</bitWidth>
31065 </field>
31066 <field>
31067 <name>TS</name>
31068 <description>Trigger selection</description>
31069 <bitOffset>4</bitOffset>
31070 <bitWidth>3</bitWidth>
31071 </field>
31072 <field>
31073 <name>MSM</name>
31074 <description>Master/Slave mode</description>
31075 <bitOffset>7</bitOffset>
31076 <bitWidth>1</bitWidth>
31077 </field>
31078 <field>
31079 <name>ETF</name>
31080 <description>External trigger filter</description>
31081 <bitOffset>8</bitOffset>
31082 <bitWidth>4</bitWidth>
31083 </field>
31084 <field>
31085 <name>ETPS</name>
31086 <description>External trigger prescaler</description>
31087 <bitOffset>12</bitOffset>
31088 <bitWidth>2</bitWidth>
31089 </field>
31090 <field>
31091 <name>ECE</name>
31092 <description>External clock enable</description>
31093 <bitOffset>14</bitOffset>
31094 <bitWidth>1</bitWidth>
31095 </field>
31096 <field>
31097 <name>ETP</name>
31098 <description>External trigger polarity</description>
31099 <bitOffset>15</bitOffset>
31100 <bitWidth>1</bitWidth>
31101 </field>
31102 <field>
31103 <name>SMS3</name>
31104 <description>Slave mode selection bit 3</description>
31105 <bitOffset>16</bitOffset>
31106 <bitWidth>1</bitWidth>
31107 </field>
31108 </fields>
31109 </register>
31110 <register>
31111 <name>DIER</name>
31112 <displayName>DIER</displayName>
31113 <description>DMA/Interrupt enable register</description>
31114 <addressOffset>0xC</addressOffset>
31115 <size>0x20</size>
31116 <access>read-write</access>
31117 <resetValue>0x0000</resetValue>
31118 <fields>
31119 <field>
31120 <name>TDE</name>
31121 <description>Trigger DMA request enable</description>
31122 <bitOffset>14</bitOffset>
31123 <bitWidth>1</bitWidth>
31124 </field>
31125 <field>
31126 <name>COMDE</name>
31127 <description>COM DMA request enable</description>
31128 <bitOffset>13</bitOffset>
31129 <bitWidth>1</bitWidth>
31130 </field>
31131 <field>
31132 <name>CC4DE</name>
31133 <description>Capture/Compare 4 DMA request
31134 enable</description>
31135 <bitOffset>12</bitOffset>
31136 <bitWidth>1</bitWidth>
31137 </field>
31138 <field>
31139 <name>CC3DE</name>
31140 <description>Capture/Compare 3 DMA request
31141 enable</description>
31142 <bitOffset>11</bitOffset>
31143 <bitWidth>1</bitWidth>
31144 </field>
31145 <field>
31146 <name>CC2DE</name>
31147 <description>Capture/Compare 2 DMA request
31148 enable</description>
31149 <bitOffset>10</bitOffset>
31150 <bitWidth>1</bitWidth>
31151 </field>
31152 <field>
31153 <name>CC1DE</name>
31154 <description>Capture/Compare 1 DMA request
31155 enable</description>
31156 <bitOffset>9</bitOffset>
31157 <bitWidth>1</bitWidth>
31158 </field>
31159 <field>
31160 <name>UDE</name>
31161 <description>Update DMA request enable</description>
31162 <bitOffset>8</bitOffset>
31163 <bitWidth>1</bitWidth>
31164 </field>
31165 <field>
31166 <name>BIE</name>
31167 <description>Break interrupt enable</description>
31168 <bitOffset>7</bitOffset>
31169 <bitWidth>1</bitWidth>
31170 </field>
31171 <field>
31172 <name>TIE</name>
31173 <description>Trigger interrupt enable</description>
31174 <bitOffset>6</bitOffset>
31175 <bitWidth>1</bitWidth>
31176 </field>
31177 <field>
31178 <name>COMIE</name>
31179 <description>COM interrupt enable</description>
31180 <bitOffset>5</bitOffset>
31181 <bitWidth>1</bitWidth>
31182 </field>
31183 <field>
31184 <name>CC4IE</name>
31185 <description>Capture/Compare 4 interrupt
31186 enable</description>
31187 <bitOffset>4</bitOffset>
31188 <bitWidth>1</bitWidth>
31189 </field>
31190 <field>
31191 <name>CC3IE</name>
31192 <description>Capture/Compare 3 interrupt
31193 enable</description>
31194 <bitOffset>3</bitOffset>
31195 <bitWidth>1</bitWidth>
31196 </field>
31197 <field>
31198 <name>CC2IE</name>
31199 <description>Capture/Compare 2 interrupt
31200 enable</description>
31201 <bitOffset>2</bitOffset>
31202 <bitWidth>1</bitWidth>
31203 </field>
31204 <field>
31205 <name>CC1IE</name>
31206 <description>Capture/Compare 1 interrupt
31207 enable</description>
31208 <bitOffset>1</bitOffset>
31209 <bitWidth>1</bitWidth>
31210 </field>
31211 <field>
31212 <name>UIE</name>
31213 <description>Update interrupt enable</description>
31214 <bitOffset>0</bitOffset>
31215 <bitWidth>1</bitWidth>
31216 </field>
31217 </fields>
31218 </register>
31219 <register>
31220 <name>SR</name>
31221 <displayName>SR</displayName>
31222 <description>status register</description>
31223 <addressOffset>0x10</addressOffset>
31224 <size>0x20</size>
31225 <access>read-write</access>
31226 <resetValue>0x0000</resetValue>
31227 <fields>
31228 <field>
31229 <name>UIF</name>
31230 <description>Update interrupt flag</description>
31231 <bitOffset>0</bitOffset>
31232 <bitWidth>1</bitWidth>
31233 </field>
31234 <field>
31235 <name>CC1IF</name>
31236 <description>Capture/compare 1 interrupt
31237 flag</description>
31238 <bitOffset>1</bitOffset>
31239 <bitWidth>1</bitWidth>
31240 </field>
31241 <field>
31242 <name>CC2IF</name>
31243 <description>Capture/Compare 2 interrupt
31244 flag</description>
31245 <bitOffset>2</bitOffset>
31246 <bitWidth>1</bitWidth>
31247 </field>
31248 <field>
31249 <name>CC3IF</name>
31250 <description>Capture/Compare 3 interrupt
31251 flag</description>
31252 <bitOffset>3</bitOffset>
31253 <bitWidth>1</bitWidth>
31254 </field>
31255 <field>
31256 <name>CC4IF</name>
31257 <description>Capture/Compare 4 interrupt
31258 flag</description>
31259 <bitOffset>4</bitOffset>
31260 <bitWidth>1</bitWidth>
31261 </field>
31262 <field>
31263 <name>COMIF</name>
31264 <description>COM interrupt flag</description>
31265 <bitOffset>5</bitOffset>
31266 <bitWidth>1</bitWidth>
31267 </field>
31268 <field>
31269 <name>TIF</name>
31270 <description>Trigger interrupt flag</description>
31271 <bitOffset>6</bitOffset>
31272 <bitWidth>1</bitWidth>
31273 </field>
31274 <field>
31275 <name>BIF</name>
31276 <description>Break interrupt flag</description>
31277 <bitOffset>7</bitOffset>
31278 <bitWidth>1</bitWidth>
31279 </field>
31280 <field>
31281 <name>B2IF</name>
31282 <description>Break 2 interrupt flag</description>
31283 <bitOffset>8</bitOffset>
31284 <bitWidth>1</bitWidth>
31285 </field>
31286 <field>
31287 <name>CC1OF</name>
31288 <description>Capture/Compare 1 overcapture
31289 flag</description>
31290 <bitOffset>9</bitOffset>
31291 <bitWidth>1</bitWidth>
31292 </field>
31293 <field>
31294 <name>CC2OF</name>
31295 <description>Capture/compare 2 overcapture
31296 flag</description>
31297 <bitOffset>10</bitOffset>
31298 <bitWidth>1</bitWidth>
31299 </field>
31300 <field>
31301 <name>CC3OF</name>
31302 <description>Capture/Compare 3 overcapture
31303 flag</description>
31304 <bitOffset>11</bitOffset>
31305 <bitWidth>1</bitWidth>
31306 </field>
31307 <field>
31308 <name>CC4OF</name>
31309 <description>Capture/Compare 4 overcapture
31310 flag</description>
31311 <bitOffset>12</bitOffset>
31312 <bitWidth>1</bitWidth>
31313 </field>
31314 <field>
31315 <name>C5IF</name>
31316 <description>Capture/Compare 5 interrupt
31317 flag</description>
31318 <bitOffset>16</bitOffset>
31319 <bitWidth>1</bitWidth>
31320 </field>
31321 <field>
31322 <name>C6IF</name>
31323 <description>Capture/Compare 6 interrupt
31324 flag</description>
31325 <bitOffset>17</bitOffset>
31326 <bitWidth>1</bitWidth>
31327 </field>
31328 </fields>
31329 </register>
31330 <register>
31331 <name>EGR</name>
31332 <displayName>EGR</displayName>
31333 <description>event generation register</description>
31334 <addressOffset>0x14</addressOffset>
31335 <size>0x20</size>
31336 <access>write-only</access>
31337 <resetValue>0x0000</resetValue>
31338 <fields>
31339 <field>
31340 <name>UG</name>
31341 <description>Update generation</description>
31342 <bitOffset>0</bitOffset>
31343 <bitWidth>1</bitWidth>
31344 </field>
31345 <field>
31346 <name>CC1G</name>
31347 <description>Capture/compare 1
31348 generation</description>
31349 <bitOffset>1</bitOffset>
31350 <bitWidth>1</bitWidth>
31351 </field>
31352 <field>
31353 <name>CC2G</name>
31354 <description>Capture/compare 2
31355 generation</description>
31356 <bitOffset>2</bitOffset>
31357 <bitWidth>1</bitWidth>
31358 </field>
31359 <field>
31360 <name>CC3G</name>
31361 <description>Capture/compare 3
31362 generation</description>
31363 <bitOffset>3</bitOffset>
31364 <bitWidth>1</bitWidth>
31365 </field>
31366 <field>
31367 <name>CC4G</name>
31368 <description>Capture/compare 4
31369 generation</description>
31370 <bitOffset>4</bitOffset>
31371 <bitWidth>1</bitWidth>
31372 </field>
31373 <field>
31374 <name>COMG</name>
31375 <description>Capture/Compare control update
31376 generation</description>
31377 <bitOffset>5</bitOffset>
31378 <bitWidth>1</bitWidth>
31379 </field>
31380 <field>
31381 <name>TG</name>
31382 <description>Trigger generation</description>
31383 <bitOffset>6</bitOffset>
31384 <bitWidth>1</bitWidth>
31385 </field>
31386 <field>
31387 <name>BG</name>
31388 <description>Break generation</description>
31389 <bitOffset>7</bitOffset>
31390 <bitWidth>1</bitWidth>
31391 </field>
31392 <field>
31393 <name>B2G</name>
31394 <description>Break 2 generation</description>
31395 <bitOffset>8</bitOffset>
31396 <bitWidth>1</bitWidth>
31397 </field>
31398 </fields>
31399 </register>
31400 <register>
31401 <name>CCMR1_Output</name>
31402 <displayName>CCMR1_Output</displayName>
31403 <description>capture/compare mode register (output
31404 mode)</description>
31405 <addressOffset>0x18</addressOffset>
31406 <size>0x20</size>
31407 <access>read-write</access>
31408 <resetValue>0x00000000</resetValue>
31409 <fields>
31410 <field>
31411 <name>OC2CE</name>
31412 <description>Output Compare 2 clear
31413 enable</description>
31414 <bitOffset>15</bitOffset>
31415 <bitWidth>1</bitWidth>
31416 </field>
31417 <field>
31418 <name>OC2M</name>
31419 <description>Output Compare 2 mode</description>
31420 <bitOffset>12</bitOffset>
31421 <bitWidth>3</bitWidth>
31422 </field>
31423 <field>
31424 <name>OC2PE</name>
31425 <description>Output Compare 2 preload
31426 enable</description>
31427 <bitOffset>11</bitOffset>
31428 <bitWidth>1</bitWidth>
31429 </field>
31430 <field>
31431 <name>OC2FE</name>
31432 <description>Output Compare 2 fast
31433 enable</description>
31434 <bitOffset>10</bitOffset>
31435 <bitWidth>1</bitWidth>
31436 </field>
31437 <field>
31438 <name>CC2S</name>
31439 <description>Capture/Compare 2
31440 selection</description>
31441 <bitOffset>8</bitOffset>
31442 <bitWidth>2</bitWidth>
31443 </field>
31444 <field>
31445 <name>OC1CE</name>
31446 <description>Output Compare 1 clear
31447 enable</description>
31448 <bitOffset>7</bitOffset>
31449 <bitWidth>1</bitWidth>
31450 </field>
31451 <field>
31452 <name>OC1M</name>
31453 <description>Output Compare 1 mode</description>
31454 <bitOffset>4</bitOffset>
31455 <bitWidth>3</bitWidth>
31456 </field>
31457 <field>
31458 <name>OC1PE</name>
31459 <description>Output Compare 1 preload
31460 enable</description>
31461 <bitOffset>3</bitOffset>
31462 <bitWidth>1</bitWidth>
31463 </field>
31464 <field>
31465 <name>OC1FE</name>
31466 <description>Output Compare 1 fast
31467 enable</description>
31468 <bitOffset>2</bitOffset>
31469 <bitWidth>1</bitWidth>
31470 </field>
31471 <field>
31472 <name>CC1S</name>
31473 <description>Capture/Compare 1
31474 selection</description>
31475 <bitOffset>0</bitOffset>
31476 <bitWidth>2</bitWidth>
31477 </field>
31478 <field>
31479 <name>OC1M_3</name>
31480 <description>Output Compare 1 mode bit
31481 3</description>
31482 <bitOffset>16</bitOffset>
31483 <bitWidth>1</bitWidth>
31484 </field>
31485 <field>
31486 <name>OC2M_3</name>
31487 <description>Output Compare 2 mode bit
31488 3</description>
31489 <bitOffset>24</bitOffset>
31490 <bitWidth>1</bitWidth>
31491 </field>
31492 </fields>
31493 </register>
31494 <register>
31495 <name>CCMR1_Input</name>
31496 <displayName>CCMR1_Input</displayName>
31497 <description>capture/compare mode register 1 (input
31498 mode)</description>
31499 <alternateRegister>CCMR1_Output</alternateRegister>
31500 <addressOffset>0x18</addressOffset>
31501 <size>0x20</size>
31502 <access>read-write</access>
31503 <resetValue>0x00000000</resetValue>
31504 <fields>
31505 <field>
31506 <name>IC2F</name>
31507 <description>Input capture 2 filter</description>
31508 <bitOffset>12</bitOffset>
31509 <bitWidth>4</bitWidth>
31510 </field>
31511 <field>
31512 <name>IC2PCS</name>
31513 <description>Input capture 2 prescaler</description>
31514 <bitOffset>10</bitOffset>
31515 <bitWidth>2</bitWidth>
31516 </field>
31517 <field>
31518 <name>CC2S</name>
31519 <description>Capture/Compare 2
31520 selection</description>
31521 <bitOffset>8</bitOffset>
31522 <bitWidth>2</bitWidth>
31523 </field>
31524 <field>
31525 <name>IC1F</name>
31526 <description>Input capture 1 filter</description>
31527 <bitOffset>4</bitOffset>
31528 <bitWidth>4</bitWidth>
31529 </field>
31530 <field>
31531 <name>IC1PCS</name>
31532 <description>Input capture 1 prescaler</description>
31533 <bitOffset>2</bitOffset>
31534 <bitWidth>2</bitWidth>
31535 </field>
31536 <field>
31537 <name>CC1S</name>
31538 <description>Capture/Compare 1
31539 selection</description>
31540 <bitOffset>0</bitOffset>
31541 <bitWidth>2</bitWidth>
31542 </field>
31543 </fields>
31544 </register>
31545 <register>
31546 <name>CCMR2_Output</name>
31547 <displayName>CCMR2_Output</displayName>
31548 <description>capture/compare mode register (output
31549 mode)</description>
31550 <addressOffset>0x1C</addressOffset>
31551 <size>0x20</size>
31552 <access>read-write</access>
31553 <resetValue>0x00000000</resetValue>
31554 <fields>
31555 <field>
31556 <name>OC4CE</name>
31557 <description>Output compare 4 clear
31558 enable</description>
31559 <bitOffset>15</bitOffset>
31560 <bitWidth>1</bitWidth>
31561 </field>
31562 <field>
31563 <name>OC4M</name>
31564 <description>Output compare 4 mode</description>
31565 <bitOffset>12</bitOffset>
31566 <bitWidth>3</bitWidth>
31567 </field>
31568 <field>
31569 <name>OC4PE</name>
31570 <description>Output compare 4 preload
31571 enable</description>
31572 <bitOffset>11</bitOffset>
31573 <bitWidth>1</bitWidth>
31574 </field>
31575 <field>
31576 <name>OC4FE</name>
31577 <description>Output compare 4 fast
31578 enable</description>
31579 <bitOffset>10</bitOffset>
31580 <bitWidth>1</bitWidth>
31581 </field>
31582 <field>
31583 <name>CC4S</name>
31584 <description>Capture/Compare 4
31585 selection</description>
31586 <bitOffset>8</bitOffset>
31587 <bitWidth>2</bitWidth>
31588 </field>
31589 <field>
31590 <name>OC3CE</name>
31591 <description>Output compare 3 clear
31592 enable</description>
31593 <bitOffset>7</bitOffset>
31594 <bitWidth>1</bitWidth>
31595 </field>
31596 <field>
31597 <name>OC3M</name>
31598 <description>Output compare 3 mode</description>
31599 <bitOffset>4</bitOffset>
31600 <bitWidth>3</bitWidth>
31601 </field>
31602 <field>
31603 <name>OC3PE</name>
31604 <description>Output compare 3 preload
31605 enable</description>
31606 <bitOffset>3</bitOffset>
31607 <bitWidth>1</bitWidth>
31608 </field>
31609 <field>
31610 <name>OC3FE</name>
31611 <description>Output compare 3 fast
31612 enable</description>
31613 <bitOffset>2</bitOffset>
31614 <bitWidth>1</bitWidth>
31615 </field>
31616 <field>
31617 <name>CC3S</name>
31618 <description>Capture/Compare 3
31619 selection</description>
31620 <bitOffset>0</bitOffset>
31621 <bitWidth>2</bitWidth>
31622 </field>
31623 <field>
31624 <name>OC3M_3</name>
31625 <description>Output Compare 3 mode bit
31626 3</description>
31627 <bitOffset>16</bitOffset>
31628 <bitWidth>1</bitWidth>
31629 </field>
31630 <field>
31631 <name>OC4M_3</name>
31632 <description>Output Compare 4 mode bit
31633 3</description>
31634 <bitOffset>24</bitOffset>
31635 <bitWidth>1</bitWidth>
31636 </field>
31637 </fields>
31638 </register>
31639 <register>
31640 <name>CCMR2_Input</name>
31641 <displayName>CCMR2_Input</displayName>
31642 <description>capture/compare mode register 2 (input
31643 mode)</description>
31644 <alternateRegister>CCMR2_Output</alternateRegister>
31645 <addressOffset>0x1C</addressOffset>
31646 <size>0x20</size>
31647 <access>read-write</access>
31648 <resetValue>0x00000000</resetValue>
31649 <fields>
31650 <field>
31651 <name>IC4F</name>
31652 <description>Input capture 4 filter</description>
31653 <bitOffset>12</bitOffset>
31654 <bitWidth>4</bitWidth>
31655 </field>
31656 <field>
31657 <name>IC4PSC</name>
31658 <description>Input capture 4 prescaler</description>
31659 <bitOffset>10</bitOffset>
31660 <bitWidth>2</bitWidth>
31661 </field>
31662 <field>
31663 <name>CC4S</name>
31664 <description>Capture/Compare 4
31665 selection</description>
31666 <bitOffset>8</bitOffset>
31667 <bitWidth>2</bitWidth>
31668 </field>
31669 <field>
31670 <name>IC3F</name>
31671 <description>Input capture 3 filter</description>
31672 <bitOffset>4</bitOffset>
31673 <bitWidth>4</bitWidth>
31674 </field>
31675 <field>
31676 <name>IC3PSC</name>
31677 <description>Input capture 3 prescaler</description>
31678 <bitOffset>2</bitOffset>
31679 <bitWidth>2</bitWidth>
31680 </field>
31681 <field>
31682 <name>CC3S</name>
31683 <description>Capture/compare 3
31684 selection</description>
31685 <bitOffset>0</bitOffset>
31686 <bitWidth>2</bitWidth>
31687 </field>
31688 </fields>
31689 </register>
31690 <register>
31691 <name>CCER</name>
31692 <displayName>CCER</displayName>
31693 <description>capture/compare enable
31694 register</description>
31695 <addressOffset>0x20</addressOffset>
31696 <size>0x20</size>
31697 <access>read-write</access>
31698 <resetValue>0x0000</resetValue>
31699 <fields>
31700 <field>
31701 <name>CC1E</name>
31702 <description>Capture/Compare 1 output
31703 enable</description>
31704 <bitOffset>0</bitOffset>
31705 <bitWidth>1</bitWidth>
31706 </field>
31707 <field>
31708 <name>CC1P</name>
31709 <description>Capture/Compare 1 output
31710 Polarity</description>
31711 <bitOffset>1</bitOffset>
31712 <bitWidth>1</bitWidth>
31713 </field>
31714 <field>
31715 <name>CC1NE</name>
31716 <description>Capture/Compare 1 complementary output
31717 enable</description>
31718 <bitOffset>2</bitOffset>
31719 <bitWidth>1</bitWidth>
31720 </field>
31721 <field>
31722 <name>CC1NP</name>
31723 <description>Capture/Compare 1 output
31724 Polarity</description>
31725 <bitOffset>3</bitOffset>
31726 <bitWidth>1</bitWidth>
31727 </field>
31728 <field>
31729 <name>CC2E</name>
31730 <description>Capture/Compare 2 output
31731 enable</description>
31732 <bitOffset>4</bitOffset>
31733 <bitWidth>1</bitWidth>
31734 </field>
31735 <field>
31736 <name>CC2P</name>
31737 <description>Capture/Compare 2 output
31738 Polarity</description>
31739 <bitOffset>5</bitOffset>
31740 <bitWidth>1</bitWidth>
31741 </field>
31742 <field>
31743 <name>CC2NE</name>
31744 <description>Capture/Compare 2 complementary output
31745 enable</description>
31746 <bitOffset>6</bitOffset>
31747 <bitWidth>1</bitWidth>
31748 </field>
31749 <field>
31750 <name>CC2NP</name>
31751 <description>Capture/Compare 2 output
31752 Polarity</description>
31753 <bitOffset>7</bitOffset>
31754 <bitWidth>1</bitWidth>
31755 </field>
31756 <field>
31757 <name>CC3E</name>
31758 <description>Capture/Compare 3 output
31759 enable</description>
31760 <bitOffset>8</bitOffset>
31761 <bitWidth>1</bitWidth>
31762 </field>
31763 <field>
31764 <name>CC3P</name>
31765 <description>Capture/Compare 3 output
31766 Polarity</description>
31767 <bitOffset>9</bitOffset>
31768 <bitWidth>1</bitWidth>
31769 </field>
31770 <field>
31771 <name>CC3NE</name>
31772 <description>Capture/Compare 3 complementary output
31773 enable</description>
31774 <bitOffset>10</bitOffset>
31775 <bitWidth>1</bitWidth>
31776 </field>
31777 <field>
31778 <name>CC3NP</name>
31779 <description>Capture/Compare 3 output
31780 Polarity</description>
31781 <bitOffset>11</bitOffset>
31782 <bitWidth>1</bitWidth>
31783 </field>
31784 <field>
31785 <name>CC4E</name>
31786 <description>Capture/Compare 4 output
31787 enable</description>
31788 <bitOffset>12</bitOffset>
31789 <bitWidth>1</bitWidth>
31790 </field>
31791 <field>
31792 <name>CC4P</name>
31793 <description>Capture/Compare 3 output
31794 Polarity</description>
31795 <bitOffset>13</bitOffset>
31796 <bitWidth>1</bitWidth>
31797 </field>
31798 <field>
31799 <name>CC4NP</name>
31800 <description>Capture/Compare 4 output
31801 Polarity</description>
31802 <bitOffset>15</bitOffset>
31803 <bitWidth>1</bitWidth>
31804 </field>
31805 <field>
31806 <name>CC5E</name>
31807 <description>Capture/Compare 5 output
31808 enable</description>
31809 <bitOffset>16</bitOffset>
31810 <bitWidth>1</bitWidth>
31811 </field>
31812 <field>
31813 <name>CC5P</name>
31814 <description>Capture/Compare 5 output
31815 Polarity</description>
31816 <bitOffset>17</bitOffset>
31817 <bitWidth>1</bitWidth>
31818 </field>
31819 <field>
31820 <name>CC6E</name>
31821 <description>Capture/Compare 6 output
31822 enable</description>
31823 <bitOffset>20</bitOffset>
31824 <bitWidth>1</bitWidth>
31825 </field>
31826 <field>
31827 <name>CC6P</name>
31828 <description>Capture/Compare 6 output
31829 Polarity</description>
31830 <bitOffset>21</bitOffset>
31831 <bitWidth>1</bitWidth>
31832 </field>
31833 </fields>
31834 </register>
31835 <register>
31836 <name>CNT</name>
31837 <displayName>CNT</displayName>
31838 <description>counter</description>
31839 <addressOffset>0x24</addressOffset>
31840 <size>0x20</size>
31841 <resetValue>0x00000000</resetValue>
31842 <fields>
31843 <field>
31844 <name>CNT</name>
31845 <description>counter value</description>
31846 <bitOffset>0</bitOffset>
31847 <bitWidth>16</bitWidth>
31848 <access>read-write</access>
31849 </field>
31850 <field>
31851 <name>UIFCPY</name>
31852 <description>UIF copy</description>
31853 <bitOffset>31</bitOffset>
31854 <bitWidth>1</bitWidth>
31855 <access>read-only</access>
31856 </field>
31857 </fields>
31858 </register>
31859 <register>
31860 <name>PSC</name>
31861 <displayName>PSC</displayName>
31862 <description>prescaler</description>
31863 <addressOffset>0x28</addressOffset>
31864 <size>0x20</size>
31865 <access>read-write</access>
31866 <resetValue>0x0000</resetValue>
31867 <fields>
31868 <field>
31869 <name>PSC</name>
31870 <description>Prescaler value</description>
31871 <bitOffset>0</bitOffset>
31872 <bitWidth>16</bitWidth>
31873 </field>
31874 </fields>
31875 </register>
31876 <register>
31877 <name>ARR</name>
31878 <displayName>ARR</displayName>
31879 <description>auto-reload register</description>
31880 <addressOffset>0x2C</addressOffset>
31881 <size>0x20</size>
31882 <access>read-write</access>
31883 <resetValue>0x00000000</resetValue>
31884 <fields>
31885 <field>
31886 <name>ARR</name>
31887 <description>Auto-reload value</description>
31888 <bitOffset>0</bitOffset>
31889 <bitWidth>16</bitWidth>
31890 </field>
31891 </fields>
31892 </register>
31893 <register>
31894 <name>RCR</name>
31895 <displayName>RCR</displayName>
31896 <description>repetition counter register</description>
31897 <addressOffset>0x30</addressOffset>
31898 <size>0x20</size>
31899 <access>read-write</access>
31900 <resetValue>0x0000</resetValue>
31901 <fields>
31902 <field>
31903 <name>REP</name>
31904 <description>Repetition counter value</description>
31905 <bitOffset>0</bitOffset>
31906 <bitWidth>16</bitWidth>
31907 </field>
31908 </fields>
31909 </register>
31910 <register>
31911 <name>CCR1</name>
31912 <displayName>CCR1</displayName>
31913 <description>capture/compare register 1</description>
31914 <addressOffset>0x34</addressOffset>
31915 <size>0x20</size>
31916 <access>read-write</access>
31917 <resetValue>0x00000000</resetValue>
31918 <fields>
31919 <field>
31920 <name>CCR1</name>
31921 <description>Capture/Compare 1 value</description>
31922 <bitOffset>0</bitOffset>
31923 <bitWidth>16</bitWidth>
31924 </field>
31925 </fields>
31926 </register>
31927 <register>
31928 <name>CCR2</name>
31929 <displayName>CCR2</displayName>
31930 <description>capture/compare register 2</description>
31931 <addressOffset>0x38</addressOffset>
31932 <size>0x20</size>
31933 <access>read-write</access>
31934 <resetValue>0x00000000</resetValue>
31935 <fields>
31936 <field>
31937 <name>CCR2</name>
31938 <description>Capture/Compare 2 value</description>
31939 <bitOffset>0</bitOffset>
31940 <bitWidth>16</bitWidth>
31941 </field>
31942 </fields>
31943 </register>
31944 <register>
31945 <name>CCR3</name>
31946 <displayName>CCR3</displayName>
31947 <description>capture/compare register 3</description>
31948 <addressOffset>0x3C</addressOffset>
31949 <size>0x20</size>
31950 <access>read-write</access>
31951 <resetValue>0x00000000</resetValue>
31952 <fields>
31953 <field>
31954 <name>CCR3</name>
31955 <description>Capture/Compare 3 value</description>
31956 <bitOffset>0</bitOffset>
31957 <bitWidth>16</bitWidth>
31958 </field>
31959 </fields>
31960 </register>
31961 <register>
31962 <name>CCR4</name>
31963 <displayName>CCR4</displayName>
31964 <description>capture/compare register 4</description>
31965 <addressOffset>0x40</addressOffset>
31966 <size>0x20</size>
31967 <access>read-write</access>
31968 <resetValue>0x00000000</resetValue>
31969 <fields>
31970 <field>
31971 <name>CCR4</name>
31972 <description>Capture/Compare 3 value</description>
31973 <bitOffset>0</bitOffset>
31974 <bitWidth>16</bitWidth>
31975 </field>
31976 </fields>
31977 </register>
31978 <register>
31979 <name>BDTR</name>
31980 <displayName>BDTR</displayName>
31981 <description>break and dead-time register</description>
31982 <addressOffset>0x44</addressOffset>
31983 <size>0x20</size>
31984 <access>read-write</access>
31985 <resetValue>0x00000000</resetValue>
31986 <fields>
31987 <field>
31988 <name>DTG</name>
31989 <description>Dead-time generator setup</description>
31990 <bitOffset>0</bitOffset>
31991 <bitWidth>8</bitWidth>
31992 </field>
31993 <field>
31994 <name>LOCK</name>
31995 <description>Lock configuration</description>
31996 <bitOffset>8</bitOffset>
31997 <bitWidth>2</bitWidth>
31998 </field>
31999 <field>
32000 <name>OSSI</name>
32001 <description>Off-state selection for Idle
32002 mode</description>
32003 <bitOffset>10</bitOffset>
32004 <bitWidth>1</bitWidth>
32005 </field>
32006 <field>
32007 <name>OSSR</name>
32008 <description>Off-state selection for Run
32009 mode</description>
32010 <bitOffset>11</bitOffset>
32011 <bitWidth>1</bitWidth>
32012 </field>
32013 <field>
32014 <name>BKE</name>
32015 <description>Break enable</description>
32016 <bitOffset>12</bitOffset>
32017 <bitWidth>1</bitWidth>
32018 </field>
32019 <field>
32020 <name>BKP</name>
32021 <description>Break polarity</description>
32022 <bitOffset>13</bitOffset>
32023 <bitWidth>1</bitWidth>
32024 </field>
32025 <field>
32026 <name>AOE</name>
32027 <description>Automatic output enable</description>
32028 <bitOffset>14</bitOffset>
32029 <bitWidth>1</bitWidth>
32030 </field>
32031 <field>
32032 <name>MOE</name>
32033 <description>Main output enable</description>
32034 <bitOffset>15</bitOffset>
32035 <bitWidth>1</bitWidth>
32036 </field>
32037 <field>
32038 <name>BKF</name>
32039 <description>Break filter</description>
32040 <bitOffset>16</bitOffset>
32041 <bitWidth>4</bitWidth>
32042 </field>
32043 <field>
32044 <name>BK2F</name>
32045 <description>Break 2 filter</description>
32046 <bitOffset>20</bitOffset>
32047 <bitWidth>4</bitWidth>
32048 </field>
32049 <field>
32050 <name>BK2E</name>
32051 <description>Break 2 enable</description>
32052 <bitOffset>24</bitOffset>
32053 <bitWidth>1</bitWidth>
32054 </field>
32055 <field>
32056 <name>BK2P</name>
32057 <description>Break 2 polarity</description>
32058 <bitOffset>25</bitOffset>
32059 <bitWidth>1</bitWidth>
32060 </field>
32061 </fields>
32062 </register>
32063 <register>
32064 <name>DCR</name>
32065 <displayName>DCR</displayName>
32066 <description>DMA control register</description>
32067 <addressOffset>0x48</addressOffset>
32068 <size>0x20</size>
32069 <access>read-write</access>
32070 <resetValue>0x00000000</resetValue>
32071 <fields>
32072 <field>
32073 <name>DBL</name>
32074 <description>DMA burst length</description>
32075 <bitOffset>8</bitOffset>
32076 <bitWidth>5</bitWidth>
32077 </field>
32078 <field>
32079 <name>DBA</name>
32080 <description>DMA base address</description>
32081 <bitOffset>0</bitOffset>
32082 <bitWidth>5</bitWidth>
32083 </field>
32084 </fields>
32085 </register>
32086 <register>
32087 <name>DMAR</name>
32088 <displayName>DMAR</displayName>
32089 <description>DMA address for full transfer</description>
32090 <addressOffset>0x4C</addressOffset>
32091 <size>0x20</size>
32092 <access>read-write</access>
32093 <resetValue>0x00000000</resetValue>
32094 <fields>
32095 <field>
32096 <name>DMAB</name>
32097 <description>DMA register for burst
32098 accesses</description>
32099 <bitOffset>0</bitOffset>
32100 <bitWidth>16</bitWidth>
32101 </field>
32102 </fields>
32103 </register>
32104 <register>
32105 <name>CCMR3_Output</name>
32106 <displayName>CCMR3_Output</displayName>
32107 <description>capture/compare mode register 3 (output
32108 mode)</description>
32109 <addressOffset>0x54</addressOffset>
32110 <size>0x20</size>
32111 <access>read-write</access>
32112 <resetValue>0x00000000</resetValue>
32113 <fields>
32114 <field>
32115 <name>OC5FE</name>
32116 <description>Output compare 5 fast
32117 enable</description>
32118 <bitOffset>2</bitOffset>
32119 <bitWidth>1</bitWidth>
32120 </field>
32121 <field>
32122 <name>OC5PE</name>
32123 <description>Output compare 5 preload
32124 enable</description>
32125 <bitOffset>3</bitOffset>
32126 <bitWidth>1</bitWidth>
32127 </field>
32128 <field>
32129 <name>OC5M</name>
32130 <description>Output compare 5 mode</description>
32131 <bitOffset>4</bitOffset>
32132 <bitWidth>3</bitWidth>
32133 </field>
32134 <field>
32135 <name>OC5CE</name>
32136 <description>Output compare 5 clear
32137 enable</description>
32138 <bitOffset>7</bitOffset>
32139 <bitWidth>1</bitWidth>
32140 </field>
32141 <field>
32142 <name>OC6FE</name>
32143 <description>Output compare 6 fast
32144 enable</description>
32145 <bitOffset>10</bitOffset>
32146 <bitWidth>1</bitWidth>
32147 </field>
32148 <field>
32149 <name>OC6PE</name>
32150 <description>Output compare 6 preload
32151 enable</description>
32152 <bitOffset>11</bitOffset>
32153 <bitWidth>1</bitWidth>
32154 </field>
32155 <field>
32156 <name>OC6M</name>
32157 <description>Output compare 6 mode</description>
32158 <bitOffset>12</bitOffset>
32159 <bitWidth>3</bitWidth>
32160 </field>
32161 <field>
32162 <name>OC6CE</name>
32163 <description>Output compare 6 clear
32164 enable</description>
32165 <bitOffset>15</bitOffset>
32166 <bitWidth>1</bitWidth>
32167 </field>
32168 <field>
32169 <name>OC5M_3</name>
32170 <description>Outout Compare 5 mode bit
32171 3</description>
32172 <bitOffset>16</bitOffset>
32173 <bitWidth>1</bitWidth>
32174 </field>
32175 <field>
32176 <name>OC6M_3</name>
32177 <description>Outout Compare 6 mode bit
32178 3</description>
32179 <bitOffset>24</bitOffset>
32180 <bitWidth>1</bitWidth>
32181 </field>
32182 </fields>
32183 </register>
32184 <register>
32185 <name>CCR5</name>
32186 <displayName>CCR5</displayName>
32187 <description>capture/compare register 5</description>
32188 <addressOffset>0x58</addressOffset>
32189 <size>0x20</size>
32190 <access>read-write</access>
32191 <resetValue>0x00000000</resetValue>
32192 <fields>
32193 <field>
32194 <name>CCR5</name>
32195 <description>Capture/Compare 5 value</description>
32196 <bitOffset>0</bitOffset>
32197 <bitWidth>16</bitWidth>
32198 </field>
32199 <field>
32200 <name>GC5C1</name>
32201 <description>Group Channel 5 and Channel
32202 1</description>
32203 <bitOffset>29</bitOffset>
32204 <bitWidth>1</bitWidth>
32205 </field>
32206 <field>
32207 <name>GC5C2</name>
32208 <description>Group Channel 5 and Channel
32209 2</description>
32210 <bitOffset>30</bitOffset>
32211 <bitWidth>1</bitWidth>
32212 </field>
32213 <field>
32214 <name>GC5C3</name>
32215 <description>Group Channel 5 and Channel
32216 3</description>
32217 <bitOffset>31</bitOffset>
32218 <bitWidth>1</bitWidth>
32219 </field>
32220 </fields>
32221 </register>
32222 <register>
32223 <name>CCR6</name>
32224 <displayName>CCR6</displayName>
32225 <description>capture/compare register 6</description>
32226 <addressOffset>0x5C</addressOffset>
32227 <size>0x20</size>
32228 <access>read-write</access>
32229 <resetValue>0x00000000</resetValue>
32230 <fields>
32231 <field>
32232 <name>CCR6</name>
32233 <description>Capture/Compare 6 value</description>
32234 <bitOffset>0</bitOffset>
32235 <bitWidth>16</bitWidth>
32236 </field>
32237 </fields>
32238 </register>
32239 <register>
32240 <name>OR</name>
32241 <displayName>OR</displayName>
32242 <description>option registers</description>
32243 <addressOffset>0x60</addressOffset>
32244 <size>0x20</size>
32245 <access>read-write</access>
32246 <resetValue>0x00000000</resetValue>
32247 <fields>
32248 <field>
32249 <name>TIM1_ETR_ADC1_RMP</name>
32250 <description>TIM1_ETR_ADC1 remapping
32251 capability</description>
32252 <bitOffset>0</bitOffset>
32253 <bitWidth>2</bitWidth>
32254 </field>
32255 <field>
32256 <name>TIM1_ETR_ADC4_RMP</name>
32257 <description>TIM1_ETR_ADC4 remapping
32258 capability</description>
32259 <bitOffset>2</bitOffset>
32260 <bitWidth>2</bitWidth>
32261 </field>
32262 </fields>
32263 </register>
32264 </registers>
32265 </peripheral>
32266 <peripheral derivedFrom="TIM1">
32267 <name>TIM20</name>
32268 <baseAddress>0x40015000</baseAddress>
32269 <interrupt>
32270 <name>TIM1_CC</name>
32271 <description>TIM1 capture compare interrupt</description>
32272 <value>27</value>
32273 </interrupt>
32274 <interrupt>
32275 <name>TIM20_BRK</name>
32276 <description>TIM20 Break interrupt</description>
32277 <value>77</value>
32278 </interrupt>
32279 <interrupt>
32280 <name>TIM20_UP</name>
32281 <description>TIM20 Upgrade interrupt</description>
32282 <value>78</value>
32283 </interrupt>
32284 <interrupt>
32285 <name>TIM20_TRG_COM</name>
32286 <description>TIM20 Trigger and Commutation
32287 interrupt</description>
32288 <value>79</value>
32289 </interrupt>
32290 <interrupt>
32291 <name>TIM20_CC</name>
32292 <description>TIM20 Capture Compare interrupt</description>
32293 <value>80</value>
32294 </interrupt>
32295 </peripheral>
32296 <peripheral>
32297 <name>TIM8</name>
32298 <description>Advanced-timers</description>
32299 <groupName>TIMs</groupName>
32300 <baseAddress>0x40013400</baseAddress>
32301 <addressBlock>
32302 <offset>0x0</offset>
32303 <size>0x400</size>
32304 <usage>registers</usage>
32305 </addressBlock>
32306 <interrupt>
32307 <name>TIM8_BRK</name>
32308 <description>TIM8 break interrupt</description>
32309 <value>43</value>
32310 </interrupt>
32311 <interrupt>
32312 <name>TIM8_UP</name>
32313 <description>TIM8 update interrupt</description>
32314 <value>44</value>
32315 </interrupt>
32316 <interrupt>
32317 <name>TIM8_TRG_COM</name>
32318 <description>TIM8 Trigger and commutation
32319 interrupts</description>
32320 <value>45</value>
32321 </interrupt>
32322 <interrupt>
32323 <name>TIM8_CC</name>
32324 <description>TIM8 capture compare interrupt</description>
32325 <value>46</value>
32326 </interrupt>
32327 <registers>
32328 <register>
32329 <name>CR1</name>
32330 <displayName>CR1</displayName>
32331 <description>control register 1</description>
32332 <addressOffset>0x0</addressOffset>
32333 <size>0x20</size>
32334 <access>read-write</access>
32335 <resetValue>0x0000</resetValue>
32336 <fields>
32337 <field>
32338 <name>CEN</name>
32339 <description>Counter enable</description>
32340 <bitOffset>0</bitOffset>
32341 <bitWidth>1</bitWidth>
32342 </field>
32343 <field>
32344 <name>UDIS</name>
32345 <description>Update disable</description>
32346 <bitOffset>1</bitOffset>
32347 <bitWidth>1</bitWidth>
32348 </field>
32349 <field>
32350 <name>URS</name>
32351 <description>Update request source</description>
32352 <bitOffset>2</bitOffset>
32353 <bitWidth>1</bitWidth>
32354 </field>
32355 <field>
32356 <name>OPM</name>
32357 <description>One-pulse mode</description>
32358 <bitOffset>3</bitOffset>
32359 <bitWidth>1</bitWidth>
32360 </field>
32361 <field>
32362 <name>DIR</name>
32363 <description>Direction</description>
32364 <bitOffset>4</bitOffset>
32365 <bitWidth>1</bitWidth>
32366 </field>
32367 <field>
32368 <name>CMS</name>
32369 <description>Center-aligned mode
32370 selection</description>
32371 <bitOffset>5</bitOffset>
32372 <bitWidth>2</bitWidth>
32373 </field>
32374 <field>
32375 <name>ARPE</name>
32376 <description>Auto-reload preload enable</description>
32377 <bitOffset>7</bitOffset>
32378 <bitWidth>1</bitWidth>
32379 </field>
32380 <field>
32381 <name>CKD</name>
32382 <description>Clock division</description>
32383 <bitOffset>8</bitOffset>
32384 <bitWidth>2</bitWidth>
32385 </field>
32386 <field>
32387 <name>UIFREMAP</name>
32388 <description>UIF status bit remapping</description>
32389 <bitOffset>11</bitOffset>
32390 <bitWidth>1</bitWidth>
32391 </field>
32392 </fields>
32393 </register>
32394 <register>
32395 <name>CR2</name>
32396 <displayName>CR2</displayName>
32397 <description>control register 2</description>
32398 <addressOffset>0x4</addressOffset>
32399 <size>0x20</size>
32400 <access>read-write</access>
32401 <resetValue>0x0000</resetValue>
32402 <fields>
32403 <field>
32404 <name>CCPC</name>
32405 <description>Capture/compare preloaded
32406 control</description>
32407 <bitOffset>0</bitOffset>
32408 <bitWidth>1</bitWidth>
32409 </field>
32410 <field>
32411 <name>CCUS</name>
32412 <description>Capture/compare control update
32413 selection</description>
32414 <bitOffset>2</bitOffset>
32415 <bitWidth>1</bitWidth>
32416 </field>
32417 <field>
32418 <name>CCDS</name>
32419 <description>Capture/compare DMA
32420 selection</description>
32421 <bitOffset>3</bitOffset>
32422 <bitWidth>1</bitWidth>
32423 </field>
32424 <field>
32425 <name>MMS</name>
32426 <description>Master mode selection</description>
32427 <bitOffset>4</bitOffset>
32428 <bitWidth>3</bitWidth>
32429 </field>
32430 <field>
32431 <name>TI1S</name>
32432 <description>TI1 selection</description>
32433 <bitOffset>7</bitOffset>
32434 <bitWidth>1</bitWidth>
32435 </field>
32436 <field>
32437 <name>OIS1</name>
32438 <description>Output Idle state 1</description>
32439 <bitOffset>8</bitOffset>
32440 <bitWidth>1</bitWidth>
32441 </field>
32442 <field>
32443 <name>OIS1N</name>
32444 <description>Output Idle state 1</description>
32445 <bitOffset>9</bitOffset>
32446 <bitWidth>1</bitWidth>
32447 </field>
32448 <field>
32449 <name>OIS2</name>
32450 <description>Output Idle state 2</description>
32451 <bitOffset>10</bitOffset>
32452 <bitWidth>1</bitWidth>
32453 </field>
32454 <field>
32455 <name>OIS2N</name>
32456 <description>Output Idle state 2</description>
32457 <bitOffset>11</bitOffset>
32458 <bitWidth>1</bitWidth>
32459 </field>
32460 <field>
32461 <name>OIS3</name>
32462 <description>Output Idle state 3</description>
32463 <bitOffset>12</bitOffset>
32464 <bitWidth>1</bitWidth>
32465 </field>
32466 <field>
32467 <name>OIS3N</name>
32468 <description>Output Idle state 3</description>
32469 <bitOffset>13</bitOffset>
32470 <bitWidth>1</bitWidth>
32471 </field>
32472 <field>
32473 <name>OIS4</name>
32474 <description>Output Idle state 4</description>
32475 <bitOffset>14</bitOffset>
32476 <bitWidth>1</bitWidth>
32477 </field>
32478 <field>
32479 <name>OIS5</name>
32480 <description>Output Idle state 5</description>
32481 <bitOffset>16</bitOffset>
32482 <bitWidth>1</bitWidth>
32483 </field>
32484 <field>
32485 <name>OIS6</name>
32486 <description>Output Idle state 6</description>
32487 <bitOffset>18</bitOffset>
32488 <bitWidth>1</bitWidth>
32489 </field>
32490 <field>
32491 <name>MMS2</name>
32492 <description>Master mode selection 2</description>
32493 <bitOffset>20</bitOffset>
32494 <bitWidth>4</bitWidth>
32495 </field>
32496 </fields>
32497 </register>
32498 <register>
32499 <name>SMCR</name>
32500 <displayName>SMCR</displayName>
32501 <description>slave mode control register</description>
32502 <addressOffset>0x8</addressOffset>
32503 <size>0x20</size>
32504 <access>read-write</access>
32505 <resetValue>0x0000</resetValue>
32506 <fields>
32507 <field>
32508 <name>SMS</name>
32509 <description>Slave mode selection</description>
32510 <bitOffset>0</bitOffset>
32511 <bitWidth>3</bitWidth>
32512 </field>
32513 <field>
32514 <name>OCCS</name>
32515 <description>OCREF clear selection</description>
32516 <bitOffset>3</bitOffset>
32517 <bitWidth>1</bitWidth>
32518 </field>
32519 <field>
32520 <name>TS</name>
32521 <description>Trigger selection</description>
32522 <bitOffset>4</bitOffset>
32523 <bitWidth>3</bitWidth>
32524 </field>
32525 <field>
32526 <name>MSM</name>
32527 <description>Master/Slave mode</description>
32528 <bitOffset>7</bitOffset>
32529 <bitWidth>1</bitWidth>
32530 </field>
32531 <field>
32532 <name>ETF</name>
32533 <description>External trigger filter</description>
32534 <bitOffset>8</bitOffset>
32535 <bitWidth>4</bitWidth>
32536 </field>
32537 <field>
32538 <name>ETPS</name>
32539 <description>External trigger prescaler</description>
32540 <bitOffset>12</bitOffset>
32541 <bitWidth>2</bitWidth>
32542 </field>
32543 <field>
32544 <name>ECE</name>
32545 <description>External clock enable</description>
32546 <bitOffset>14</bitOffset>
32547 <bitWidth>1</bitWidth>
32548 </field>
32549 <field>
32550 <name>ETP</name>
32551 <description>External trigger polarity</description>
32552 <bitOffset>15</bitOffset>
32553 <bitWidth>1</bitWidth>
32554 </field>
32555 <field>
32556 <name>SMS3</name>
32557 <description>Slave mode selection bit 3</description>
32558 <bitOffset>16</bitOffset>
32559 <bitWidth>1</bitWidth>
32560 </field>
32561 </fields>
32562 </register>
32563 <register>
32564 <name>DIER</name>
32565 <displayName>DIER</displayName>
32566 <description>DMA/Interrupt enable register</description>
32567 <addressOffset>0xC</addressOffset>
32568 <size>0x20</size>
32569 <access>read-write</access>
32570 <resetValue>0x0000</resetValue>
32571 <fields>
32572 <field>
32573 <name>TDE</name>
32574 <description>Trigger DMA request enable</description>
32575 <bitOffset>14</bitOffset>
32576 <bitWidth>1</bitWidth>
32577 </field>
32578 <field>
32579 <name>COMDE</name>
32580 <description>COM DMA request enable</description>
32581 <bitOffset>13</bitOffset>
32582 <bitWidth>1</bitWidth>
32583 </field>
32584 <field>
32585 <name>CC4DE</name>
32586 <description>Capture/Compare 4 DMA request
32587 enable</description>
32588 <bitOffset>12</bitOffset>
32589 <bitWidth>1</bitWidth>
32590 </field>
32591 <field>
32592 <name>CC3DE</name>
32593 <description>Capture/Compare 3 DMA request
32594 enable</description>
32595 <bitOffset>11</bitOffset>
32596 <bitWidth>1</bitWidth>
32597 </field>
32598 <field>
32599 <name>CC2DE</name>
32600 <description>Capture/Compare 2 DMA request
32601 enable</description>
32602 <bitOffset>10</bitOffset>
32603 <bitWidth>1</bitWidth>
32604 </field>
32605 <field>
32606 <name>CC1DE</name>
32607 <description>Capture/Compare 1 DMA request
32608 enable</description>
32609 <bitOffset>9</bitOffset>
32610 <bitWidth>1</bitWidth>
32611 </field>
32612 <field>
32613 <name>UDE</name>
32614 <description>Update DMA request enable</description>
32615 <bitOffset>8</bitOffset>
32616 <bitWidth>1</bitWidth>
32617 </field>
32618 <field>
32619 <name>BIE</name>
32620 <description>Break interrupt enable</description>
32621 <bitOffset>7</bitOffset>
32622 <bitWidth>1</bitWidth>
32623 </field>
32624 <field>
32625 <name>TIE</name>
32626 <description>Trigger interrupt enable</description>
32627 <bitOffset>6</bitOffset>
32628 <bitWidth>1</bitWidth>
32629 </field>
32630 <field>
32631 <name>COMIE</name>
32632 <description>COM interrupt enable</description>
32633 <bitOffset>5</bitOffset>
32634 <bitWidth>1</bitWidth>
32635 </field>
32636 <field>
32637 <name>CC4IE</name>
32638 <description>Capture/Compare 4 interrupt
32639 enable</description>
32640 <bitOffset>4</bitOffset>
32641 <bitWidth>1</bitWidth>
32642 </field>
32643 <field>
32644 <name>CC3IE</name>
32645 <description>Capture/Compare 3 interrupt
32646 enable</description>
32647 <bitOffset>3</bitOffset>
32648 <bitWidth>1</bitWidth>
32649 </field>
32650 <field>
32651 <name>CC2IE</name>
32652 <description>Capture/Compare 2 interrupt
32653 enable</description>
32654 <bitOffset>2</bitOffset>
32655 <bitWidth>1</bitWidth>
32656 </field>
32657 <field>
32658 <name>CC1IE</name>
32659 <description>Capture/Compare 1 interrupt
32660 enable</description>
32661 <bitOffset>1</bitOffset>
32662 <bitWidth>1</bitWidth>
32663 </field>
32664 <field>
32665 <name>UIE</name>
32666 <description>Update interrupt enable</description>
32667 <bitOffset>0</bitOffset>
32668 <bitWidth>1</bitWidth>
32669 </field>
32670 </fields>
32671 </register>
32672 <register>
32673 <name>SR</name>
32674 <displayName>SR</displayName>
32675 <description>status register</description>
32676 <addressOffset>0x10</addressOffset>
32677 <size>0x20</size>
32678 <access>read-write</access>
32679 <resetValue>0x0000</resetValue>
32680 <fields>
32681 <field>
32682 <name>UIF</name>
32683 <description>Update interrupt flag</description>
32684 <bitOffset>0</bitOffset>
32685 <bitWidth>1</bitWidth>
32686 </field>
32687 <field>
32688 <name>CC1IF</name>
32689 <description>Capture/compare 1 interrupt
32690 flag</description>
32691 <bitOffset>1</bitOffset>
32692 <bitWidth>1</bitWidth>
32693 </field>
32694 <field>
32695 <name>CC2IF</name>
32696 <description>Capture/Compare 2 interrupt
32697 flag</description>
32698 <bitOffset>2</bitOffset>
32699 <bitWidth>1</bitWidth>
32700 </field>
32701 <field>
32702 <name>CC3IF</name>
32703 <description>Capture/Compare 3 interrupt
32704 flag</description>
32705 <bitOffset>3</bitOffset>
32706 <bitWidth>1</bitWidth>
32707 </field>
32708 <field>
32709 <name>CC4IF</name>
32710 <description>Capture/Compare 4 interrupt
32711 flag</description>
32712 <bitOffset>4</bitOffset>
32713 <bitWidth>1</bitWidth>
32714 </field>
32715 <field>
32716 <name>COMIF</name>
32717 <description>COM interrupt flag</description>
32718 <bitOffset>5</bitOffset>
32719 <bitWidth>1</bitWidth>
32720 </field>
32721 <field>
32722 <name>TIF</name>
32723 <description>Trigger interrupt flag</description>
32724 <bitOffset>6</bitOffset>
32725 <bitWidth>1</bitWidth>
32726 </field>
32727 <field>
32728 <name>BIF</name>
32729 <description>Break interrupt flag</description>
32730 <bitOffset>7</bitOffset>
32731 <bitWidth>1</bitWidth>
32732 </field>
32733 <field>
32734 <name>B2IF</name>
32735 <description>Break 2 interrupt flag</description>
32736 <bitOffset>8</bitOffset>
32737 <bitWidth>1</bitWidth>
32738 </field>
32739 <field>
32740 <name>CC1OF</name>
32741 <description>Capture/Compare 1 overcapture
32742 flag</description>
32743 <bitOffset>9</bitOffset>
32744 <bitWidth>1</bitWidth>
32745 </field>
32746 <field>
32747 <name>CC2OF</name>
32748 <description>Capture/compare 2 overcapture
32749 flag</description>
32750 <bitOffset>10</bitOffset>
32751 <bitWidth>1</bitWidth>
32752 </field>
32753 <field>
32754 <name>CC3OF</name>
32755 <description>Capture/Compare 3 overcapture
32756 flag</description>
32757 <bitOffset>11</bitOffset>
32758 <bitWidth>1</bitWidth>
32759 </field>
32760 <field>
32761 <name>CC4OF</name>
32762 <description>Capture/Compare 4 overcapture
32763 flag</description>
32764 <bitOffset>12</bitOffset>
32765 <bitWidth>1</bitWidth>
32766 </field>
32767 <field>
32768 <name>C5IF</name>
32769 <description>Capture/Compare 5 interrupt
32770 flag</description>
32771 <bitOffset>16</bitOffset>
32772 <bitWidth>1</bitWidth>
32773 </field>
32774 <field>
32775 <name>C6IF</name>
32776 <description>Capture/Compare 6 interrupt
32777 flag</description>
32778 <bitOffset>17</bitOffset>
32779 <bitWidth>1</bitWidth>
32780 </field>
32781 </fields>
32782 </register>
32783 <register>
32784 <name>EGR</name>
32785 <displayName>EGR</displayName>
32786 <description>event generation register</description>
32787 <addressOffset>0x14</addressOffset>
32788 <size>0x20</size>
32789 <access>write-only</access>
32790 <resetValue>0x0000</resetValue>
32791 <fields>
32792 <field>
32793 <name>UG</name>
32794 <description>Update generation</description>
32795 <bitOffset>0</bitOffset>
32796 <bitWidth>1</bitWidth>
32797 </field>
32798 <field>
32799 <name>CC1G</name>
32800 <description>Capture/compare 1
32801 generation</description>
32802 <bitOffset>1</bitOffset>
32803 <bitWidth>1</bitWidth>
32804 </field>
32805 <field>
32806 <name>CC2G</name>
32807 <description>Capture/compare 2
32808 generation</description>
32809 <bitOffset>2</bitOffset>
32810 <bitWidth>1</bitWidth>
32811 </field>
32812 <field>
32813 <name>CC3G</name>
32814 <description>Capture/compare 3
32815 generation</description>
32816 <bitOffset>3</bitOffset>
32817 <bitWidth>1</bitWidth>
32818 </field>
32819 <field>
32820 <name>CC4G</name>
32821 <description>Capture/compare 4
32822 generation</description>
32823 <bitOffset>4</bitOffset>
32824 <bitWidth>1</bitWidth>
32825 </field>
32826 <field>
32827 <name>COMG</name>
32828 <description>Capture/Compare control update
32829 generation</description>
32830 <bitOffset>5</bitOffset>
32831 <bitWidth>1</bitWidth>
32832 </field>
32833 <field>
32834 <name>TG</name>
32835 <description>Trigger generation</description>
32836 <bitOffset>6</bitOffset>
32837 <bitWidth>1</bitWidth>
32838 </field>
32839 <field>
32840 <name>BG</name>
32841 <description>Break generation</description>
32842 <bitOffset>7</bitOffset>
32843 <bitWidth>1</bitWidth>
32844 </field>
32845 <field>
32846 <name>B2G</name>
32847 <description>Break 2 generation</description>
32848 <bitOffset>8</bitOffset>
32849 <bitWidth>1</bitWidth>
32850 </field>
32851 </fields>
32852 </register>
32853 <register>
32854 <name>CCMR1_Output</name>
32855 <displayName>CCMR1_Output</displayName>
32856 <description>capture/compare mode register (output
32857 mode)</description>
32858 <addressOffset>0x18</addressOffset>
32859 <size>0x20</size>
32860 <access>read-write</access>
32861 <resetValue>0x00000000</resetValue>
32862 <fields>
32863 <field>
32864 <name>OC2CE</name>
32865 <description>Output Compare 2 clear
32866 enable</description>
32867 <bitOffset>15</bitOffset>
32868 <bitWidth>1</bitWidth>
32869 </field>
32870 <field>
32871 <name>OC2M</name>
32872 <description>Output Compare 2 mode</description>
32873 <bitOffset>12</bitOffset>
32874 <bitWidth>3</bitWidth>
32875 </field>
32876 <field>
32877 <name>OC2PE</name>
32878 <description>Output Compare 2 preload
32879 enable</description>
32880 <bitOffset>11</bitOffset>
32881 <bitWidth>1</bitWidth>
32882 </field>
32883 <field>
32884 <name>OC2FE</name>
32885 <description>Output Compare 2 fast
32886 enable</description>
32887 <bitOffset>10</bitOffset>
32888 <bitWidth>1</bitWidth>
32889 </field>
32890 <field>
32891 <name>CC2S</name>
32892 <description>Capture/Compare 2
32893 selection</description>
32894 <bitOffset>8</bitOffset>
32895 <bitWidth>2</bitWidth>
32896 </field>
32897 <field>
32898 <name>OC1CE</name>
32899 <description>Output Compare 1 clear
32900 enable</description>
32901 <bitOffset>7</bitOffset>
32902 <bitWidth>1</bitWidth>
32903 </field>
32904 <field>
32905 <name>OC1M</name>
32906 <description>Output Compare 1 mode</description>
32907 <bitOffset>4</bitOffset>
32908 <bitWidth>3</bitWidth>
32909 </field>
32910 <field>
32911 <name>OC1PE</name>
32912 <description>Output Compare 1 preload
32913 enable</description>
32914 <bitOffset>3</bitOffset>
32915 <bitWidth>1</bitWidth>
32916 </field>
32917 <field>
32918 <name>OC1FE</name>
32919 <description>Output Compare 1 fast
32920 enable</description>
32921 <bitOffset>2</bitOffset>
32922 <bitWidth>1</bitWidth>
32923 </field>
32924 <field>
32925 <name>CC1S</name>
32926 <description>Capture/Compare 1
32927 selection</description>
32928 <bitOffset>0</bitOffset>
32929 <bitWidth>2</bitWidth>
32930 </field>
32931 <field>
32932 <name>OC1M_3</name>
32933 <description>Output Compare 1 mode bit
32934 3</description>
32935 <bitOffset>16</bitOffset>
32936 <bitWidth>1</bitWidth>
32937 </field>
32938 <field>
32939 <name>OC2M_3</name>
32940 <description>Output Compare 2 mode bit
32941 3</description>
32942 <bitOffset>24</bitOffset>
32943 <bitWidth>1</bitWidth>
32944 </field>
32945 </fields>
32946 </register>
32947 <register>
32948 <name>CCMR1_Input</name>
32949 <displayName>CCMR1_Input</displayName>
32950 <description>capture/compare mode register 1 (input
32951 mode)</description>
32952 <alternateRegister>CCMR1_Output</alternateRegister>
32953 <addressOffset>0x18</addressOffset>
32954 <size>0x20</size>
32955 <access>read-write</access>
32956 <resetValue>0x00000000</resetValue>
32957 <fields>
32958 <field>
32959 <name>IC2F</name>
32960 <description>Input capture 2 filter</description>
32961 <bitOffset>12</bitOffset>
32962 <bitWidth>4</bitWidth>
32963 </field>
32964 <field>
32965 <name>IC2PCS</name>
32966 <description>Input capture 2 prescaler</description>
32967 <bitOffset>10</bitOffset>
32968 <bitWidth>2</bitWidth>
32969 </field>
32970 <field>
32971 <name>CC2S</name>
32972 <description>Capture/Compare 2
32973 selection</description>
32974 <bitOffset>8</bitOffset>
32975 <bitWidth>2</bitWidth>
32976 </field>
32977 <field>
32978 <name>IC1F</name>
32979 <description>Input capture 1 filter</description>
32980 <bitOffset>4</bitOffset>
32981 <bitWidth>4</bitWidth>
32982 </field>
32983 <field>
32984 <name>IC1PCS</name>
32985 <description>Input capture 1 prescaler</description>
32986 <bitOffset>2</bitOffset>
32987 <bitWidth>2</bitWidth>
32988 </field>
32989 <field>
32990 <name>CC1S</name>
32991 <description>Capture/Compare 1
32992 selection</description>
32993 <bitOffset>0</bitOffset>
32994 <bitWidth>2</bitWidth>
32995 </field>
32996 </fields>
32997 </register>
32998 <register>
32999 <name>CCMR2_Output</name>
33000 <displayName>CCMR2_Output</displayName>
33001 <description>capture/compare mode register (output
33002 mode)</description>
33003 <addressOffset>0x1C</addressOffset>
33004 <size>0x20</size>
33005 <access>read-write</access>
33006 <resetValue>0x00000000</resetValue>
33007 <fields>
33008 <field>
33009 <name>OC4CE</name>
33010 <description>Output compare 4 clear
33011 enable</description>
33012 <bitOffset>15</bitOffset>
33013 <bitWidth>1</bitWidth>
33014 </field>
33015 <field>
33016 <name>OC4M</name>
33017 <description>Output compare 4 mode</description>
33018 <bitOffset>12</bitOffset>
33019 <bitWidth>3</bitWidth>
33020 </field>
33021 <field>
33022 <name>OC4PE</name>
33023 <description>Output compare 4 preload
33024 enable</description>
33025 <bitOffset>11</bitOffset>
33026 <bitWidth>1</bitWidth>
33027 </field>
33028 <field>
33029 <name>OC4FE</name>
33030 <description>Output compare 4 fast
33031 enable</description>
33032 <bitOffset>10</bitOffset>
33033 <bitWidth>1</bitWidth>
33034 </field>
33035 <field>
33036 <name>CC4S</name>
33037 <description>Capture/Compare 4
33038 selection</description>
33039 <bitOffset>8</bitOffset>
33040 <bitWidth>2</bitWidth>
33041 </field>
33042 <field>
33043 <name>OC3CE</name>
33044 <description>Output compare 3 clear
33045 enable</description>
33046 <bitOffset>7</bitOffset>
33047 <bitWidth>1</bitWidth>
33048 </field>
33049 <field>
33050 <name>OC3M</name>
33051 <description>Output compare 3 mode</description>
33052 <bitOffset>4</bitOffset>
33053 <bitWidth>3</bitWidth>
33054 </field>
33055 <field>
33056 <name>OC3PE</name>
33057 <description>Output compare 3 preload
33058 enable</description>
33059 <bitOffset>3</bitOffset>
33060 <bitWidth>1</bitWidth>
33061 </field>
33062 <field>
33063 <name>OC3FE</name>
33064 <description>Output compare 3 fast
33065 enable</description>
33066 <bitOffset>2</bitOffset>
33067 <bitWidth>1</bitWidth>
33068 </field>
33069 <field>
33070 <name>CC3S</name>
33071 <description>Capture/Compare 3
33072 selection</description>
33073 <bitOffset>0</bitOffset>
33074 <bitWidth>2</bitWidth>
33075 </field>
33076 <field>
33077 <name>OC3M_3</name>
33078 <description>Output Compare 3 mode bit
33079 3</description>
33080 <bitOffset>16</bitOffset>
33081 <bitWidth>1</bitWidth>
33082 </field>
33083 <field>
33084 <name>OC4M_3</name>
33085 <description>Output Compare 4 mode bit
33086 3</description>
33087 <bitOffset>24</bitOffset>
33088 <bitWidth>1</bitWidth>
33089 </field>
33090 </fields>
33091 </register>
33092 <register>
33093 <name>CCMR2_Input</name>
33094 <displayName>CCMR2_Input</displayName>
33095 <description>capture/compare mode register 2 (input
33096 mode)</description>
33097 <alternateRegister>CCMR2_Output</alternateRegister>
33098 <addressOffset>0x1C</addressOffset>
33099 <size>0x20</size>
33100 <access>read-write</access>
33101 <resetValue>0x00000000</resetValue>
33102 <fields>
33103 <field>
33104 <name>IC4F</name>
33105 <description>Input capture 4 filter</description>
33106 <bitOffset>12</bitOffset>
33107 <bitWidth>4</bitWidth>
33108 </field>
33109 <field>
33110 <name>IC4PSC</name>
33111 <description>Input capture 4 prescaler</description>
33112 <bitOffset>10</bitOffset>
33113 <bitWidth>2</bitWidth>
33114 </field>
33115 <field>
33116 <name>CC4S</name>
33117 <description>Capture/Compare 4
33118 selection</description>
33119 <bitOffset>8</bitOffset>
33120 <bitWidth>2</bitWidth>
33121 </field>
33122 <field>
33123 <name>IC3F</name>
33124 <description>Input capture 3 filter</description>
33125 <bitOffset>4</bitOffset>
33126 <bitWidth>4</bitWidth>
33127 </field>
33128 <field>
33129 <name>IC3PSC</name>
33130 <description>Input capture 3 prescaler</description>
33131 <bitOffset>2</bitOffset>
33132 <bitWidth>2</bitWidth>
33133 </field>
33134 <field>
33135 <name>CC3S</name>
33136 <description>Capture/compare 3
33137 selection</description>
33138 <bitOffset>0</bitOffset>
33139 <bitWidth>2</bitWidth>
33140 </field>
33141 </fields>
33142 </register>
33143 <register>
33144 <name>CCER</name>
33145 <displayName>CCER</displayName>
33146 <description>capture/compare enable
33147 register</description>
33148 <addressOffset>0x20</addressOffset>
33149 <size>0x20</size>
33150 <access>read-write</access>
33151 <resetValue>0x0000</resetValue>
33152 <fields>
33153 <field>
33154 <name>CC1E</name>
33155 <description>Capture/Compare 1 output
33156 enable</description>
33157 <bitOffset>0</bitOffset>
33158 <bitWidth>1</bitWidth>
33159 </field>
33160 <field>
33161 <name>CC1P</name>
33162 <description>Capture/Compare 1 output
33163 Polarity</description>
33164 <bitOffset>1</bitOffset>
33165 <bitWidth>1</bitWidth>
33166 </field>
33167 <field>
33168 <name>CC1NE</name>
33169 <description>Capture/Compare 1 complementary output
33170 enable</description>
33171 <bitOffset>2</bitOffset>
33172 <bitWidth>1</bitWidth>
33173 </field>
33174 <field>
33175 <name>CC1NP</name>
33176 <description>Capture/Compare 1 output
33177 Polarity</description>
33178 <bitOffset>3</bitOffset>
33179 <bitWidth>1</bitWidth>
33180 </field>
33181 <field>
33182 <name>CC2E</name>
33183 <description>Capture/Compare 2 output
33184 enable</description>
33185 <bitOffset>4</bitOffset>
33186 <bitWidth>1</bitWidth>
33187 </field>
33188 <field>
33189 <name>CC2P</name>
33190 <description>Capture/Compare 2 output
33191 Polarity</description>
33192 <bitOffset>5</bitOffset>
33193 <bitWidth>1</bitWidth>
33194 </field>
33195 <field>
33196 <name>CC2NE</name>
33197 <description>Capture/Compare 2 complementary output
33198 enable</description>
33199 <bitOffset>6</bitOffset>
33200 <bitWidth>1</bitWidth>
33201 </field>
33202 <field>
33203 <name>CC2NP</name>
33204 <description>Capture/Compare 2 output
33205 Polarity</description>
33206 <bitOffset>7</bitOffset>
33207 <bitWidth>1</bitWidth>
33208 </field>
33209 <field>
33210 <name>CC3E</name>
33211 <description>Capture/Compare 3 output
33212 enable</description>
33213 <bitOffset>8</bitOffset>
33214 <bitWidth>1</bitWidth>
33215 </field>
33216 <field>
33217 <name>CC3P</name>
33218 <description>Capture/Compare 3 output
33219 Polarity</description>
33220 <bitOffset>9</bitOffset>
33221 <bitWidth>1</bitWidth>
33222 </field>
33223 <field>
33224 <name>CC3NE</name>
33225 <description>Capture/Compare 3 complementary output
33226 enable</description>
33227 <bitOffset>10</bitOffset>
33228 <bitWidth>1</bitWidth>
33229 </field>
33230 <field>
33231 <name>CC3NP</name>
33232 <description>Capture/Compare 3 output
33233 Polarity</description>
33234 <bitOffset>11</bitOffset>
33235 <bitWidth>1</bitWidth>
33236 </field>
33237 <field>
33238 <name>CC4E</name>
33239 <description>Capture/Compare 4 output
33240 enable</description>
33241 <bitOffset>12</bitOffset>
33242 <bitWidth>1</bitWidth>
33243 </field>
33244 <field>
33245 <name>CC4P</name>
33246 <description>Capture/Compare 3 output
33247 Polarity</description>
33248 <bitOffset>13</bitOffset>
33249 <bitWidth>1</bitWidth>
33250 </field>
33251 <field>
33252 <name>CC4NP</name>
33253 <description>Capture/Compare 4 output
33254 Polarity</description>
33255 <bitOffset>15</bitOffset>
33256 <bitWidth>1</bitWidth>
33257 </field>
33258 <field>
33259 <name>CC5E</name>
33260 <description>Capture/Compare 5 output
33261 enable</description>
33262 <bitOffset>16</bitOffset>
33263 <bitWidth>1</bitWidth>
33264 </field>
33265 <field>
33266 <name>CC5P</name>
33267 <description>Capture/Compare 5 output
33268 Polarity</description>
33269 <bitOffset>17</bitOffset>
33270 <bitWidth>1</bitWidth>
33271 </field>
33272 <field>
33273 <name>CC6E</name>
33274 <description>Capture/Compare 6 output
33275 enable</description>
33276 <bitOffset>20</bitOffset>
33277 <bitWidth>1</bitWidth>
33278 </field>
33279 <field>
33280 <name>CC6P</name>
33281 <description>Capture/Compare 6 output
33282 Polarity</description>
33283 <bitOffset>21</bitOffset>
33284 <bitWidth>1</bitWidth>
33285 </field>
33286 </fields>
33287 </register>
33288 <register>
33289 <name>CNT</name>
33290 <displayName>CNT</displayName>
33291 <description>counter</description>
33292 <addressOffset>0x24</addressOffset>
33293 <size>0x20</size>
33294 <resetValue>0x00000000</resetValue>
33295 <fields>
33296 <field>
33297 <name>CNT</name>
33298 <description>counter value</description>
33299 <bitOffset>0</bitOffset>
33300 <bitWidth>16</bitWidth>
33301 <access>read-write</access>
33302 </field>
33303 <field>
33304 <name>UIFCPY</name>
33305 <description>UIF copy</description>
33306 <bitOffset>31</bitOffset>
33307 <bitWidth>1</bitWidth>
33308 <access>read-only</access>
33309 </field>
33310 </fields>
33311 </register>
33312 <register>
33313 <name>PSC</name>
33314 <displayName>PSC</displayName>
33315 <description>prescaler</description>
33316 <addressOffset>0x28</addressOffset>
33317 <size>0x20</size>
33318 <access>read-write</access>
33319 <resetValue>0x0000</resetValue>
33320 <fields>
33321 <field>
33322 <name>PSC</name>
33323 <description>Prescaler value</description>
33324 <bitOffset>0</bitOffset>
33325 <bitWidth>16</bitWidth>
33326 </field>
33327 </fields>
33328 </register>
33329 <register>
33330 <name>ARR</name>
33331 <displayName>ARR</displayName>
33332 <description>auto-reload register</description>
33333 <addressOffset>0x2C</addressOffset>
33334 <size>0x20</size>
33335 <access>read-write</access>
33336 <resetValue>0x00000000</resetValue>
33337 <fields>
33338 <field>
33339 <name>ARR</name>
33340 <description>Auto-reload value</description>
33341 <bitOffset>0</bitOffset>
33342 <bitWidth>16</bitWidth>
33343 </field>
33344 </fields>
33345 </register>
33346 <register>
33347 <name>RCR</name>
33348 <displayName>RCR</displayName>
33349 <description>repetition counter register</description>
33350 <addressOffset>0x30</addressOffset>
33351 <size>0x20</size>
33352 <access>read-write</access>
33353 <resetValue>0x0000</resetValue>
33354 <fields>
33355 <field>
33356 <name>REP</name>
33357 <description>Repetition counter value</description>
33358 <bitOffset>0</bitOffset>
33359 <bitWidth>16</bitWidth>
33360 </field>
33361 </fields>
33362 </register>
33363 <register>
33364 <name>CCR1</name>
33365 <displayName>CCR1</displayName>
33366 <description>capture/compare register 1</description>
33367 <addressOffset>0x34</addressOffset>
33368 <size>0x20</size>
33369 <access>read-write</access>
33370 <resetValue>0x00000000</resetValue>
33371 <fields>
33372 <field>
33373 <name>CCR1</name>
33374 <description>Capture/Compare 1 value</description>
33375 <bitOffset>0</bitOffset>
33376 <bitWidth>16</bitWidth>
33377 </field>
33378 </fields>
33379 </register>
33380 <register>
33381 <name>CCR2</name>
33382 <displayName>CCR2</displayName>
33383 <description>capture/compare register 2</description>
33384 <addressOffset>0x38</addressOffset>
33385 <size>0x20</size>
33386 <access>read-write</access>
33387 <resetValue>0x00000000</resetValue>
33388 <fields>
33389 <field>
33390 <name>CCR2</name>
33391 <description>Capture/Compare 2 value</description>
33392 <bitOffset>0</bitOffset>
33393 <bitWidth>16</bitWidth>
33394 </field>
33395 </fields>
33396 </register>
33397 <register>
33398 <name>CCR3</name>
33399 <displayName>CCR3</displayName>
33400 <description>capture/compare register 3</description>
33401 <addressOffset>0x3C</addressOffset>
33402 <size>0x20</size>
33403 <access>read-write</access>
33404 <resetValue>0x00000000</resetValue>
33405 <fields>
33406 <field>
33407 <name>CCR3</name>
33408 <description>Capture/Compare 3 value</description>
33409 <bitOffset>0</bitOffset>
33410 <bitWidth>16</bitWidth>
33411 </field>
33412 </fields>
33413 </register>
33414 <register>
33415 <name>CCR4</name>
33416 <displayName>CCR4</displayName>
33417 <description>capture/compare register 4</description>
33418 <addressOffset>0x40</addressOffset>
33419 <size>0x20</size>
33420 <access>read-write</access>
33421 <resetValue>0x00000000</resetValue>
33422 <fields>
33423 <field>
33424 <name>CCR4</name>
33425 <description>Capture/Compare 3 value</description>
33426 <bitOffset>0</bitOffset>
33427 <bitWidth>16</bitWidth>
33428 </field>
33429 </fields>
33430 </register>
33431 <register>
33432 <name>BDTR</name>
33433 <displayName>BDTR</displayName>
33434 <description>break and dead-time register</description>
33435 <addressOffset>0x44</addressOffset>
33436 <size>0x20</size>
33437 <access>read-write</access>
33438 <resetValue>0x00000000</resetValue>
33439 <fields>
33440 <field>
33441 <name>DTG</name>
33442 <description>Dead-time generator setup</description>
33443 <bitOffset>0</bitOffset>
33444 <bitWidth>8</bitWidth>
33445 </field>
33446 <field>
33447 <name>LOCK</name>
33448 <description>Lock configuration</description>
33449 <bitOffset>8</bitOffset>
33450 <bitWidth>2</bitWidth>
33451 </field>
33452 <field>
33453 <name>OSSI</name>
33454 <description>Off-state selection for Idle
33455 mode</description>
33456 <bitOffset>10</bitOffset>
33457 <bitWidth>1</bitWidth>
33458 </field>
33459 <field>
33460 <name>OSSR</name>
33461 <description>Off-state selection for Run
33462 mode</description>
33463 <bitOffset>11</bitOffset>
33464 <bitWidth>1</bitWidth>
33465 </field>
33466 <field>
33467 <name>BKE</name>
33468 <description>Break enable</description>
33469 <bitOffset>12</bitOffset>
33470 <bitWidth>1</bitWidth>
33471 </field>
33472 <field>
33473 <name>BKP</name>
33474 <description>Break polarity</description>
33475 <bitOffset>13</bitOffset>
33476 <bitWidth>1</bitWidth>
33477 </field>
33478 <field>
33479 <name>AOE</name>
33480 <description>Automatic output enable</description>
33481 <bitOffset>14</bitOffset>
33482 <bitWidth>1</bitWidth>
33483 </field>
33484 <field>
33485 <name>MOE</name>
33486 <description>Main output enable</description>
33487 <bitOffset>15</bitOffset>
33488 <bitWidth>1</bitWidth>
33489 </field>
33490 <field>
33491 <name>BKF</name>
33492 <description>Break filter</description>
33493 <bitOffset>16</bitOffset>
33494 <bitWidth>4</bitWidth>
33495 </field>
33496 <field>
33497 <name>BK2F</name>
33498 <description>Break 2 filter</description>
33499 <bitOffset>20</bitOffset>
33500 <bitWidth>4</bitWidth>
33501 </field>
33502 <field>
33503 <name>BK2E</name>
33504 <description>Break 2 enable</description>
33505 <bitOffset>24</bitOffset>
33506 <bitWidth>1</bitWidth>
33507 </field>
33508 <field>
33509 <name>BK2P</name>
33510 <description>Break 2 polarity</description>
33511 <bitOffset>25</bitOffset>
33512 <bitWidth>1</bitWidth>
33513 </field>
33514 </fields>
33515 </register>
33516 <register>
33517 <name>DCR</name>
33518 <displayName>DCR</displayName>
33519 <description>DMA control register</description>
33520 <addressOffset>0x48</addressOffset>
33521 <size>0x20</size>
33522 <access>read-write</access>
33523 <resetValue>0x00000000</resetValue>
33524 <fields>
33525 <field>
33526 <name>DBL</name>
33527 <description>DMA burst length</description>
33528 <bitOffset>8</bitOffset>
33529 <bitWidth>5</bitWidth>
33530 </field>
33531 <field>
33532 <name>DBA</name>
33533 <description>DMA base address</description>
33534 <bitOffset>0</bitOffset>
33535 <bitWidth>5</bitWidth>
33536 </field>
33537 </fields>
33538 </register>
33539 <register>
33540 <name>DMAR</name>
33541 <displayName>DMAR</displayName>
33542 <description>DMA address for full transfer</description>
33543 <addressOffset>0x4C</addressOffset>
33544 <size>0x20</size>
33545 <access>read-write</access>
33546 <resetValue>0x00000000</resetValue>
33547 <fields>
33548 <field>
33549 <name>DMAB</name>
33550 <description>DMA register for burst
33551 accesses</description>
33552 <bitOffset>0</bitOffset>
33553 <bitWidth>16</bitWidth>
33554 </field>
33555 </fields>
33556 </register>
33557 <register>
33558 <name>CCMR3_Output</name>
33559 <displayName>CCMR3_Output</displayName>
33560 <description>capture/compare mode register 3 (output
33561 mode)</description>
33562 <addressOffset>0x54</addressOffset>
33563 <size>0x20</size>
33564 <access>read-write</access>
33565 <resetValue>0x00000000</resetValue>
33566 <fields>
33567 <field>
33568 <name>OC5FE</name>
33569 <description>Output compare 5 fast
33570 enable</description>
33571 <bitOffset>2</bitOffset>
33572 <bitWidth>1</bitWidth>
33573 </field>
33574 <field>
33575 <name>OC5PE</name>
33576 <description>Output compare 5 preload
33577 enable</description>
33578 <bitOffset>3</bitOffset>
33579 <bitWidth>1</bitWidth>
33580 </field>
33581 <field>
33582 <name>OC5M</name>
33583 <description>Output compare 5 mode</description>
33584 <bitOffset>4</bitOffset>
33585 <bitWidth>3</bitWidth>
33586 </field>
33587 <field>
33588 <name>OC5CE</name>
33589 <description>Output compare 5 clear
33590 enable</description>
33591 <bitOffset>7</bitOffset>
33592 <bitWidth>1</bitWidth>
33593 </field>
33594 <field>
33595 <name>OC6FE</name>
33596 <description>Output compare 6 fast
33597 enable</description>
33598 <bitOffset>10</bitOffset>
33599 <bitWidth>1</bitWidth>
33600 </field>
33601 <field>
33602 <name>OC6PE</name>
33603 <description>Output compare 6 preload
33604 enable</description>
33605 <bitOffset>11</bitOffset>
33606 <bitWidth>1</bitWidth>
33607 </field>
33608 <field>
33609 <name>OC6M</name>
33610 <description>Output compare 6 mode</description>
33611 <bitOffset>12</bitOffset>
33612 <bitWidth>3</bitWidth>
33613 </field>
33614 <field>
33615 <name>OC6CE</name>
33616 <description>Output compare 6 clear
33617 enable</description>
33618 <bitOffset>15</bitOffset>
33619 <bitWidth>1</bitWidth>
33620 </field>
33621 <field>
33622 <name>OC5M_3</name>
33623 <description>Outout Compare 5 mode bit
33624 3</description>
33625 <bitOffset>16</bitOffset>
33626 <bitWidth>1</bitWidth>
33627 </field>
33628 <field>
33629 <name>OC6M_3</name>
33630 <description>Outout Compare 6 mode bit
33631 3</description>
33632 <bitOffset>24</bitOffset>
33633 <bitWidth>1</bitWidth>
33634 </field>
33635 </fields>
33636 </register>
33637 <register>
33638 <name>CCR5</name>
33639 <displayName>CCR5</displayName>
33640 <description>capture/compare register 5</description>
33641 <addressOffset>0x58</addressOffset>
33642 <size>0x20</size>
33643 <access>read-write</access>
33644 <resetValue>0x00000000</resetValue>
33645 <fields>
33646 <field>
33647 <name>CCR5</name>
33648 <description>Capture/Compare 5 value</description>
33649 <bitOffset>0</bitOffset>
33650 <bitWidth>16</bitWidth>
33651 </field>
33652 <field>
33653 <name>GC5C1</name>
33654 <description>Group Channel 5 and Channel
33655 1</description>
33656 <bitOffset>29</bitOffset>
33657 <bitWidth>1</bitWidth>
33658 </field>
33659 <field>
33660 <name>GC5C2</name>
33661 <description>Group Channel 5 and Channel
33662 2</description>
33663 <bitOffset>30</bitOffset>
33664 <bitWidth>1</bitWidth>
33665 </field>
33666 <field>
33667 <name>GC5C3</name>
33668 <description>Group Channel 5 and Channel
33669 3</description>
33670 <bitOffset>31</bitOffset>
33671 <bitWidth>1</bitWidth>
33672 </field>
33673 </fields>
33674 </register>
33675 <register>
33676 <name>CCR6</name>
33677 <displayName>CCR6</displayName>
33678 <description>capture/compare register 6</description>
33679 <addressOffset>0x5C</addressOffset>
33680 <size>0x20</size>
33681 <access>read-write</access>
33682 <resetValue>0x00000000</resetValue>
33683 <fields>
33684 <field>
33685 <name>CCR6</name>
33686 <description>Capture/Compare 6 value</description>
33687 <bitOffset>0</bitOffset>
33688 <bitWidth>16</bitWidth>
33689 </field>
33690 </fields>
33691 </register>
33692 <register>
33693 <name>OR</name>
33694 <displayName>OR</displayName>
33695 <description>option registers</description>
33696 <addressOffset>0x60</addressOffset>
33697 <size>0x20</size>
33698 <access>read-write</access>
33699 <resetValue>0x00000000</resetValue>
33700 <fields>
33701 <field>
33702 <name>TIM8_ETR_ADC2_RMP</name>
33703 <description>TIM8_ETR_ADC2 remapping
33704 capability</description>
33705 <bitOffset>0</bitOffset>
33706 <bitWidth>2</bitWidth>
33707 </field>
33708 <field>
33709 <name>TIM8_ETR_ADC3_RMP</name>
33710 <description>TIM8_ETR_ADC3 remapping
33711 capability</description>
33712 <bitOffset>2</bitOffset>
33713 <bitWidth>2</bitWidth>
33714 </field>
33715 </fields>
33716 </register>
33717 </registers>
33718 </peripheral>
33719 <peripheral>
33720 <name>ADC1</name>
33721 <description>Analog-to-Digital Converter</description>
33722 <groupName>ADC</groupName>
33723 <baseAddress>0x50000000</baseAddress>
33724 <addressBlock>
33725 <offset>0x0</offset>
33726 <size>0x100</size>
33727 <usage>registers</usage>
33728 </addressBlock>
33729 <interrupt>
33730 <name>ADC1_2</name>
33731 <description>ADC1 and ADC2 global interrupt</description>
33732 <value>18</value>
33733 </interrupt>
33734 <registers>
33735 <register>
33736 <name>ISR</name>
33737 <displayName>ISR</displayName>
33738 <description>interrupt and status register</description>
33739 <addressOffset>0x0</addressOffset>
33740 <size>0x20</size>
33741 <access>read-write</access>
33742 <resetValue>0x00000000</resetValue>
33743 <fields>
33744 <field>
33745 <name>JQOVF</name>
33746 <description>JQOVF</description>
33747 <bitOffset>10</bitOffset>
33748 <bitWidth>1</bitWidth>
33749 </field>
33750 <field>
33751 <name>AWD3</name>
33752 <description>AWD3</description>
33753 <bitOffset>9</bitOffset>
33754 <bitWidth>1</bitWidth>
33755 </field>
33756 <field>
33757 <name>AWD2</name>
33758 <description>AWD2</description>
33759 <bitOffset>8</bitOffset>
33760 <bitWidth>1</bitWidth>
33761 </field>
33762 <field>
33763 <name>AWD1</name>
33764 <description>AWD1</description>
33765 <bitOffset>7</bitOffset>
33766 <bitWidth>1</bitWidth>
33767 </field>
33768 <field>
33769 <name>JEOS</name>
33770 <description>JEOS</description>
33771 <bitOffset>6</bitOffset>
33772 <bitWidth>1</bitWidth>
33773 </field>
33774 <field>
33775 <name>JEOC</name>
33776 <description>JEOC</description>
33777 <bitOffset>5</bitOffset>
33778 <bitWidth>1</bitWidth>
33779 </field>
33780 <field>
33781 <name>OVR</name>
33782 <description>OVR</description>
33783 <bitOffset>4</bitOffset>
33784 <bitWidth>1</bitWidth>
33785 </field>
33786 <field>
33787 <name>EOS</name>
33788 <description>EOS</description>
33789 <bitOffset>3</bitOffset>
33790 <bitWidth>1</bitWidth>
33791 </field>
33792 <field>
33793 <name>EOC</name>
33794 <description>EOC</description>
33795 <bitOffset>2</bitOffset>
33796 <bitWidth>1</bitWidth>
33797 </field>
33798 <field>
33799 <name>EOSMP</name>
33800 <description>EOSMP</description>
33801 <bitOffset>1</bitOffset>
33802 <bitWidth>1</bitWidth>
33803 </field>
33804 <field>
33805 <name>ADRDY</name>
33806 <description>ADRDY</description>
33807 <bitOffset>0</bitOffset>
33808 <bitWidth>1</bitWidth>
33809 </field>
33810 </fields>
33811 </register>
33812 <register>
33813 <name>IER</name>
33814 <displayName>IER</displayName>
33815 <description>interrupt enable register</description>
33816 <addressOffset>0x4</addressOffset>
33817 <size>0x20</size>
33818 <access>read-write</access>
33819 <resetValue>0x00000000</resetValue>
33820 <fields>
33821 <field>
33822 <name>JQOVFIE</name>
33823 <description>JQOVFIE</description>
33824 <bitOffset>10</bitOffset>
33825 <bitWidth>1</bitWidth>
33826 </field>
33827 <field>
33828 <name>AWD3IE</name>
33829 <description>AWD3IE</description>
33830 <bitOffset>9</bitOffset>
33831 <bitWidth>1</bitWidth>
33832 </field>
33833 <field>
33834 <name>AWD2IE</name>
33835 <description>AWD2IE</description>
33836 <bitOffset>8</bitOffset>
33837 <bitWidth>1</bitWidth>
33838 </field>
33839 <field>
33840 <name>AWD1IE</name>
33841 <description>AWD1IE</description>
33842 <bitOffset>7</bitOffset>
33843 <bitWidth>1</bitWidth>
33844 </field>
33845 <field>
33846 <name>JEOSIE</name>
33847 <description>JEOSIE</description>
33848 <bitOffset>6</bitOffset>
33849 <bitWidth>1</bitWidth>
33850 </field>
33851 <field>
33852 <name>JEOCIE</name>
33853 <description>JEOCIE</description>
33854 <bitOffset>5</bitOffset>
33855 <bitWidth>1</bitWidth>
33856 </field>
33857 <field>
33858 <name>OVRIE</name>
33859 <description>OVRIE</description>
33860 <bitOffset>4</bitOffset>
33861 <bitWidth>1</bitWidth>
33862 </field>
33863 <field>
33864 <name>EOSIE</name>
33865 <description>EOSIE</description>
33866 <bitOffset>3</bitOffset>
33867 <bitWidth>1</bitWidth>
33868 </field>
33869 <field>
33870 <name>EOCIE</name>
33871 <description>EOCIE</description>
33872 <bitOffset>2</bitOffset>
33873 <bitWidth>1</bitWidth>
33874 </field>
33875 <field>
33876 <name>EOSMPIE</name>
33877 <description>EOSMPIE</description>
33878 <bitOffset>1</bitOffset>
33879 <bitWidth>1</bitWidth>
33880 </field>
33881 <field>
33882 <name>ADRDYIE</name>
33883 <description>ADRDYIE</description>
33884 <bitOffset>0</bitOffset>
33885 <bitWidth>1</bitWidth>
33886 </field>
33887 </fields>
33888 </register>
33889 <register>
33890 <name>CR</name>
33891 <displayName>CR</displayName>
33892 <description>control register</description>
33893 <addressOffset>0x8</addressOffset>
33894 <size>0x20</size>
33895 <access>read-write</access>
33896 <resetValue>0x00000000</resetValue>
33897 <fields>
33898 <field>
33899 <name>ADCAL</name>
33900 <description>ADCAL</description>
33901 <bitOffset>31</bitOffset>
33902 <bitWidth>1</bitWidth>
33903 </field>
33904 <field>
33905 <name>ADCALDIF</name>
33906 <description>ADCALDIF</description>
33907 <bitOffset>30</bitOffset>
33908 <bitWidth>1</bitWidth>
33909 </field>
33910 <field>
33911 <name>DEEPPWD</name>
33912 <description>DEEPPWD</description>
33913 <bitOffset>29</bitOffset>
33914 <bitWidth>1</bitWidth>
33915 </field>
33916 <field>
33917 <name>ADVREGEN</name>
33918 <description>ADVREGEN</description>
33919 <bitOffset>28</bitOffset>
33920 <bitWidth>1</bitWidth>
33921 </field>
33922 <field>
33923 <name>JADSTP</name>
33924 <description>JADSTP</description>
33925 <bitOffset>5</bitOffset>
33926 <bitWidth>1</bitWidth>
33927 </field>
33928 <field>
33929 <name>ADSTP</name>
33930 <description>ADSTP</description>
33931 <bitOffset>4</bitOffset>
33932 <bitWidth>1</bitWidth>
33933 </field>
33934 <field>
33935 <name>JADSTART</name>
33936 <description>JADSTART</description>
33937 <bitOffset>3</bitOffset>
33938 <bitWidth>1</bitWidth>
33939 </field>
33940 <field>
33941 <name>ADSTART</name>
33942 <description>ADSTART</description>
33943 <bitOffset>2</bitOffset>
33944 <bitWidth>1</bitWidth>
33945 </field>
33946 <field>
33947 <name>ADDIS</name>
33948 <description>ADDIS</description>
33949 <bitOffset>1</bitOffset>
33950 <bitWidth>1</bitWidth>
33951 </field>
33952 <field>
33953 <name>ADEN</name>
33954 <description>ADEN</description>
33955 <bitOffset>0</bitOffset>
33956 <bitWidth>1</bitWidth>
33957 </field>
33958 </fields>
33959 </register>
33960 <register>
33961 <name>CFGR</name>
33962 <displayName>CFGR</displayName>
33963 <description>configuration register</description>
33964 <addressOffset>0xC</addressOffset>
33965 <size>0x20</size>
33966 <access>read-write</access>
33967 <resetValue>0x00000000</resetValue>
33968 <fields>
33969 <field>
33970 <name>AWDCH1CH</name>
33971 <description>AWDCH1CH</description>
33972 <bitOffset>26</bitOffset>
33973 <bitWidth>5</bitWidth>
33974 </field>
33975 <field>
33976 <name>JAUTO</name>
33977 <description>JAUTO</description>
33978 <bitOffset>25</bitOffset>
33979 <bitWidth>1</bitWidth>
33980 </field>
33981 <field>
33982 <name>JAWD1EN</name>
33983 <description>JAWD1EN</description>
33984 <bitOffset>24</bitOffset>
33985 <bitWidth>1</bitWidth>
33986 </field>
33987 <field>
33988 <name>AWD1EN</name>
33989 <description>AWD1EN</description>
33990 <bitOffset>23</bitOffset>
33991 <bitWidth>1</bitWidth>
33992 </field>
33993 <field>
33994 <name>AWD1SGL</name>
33995 <description>AWD1SGL</description>
33996 <bitOffset>22</bitOffset>
33997 <bitWidth>1</bitWidth>
33998 </field>
33999 <field>
34000 <name>JQM</name>
34001 <description>JQM</description>
34002 <bitOffset>21</bitOffset>
34003 <bitWidth>1</bitWidth>
34004 </field>
34005 <field>
34006 <name>JDISCEN</name>
34007 <description>JDISCEN</description>
34008 <bitOffset>20</bitOffset>
34009 <bitWidth>1</bitWidth>
34010 </field>
34011 <field>
34012 <name>DISCNUM</name>
34013 <description>DISCNUM</description>
34014 <bitOffset>17</bitOffset>
34015 <bitWidth>3</bitWidth>
34016 </field>
34017 <field>
34018 <name>DISCEN</name>
34019 <description>DISCEN</description>
34020 <bitOffset>16</bitOffset>
34021 <bitWidth>1</bitWidth>
34022 </field>
34023 <field>
34024 <name>AUTOFF</name>
34025 <description>AUTOFF</description>
34026 <bitOffset>15</bitOffset>
34027 <bitWidth>1</bitWidth>
34028 </field>
34029 <field>
34030 <name>AUTDLY</name>
34031 <description>AUTDLY</description>
34032 <bitOffset>14</bitOffset>
34033 <bitWidth>1</bitWidth>
34034 </field>
34035 <field>
34036 <name>CONT</name>
34037 <description>CONT</description>
34038 <bitOffset>13</bitOffset>
34039 <bitWidth>1</bitWidth>
34040 </field>
34041 <field>
34042 <name>OVRMOD</name>
34043 <description>OVRMOD</description>
34044 <bitOffset>12</bitOffset>
34045 <bitWidth>1</bitWidth>
34046 </field>
34047 <field>
34048 <name>EXTEN</name>
34049 <description>EXTEN</description>
34050 <bitOffset>10</bitOffset>
34051 <bitWidth>2</bitWidth>
34052 </field>
34053 <field>
34054 <name>EXTSEL</name>
34055 <description>EXTSEL</description>
34056 <bitOffset>6</bitOffset>
34057 <bitWidth>4</bitWidth>
34058 </field>
34059 <field>
34060 <name>ALIGN</name>
34061 <description>ALIGN</description>
34062 <bitOffset>5</bitOffset>
34063 <bitWidth>1</bitWidth>
34064 </field>
34065 <field>
34066 <name>RES</name>
34067 <description>RES</description>
34068 <bitOffset>3</bitOffset>
34069 <bitWidth>2</bitWidth>
34070 </field>
34071 <field>
34072 <name>DMACFG</name>
34073 <description>DMACFG</description>
34074 <bitOffset>1</bitOffset>
34075 <bitWidth>1</bitWidth>
34076 </field>
34077 <field>
34078 <name>DMAEN</name>
34079 <description>DMAEN</description>
34080 <bitOffset>0</bitOffset>
34081 <bitWidth>1</bitWidth>
34082 </field>
34083 </fields>
34084 </register>
34085 <register>
34086 <name>SMPR1</name>
34087 <displayName>SMPR1</displayName>
34088 <description>sample time register 1</description>
34089 <addressOffset>0x14</addressOffset>
34090 <size>0x20</size>
34091 <access>read-write</access>
34092 <resetValue>0x00000000</resetValue>
34093 <fields>
34094 <field>
34095 <name>SMP9</name>
34096 <description>SMP9</description>
34097 <bitOffset>27</bitOffset>
34098 <bitWidth>3</bitWidth>
34099 </field>
34100 <field>
34101 <name>SMP8</name>
34102 <description>SMP8</description>
34103 <bitOffset>24</bitOffset>
34104 <bitWidth>3</bitWidth>
34105 </field>
34106 <field>
34107 <name>SMP7</name>
34108 <description>SMP7</description>
34109 <bitOffset>21</bitOffset>
34110 <bitWidth>3</bitWidth>
34111 </field>
34112 <field>
34113 <name>SMP6</name>
34114 <description>SMP6</description>
34115 <bitOffset>18</bitOffset>
34116 <bitWidth>3</bitWidth>
34117 </field>
34118 <field>
34119 <name>SMP5</name>
34120 <description>SMP5</description>
34121 <bitOffset>15</bitOffset>
34122 <bitWidth>3</bitWidth>
34123 </field>
34124 <field>
34125 <name>SMP4</name>
34126 <description>SMP4</description>
34127 <bitOffset>12</bitOffset>
34128 <bitWidth>3</bitWidth>
34129 </field>
34130 <field>
34131 <name>SMP3</name>
34132 <description>SMP3</description>
34133 <bitOffset>9</bitOffset>
34134 <bitWidth>3</bitWidth>
34135 </field>
34136 <field>
34137 <name>SMP2</name>
34138 <description>SMP2</description>
34139 <bitOffset>6</bitOffset>
34140 <bitWidth>3</bitWidth>
34141 </field>
34142 <field>
34143 <name>SMP1</name>
34144 <description>SMP1</description>
34145 <bitOffset>3</bitOffset>
34146 <bitWidth>3</bitWidth>
34147 </field>
34148 </fields>
34149 </register>
34150 <register>
34151 <name>SMPR2</name>
34152 <displayName>SMPR2</displayName>
34153 <description>sample time register 2</description>
34154 <addressOffset>0x18</addressOffset>
34155 <size>0x20</size>
34156 <access>read-write</access>
34157 <resetValue>0x00000000</resetValue>
34158 <fields>
34159 <field>
34160 <name>SMP18</name>
34161 <description>SMP18</description>
34162 <bitOffset>24</bitOffset>
34163 <bitWidth>3</bitWidth>
34164 </field>
34165 <field>
34166 <name>SMP17</name>
34167 <description>SMP17</description>
34168 <bitOffset>21</bitOffset>
34169 <bitWidth>3</bitWidth>
34170 </field>
34171 <field>
34172 <name>SMP16</name>
34173 <description>SMP16</description>
34174 <bitOffset>18</bitOffset>
34175 <bitWidth>3</bitWidth>
34176 </field>
34177 <field>
34178 <name>SMP15</name>
34179 <description>SMP15</description>
34180 <bitOffset>15</bitOffset>
34181 <bitWidth>3</bitWidth>
34182 </field>
34183 <field>
34184 <name>SMP14</name>
34185 <description>SMP14</description>
34186 <bitOffset>12</bitOffset>
34187 <bitWidth>3</bitWidth>
34188 </field>
34189 <field>
34190 <name>SMP13</name>
34191 <description>SMP13</description>
34192 <bitOffset>9</bitOffset>
34193 <bitWidth>3</bitWidth>
34194 </field>
34195 <field>
34196 <name>SMP12</name>
34197 <description>SMP12</description>
34198 <bitOffset>6</bitOffset>
34199 <bitWidth>3</bitWidth>
34200 </field>
34201 <field>
34202 <name>SMP11</name>
34203 <description>SMP11</description>
34204 <bitOffset>3</bitOffset>
34205 <bitWidth>3</bitWidth>
34206 </field>
34207 <field>
34208 <name>SMP10</name>
34209 <description>SMP10</description>
34210 <bitOffset>0</bitOffset>
34211 <bitWidth>3</bitWidth>
34212 </field>
34213 </fields>
34214 </register>
34215 <register>
34216 <name>TR1</name>
34217 <displayName>TR1</displayName>
34218 <description>watchdog threshold register 1</description>
34219 <addressOffset>0x20</addressOffset>
34220 <size>0x20</size>
34221 <access>read-write</access>
34222 <resetValue>0x0FFF0000</resetValue>
34223 <fields>
34224 <field>
34225 <name>HT1</name>
34226 <description>HT1</description>
34227 <bitOffset>16</bitOffset>
34228 <bitWidth>12</bitWidth>
34229 </field>
34230 <field>
34231 <name>LT1</name>
34232 <description>LT1</description>
34233 <bitOffset>0</bitOffset>
34234 <bitWidth>12</bitWidth>
34235 </field>
34236 </fields>
34237 </register>
34238 <register>
34239 <name>TR2</name>
34240 <displayName>TR2</displayName>
34241 <description>watchdog threshold register</description>
34242 <addressOffset>0x24</addressOffset>
34243 <size>0x20</size>
34244 <access>read-write</access>
34245 <resetValue>0x0FFF0000</resetValue>
34246 <fields>
34247 <field>
34248 <name>HT2</name>
34249 <description>HT2</description>
34250 <bitOffset>16</bitOffset>
34251 <bitWidth>8</bitWidth>
34252 </field>
34253 <field>
34254 <name>LT2</name>
34255 <description>LT2</description>
34256 <bitOffset>0</bitOffset>
34257 <bitWidth>8</bitWidth>
34258 </field>
34259 </fields>
34260 </register>
34261 <register>
34262 <name>TR3</name>
34263 <displayName>TR3</displayName>
34264 <description>watchdog threshold register 3</description>
34265 <addressOffset>0x28</addressOffset>
34266 <size>0x20</size>
34267 <access>read-write</access>
34268 <resetValue>0x0FFF0000</resetValue>
34269 <fields>
34270 <field>
34271 <name>HT3</name>
34272 <description>HT3</description>
34273 <bitOffset>16</bitOffset>
34274 <bitWidth>8</bitWidth>
34275 </field>
34276 <field>
34277 <name>LT3</name>
34278 <description>LT3</description>
34279 <bitOffset>0</bitOffset>
34280 <bitWidth>8</bitWidth>
34281 </field>
34282 </fields>
34283 </register>
34284 <register>
34285 <name>SQR1</name>
34286 <displayName>SQR1</displayName>
34287 <description>regular sequence register 1</description>
34288 <addressOffset>0x30</addressOffset>
34289 <size>0x20</size>
34290 <access>read-write</access>
34291 <resetValue>0x00000000</resetValue>
34292 <fields>
34293 <field>
34294 <name>SQ4</name>
34295 <description>SQ4</description>
34296 <bitOffset>24</bitOffset>
34297 <bitWidth>5</bitWidth>
34298 </field>
34299 <field>
34300 <name>SQ3</name>
34301 <description>SQ3</description>
34302 <bitOffset>18</bitOffset>
34303 <bitWidth>5</bitWidth>
34304 </field>
34305 <field>
34306 <name>SQ2</name>
34307 <description>SQ2</description>
34308 <bitOffset>12</bitOffset>
34309 <bitWidth>5</bitWidth>
34310 </field>
34311 <field>
34312 <name>SQ1</name>
34313 <description>SQ1</description>
34314 <bitOffset>6</bitOffset>
34315 <bitWidth>5</bitWidth>
34316 </field>
34317 <field>
34318 <name>L3</name>
34319 <description>L3</description>
34320 <bitOffset>0</bitOffset>
34321 <bitWidth>4</bitWidth>
34322 </field>
34323 </fields>
34324 </register>
34325 <register>
34326 <name>SQR2</name>
34327 <displayName>SQR2</displayName>
34328 <description>regular sequence register 2</description>
34329 <addressOffset>0x34</addressOffset>
34330 <size>0x20</size>
34331 <access>read-write</access>
34332 <resetValue>0x00000000</resetValue>
34333 <fields>
34334 <field>
34335 <name>SQ9</name>
34336 <description>SQ9</description>
34337 <bitOffset>24</bitOffset>
34338 <bitWidth>5</bitWidth>
34339 </field>
34340 <field>
34341 <name>SQ8</name>
34342 <description>SQ8</description>
34343 <bitOffset>18</bitOffset>
34344 <bitWidth>5</bitWidth>
34345 </field>
34346 <field>
34347 <name>SQ7</name>
34348 <description>SQ7</description>
34349 <bitOffset>12</bitOffset>
34350 <bitWidth>5</bitWidth>
34351 </field>
34352 <field>
34353 <name>SQ6</name>
34354 <description>SQ6</description>
34355 <bitOffset>6</bitOffset>
34356 <bitWidth>5</bitWidth>
34357 </field>
34358 <field>
34359 <name>SQ5</name>
34360 <description>SQ5</description>
34361 <bitOffset>0</bitOffset>
34362 <bitWidth>5</bitWidth>
34363 </field>
34364 </fields>
34365 </register>
34366 <register>
34367 <name>SQR3</name>
34368 <displayName>SQR3</displayName>
34369 <description>regular sequence register 3</description>
34370 <addressOffset>0x38</addressOffset>
34371 <size>0x20</size>
34372 <access>read-write</access>
34373 <resetValue>0x00000000</resetValue>
34374 <fields>
34375 <field>
34376 <name>SQ14</name>
34377 <description>SQ14</description>
34378 <bitOffset>24</bitOffset>
34379 <bitWidth>5</bitWidth>
34380 </field>
34381 <field>
34382 <name>SQ13</name>
34383 <description>SQ13</description>
34384 <bitOffset>18</bitOffset>
34385 <bitWidth>5</bitWidth>
34386 </field>
34387 <field>
34388 <name>SQ12</name>
34389 <description>SQ12</description>
34390 <bitOffset>12</bitOffset>
34391 <bitWidth>5</bitWidth>
34392 </field>
34393 <field>
34394 <name>SQ11</name>
34395 <description>SQ11</description>
34396 <bitOffset>6</bitOffset>
34397 <bitWidth>5</bitWidth>
34398 </field>
34399 <field>
34400 <name>SQ10</name>
34401 <description>SQ10</description>
34402 <bitOffset>0</bitOffset>
34403 <bitWidth>5</bitWidth>
34404 </field>
34405 </fields>
34406 </register>
34407 <register>
34408 <name>SQR4</name>
34409 <displayName>SQR4</displayName>
34410 <description>regular sequence register 4</description>
34411 <addressOffset>0x3C</addressOffset>
34412 <size>0x20</size>
34413 <access>read-write</access>
34414 <resetValue>0x00000000</resetValue>
34415 <fields>
34416 <field>
34417 <name>SQ16</name>
34418 <description>SQ16</description>
34419 <bitOffset>6</bitOffset>
34420 <bitWidth>5</bitWidth>
34421 </field>
34422 <field>
34423 <name>SQ15</name>
34424 <description>SQ15</description>
34425 <bitOffset>0</bitOffset>
34426 <bitWidth>5</bitWidth>
34427 </field>
34428 </fields>
34429 </register>
34430 <register>
34431 <name>DR</name>
34432 <displayName>DR</displayName>
34433 <description>regular Data Register</description>
34434 <addressOffset>0x40</addressOffset>
34435 <size>0x20</size>
34436 <access>read-only</access>
34437 <resetValue>0x00000000</resetValue>
34438 <fields>
34439 <field>
34440 <name>regularDATA</name>
34441 <description>regularDATA</description>
34442 <bitOffset>0</bitOffset>
34443 <bitWidth>16</bitWidth>
34444 </field>
34445 </fields>
34446 </register>
34447 <register>
34448 <name>JSQR</name>
34449 <displayName>JSQR</displayName>
34450 <description>injected sequence register</description>
34451 <addressOffset>0x4C</addressOffset>
34452 <size>0x20</size>
34453 <access>read-write</access>
34454 <resetValue>0x00000000</resetValue>
34455 <fields>
34456 <field>
34457 <name>JSQ4</name>
34458 <description>JSQ4</description>
34459 <bitOffset>26</bitOffset>
34460 <bitWidth>5</bitWidth>
34461 </field>
34462 <field>
34463 <name>JSQ3</name>
34464 <description>JSQ3</description>
34465 <bitOffset>20</bitOffset>
34466 <bitWidth>5</bitWidth>
34467 </field>
34468 <field>
34469 <name>JSQ2</name>
34470 <description>JSQ2</description>
34471 <bitOffset>14</bitOffset>
34472 <bitWidth>5</bitWidth>
34473 </field>
34474 <field>
34475 <name>JSQ1</name>
34476 <description>JSQ1</description>
34477 <bitOffset>8</bitOffset>
34478 <bitWidth>5</bitWidth>
34479 </field>
34480 <field>
34481 <name>JEXTEN</name>
34482 <description>JEXTEN</description>
34483 <bitOffset>6</bitOffset>
34484 <bitWidth>2</bitWidth>
34485 </field>
34486 <field>
34487 <name>JEXTSEL</name>
34488 <description>JEXTSEL</description>
34489 <bitOffset>2</bitOffset>
34490 <bitWidth>4</bitWidth>
34491 </field>
34492 <field>
34493 <name>JL</name>
34494 <description>JL</description>
34495 <bitOffset>0</bitOffset>
34496 <bitWidth>2</bitWidth>
34497 </field>
34498 </fields>
34499 </register>
34500 <register>
34501 <name>OFR1</name>
34502 <displayName>OFR1</displayName>
34503 <description>offset register 1</description>
34504 <addressOffset>0x60</addressOffset>
34505 <size>0x20</size>
34506 <access>read-write</access>
34507 <resetValue>0x00000000</resetValue>
34508 <fields>
34509 <field>
34510 <name>OFFSET1_EN</name>
34511 <description>OFFSET1_EN</description>
34512 <bitOffset>31</bitOffset>
34513 <bitWidth>1</bitWidth>
34514 </field>
34515 <field>
34516 <name>OFFSET1_CH</name>
34517 <description>OFFSET1_CH</description>
34518 <bitOffset>26</bitOffset>
34519 <bitWidth>5</bitWidth>
34520 </field>
34521 <field>
34522 <name>OFFSET1</name>
34523 <description>OFFSET1</description>
34524 <bitOffset>0</bitOffset>
34525 <bitWidth>12</bitWidth>
34526 </field>
34527 </fields>
34528 </register>
34529 <register>
34530 <name>OFR2</name>
34531 <displayName>OFR2</displayName>
34532 <description>offset register 2</description>
34533 <addressOffset>0x64</addressOffset>
34534 <size>0x20</size>
34535 <access>read-write</access>
34536 <resetValue>0x00000000</resetValue>
34537 <fields>
34538 <field>
34539 <name>OFFSET2_EN</name>
34540 <description>OFFSET2_EN</description>
34541 <bitOffset>31</bitOffset>
34542 <bitWidth>1</bitWidth>
34543 </field>
34544 <field>
34545 <name>OFFSET2_CH</name>
34546 <description>OFFSET2_CH</description>
34547 <bitOffset>26</bitOffset>
34548 <bitWidth>5</bitWidth>
34549 </field>
34550 <field>
34551 <name>OFFSET2</name>
34552 <description>OFFSET2</description>
34553 <bitOffset>0</bitOffset>
34554 <bitWidth>12</bitWidth>
34555 </field>
34556 </fields>
34557 </register>
34558 <register>
34559 <name>OFR3</name>
34560 <displayName>OFR3</displayName>
34561 <description>offset register 3</description>
34562 <addressOffset>0x68</addressOffset>
34563 <size>0x20</size>
34564 <access>read-write</access>
34565 <resetValue>0x00000000</resetValue>
34566 <fields>
34567 <field>
34568 <name>OFFSET3_EN</name>
34569 <description>OFFSET3_EN</description>
34570 <bitOffset>31</bitOffset>
34571 <bitWidth>1</bitWidth>
34572 </field>
34573 <field>
34574 <name>OFFSET3_CH</name>
34575 <description>OFFSET3_CH</description>
34576 <bitOffset>26</bitOffset>
34577 <bitWidth>5</bitWidth>
34578 </field>
34579 <field>
34580 <name>OFFSET3</name>
34581 <description>OFFSET3</description>
34582 <bitOffset>0</bitOffset>
34583 <bitWidth>12</bitWidth>
34584 </field>
34585 </fields>
34586 </register>
34587 <register>
34588 <name>OFR4</name>
34589 <displayName>OFR4</displayName>
34590 <description>offset register 4</description>
34591 <addressOffset>0x6C</addressOffset>
34592 <size>0x20</size>
34593 <access>read-write</access>
34594 <resetValue>0x00000000</resetValue>
34595 <fields>
34596 <field>
34597 <name>OFFSET4_EN</name>
34598 <description>OFFSET4_EN</description>
34599 <bitOffset>31</bitOffset>
34600 <bitWidth>1</bitWidth>
34601 </field>
34602 <field>
34603 <name>OFFSET4_CH</name>
34604 <description>OFFSET4_CH</description>
34605 <bitOffset>26</bitOffset>
34606 <bitWidth>5</bitWidth>
34607 </field>
34608 <field>
34609 <name>OFFSET4</name>
34610 <description>OFFSET4</description>
34611 <bitOffset>0</bitOffset>
34612 <bitWidth>12</bitWidth>
34613 </field>
34614 </fields>
34615 </register>
34616 <register>
34617 <name>JDR1</name>
34618 <displayName>JDR1</displayName>
34619 <description>injected data register 1</description>
34620 <addressOffset>0x80</addressOffset>
34621 <size>0x20</size>
34622 <access>read-only</access>
34623 <resetValue>0x00000000</resetValue>
34624 <fields>
34625 <field>
34626 <name>JDATA1</name>
34627 <description>JDATA1</description>
34628 <bitOffset>0</bitOffset>
34629 <bitWidth>16</bitWidth>
34630 </field>
34631 </fields>
34632 </register>
34633 <register>
34634 <name>JDR2</name>
34635 <displayName>JDR2</displayName>
34636 <description>injected data register 2</description>
34637 <addressOffset>0x84</addressOffset>
34638 <size>0x20</size>
34639 <access>read-only</access>
34640 <resetValue>0x00000000</resetValue>
34641 <fields>
34642 <field>
34643 <name>JDATA2</name>
34644 <description>JDATA2</description>
34645 <bitOffset>0</bitOffset>
34646 <bitWidth>16</bitWidth>
34647 </field>
34648 </fields>
34649 </register>
34650 <register>
34651 <name>JDR3</name>
34652 <displayName>JDR3</displayName>
34653 <description>injected data register 3</description>
34654 <addressOffset>0x88</addressOffset>
34655 <size>0x20</size>
34656 <access>read-only</access>
34657 <resetValue>0x00000000</resetValue>
34658 <fields>
34659 <field>
34660 <name>JDATA3</name>
34661 <description>JDATA3</description>
34662 <bitOffset>0</bitOffset>
34663 <bitWidth>16</bitWidth>
34664 </field>
34665 </fields>
34666 </register>
34667 <register>
34668 <name>JDR4</name>
34669 <displayName>JDR4</displayName>
34670 <description>injected data register 4</description>
34671 <addressOffset>0x8C</addressOffset>
34672 <size>0x20</size>
34673 <access>read-only</access>
34674 <resetValue>0x00000000</resetValue>
34675 <fields>
34676 <field>
34677 <name>JDATA4</name>
34678 <description>JDATA4</description>
34679 <bitOffset>0</bitOffset>
34680 <bitWidth>16</bitWidth>
34681 </field>
34682 </fields>
34683 </register>
34684 <register>
34685 <name>AWD2CR</name>
34686 <displayName>AWD2CR</displayName>
34687 <description>Analog Watchdog 2 Configuration
34688 Register</description>
34689 <addressOffset>0xA0</addressOffset>
34690 <size>0x20</size>
34691 <access>read-write</access>
34692 <resetValue>0x00000000</resetValue>
34693 <fields>
34694 <field>
34695 <name>AWD2CH</name>
34696 <description>AWD2CH</description>
34697 <bitOffset>1</bitOffset>
34698 <bitWidth>18</bitWidth>
34699 </field>
34700 </fields>
34701 </register>
34702 <register>
34703 <name>AWD3CR</name>
34704 <displayName>AWD3CR</displayName>
34705 <description>Analog Watchdog 3 Configuration
34706 Register</description>
34707 <addressOffset>0xA4</addressOffset>
34708 <size>0x20</size>
34709 <access>read-write</access>
34710 <resetValue>0x00000000</resetValue>
34711 <fields>
34712 <field>
34713 <name>AWD3CH</name>
34714 <description>AWD3CH</description>
34715 <bitOffset>1</bitOffset>
34716 <bitWidth>18</bitWidth>
34717 </field>
34718 </fields>
34719 </register>
34720 <register>
34721 <name>DIFSEL</name>
34722 <displayName>DIFSEL</displayName>
34723 <description>Differential Mode Selection Register
34724 2</description>
34725 <addressOffset>0xB0</addressOffset>
34726 <size>0x20</size>
34727 <resetValue>0x00000000</resetValue>
34728 <fields>
34729 <field>
34730 <name>DIFSEL_1_15</name>
34731 <description>Differential mode for channels 15 to
34732 1</description>
34733 <bitOffset>1</bitOffset>
34734 <bitWidth>15</bitWidth>
34735 <access>read-write</access>
34736 </field>
34737 <field>
34738 <name>DIFSEL_16_18</name>
34739 <description>Differential mode for channels 18 to
34740 16</description>
34741 <bitOffset>16</bitOffset>
34742 <bitWidth>3</bitWidth>
34743 <access>read-only</access>
34744 </field>
34745 </fields>
34746 </register>
34747 <register>
34748 <name>CALFACT</name>
34749 <displayName>CALFACT</displayName>
34750 <description>Calibration Factors</description>
34751 <addressOffset>0xB4</addressOffset>
34752 <size>0x20</size>
34753 <access>read-write</access>
34754 <resetValue>0x00000000</resetValue>
34755 <fields>
34756 <field>
34757 <name>CALFACT_D</name>
34758 <description>CALFACT_D</description>
34759 <bitOffset>16</bitOffset>
34760 <bitWidth>7</bitWidth>
34761 </field>
34762 <field>
34763 <name>CALFACT_S</name>
34764 <description>CALFACT_S</description>
34765 <bitOffset>0</bitOffset>
34766 <bitWidth>7</bitWidth>
34767 </field>
34768 </fields>
34769 </register>
34770 </registers>
34771 </peripheral>
34772 <peripheral derivedFrom="ADC1">
34773 <name>ADC2</name>
34774 <baseAddress>0x50000100</baseAddress>
34775 <interrupt>
34776 <name>ADC1_2</name>
34777 <description>ADC1 and ADC2 global interrupt</description>
34778 <value>18</value>
34779 </interrupt>
34780 </peripheral>
34781 <peripheral derivedFrom="ADC1">
34782 <name>ADC3</name>
34783 <baseAddress>0x50000400</baseAddress>
34784 <interrupt>
34785 <name>ADC3</name>
34786 <description>ADC3 global interrupt</description>
34787 <value>47</value>
34788 </interrupt>
34789 </peripheral>
34790 <peripheral derivedFrom="ADC1">
34791 <name>ADC4</name>
34792 <baseAddress>0x50000500</baseAddress>
34793 <interrupt>
34794 <name>ADC4</name>
34795 <description>ADC4 global interrupt</description>
34796 <value>61</value>
34797 </interrupt>
34798 </peripheral>
34799 <peripheral>
34800 <name>ADC1_2</name>
34801 <description>Analog-to-Digital Converter</description>
34802 <groupName>ADC</groupName>
34803 <baseAddress>0x50000300</baseAddress>
34804 <addressBlock>
34805 <offset>0x0</offset>
34806 <size>0x11</size>
34807 <usage>registers</usage>
34808 </addressBlock>
34809 <registers>
34810 <register>
34811 <name>CSR</name>
34812 <displayName>CSR</displayName>
34813 <description>ADC Common status register</description>
34814 <addressOffset>0x0</addressOffset>
34815 <size>0x20</size>
34816 <access>read-only</access>
34817 <resetValue>0x00000000</resetValue>
34818 <fields>
34819 <field>
34820 <name>ADDRDY_MST</name>
34821 <description>ADDRDY_MST</description>
34822 <bitOffset>0</bitOffset>
34823 <bitWidth>1</bitWidth>
34824 </field>
34825 <field>
34826 <name>EOSMP_MST</name>
34827 <description>EOSMP_MST</description>
34828 <bitOffset>1</bitOffset>
34829 <bitWidth>1</bitWidth>
34830 </field>
34831 <field>
34832 <name>EOC_MST</name>
34833 <description>EOC_MST</description>
34834 <bitOffset>2</bitOffset>
34835 <bitWidth>1</bitWidth>
34836 </field>
34837 <field>
34838 <name>EOS_MST</name>
34839 <description>EOS_MST</description>
34840 <bitOffset>3</bitOffset>
34841 <bitWidth>1</bitWidth>
34842 </field>
34843 <field>
34844 <name>OVR_MST</name>
34845 <description>OVR_MST</description>
34846 <bitOffset>4</bitOffset>
34847 <bitWidth>1</bitWidth>
34848 </field>
34849 <field>
34850 <name>JEOC_MST</name>
34851 <description>JEOC_MST</description>
34852 <bitOffset>5</bitOffset>
34853 <bitWidth>1</bitWidth>
34854 </field>
34855 <field>
34856 <name>JEOS_MST</name>
34857 <description>JEOS_MST</description>
34858 <bitOffset>6</bitOffset>
34859 <bitWidth>1</bitWidth>
34860 </field>
34861 <field>
34862 <name>AWD1_MST</name>
34863 <description>AWD1_MST</description>
34864 <bitOffset>7</bitOffset>
34865 <bitWidth>1</bitWidth>
34866 </field>
34867 <field>
34868 <name>AWD2_MST</name>
34869 <description>AWD2_MST</description>
34870 <bitOffset>8</bitOffset>
34871 <bitWidth>1</bitWidth>
34872 </field>
34873 <field>
34874 <name>AWD3_MST</name>
34875 <description>AWD3_MST</description>
34876 <bitOffset>9</bitOffset>
34877 <bitWidth>1</bitWidth>
34878 </field>
34879 <field>
34880 <name>JQOVF_MST</name>
34881 <description>JQOVF_MST</description>
34882 <bitOffset>10</bitOffset>
34883 <bitWidth>1</bitWidth>
34884 </field>
34885 <field>
34886 <name>ADRDY_SLV</name>
34887 <description>ADRDY_SLV</description>
34888 <bitOffset>16</bitOffset>
34889 <bitWidth>1</bitWidth>
34890 </field>
34891 <field>
34892 <name>EOSMP_SLV</name>
34893 <description>EOSMP_SLV</description>
34894 <bitOffset>17</bitOffset>
34895 <bitWidth>1</bitWidth>
34896 </field>
34897 <field>
34898 <name>EOC_SLV</name>
34899 <description>End of regular conversion of the slave
34900 ADC</description>
34901 <bitOffset>18</bitOffset>
34902 <bitWidth>1</bitWidth>
34903 </field>
34904 <field>
34905 <name>EOS_SLV</name>
34906 <description>End of regular sequence flag of the
34907 slave ADC</description>
34908 <bitOffset>19</bitOffset>
34909 <bitWidth>1</bitWidth>
34910 </field>
34911 <field>
34912 <name>OVR_SLV</name>
34913 <description>Overrun flag of the slave
34914 ADC</description>
34915 <bitOffset>20</bitOffset>
34916 <bitWidth>1</bitWidth>
34917 </field>
34918 <field>
34919 <name>JEOC_SLV</name>
34920 <description>End of injected conversion flag of the
34921 slave ADC</description>
34922 <bitOffset>21</bitOffset>
34923 <bitWidth>1</bitWidth>
34924 </field>
34925 <field>
34926 <name>JEOS_SLV</name>
34927 <description>End of injected sequence flag of the
34928 slave ADC</description>
34929 <bitOffset>22</bitOffset>
34930 <bitWidth>1</bitWidth>
34931 </field>
34932 <field>
34933 <name>AWD1_SLV</name>
34934 <description>Analog watchdog 1 flag of the slave
34935 ADC</description>
34936 <bitOffset>23</bitOffset>
34937 <bitWidth>1</bitWidth>
34938 </field>
34939 <field>
34940 <name>AWD2_SLV</name>
34941 <description>Analog watchdog 2 flag of the slave
34942 ADC</description>
34943 <bitOffset>24</bitOffset>
34944 <bitWidth>1</bitWidth>
34945 </field>
34946 <field>
34947 <name>AWD3_SLV</name>
34948 <description>Analog watchdog 3 flag of the slave
34949 ADC</description>
34950 <bitOffset>25</bitOffset>
34951 <bitWidth>1</bitWidth>
34952 </field>
34953 <field>
34954 <name>JQOVF_SLV</name>
34955 <description>Injected Context Queue Overflow flag of
34956 the slave ADC</description>
34957 <bitOffset>26</bitOffset>
34958 <bitWidth>1</bitWidth>
34959 </field>
34960 </fields>
34961 </register>
34962 <register>
34963 <name>CCR</name>
34964 <displayName>CCR</displayName>
34965 <description>ADC common control register</description>
34966 <addressOffset>0x8</addressOffset>
34967 <size>0x20</size>
34968 <access>read-write</access>
34969 <resetValue>0x00000000</resetValue>
34970 <fields>
34971 <field>
34972 <name>MULT</name>
34973 <description>Multi ADC mode selection</description>
34974 <bitOffset>0</bitOffset>
34975 <bitWidth>5</bitWidth>
34976 </field>
34977 <field>
34978 <name>DELAY</name>
34979 <description>Delay between 2 sampling
34980 phases</description>
34981 <bitOffset>8</bitOffset>
34982 <bitWidth>4</bitWidth>
34983 </field>
34984 <field>
34985 <name>DMACFG</name>
34986 <description>DMA configuration (for multi-ADC
34987 mode)</description>
34988 <bitOffset>13</bitOffset>
34989 <bitWidth>1</bitWidth>
34990 </field>
34991 <field>
34992 <name>MDMA</name>
34993 <description>Direct memory access mode for multi ADC
34994 mode</description>
34995 <bitOffset>14</bitOffset>
34996 <bitWidth>2</bitWidth>
34997 </field>
34998 <field>
34999 <name>CKMODE</name>
35000 <description>ADC clock mode</description>
35001 <bitOffset>16</bitOffset>
35002 <bitWidth>2</bitWidth>
35003 </field>
35004 <field>
35005 <name>VREFEN</name>
35006 <description>VREFINT enable</description>
35007 <bitOffset>22</bitOffset>
35008 <bitWidth>1</bitWidth>
35009 </field>
35010 <field>
35011 <name>TSEN</name>
35012 <description>Temperature sensor enable</description>
35013 <bitOffset>23</bitOffset>
35014 <bitWidth>1</bitWidth>
35015 </field>
35016 <field>
35017 <name>VBATEN</name>
35018 <description>VBAT enable</description>
35019 <bitOffset>24</bitOffset>
35020 <bitWidth>1</bitWidth>
35021 </field>
35022 </fields>
35023 </register>
35024 <register>
35025 <name>CDR</name>
35026 <displayName>CDR</displayName>
35027 <description>ADC common regular data register for dual
35028 and triple modes</description>
35029 <addressOffset>0xC</addressOffset>
35030 <size>0x20</size>
35031 <access>read-only</access>
35032 <resetValue>0x00000000</resetValue>
35033 <fields>
35034 <field>
35035 <name>RDATA_SLV</name>
35036 <description>Regular data of the slave
35037 ADC</description>
35038 <bitOffset>16</bitOffset>
35039 <bitWidth>16</bitWidth>
35040 </field>
35041 <field>
35042 <name>RDATA_MST</name>
35043 <description>Regular data of the master
35044 ADC</description>
35045 <bitOffset>0</bitOffset>
35046 <bitWidth>16</bitWidth>
35047 </field>
35048 </fields>
35049 </register>
35050 </registers>
35051 </peripheral>
35052 <peripheral derivedFrom="ADC1_2">
35053 <name>ADC3_4</name>
35054 <baseAddress>0x50000700</baseAddress>
35055 </peripheral>
35056 <peripheral>
35057 <name>SYSCFG_COMP_OPAMP</name>
35058 <description>System configuration controller _Comparator and
35059 Operational amplifier</description>
35060 <groupName>SYSCFG_COMP_OPAMP</groupName>
35061 <baseAddress>0x40010000</baseAddress>
35062 <addressBlock>
35063 <offset>0x0</offset>
35064 <size>0x400</size>
35065 <usage>registers</usage>
35066 </addressBlock>
35067 <interrupt>
35068 <name>COMP123</name>
35069 <description>COMP1 &amp; COMP2 &amp; COMP3 interrupts
35070 combined with EXTI Lines 21, 22 and 29
35071 interrupts</description>
35072 <value>64</value>
35073 </interrupt>
35074 <interrupt>
35075 <name>COMP456</name>
35076 <description>COMP4 &amp; COMP5 &amp; COMP6 interrupts
35077 combined with EXTI Lines 30, 31 and 32
35078 interrupts</description>
35079 <value>65</value>
35080 </interrupt>
35081 <interrupt>
35082 <name>COMP7</name>
35083 <description>COMP7 interrupt combined with EXTI Line 33
35084 interrupt</description>
35085 <value>66</value>
35086 </interrupt>
35087 <registers>
35088 <register>
35089 <name>SYSCFG_CFGR1</name>
35090 <displayName>SYSCFG_CFGR1</displayName>
35091 <description>configuration register 1</description>
35092 <addressOffset>0x0</addressOffset>
35093 <size>0x20</size>
35094 <access>read-write</access>
35095 <resetValue>0x00000000</resetValue>
35096 <fields>
35097 <field>
35098 <name>MEM_MODE</name>
35099 <description>Memory mapping selection
35100 bits</description>
35101 <bitOffset>0</bitOffset>
35102 <bitWidth>2</bitWidth>
35103 </field>
35104 <field>
35105 <name>USB_IT_RMP</name>
35106 <description>USB interrupt remap</description>
35107 <bitOffset>5</bitOffset>
35108 <bitWidth>1</bitWidth>
35109 </field>
35110 <field>
35111 <name>TIM1_ITR_RMP</name>
35112 <description>Timer 1 ITR3 selection</description>
35113 <bitOffset>6</bitOffset>
35114 <bitWidth>1</bitWidth>
35115 </field>
35116 <field>
35117 <name>DAC_TRIG_RMP</name>
35118 <description>DAC trigger remap (when TSEL =
35119 001)</description>
35120 <bitOffset>7</bitOffset>
35121 <bitWidth>1</bitWidth>
35122 </field>
35123 <field>
35124 <name>ADC24_DMA_RMP</name>
35125 <description>ADC24 DMA remapping bit</description>
35126 <bitOffset>8</bitOffset>
35127 <bitWidth>1</bitWidth>
35128 </field>
35129 <field>
35130 <name>TIM16_DMA_RMP</name>
35131 <description>TIM16 DMA request remapping
35132 bit</description>
35133 <bitOffset>11</bitOffset>
35134 <bitWidth>1</bitWidth>
35135 </field>
35136 <field>
35137 <name>TIM17_DMA_RMP</name>
35138 <description>TIM17 DMA request remapping
35139 bit</description>
35140 <bitOffset>12</bitOffset>
35141 <bitWidth>1</bitWidth>
35142 </field>
35143 <field>
35144 <name>TIM6_DAC1_DMA_RMP</name>
35145 <description>TIM6 and DAC1 DMA request remapping
35146 bit</description>
35147 <bitOffset>13</bitOffset>
35148 <bitWidth>1</bitWidth>
35149 </field>
35150 <field>
35151 <name>TIM7_DAC2_DMA_RMP</name>
35152 <description>TIM7 and DAC2 DMA request remapping
35153 bit</description>
35154 <bitOffset>14</bitOffset>
35155 <bitWidth>1</bitWidth>
35156 </field>
35157 <field>
35158 <name>I2C_PB6_FM</name>
35159 <description>Fast Mode Plus (FM+) driving capability
35160 activation bits.</description>
35161 <bitOffset>16</bitOffset>
35162 <bitWidth>1</bitWidth>
35163 </field>
35164 <field>
35165 <name>I2C_PB7_FM</name>
35166 <description>Fast Mode Plus (FM+) driving capability
35167 activation bits.</description>
35168 <bitOffset>17</bitOffset>
35169 <bitWidth>1</bitWidth>
35170 </field>
35171 <field>
35172 <name>I2C_PB8_FM</name>
35173 <description>Fast Mode Plus (FM+) driving capability
35174 activation bits.</description>
35175 <bitOffset>18</bitOffset>
35176 <bitWidth>1</bitWidth>
35177 </field>
35178 <field>
35179 <name>I2C_PB9_FM</name>
35180 <description>Fast Mode Plus (FM+) driving capability
35181 activation bits.</description>
35182 <bitOffset>19</bitOffset>
35183 <bitWidth>1</bitWidth>
35184 </field>
35185 <field>
35186 <name>I2C1_FM</name>
35187 <description>I2C1 Fast Mode Plus</description>
35188 <bitOffset>20</bitOffset>
35189 <bitWidth>1</bitWidth>
35190 </field>
35191 <field>
35192 <name>I2C2_FM</name>
35193 <description>I2C2 Fast Mode Plus</description>
35194 <bitOffset>21</bitOffset>
35195 <bitWidth>1</bitWidth>
35196 </field>
35197 <field>
35198 <name>ENCODER_MODE</name>
35199 <description>Encoder mode</description>
35200 <bitOffset>22</bitOffset>
35201 <bitWidth>2</bitWidth>
35202 </field>
35203 <field>
35204 <name>FPU_IT</name>
35205 <description>Interrupt enable bits from
35206 FPU</description>
35207 <bitOffset>26</bitOffset>
35208 <bitWidth>6</bitWidth>
35209 </field>
35210 </fields>
35211 </register>
35212 <register>
35213 <name>SYSCFG_EXTICR1</name>
35214 <displayName>SYSCFG_EXTICR1</displayName>
35215 <description>external interrupt configuration register
35216 1</description>
35217 <addressOffset>0x8</addressOffset>
35218 <size>0x20</size>
35219 <access>read-write</access>
35220 <resetValue>0x0000</resetValue>
35221 <fields>
35222 <field>
35223 <name>EXTI3</name>
35224 <description>EXTI 3 configuration bits</description>
35225 <bitOffset>12</bitOffset>
35226 <bitWidth>4</bitWidth>
35227 </field>
35228 <field>
35229 <name>EXTI2</name>
35230 <description>EXTI 2 configuration bits</description>
35231 <bitOffset>8</bitOffset>
35232 <bitWidth>4</bitWidth>
35233 </field>
35234 <field>
35235 <name>EXTI1</name>
35236 <description>EXTI 1 configuration bits</description>
35237 <bitOffset>4</bitOffset>
35238 <bitWidth>4</bitWidth>
35239 </field>
35240 <field>
35241 <name>EXTI0</name>
35242 <description>EXTI 0 configuration bits</description>
35243 <bitOffset>0</bitOffset>
35244 <bitWidth>4</bitWidth>
35245 </field>
35246 </fields>
35247 </register>
35248 <register>
35249 <name>SYSCFG_EXTICR2</name>
35250 <displayName>SYSCFG_EXTICR2</displayName>
35251 <description>external interrupt configuration register
35252 2</description>
35253 <addressOffset>0xC</addressOffset>
35254 <size>0x20</size>
35255 <access>read-write</access>
35256 <resetValue>0x0000</resetValue>
35257 <fields>
35258 <field>
35259 <name>EXTI7</name>
35260 <description>EXTI 7 configuration bits</description>
35261 <bitOffset>12</bitOffset>
35262 <bitWidth>4</bitWidth>
35263 </field>
35264 <field>
35265 <name>EXTI6</name>
35266 <description>EXTI 6 configuration bits</description>
35267 <bitOffset>8</bitOffset>
35268 <bitWidth>4</bitWidth>
35269 </field>
35270 <field>
35271 <name>EXTI5</name>
35272 <description>EXTI 5 configuration bits</description>
35273 <bitOffset>4</bitOffset>
35274 <bitWidth>4</bitWidth>
35275 </field>
35276 <field>
35277 <name>EXTI4</name>
35278 <description>EXTI 4 configuration bits</description>
35279 <bitOffset>0</bitOffset>
35280 <bitWidth>4</bitWidth>
35281 </field>
35282 </fields>
35283 </register>
35284 <register>
35285 <name>SYSCFG_EXTICR3</name>
35286 <displayName>SYSCFG_EXTICR3</displayName>
35287 <description>external interrupt configuration register
35288 3</description>
35289 <addressOffset>0x10</addressOffset>
35290 <size>0x20</size>
35291 <access>read-write</access>
35292 <resetValue>0x0000</resetValue>
35293 <fields>
35294 <field>
35295 <name>EXTI11</name>
35296 <description>EXTI 11 configuration bits</description>
35297 <bitOffset>12</bitOffset>
35298 <bitWidth>4</bitWidth>
35299 </field>
35300 <field>
35301 <name>EXTI10</name>
35302 <description>EXTI 10 configuration bits</description>
35303 <bitOffset>8</bitOffset>
35304 <bitWidth>4</bitWidth>
35305 </field>
35306 <field>
35307 <name>EXTI9</name>
35308 <description>EXTI 9 configuration bits</description>
35309 <bitOffset>4</bitOffset>
35310 <bitWidth>4</bitWidth>
35311 </field>
35312 <field>
35313 <name>EXTI8</name>
35314 <description>EXTI 8 configuration bits</description>
35315 <bitOffset>0</bitOffset>
35316 <bitWidth>4</bitWidth>
35317 </field>
35318 </fields>
35319 </register>
35320 <register>
35321 <name>SYSCFG_EXTICR4</name>
35322 <displayName>SYSCFG_EXTICR4</displayName>
35323 <description>external interrupt configuration register
35324 4</description>
35325 <addressOffset>0x14</addressOffset>
35326 <size>0x20</size>
35327 <access>read-write</access>
35328 <resetValue>0x0000</resetValue>
35329 <fields>
35330 <field>
35331 <name>EXTI15</name>
35332 <description>EXTI 15 configuration bits</description>
35333 <bitOffset>12</bitOffset>
35334 <bitWidth>4</bitWidth>
35335 </field>
35336 <field>
35337 <name>EXTI14</name>
35338 <description>EXTI 14 configuration bits</description>
35339 <bitOffset>8</bitOffset>
35340 <bitWidth>4</bitWidth>
35341 </field>
35342 <field>
35343 <name>EXTI13</name>
35344 <description>EXTI 13 configuration bits</description>
35345 <bitOffset>4</bitOffset>
35346 <bitWidth>4</bitWidth>
35347 </field>
35348 <field>
35349 <name>EXTI12</name>
35350 <description>EXTI 12 configuration bits</description>
35351 <bitOffset>0</bitOffset>
35352 <bitWidth>4</bitWidth>
35353 </field>
35354 </fields>
35355 </register>
35356 <register>
35357 <name>SYSCFG_CFGR2</name>
35358 <displayName>SYSCFG_CFGR2</displayName>
35359 <description>configuration register 2</description>
35360 <addressOffset>0x18</addressOffset>
35361 <size>0x20</size>
35362 <access>read-write</access>
35363 <resetValue>0x0000</resetValue>
35364 <fields>
35365 <field>
35366 <name>LOCUP_LOCK</name>
35367 <description>Cortex-M0 LOCKUP bit enable
35368 bit</description>
35369 <bitOffset>0</bitOffset>
35370 <bitWidth>1</bitWidth>
35371 </field>
35372 <field>
35373 <name>SRAM_PARITY_LOCK</name>
35374 <description>SRAM parity lock bit</description>
35375 <bitOffset>1</bitOffset>
35376 <bitWidth>1</bitWidth>
35377 </field>
35378 <field>
35379 <name>PVD_LOCK</name>
35380 <description>PVD lock enable bit</description>
35381 <bitOffset>2</bitOffset>
35382 <bitWidth>1</bitWidth>
35383 </field>
35384 <field>
35385 <name>BYP_ADD_PAR</name>
35386 <description>Bypass address bit 29 in parity
35387 calculation</description>
35388 <bitOffset>4</bitOffset>
35389 <bitWidth>1</bitWidth>
35390 </field>
35391 <field>
35392 <name>SRAM_PEF</name>
35393 <description>SRAM parity flag</description>
35394 <bitOffset>8</bitOffset>
35395 <bitWidth>1</bitWidth>
35396 </field>
35397 </fields>
35398 </register>
35399 <register>
35400 <name>SYSCFG_RCR</name>
35401 <displayName>SYSCFG_RCR</displayName>
35402 <description>CCM SRAM protection register</description>
35403 <addressOffset>0x4</addressOffset>
35404 <size>0x20</size>
35405 <access>read-write</access>
35406 <resetValue>0x0000</resetValue>
35407 <fields>
35408 <field>
35409 <name>PAGE0_WP</name>
35410 <description>CCM SRAM page write protection
35411 bit</description>
35412 <bitOffset>0</bitOffset>
35413 <bitWidth>1</bitWidth>
35414 </field>
35415 <field>
35416 <name>PAGE1_WP</name>
35417 <description>CCM SRAM page write protection
35418 bit</description>
35419 <bitOffset>1</bitOffset>
35420 <bitWidth>1</bitWidth>
35421 </field>
35422 <field>
35423 <name>PAGE2_WP</name>
35424 <description>CCM SRAM page write protection
35425 bit</description>
35426 <bitOffset>2</bitOffset>
35427 <bitWidth>1</bitWidth>
35428 </field>
35429 <field>
35430 <name>PAGE3_WP</name>
35431 <description>CCM SRAM page write protection
35432 bit</description>
35433 <bitOffset>3</bitOffset>
35434 <bitWidth>1</bitWidth>
35435 </field>
35436 <field>
35437 <name>PAGE4_WP</name>
35438 <description>CCM SRAM page write protection
35439 bit</description>
35440 <bitOffset>4</bitOffset>
35441 <bitWidth>1</bitWidth>
35442 </field>
35443 <field>
35444 <name>PAGE5_WP</name>
35445 <description>CCM SRAM page write protection
35446 bit</description>
35447 <bitOffset>5</bitOffset>
35448 <bitWidth>1</bitWidth>
35449 </field>
35450 <field>
35451 <name>PAGE6_WP</name>
35452 <description>CCM SRAM page write protection
35453 bit</description>
35454 <bitOffset>6</bitOffset>
35455 <bitWidth>1</bitWidth>
35456 </field>
35457 <field>
35458 <name>PAGE7_WP</name>
35459 <description>CCM SRAM page write protection
35460 bit</description>
35461 <bitOffset>7</bitOffset>
35462 <bitWidth>1</bitWidth>
35463 </field>
35464 </fields>
35465 </register>
35466 <register>
35467 <name>COMP1_CSR</name>
35468 <displayName>COMP1_CSR</displayName>
35469 <description>control and status register</description>
35470 <addressOffset>0x1C</addressOffset>
35471 <size>0x20</size>
35472 <resetValue>0x0000</resetValue>
35473 <fields>
35474 <field>
35475 <name>COMP1EN</name>
35476 <description>Comparator 1 enable</description>
35477 <bitOffset>0</bitOffset>
35478 <bitWidth>1</bitWidth>
35479 <access>read-write</access>
35480 </field>
35481 <field>
35482 <name>COMP1_INP_DAC</name>
35483 <description>COMP1_INP_DAC</description>
35484 <bitOffset>1</bitOffset>
35485 <bitWidth>1</bitWidth>
35486 <access>read-write</access>
35487 </field>
35488 <field>
35489 <name>COMP1MODE</name>
35490 <description>Comparator 1 mode</description>
35491 <bitOffset>2</bitOffset>
35492 <bitWidth>2</bitWidth>
35493 <access>read-write</access>
35494 </field>
35495 <field>
35496 <name>COMP1INSEL</name>
35497 <description>Comparator 1 inverting input
35498 selection</description>
35499 <bitOffset>4</bitOffset>
35500 <bitWidth>3</bitWidth>
35501 <access>read-write</access>
35502 </field>
35503 <field>
35504 <name>COMP1_OUT_SEL</name>
35505 <description>Comparator 1 output
35506 selection</description>
35507 <bitOffset>10</bitOffset>
35508 <bitWidth>4</bitWidth>
35509 <access>read-write</access>
35510 </field>
35511 <field>
35512 <name>COMP1POL</name>
35513 <description>Comparator 1 output
35514 polarity</description>
35515 <bitOffset>15</bitOffset>
35516 <bitWidth>1</bitWidth>
35517 <access>read-write</access>
35518 </field>
35519 <field>
35520 <name>COMP1HYST</name>
35521 <description>Comparator 1 hysteresis</description>
35522 <bitOffset>16</bitOffset>
35523 <bitWidth>2</bitWidth>
35524 <access>read-write</access>
35525 </field>
35526 <field>
35527 <name>COMP1_BLANKING</name>
35528 <description>Comparator 1 blanking
35529 source</description>
35530 <bitOffset>18</bitOffset>
35531 <bitWidth>3</bitWidth>
35532 <access>read-write</access>
35533 </field>
35534 <field>
35535 <name>COMP1OUT</name>
35536 <description>Comparator 1 output</description>
35537 <bitOffset>30</bitOffset>
35538 <bitWidth>1</bitWidth>
35539 <access>read-only</access>
35540 </field>
35541 <field>
35542 <name>COMP1LOCK</name>
35543 <description>Comparator 1 lock</description>
35544 <bitOffset>31</bitOffset>
35545 <bitWidth>1</bitWidth>
35546 <access>read-write</access>
35547 </field>
35548 </fields>
35549 </register>
35550 <register>
35551 <name>COMP2_CSR</name>
35552 <displayName>COMP2_CSR</displayName>
35553 <description>control and status register</description>
35554 <addressOffset>0x20</addressOffset>
35555 <size>0x20</size>
35556 <access>read-write</access>
35557 <resetValue>0x0000</resetValue>
35558 <fields>
35559 <field>
35560 <name>COMP2EN</name>
35561 <description>Comparator 2 enable</description>
35562 <bitOffset>0</bitOffset>
35563 <bitWidth>1</bitWidth>
35564 </field>
35565 <field>
35566 <name>COMP2MODE</name>
35567 <description>Comparator 2 mode</description>
35568 <bitOffset>2</bitOffset>
35569 <bitWidth>2</bitWidth>
35570 </field>
35571 <field>
35572 <name>COMP2INSEL</name>
35573 <description>Comparator 2 inverting input
35574 selection</description>
35575 <bitOffset>4</bitOffset>
35576 <bitWidth>3</bitWidth>
35577 </field>
35578 <field>
35579 <name>COMP2INPSEL</name>
35580 <description>Comparator 2 non inverted input
35581 selection</description>
35582 <bitOffset>7</bitOffset>
35583 <bitWidth>1</bitWidth>
35584 </field>
35585 <field>
35586 <name>COMP2INMSEL</name>
35587 <description>Comparator 1inverting input
35588 selection</description>
35589 <bitOffset>9</bitOffset>
35590 <bitWidth>1</bitWidth>
35591 </field>
35592 <field>
35593 <name>COMP2_OUT_SEL</name>
35594 <description>Comparator 2 output
35595 selection</description>
35596 <bitOffset>10</bitOffset>
35597 <bitWidth>4</bitWidth>
35598 </field>
35599 <field>
35600 <name>COMP2POL</name>
35601 <description>Comparator 2 output
35602 polarity</description>
35603 <bitOffset>15</bitOffset>
35604 <bitWidth>1</bitWidth>
35605 </field>
35606 <field>
35607 <name>COMP2HYST</name>
35608 <description>Comparator 2 hysteresis</description>
35609 <bitOffset>16</bitOffset>
35610 <bitWidth>2</bitWidth>
35611 </field>
35612 <field>
35613 <name>COMP2_BLANKING</name>
35614 <description>Comparator 2 blanking
35615 source</description>
35616 <bitOffset>18</bitOffset>
35617 <bitWidth>3</bitWidth>
35618 </field>
35619 <field>
35620 <name>COMP2LOCK</name>
35621 <description>Comparator 2 lock</description>
35622 <bitOffset>31</bitOffset>
35623 <bitWidth>1</bitWidth>
35624 </field>
35625 </fields>
35626 </register>
35627 <register>
35628 <name>COMP3_CSR</name>
35629 <displayName>COMP3_CSR</displayName>
35630 <description>control and status register</description>
35631 <addressOffset>0x24</addressOffset>
35632 <size>0x20</size>
35633 <resetValue>0x0000</resetValue>
35634 <fields>
35635 <field>
35636 <name>COMP3EN</name>
35637 <description>Comparator 3 enable</description>
35638 <bitOffset>0</bitOffset>
35639 <bitWidth>1</bitWidth>
35640 <access>read-write</access>
35641 </field>
35642 <field>
35643 <name>COMP3MODE</name>
35644 <description>Comparator 3 mode</description>
35645 <bitOffset>2</bitOffset>
35646 <bitWidth>2</bitWidth>
35647 <access>read-write</access>
35648 </field>
35649 <field>
35650 <name>COMP3INSEL</name>
35651 <description>Comparator 3 inverting input
35652 selection</description>
35653 <bitOffset>4</bitOffset>
35654 <bitWidth>3</bitWidth>
35655 <access>read-write</access>
35656 </field>
35657 <field>
35658 <name>COMP3INPSEL</name>
35659 <description>Comparator 3 non inverted input
35660 selection</description>
35661 <bitOffset>7</bitOffset>
35662 <bitWidth>1</bitWidth>
35663 <access>read-write</access>
35664 </field>
35665 <field>
35666 <name>COMP3_OUT_SEL</name>
35667 <description>Comparator 3 output
35668 selection</description>
35669 <bitOffset>10</bitOffset>
35670 <bitWidth>4</bitWidth>
35671 <access>read-write</access>
35672 </field>
35673 <field>
35674 <name>COMP3POL</name>
35675 <description>Comparator 3 output
35676 polarity</description>
35677 <bitOffset>15</bitOffset>
35678 <bitWidth>1</bitWidth>
35679 <access>read-write</access>
35680 </field>
35681 <field>
35682 <name>COMP3HYST</name>
35683 <description>Comparator 3 hysteresis</description>
35684 <bitOffset>16</bitOffset>
35685 <bitWidth>2</bitWidth>
35686 <access>read-write</access>
35687 </field>
35688 <field>
35689 <name>COMP3_BLANKING</name>
35690 <description>Comparator 3 blanking
35691 source</description>
35692 <bitOffset>18</bitOffset>
35693 <bitWidth>3</bitWidth>
35694 <access>read-write</access>
35695 </field>
35696 <field>
35697 <name>COMP3OUT</name>
35698 <description>Comparator 3 output</description>
35699 <bitOffset>30</bitOffset>
35700 <bitWidth>1</bitWidth>
35701 <access>read-only</access>
35702 </field>
35703 <field>
35704 <name>COMP3LOCK</name>
35705 <description>Comparator 3 lock</description>
35706 <bitOffset>31</bitOffset>
35707 <bitWidth>1</bitWidth>
35708 <access>read-write</access>
35709 </field>
35710 </fields>
35711 </register>
35712 <register>
35713 <name>COMP4_CSR</name>
35714 <displayName>COMP4_CSR</displayName>
35715 <description>control and status register</description>
35716 <addressOffset>0x28</addressOffset>
35717 <size>0x20</size>
35718 <resetValue>0x0000</resetValue>
35719 <fields>
35720 <field>
35721 <name>COMP4EN</name>
35722 <description>Comparator 4 enable</description>
35723 <bitOffset>0</bitOffset>
35724 <bitWidth>1</bitWidth>
35725 <access>read-write</access>
35726 </field>
35727 <field>
35728 <name>COMP4MODE</name>
35729 <description>Comparator 4 mode</description>
35730 <bitOffset>2</bitOffset>
35731 <bitWidth>2</bitWidth>
35732 <access>read-write</access>
35733 </field>
35734 <field>
35735 <name>COMP4INSEL</name>
35736 <description>Comparator 4 inverting input
35737 selection</description>
35738 <bitOffset>4</bitOffset>
35739 <bitWidth>3</bitWidth>
35740 <access>read-write</access>
35741 </field>
35742 <field>
35743 <name>COMP4INPSEL</name>
35744 <description>Comparator 4 non inverted input
35745 selection</description>
35746 <bitOffset>7</bitOffset>
35747 <bitWidth>1</bitWidth>
35748 <access>read-write</access>
35749 </field>
35750 <field>
35751 <name>COM4WINMODE</name>
35752 <description>Comparator 4 window mode</description>
35753 <bitOffset>9</bitOffset>
35754 <bitWidth>1</bitWidth>
35755 <access>read-write</access>
35756 </field>
35757 <field>
35758 <name>COMP4_OUT_SEL</name>
35759 <description>Comparator 4 output
35760 selection</description>
35761 <bitOffset>10</bitOffset>
35762 <bitWidth>4</bitWidth>
35763 <access>read-write</access>
35764 </field>
35765 <field>
35766 <name>COMP4POL</name>
35767 <description>Comparator 4 output
35768 polarity</description>
35769 <bitOffset>15</bitOffset>
35770 <bitWidth>1</bitWidth>
35771 <access>read-write</access>
35772 </field>
35773 <field>
35774 <name>COMP4HYST</name>
35775 <description>Comparator 4 hysteresis</description>
35776 <bitOffset>16</bitOffset>
35777 <bitWidth>2</bitWidth>
35778 <access>read-write</access>
35779 </field>
35780 <field>
35781 <name>COMP4_BLANKING</name>
35782 <description>Comparator 4 blanking
35783 source</description>
35784 <bitOffset>18</bitOffset>
35785 <bitWidth>3</bitWidth>
35786 <access>read-write</access>
35787 </field>
35788 <field>
35789 <name>COMP4OUT</name>
35790 <description>Comparator 4 output</description>
35791 <bitOffset>30</bitOffset>
35792 <bitWidth>1</bitWidth>
35793 <access>read-only</access>
35794 </field>
35795 <field>
35796 <name>COMP4LOCK</name>
35797 <description>Comparator 4 lock</description>
35798 <bitOffset>31</bitOffset>
35799 <bitWidth>1</bitWidth>
35800 <access>read-write</access>
35801 </field>
35802 </fields>
35803 </register>
35804 <register>
35805 <name>COMP5_CSR</name>
35806 <displayName>COMP5_CSR</displayName>
35807 <description>control and status register</description>
35808 <addressOffset>0x2C</addressOffset>
35809 <size>0x20</size>
35810 <resetValue>0x0000</resetValue>
35811 <fields>
35812 <field>
35813 <name>COMP5EN</name>
35814 <description>Comparator 5 enable</description>
35815 <bitOffset>0</bitOffset>
35816 <bitWidth>1</bitWidth>
35817 <access>read-write</access>
35818 </field>
35819 <field>
35820 <name>COMP5MODE</name>
35821 <description>Comparator 5 mode</description>
35822 <bitOffset>2</bitOffset>
35823 <bitWidth>2</bitWidth>
35824 <access>read-write</access>
35825 </field>
35826 <field>
35827 <name>COMP5INSEL</name>
35828 <description>Comparator 5 inverting input
35829 selection</description>
35830 <bitOffset>4</bitOffset>
35831 <bitWidth>3</bitWidth>
35832 <access>read-write</access>
35833 </field>
35834 <field>
35835 <name>COMP5INPSEL</name>
35836 <description>Comparator 5 non inverted input
35837 selection</description>
35838 <bitOffset>7</bitOffset>
35839 <bitWidth>1</bitWidth>
35840 <access>read-write</access>
35841 </field>
35842 <field>
35843 <name>COMP5_OUT_SEL</name>
35844 <description>Comparator 5 output
35845 selection</description>
35846 <bitOffset>10</bitOffset>
35847 <bitWidth>4</bitWidth>
35848 <access>read-write</access>
35849 </field>
35850 <field>
35851 <name>COMP5POL</name>
35852 <description>Comparator 5 output
35853 polarity</description>
35854 <bitOffset>15</bitOffset>
35855 <bitWidth>1</bitWidth>
35856 <access>read-write</access>
35857 </field>
35858 <field>
35859 <name>COMP5HYST</name>
35860 <description>Comparator 5 hysteresis</description>
35861 <bitOffset>16</bitOffset>
35862 <bitWidth>2</bitWidth>
35863 <access>read-write</access>
35864 </field>
35865 <field>
35866 <name>COMP5_BLANKING</name>
35867 <description>Comparator 5 blanking
35868 source</description>
35869 <bitOffset>18</bitOffset>
35870 <bitWidth>3</bitWidth>
35871 <access>read-write</access>
35872 </field>
35873 <field>
35874 <name>COMP5OUT</name>
35875 <description>Comparator51 output</description>
35876 <bitOffset>30</bitOffset>
35877 <bitWidth>1</bitWidth>
35878 <access>read-only</access>
35879 </field>
35880 <field>
35881 <name>COMP5LOCK</name>
35882 <description>Comparator 5 lock</description>
35883 <bitOffset>31</bitOffset>
35884 <bitWidth>1</bitWidth>
35885 <access>read-write</access>
35886 </field>
35887 </fields>
35888 </register>
35889 <register>
35890 <name>COMP6_CSR</name>
35891 <displayName>COMP6_CSR</displayName>
35892 <description>control and status register</description>
35893 <addressOffset>0x30</addressOffset>
35894 <size>0x20</size>
35895 <resetValue>0x0000</resetValue>
35896 <fields>
35897 <field>
35898 <name>COMP6EN</name>
35899 <description>Comparator 6 enable</description>
35900 <bitOffset>0</bitOffset>
35901 <bitWidth>1</bitWidth>
35902 <access>read-write</access>
35903 </field>
35904 <field>
35905 <name>COMP6MODE</name>
35906 <description>Comparator 6 mode</description>
35907 <bitOffset>2</bitOffset>
35908 <bitWidth>2</bitWidth>
35909 <access>read-write</access>
35910 </field>
35911 <field>
35912 <name>COMP6INSEL</name>
35913 <description>Comparator 6 inverting input
35914 selection</description>
35915 <bitOffset>4</bitOffset>
35916 <bitWidth>3</bitWidth>
35917 <access>read-write</access>
35918 </field>
35919 <field>
35920 <name>COMP6INPSEL</name>
35921 <description>Comparator 6 non inverted input
35922 selection</description>
35923 <bitOffset>7</bitOffset>
35924 <bitWidth>1</bitWidth>
35925 <access>read-write</access>
35926 </field>
35927 <field>
35928 <name>COM6WINMODE</name>
35929 <description>Comparator 6 window mode</description>
35930 <bitOffset>9</bitOffset>
35931 <bitWidth>1</bitWidth>
35932 <access>read-write</access>
35933 </field>
35934 <field>
35935 <name>COMP6_OUT_SEL</name>
35936 <description>Comparator 6 output
35937 selection</description>
35938 <bitOffset>10</bitOffset>
35939 <bitWidth>4</bitWidth>
35940 <access>read-write</access>
35941 </field>
35942 <field>
35943 <name>COMP6POL</name>
35944 <description>Comparator 6 output
35945 polarity</description>
35946 <bitOffset>15</bitOffset>
35947 <bitWidth>1</bitWidth>
35948 <access>read-write</access>
35949 </field>
35950 <field>
35951 <name>COMP6HYST</name>
35952 <description>Comparator 6 hysteresis</description>
35953 <bitOffset>16</bitOffset>
35954 <bitWidth>2</bitWidth>
35955 <access>read-write</access>
35956 </field>
35957 <field>
35958 <name>COMP6_BLANKING</name>
35959 <description>Comparator 6 blanking
35960 source</description>
35961 <bitOffset>18</bitOffset>
35962 <bitWidth>3</bitWidth>
35963 <access>read-write</access>
35964 </field>
35965 <field>
35966 <name>COMP6OUT</name>
35967 <description>Comparator 6 output</description>
35968 <bitOffset>30</bitOffset>
35969 <bitWidth>1</bitWidth>
35970 <access>read-only</access>
35971 </field>
35972 <field>
35973 <name>COMP6LOCK</name>
35974 <description>Comparator 6 lock</description>
35975 <bitOffset>31</bitOffset>
35976 <bitWidth>1</bitWidth>
35977 <access>read-write</access>
35978 </field>
35979 </fields>
35980 </register>
35981 <register>
35982 <name>COMP7_CSR</name>
35983 <displayName>COMP7_CSR</displayName>
35984 <description>control and status register</description>
35985 <addressOffset>0x34</addressOffset>
35986 <size>0x20</size>
35987 <resetValue>0x0000</resetValue>
35988 <fields>
35989 <field>
35990 <name>COMP7EN</name>
35991 <description>Comparator 7 enable</description>
35992 <bitOffset>0</bitOffset>
35993 <bitWidth>1</bitWidth>
35994 <access>read-write</access>
35995 </field>
35996 <field>
35997 <name>COMP7MODE</name>
35998 <description>Comparator 7 mode</description>
35999 <bitOffset>2</bitOffset>
36000 <bitWidth>2</bitWidth>
36001 <access>read-write</access>
36002 </field>
36003 <field>
36004 <name>COMP7INSEL</name>
36005 <description>Comparator 7 inverting input
36006 selection</description>
36007 <bitOffset>4</bitOffset>
36008 <bitWidth>3</bitWidth>
36009 <access>read-write</access>
36010 </field>
36011 <field>
36012 <name>COMP7INPSEL</name>
36013 <description>Comparator 7 non inverted input
36014 selection</description>
36015 <bitOffset>7</bitOffset>
36016 <bitWidth>1</bitWidth>
36017 <access>read-write</access>
36018 </field>
36019 <field>
36020 <name>COMP7_OUT_SEL</name>
36021 <description>Comparator 7 output
36022 selection</description>
36023 <bitOffset>10</bitOffset>
36024 <bitWidth>4</bitWidth>
36025 <access>read-write</access>
36026 </field>
36027 <field>
36028 <name>COMP7POL</name>
36029 <description>Comparator 7 output
36030 polarity</description>
36031 <bitOffset>15</bitOffset>
36032 <bitWidth>1</bitWidth>
36033 <access>read-write</access>
36034 </field>
36035 <field>
36036 <name>COMP7HYST</name>
36037 <description>Comparator 7 hysteresis</description>
36038 <bitOffset>16</bitOffset>
36039 <bitWidth>2</bitWidth>
36040 <access>read-write</access>
36041 </field>
36042 <field>
36043 <name>COMP7_BLANKING</name>
36044 <description>Comparator 7 blanking
36045 source</description>
36046 <bitOffset>18</bitOffset>
36047 <bitWidth>3</bitWidth>
36048 <access>read-write</access>
36049 </field>
36050 <field>
36051 <name>COMP7OUT</name>
36052 <description>Comparator 7 output</description>
36053 <bitOffset>30</bitOffset>
36054 <bitWidth>1</bitWidth>
36055 <access>read-only</access>
36056 </field>
36057 <field>
36058 <name>COMP7LOCK</name>
36059 <description>Comparator 7 lock</description>
36060 <bitOffset>31</bitOffset>
36061 <bitWidth>1</bitWidth>
36062 <access>read-write</access>
36063 </field>
36064 </fields>
36065 </register>
36066 <register>
36067 <name>OPAMP1_CSR</name>
36068 <displayName>OPAMP1_CSR</displayName>
36069 <description>control register</description>
36070 <addressOffset>0x38</addressOffset>
36071 <size>0x20</size>
36072 <resetValue>0x0000</resetValue>
36073 <fields>
36074 <field>
36075 <name>OPAMP1_EN</name>
36076 <description>OPAMP1 enable</description>
36077 <bitOffset>0</bitOffset>
36078 <bitWidth>1</bitWidth>
36079 <access>read-write</access>
36080 </field>
36081 <field>
36082 <name>FORCE_VP</name>
36083 <description>FORCE_VP</description>
36084 <bitOffset>1</bitOffset>
36085 <bitWidth>1</bitWidth>
36086 <access>read-write</access>
36087 </field>
36088 <field>
36089 <name>VP_SEL</name>
36090 <description>OPAMP1 Non inverting input
36091 selection</description>
36092 <bitOffset>2</bitOffset>
36093 <bitWidth>2</bitWidth>
36094 <access>read-write</access>
36095 </field>
36096 <field>
36097 <name>VM_SEL</name>
36098 <description>OPAMP1 inverting input
36099 selection</description>
36100 <bitOffset>5</bitOffset>
36101 <bitWidth>2</bitWidth>
36102 <access>read-write</access>
36103 </field>
36104 <field>
36105 <name>TCM_EN</name>
36106 <description>Timer controlled Mux mode
36107 enable</description>
36108 <bitOffset>7</bitOffset>
36109 <bitWidth>1</bitWidth>
36110 <access>read-write</access>
36111 </field>
36112 <field>
36113 <name>VMS_SEL</name>
36114 <description>OPAMP1 inverting input secondary
36115 selection</description>
36116 <bitOffset>8</bitOffset>
36117 <bitWidth>1</bitWidth>
36118 <access>read-write</access>
36119 </field>
36120 <field>
36121 <name>VPS_SEL</name>
36122 <description>OPAMP1 Non inverting input secondary
36123 selection</description>
36124 <bitOffset>9</bitOffset>
36125 <bitWidth>2</bitWidth>
36126 <access>read-write</access>
36127 </field>
36128 <field>
36129 <name>CALON</name>
36130 <description>Calibration mode enable</description>
36131 <bitOffset>11</bitOffset>
36132 <bitWidth>1</bitWidth>
36133 <access>read-write</access>
36134 </field>
36135 <field>
36136 <name>CALSEL</name>
36137 <description>Calibration selection</description>
36138 <bitOffset>12</bitOffset>
36139 <bitWidth>2</bitWidth>
36140 <access>read-write</access>
36141 </field>
36142 <field>
36143 <name>PGA_GAIN</name>
36144 <description>Gain in PGA mode</description>
36145 <bitOffset>14</bitOffset>
36146 <bitWidth>4</bitWidth>
36147 <access>read-write</access>
36148 </field>
36149 <field>
36150 <name>USER_TRIM</name>
36151 <description>User trimming enable</description>
36152 <bitOffset>18</bitOffset>
36153 <bitWidth>1</bitWidth>
36154 <access>read-write</access>
36155 </field>
36156 <field>
36157 <name>TRIMOFFSETP</name>
36158 <description>Offset trimming value
36159 (PMOS)</description>
36160 <bitOffset>19</bitOffset>
36161 <bitWidth>5</bitWidth>
36162 <access>read-write</access>
36163 </field>
36164 <field>
36165 <name>TRIMOFFSETN</name>
36166 <description>Offset trimming value
36167 (NMOS)</description>
36168 <bitOffset>24</bitOffset>
36169 <bitWidth>5</bitWidth>
36170 <access>read-write</access>
36171 </field>
36172 <field>
36173 <name>TSTREF</name>
36174 <description>TSTREF</description>
36175 <bitOffset>29</bitOffset>
36176 <bitWidth>1</bitWidth>
36177 <access>read-write</access>
36178 </field>
36179 <field>
36180 <name>OUTCAL</name>
36181 <description>OPAMP 1 ouput status flag</description>
36182 <bitOffset>30</bitOffset>
36183 <bitWidth>1</bitWidth>
36184 <access>read-only</access>
36185 </field>
36186 <field>
36187 <name>LOCK</name>
36188 <description>OPAMP 1 lock</description>
36189 <bitOffset>31</bitOffset>
36190 <bitWidth>1</bitWidth>
36191 <access>read-write</access>
36192 </field>
36193 </fields>
36194 </register>
36195 <register>
36196 <name>OPAMP2_CSR</name>
36197 <displayName>OPAMP2_CSR</displayName>
36198 <description>control register</description>
36199 <addressOffset>0x3C</addressOffset>
36200 <size>0x20</size>
36201 <resetValue>0x0000</resetValue>
36202 <fields>
36203 <field>
36204 <name>OPAMP2EN</name>
36205 <description>OPAMP2 enable</description>
36206 <bitOffset>0</bitOffset>
36207 <bitWidth>1</bitWidth>
36208 <access>read-write</access>
36209 </field>
36210 <field>
36211 <name>FORCE_VP</name>
36212 <description>FORCE_VP</description>
36213 <bitOffset>1</bitOffset>
36214 <bitWidth>1</bitWidth>
36215 <access>read-write</access>
36216 </field>
36217 <field>
36218 <name>VP_SEL</name>
36219 <description>OPAMP2 Non inverting input
36220 selection</description>
36221 <bitOffset>2</bitOffset>
36222 <bitWidth>2</bitWidth>
36223 <access>read-write</access>
36224 </field>
36225 <field>
36226 <name>VM_SEL</name>
36227 <description>OPAMP2 inverting input
36228 selection</description>
36229 <bitOffset>5</bitOffset>
36230 <bitWidth>2</bitWidth>
36231 <access>read-write</access>
36232 </field>
36233 <field>
36234 <name>TCM_EN</name>
36235 <description>Timer controlled Mux mode
36236 enable</description>
36237 <bitOffset>7</bitOffset>
36238 <bitWidth>1</bitWidth>
36239 <access>read-write</access>
36240 </field>
36241 <field>
36242 <name>VMS_SEL</name>
36243 <description>OPAMP2 inverting input secondary
36244 selection</description>
36245 <bitOffset>8</bitOffset>
36246 <bitWidth>1</bitWidth>
36247 <access>read-write</access>
36248 </field>
36249 <field>
36250 <name>VPS_SEL</name>
36251 <description>OPAMP2 Non inverting input secondary
36252 selection</description>
36253 <bitOffset>9</bitOffset>
36254 <bitWidth>2</bitWidth>
36255 <access>read-write</access>
36256 </field>
36257 <field>
36258 <name>CALON</name>
36259 <description>Calibration mode enable</description>
36260 <bitOffset>11</bitOffset>
36261 <bitWidth>1</bitWidth>
36262 <access>read-write</access>
36263 </field>
36264 <field>
36265 <name>CAL_SEL</name>
36266 <description>Calibration selection</description>
36267 <bitOffset>12</bitOffset>
36268 <bitWidth>2</bitWidth>
36269 <access>read-write</access>
36270 </field>
36271 <field>
36272 <name>PGA_GAIN</name>
36273 <description>Gain in PGA mode</description>
36274 <bitOffset>14</bitOffset>
36275 <bitWidth>4</bitWidth>
36276 <access>read-write</access>
36277 </field>
36278 <field>
36279 <name>USER_TRIM</name>
36280 <description>User trimming enable</description>
36281 <bitOffset>18</bitOffset>
36282 <bitWidth>1</bitWidth>
36283 <access>read-write</access>
36284 </field>
36285 <field>
36286 <name>TRIMOFFSETP</name>
36287 <description>Offset trimming value
36288 (PMOS)</description>
36289 <bitOffset>19</bitOffset>
36290 <bitWidth>5</bitWidth>
36291 <access>read-write</access>
36292 </field>
36293 <field>
36294 <name>TRIMOFFSETN</name>
36295 <description>Offset trimming value
36296 (NMOS)</description>
36297 <bitOffset>24</bitOffset>
36298 <bitWidth>5</bitWidth>
36299 <access>read-write</access>
36300 </field>
36301 <field>
36302 <name>TSTREF</name>
36303 <description>TSTREF</description>
36304 <bitOffset>29</bitOffset>
36305 <bitWidth>1</bitWidth>
36306 <access>read-write</access>
36307 </field>
36308 <field>
36309 <name>OUTCAL</name>
36310 <description>OPAMP 2 ouput status flag</description>
36311 <bitOffset>30</bitOffset>
36312 <bitWidth>1</bitWidth>
36313 <access>read-only</access>
36314 </field>
36315 <field>
36316 <name>LOCK</name>
36317 <description>OPAMP 2 lock</description>
36318 <bitOffset>31</bitOffset>
36319 <bitWidth>1</bitWidth>
36320 <access>read-write</access>
36321 </field>
36322 </fields>
36323 </register>
36324 <register>
36325 <name>OPAMP3_CSR</name>
36326 <displayName>OPAMP3_CSR</displayName>
36327 <description>control register</description>
36328 <addressOffset>0x40</addressOffset>
36329 <size>0x20</size>
36330 <resetValue>0x0000</resetValue>
36331 <fields>
36332 <field>
36333 <name>OPAMP3EN</name>
36334 <description>OPAMP3 enable</description>
36335 <bitOffset>0</bitOffset>
36336 <bitWidth>1</bitWidth>
36337 <access>read-write</access>
36338 </field>
36339 <field>
36340 <name>FORCE_VP</name>
36341 <description>FORCE_VP</description>
36342 <bitOffset>1</bitOffset>
36343 <bitWidth>1</bitWidth>
36344 <access>read-write</access>
36345 </field>
36346 <field>
36347 <name>VP_SEL</name>
36348 <description>OPAMP3 Non inverting input
36349 selection</description>
36350 <bitOffset>2</bitOffset>
36351 <bitWidth>2</bitWidth>
36352 <access>read-write</access>
36353 </field>
36354 <field>
36355 <name>VM_SEL</name>
36356 <description>OPAMP3 inverting input
36357 selection</description>
36358 <bitOffset>5</bitOffset>
36359 <bitWidth>2</bitWidth>
36360 <access>read-write</access>
36361 </field>
36362 <field>
36363 <name>TCM_EN</name>
36364 <description>Timer controlled Mux mode
36365 enable</description>
36366 <bitOffset>7</bitOffset>
36367 <bitWidth>1</bitWidth>
36368 <access>read-write</access>
36369 </field>
36370 <field>
36371 <name>VMS_SEL</name>
36372 <description>OPAMP3 inverting input secondary
36373 selection</description>
36374 <bitOffset>8</bitOffset>
36375 <bitWidth>1</bitWidth>
36376 <access>read-write</access>
36377 </field>
36378 <field>
36379 <name>VPS_SEL</name>
36380 <description>OPAMP3 Non inverting input secondary
36381 selection</description>
36382 <bitOffset>9</bitOffset>
36383 <bitWidth>2</bitWidth>
36384 <access>read-write</access>
36385 </field>
36386 <field>
36387 <name>CALON</name>
36388 <description>Calibration mode enable</description>
36389 <bitOffset>11</bitOffset>
36390 <bitWidth>1</bitWidth>
36391 <access>read-write</access>
36392 </field>
36393 <field>
36394 <name>CALSEL</name>
36395 <description>Calibration selection</description>
36396 <bitOffset>12</bitOffset>
36397 <bitWidth>2</bitWidth>
36398 <access>read-write</access>
36399 </field>
36400 <field>
36401 <name>PGA_GAIN</name>
36402 <description>Gain in PGA mode</description>
36403 <bitOffset>14</bitOffset>
36404 <bitWidth>4</bitWidth>
36405 <access>read-write</access>
36406 </field>
36407 <field>
36408 <name>USER_TRIM</name>
36409 <description>User trimming enable</description>
36410 <bitOffset>18</bitOffset>
36411 <bitWidth>1</bitWidth>
36412 <access>read-write</access>
36413 </field>
36414 <field>
36415 <name>TRIMOFFSETP</name>
36416 <description>Offset trimming value
36417 (PMOS)</description>
36418 <bitOffset>19</bitOffset>
36419 <bitWidth>5</bitWidth>
36420 <access>read-write</access>
36421 </field>
36422 <field>
36423 <name>TRIMOFFSETN</name>
36424 <description>Offset trimming value
36425 (NMOS)</description>
36426 <bitOffset>24</bitOffset>
36427 <bitWidth>5</bitWidth>
36428 <access>read-write</access>
36429 </field>
36430 <field>
36431 <name>TSTREF</name>
36432 <description>TSTREF</description>
36433 <bitOffset>29</bitOffset>
36434 <bitWidth>1</bitWidth>
36435 <access>read-write</access>
36436 </field>
36437 <field>
36438 <name>OUTCAL</name>
36439 <description>OPAMP 3 ouput status flag</description>
36440 <bitOffset>30</bitOffset>
36441 <bitWidth>1</bitWidth>
36442 <access>read-only</access>
36443 </field>
36444 <field>
36445 <name>LOCK</name>
36446 <description>OPAMP 3 lock</description>
36447 <bitOffset>31</bitOffset>
36448 <bitWidth>1</bitWidth>
36449 <access>read-write</access>
36450 </field>
36451 </fields>
36452 </register>
36453 <register>
36454 <name>OPAMP4_CSR</name>
36455 <displayName>OPAMP4_CSR</displayName>
36456 <description>control register</description>
36457 <addressOffset>0x44</addressOffset>
36458 <size>0x20</size>
36459 <resetValue>0x0000</resetValue>
36460 <fields>
36461 <field>
36462 <name>OPAMP4EN</name>
36463 <description>OPAMP4 enable</description>
36464 <bitOffset>0</bitOffset>
36465 <bitWidth>1</bitWidth>
36466 <access>read-write</access>
36467 </field>
36468 <field>
36469 <name>FORCE_VP</name>
36470 <description>FORCE_VP</description>
36471 <bitOffset>1</bitOffset>
36472 <bitWidth>1</bitWidth>
36473 <access>read-write</access>
36474 </field>
36475 <field>
36476 <name>VP_SEL</name>
36477 <description>OPAMP4 Non inverting input
36478 selection</description>
36479 <bitOffset>2</bitOffset>
36480 <bitWidth>2</bitWidth>
36481 <access>read-write</access>
36482 </field>
36483 <field>
36484 <name>VM_SEL</name>
36485 <description>OPAMP4 inverting input
36486 selection</description>
36487 <bitOffset>5</bitOffset>
36488 <bitWidth>2</bitWidth>
36489 <access>read-write</access>
36490 </field>
36491 <field>
36492 <name>TCM_EN</name>
36493 <description>Timer controlled Mux mode
36494 enable</description>
36495 <bitOffset>7</bitOffset>
36496 <bitWidth>1</bitWidth>
36497 <access>read-write</access>
36498 </field>
36499 <field>
36500 <name>VMS_SEL</name>
36501 <description>OPAMP4 inverting input secondary
36502 selection</description>
36503 <bitOffset>8</bitOffset>
36504 <bitWidth>1</bitWidth>
36505 <access>read-write</access>
36506 </field>
36507 <field>
36508 <name>VPS_SEL</name>
36509 <description>OPAMP4 Non inverting input secondary
36510 selection</description>
36511 <bitOffset>9</bitOffset>
36512 <bitWidth>2</bitWidth>
36513 <access>read-write</access>
36514 </field>
36515 <field>
36516 <name>CALON</name>
36517 <description>Calibration mode enable</description>
36518 <bitOffset>11</bitOffset>
36519 <bitWidth>1</bitWidth>
36520 <access>read-write</access>
36521 </field>
36522 <field>
36523 <name>CALSEL</name>
36524 <description>Calibration selection</description>
36525 <bitOffset>12</bitOffset>
36526 <bitWidth>2</bitWidth>
36527 <access>read-write</access>
36528 </field>
36529 <field>
36530 <name>PGA_GAIN</name>
36531 <description>Gain in PGA mode</description>
36532 <bitOffset>14</bitOffset>
36533 <bitWidth>4</bitWidth>
36534 <access>read-write</access>
36535 </field>
36536 <field>
36537 <name>USER_TRIM</name>
36538 <description>User trimming enable</description>
36539 <bitOffset>18</bitOffset>
36540 <bitWidth>1</bitWidth>
36541 <access>read-write</access>
36542 </field>
36543 <field>
36544 <name>TRIMOFFSETP</name>
36545 <description>Offset trimming value
36546 (PMOS)</description>
36547 <bitOffset>19</bitOffset>
36548 <bitWidth>5</bitWidth>
36549 <access>read-write</access>
36550 </field>
36551 <field>
36552 <name>TRIMOFFSETN</name>
36553 <description>Offset trimming value
36554 (NMOS)</description>
36555 <bitOffset>24</bitOffset>
36556 <bitWidth>5</bitWidth>
36557 <access>read-write</access>
36558 </field>
36559 <field>
36560 <name>TSTREF</name>
36561 <description>TSTREF</description>
36562 <bitOffset>29</bitOffset>
36563 <bitWidth>1</bitWidth>
36564 <access>read-write</access>
36565 </field>
36566 <field>
36567 <name>OUTCAL</name>
36568 <description>OPAMP 4 ouput status flag</description>
36569 <bitOffset>30</bitOffset>
36570 <bitWidth>1</bitWidth>
36571 <access>read-only</access>
36572 </field>
36573 <field>
36574 <name>LOCK</name>
36575 <description>OPAMP 4 lock</description>
36576 <bitOffset>31</bitOffset>
36577 <bitWidth>1</bitWidth>
36578 <access>read-write</access>
36579 </field>
36580 </fields>
36581 </register>
36582 </registers>
36583 </peripheral>
36584 <peripheral>
36585 <name>FMC</name>
36586 <description>Flexible memory controller</description>
36587 <groupName>FMC</groupName>
36588 <baseAddress>0xA0000400</baseAddress>
36589 <addressBlock>
36590 <offset>0x0</offset>
36591 <size>0xC00</size>
36592 <usage>registers</usage>
36593 </addressBlock>
36594 <interrupt>
36595 <name>FMC</name>
36596 <description>FSMC global interrupt</description>
36597 <value>48</value>
36598 </interrupt>
36599 <registers>
36600 <register>
36601 <name>BCR1</name>
36602 <displayName>BCR1</displayName>
36603 <description>SRAM/NOR-Flash chip-select control register
36604 1</description>
36605 <addressOffset>0x0</addressOffset>
36606 <size>0x20</size>
36607 <access>read-write</access>
36608 <resetValue>0x000030D0</resetValue>
36609 <fields>
36610 <field>
36611 <name>CCLKEN</name>
36612 <description>CCLKEN</description>
36613 <bitOffset>20</bitOffset>
36614 <bitWidth>1</bitWidth>
36615 </field>
36616 <field>
36617 <name>CBURSTRW</name>
36618 <description>CBURSTRW</description>
36619 <bitOffset>19</bitOffset>
36620 <bitWidth>1</bitWidth>
36621 </field>
36622 <field>
36623 <name>ASYNCWAIT</name>
36624 <description>ASYNCWAIT</description>
36625 <bitOffset>15</bitOffset>
36626 <bitWidth>1</bitWidth>
36627 </field>
36628 <field>
36629 <name>EXTMOD</name>
36630 <description>EXTMOD</description>
36631 <bitOffset>14</bitOffset>
36632 <bitWidth>1</bitWidth>
36633 </field>
36634 <field>
36635 <name>WAITEN</name>
36636 <description>WAITEN</description>
36637 <bitOffset>13</bitOffset>
36638 <bitWidth>1</bitWidth>
36639 </field>
36640 <field>
36641 <name>WREN</name>
36642 <description>WREN</description>
36643 <bitOffset>12</bitOffset>
36644 <bitWidth>1</bitWidth>
36645 </field>
36646 <field>
36647 <name>WAITCFG</name>
36648 <description>WAITCFG</description>
36649 <bitOffset>11</bitOffset>
36650 <bitWidth>1</bitWidth>
36651 </field>
36652 <field>
36653 <name>WAITPOL</name>
36654 <description>WAITPOL</description>
36655 <bitOffset>9</bitOffset>
36656 <bitWidth>1</bitWidth>
36657 </field>
36658 <field>
36659 <name>BURSTEN</name>
36660 <description>BURSTEN</description>
36661 <bitOffset>8</bitOffset>
36662 <bitWidth>1</bitWidth>
36663 </field>
36664 <field>
36665 <name>FACCEN</name>
36666 <description>FACCEN</description>
36667 <bitOffset>6</bitOffset>
36668 <bitWidth>1</bitWidth>
36669 </field>
36670 <field>
36671 <name>MWID</name>
36672 <description>MWID</description>
36673 <bitOffset>4</bitOffset>
36674 <bitWidth>2</bitWidth>
36675 </field>
36676 <field>
36677 <name>MTYP</name>
36678 <description>MTYP</description>
36679 <bitOffset>2</bitOffset>
36680 <bitWidth>2</bitWidth>
36681 </field>
36682 <field>
36683 <name>MUXEN</name>
36684 <description>MUXEN</description>
36685 <bitOffset>1</bitOffset>
36686 <bitWidth>1</bitWidth>
36687 </field>
36688 <field>
36689 <name>MBKEN</name>
36690 <description>MBKEN</description>
36691 <bitOffset>0</bitOffset>
36692 <bitWidth>1</bitWidth>
36693 </field>
36694 </fields>
36695 </register>
36696 <register>
36697 <name>BTR1</name>
36698 <displayName>BTR1</displayName>
36699 <description>SRAM/NOR-Flash chip-select timing register
36700 1</description>
36701 <addressOffset>0x4</addressOffset>
36702 <size>0x20</size>
36703 <access>read-write</access>
36704 <resetValue>0xFFFFFFFF</resetValue>
36705 <fields>
36706 <field>
36707 <name>ACCMOD</name>
36708 <description>ACCMOD</description>
36709 <bitOffset>28</bitOffset>
36710 <bitWidth>2</bitWidth>
36711 </field>
36712 <field>
36713 <name>DATLAT</name>
36714 <description>DATLAT</description>
36715 <bitOffset>24</bitOffset>
36716 <bitWidth>4</bitWidth>
36717 </field>
36718 <field>
36719 <name>CLKDIV</name>
36720 <description>CLKDIV</description>
36721 <bitOffset>20</bitOffset>
36722 <bitWidth>4</bitWidth>
36723 </field>
36724 <field>
36725 <name>BUSTURN</name>
36726 <description>BUSTURN</description>
36727 <bitOffset>16</bitOffset>
36728 <bitWidth>4</bitWidth>
36729 </field>
36730 <field>
36731 <name>DATAST</name>
36732 <description>DATAST</description>
36733 <bitOffset>8</bitOffset>
36734 <bitWidth>8</bitWidth>
36735 </field>
36736 <field>
36737 <name>ADDHLD</name>
36738 <description>ADDHLD</description>
36739 <bitOffset>4</bitOffset>
36740 <bitWidth>4</bitWidth>
36741 </field>
36742 <field>
36743 <name>ADDSET</name>
36744 <description>ADDSET</description>
36745 <bitOffset>0</bitOffset>
36746 <bitWidth>4</bitWidth>
36747 </field>
36748 </fields>
36749 </register>
36750 <register>
36751 <name>BCR2</name>
36752 <displayName>BCR2</displayName>
36753 <description>SRAM/NOR-Flash chip-select control register
36754 2</description>
36755 <addressOffset>0x8</addressOffset>
36756 <size>0x20</size>
36757 <access>read-write</access>
36758 <resetValue>0x000030D0</resetValue>
36759 <fields>
36760 <field>
36761 <name>CBURSTRW</name>
36762 <description>CBURSTRW</description>
36763 <bitOffset>19</bitOffset>
36764 <bitWidth>1</bitWidth>
36765 </field>
36766 <field>
36767 <name>ASYNCWAIT</name>
36768 <description>ASYNCWAIT</description>
36769 <bitOffset>15</bitOffset>
36770 <bitWidth>1</bitWidth>
36771 </field>
36772 <field>
36773 <name>EXTMOD</name>
36774 <description>EXTMOD</description>
36775 <bitOffset>14</bitOffset>
36776 <bitWidth>1</bitWidth>
36777 </field>
36778 <field>
36779 <name>WAITEN</name>
36780 <description>WAITEN</description>
36781 <bitOffset>13</bitOffset>
36782 <bitWidth>1</bitWidth>
36783 </field>
36784 <field>
36785 <name>WREN</name>
36786 <description>WREN</description>
36787 <bitOffset>12</bitOffset>
36788 <bitWidth>1</bitWidth>
36789 </field>
36790 <field>
36791 <name>WAITCFG</name>
36792 <description>WAITCFG</description>
36793 <bitOffset>11</bitOffset>
36794 <bitWidth>1</bitWidth>
36795 </field>
36796 <field>
36797 <name>WRAPMOD</name>
36798 <description>WRAPMOD</description>
36799 <bitOffset>10</bitOffset>
36800 <bitWidth>1</bitWidth>
36801 </field>
36802 <field>
36803 <name>WAITPOL</name>
36804 <description>WAITPOL</description>
36805 <bitOffset>9</bitOffset>
36806 <bitWidth>1</bitWidth>
36807 </field>
36808 <field>
36809 <name>BURSTEN</name>
36810 <description>BURSTEN</description>
36811 <bitOffset>8</bitOffset>
36812 <bitWidth>1</bitWidth>
36813 </field>
36814 <field>
36815 <name>FACCEN</name>
36816 <description>FACCEN</description>
36817 <bitOffset>6</bitOffset>
36818 <bitWidth>1</bitWidth>
36819 </field>
36820 <field>
36821 <name>MWID</name>
36822 <description>MWID</description>
36823 <bitOffset>4</bitOffset>
36824 <bitWidth>2</bitWidth>
36825 </field>
36826 <field>
36827 <name>MTYP</name>
36828 <description>MTYP</description>
36829 <bitOffset>2</bitOffset>
36830 <bitWidth>2</bitWidth>
36831 </field>
36832 <field>
36833 <name>MUXEN</name>
36834 <description>MUXEN</description>
36835 <bitOffset>1</bitOffset>
36836 <bitWidth>1</bitWidth>
36837 </field>
36838 <field>
36839 <name>MBKEN</name>
36840 <description>MBKEN</description>
36841 <bitOffset>0</bitOffset>
36842 <bitWidth>1</bitWidth>
36843 </field>
36844 </fields>
36845 </register>
36846 <register>
36847 <name>BTR2</name>
36848 <displayName>BTR2</displayName>
36849 <description>SRAM/NOR-Flash chip-select timing register
36850 2</description>
36851 <addressOffset>0xC</addressOffset>
36852 <size>0x20</size>
36853 <access>read-write</access>
36854 <resetValue>0xFFFFFFFF</resetValue>
36855 <fields>
36856 <field>
36857 <name>ACCMOD</name>
36858 <description>ACCMOD</description>
36859 <bitOffset>28</bitOffset>
36860 <bitWidth>2</bitWidth>
36861 </field>
36862 <field>
36863 <name>DATLAT</name>
36864 <description>DATLAT</description>
36865 <bitOffset>24</bitOffset>
36866 <bitWidth>4</bitWidth>
36867 </field>
36868 <field>
36869 <name>CLKDIV</name>
36870 <description>CLKDIV</description>
36871 <bitOffset>20</bitOffset>
36872 <bitWidth>4</bitWidth>
36873 </field>
36874 <field>
36875 <name>BUSTURN</name>
36876 <description>BUSTURN</description>
36877 <bitOffset>16</bitOffset>
36878 <bitWidth>4</bitWidth>
36879 </field>
36880 <field>
36881 <name>DATAST</name>
36882 <description>DATAST</description>
36883 <bitOffset>8</bitOffset>
36884 <bitWidth>8</bitWidth>
36885 </field>
36886 <field>
36887 <name>ADDHLD</name>
36888 <description>ADDHLD</description>
36889 <bitOffset>4</bitOffset>
36890 <bitWidth>4</bitWidth>
36891 </field>
36892 <field>
36893 <name>ADDSET</name>
36894 <description>ADDSET</description>
36895 <bitOffset>0</bitOffset>
36896 <bitWidth>4</bitWidth>
36897 </field>
36898 </fields>
36899 </register>
36900 <register>
36901 <name>BCR3</name>
36902 <displayName>BCR3</displayName>
36903 <description>SRAM/NOR-Flash chip-select control register
36904 3</description>
36905 <addressOffset>0x10</addressOffset>
36906 <size>0x20</size>
36907 <access>read-write</access>
36908 <resetValue>0x000030D0</resetValue>
36909 <fields>
36910 <field>
36911 <name>CBURSTRW</name>
36912 <description>CBURSTRW</description>
36913 <bitOffset>19</bitOffset>
36914 <bitWidth>1</bitWidth>
36915 </field>
36916 <field>
36917 <name>ASYNCWAIT</name>
36918 <description>ASYNCWAIT</description>
36919 <bitOffset>15</bitOffset>
36920 <bitWidth>1</bitWidth>
36921 </field>
36922 <field>
36923 <name>EXTMOD</name>
36924 <description>EXTMOD</description>
36925 <bitOffset>14</bitOffset>
36926 <bitWidth>1</bitWidth>
36927 </field>
36928 <field>
36929 <name>WAITEN</name>
36930 <description>WAITEN</description>
36931 <bitOffset>13</bitOffset>
36932 <bitWidth>1</bitWidth>
36933 </field>
36934 <field>
36935 <name>WREN</name>
36936 <description>WREN</description>
36937 <bitOffset>12</bitOffset>
36938 <bitWidth>1</bitWidth>
36939 </field>
36940 <field>
36941 <name>WAITCFG</name>
36942 <description>WAITCFG</description>
36943 <bitOffset>11</bitOffset>
36944 <bitWidth>1</bitWidth>
36945 </field>
36946 <field>
36947 <name>WRAPMOD</name>
36948 <description>WRAPMOD</description>
36949 <bitOffset>10</bitOffset>
36950 <bitWidth>1</bitWidth>
36951 </field>
36952 <field>
36953 <name>WAITPOL</name>
36954 <description>WAITPOL</description>
36955 <bitOffset>9</bitOffset>
36956 <bitWidth>1</bitWidth>
36957 </field>
36958 <field>
36959 <name>BURSTEN</name>
36960 <description>BURSTEN</description>
36961 <bitOffset>8</bitOffset>
36962 <bitWidth>1</bitWidth>
36963 </field>
36964 <field>
36965 <name>FACCEN</name>
36966 <description>FACCEN</description>
36967 <bitOffset>6</bitOffset>
36968 <bitWidth>1</bitWidth>
36969 </field>
36970 <field>
36971 <name>MWID</name>
36972 <description>MWID</description>
36973 <bitOffset>4</bitOffset>
36974 <bitWidth>2</bitWidth>
36975 </field>
36976 <field>
36977 <name>MTYP</name>
36978 <description>MTYP</description>
36979 <bitOffset>2</bitOffset>
36980 <bitWidth>2</bitWidth>
36981 </field>
36982 <field>
36983 <name>MUXEN</name>
36984 <description>MUXEN</description>
36985 <bitOffset>1</bitOffset>
36986 <bitWidth>1</bitWidth>
36987 </field>
36988 <field>
36989 <name>MBKEN</name>
36990 <description>MBKEN</description>
36991 <bitOffset>0</bitOffset>
36992 <bitWidth>1</bitWidth>
36993 </field>
36994 </fields>
36995 </register>
36996 <register>
36997 <name>BTR3</name>
36998 <displayName>BTR3</displayName>
36999 <description>SRAM/NOR-Flash chip-select timing register
37000 3</description>
37001 <addressOffset>0x14</addressOffset>
37002 <size>0x20</size>
37003 <access>read-write</access>
37004 <resetValue>0xFFFFFFFF</resetValue>
37005 <fields>
37006 <field>
37007 <name>ACCMOD</name>
37008 <description>ACCMOD</description>
37009 <bitOffset>28</bitOffset>
37010 <bitWidth>2</bitWidth>
37011 </field>
37012 <field>
37013 <name>DATLAT</name>
37014 <description>DATLAT</description>
37015 <bitOffset>24</bitOffset>
37016 <bitWidth>4</bitWidth>
37017 </field>
37018 <field>
37019 <name>CLKDIV</name>
37020 <description>CLKDIV</description>
37021 <bitOffset>20</bitOffset>
37022 <bitWidth>4</bitWidth>
37023 </field>
37024 <field>
37025 <name>BUSTURN</name>
37026 <description>BUSTURN</description>
37027 <bitOffset>16</bitOffset>
37028 <bitWidth>4</bitWidth>
37029 </field>
37030 <field>
37031 <name>DATAST</name>
37032 <description>DATAST</description>
37033 <bitOffset>8</bitOffset>
37034 <bitWidth>8</bitWidth>
37035 </field>
37036 <field>
37037 <name>ADDHLD</name>
37038 <description>ADDHLD</description>
37039 <bitOffset>4</bitOffset>
37040 <bitWidth>4</bitWidth>
37041 </field>
37042 <field>
37043 <name>ADDSET</name>
37044 <description>ADDSET</description>
37045 <bitOffset>0</bitOffset>
37046 <bitWidth>4</bitWidth>
37047 </field>
37048 </fields>
37049 </register>
37050 <register>
37051 <name>BCR4</name>
37052 <displayName>BCR4</displayName>
37053 <description>SRAM/NOR-Flash chip-select control register
37054 4</description>
37055 <addressOffset>0x18</addressOffset>
37056 <size>0x20</size>
37057 <access>read-write</access>
37058 <resetValue>0x000030D0</resetValue>
37059 <fields>
37060 <field>
37061 <name>CBURSTRW</name>
37062 <description>CBURSTRW</description>
37063 <bitOffset>19</bitOffset>
37064 <bitWidth>1</bitWidth>
37065 </field>
37066 <field>
37067 <name>ASYNCWAIT</name>
37068 <description>ASYNCWAIT</description>
37069 <bitOffset>15</bitOffset>
37070 <bitWidth>1</bitWidth>
37071 </field>
37072 <field>
37073 <name>EXTMOD</name>
37074 <description>EXTMOD</description>
37075 <bitOffset>14</bitOffset>
37076 <bitWidth>1</bitWidth>
37077 </field>
37078 <field>
37079 <name>WAITEN</name>
37080 <description>WAITEN</description>
37081 <bitOffset>13</bitOffset>
37082 <bitWidth>1</bitWidth>
37083 </field>
37084 <field>
37085 <name>WREN</name>
37086 <description>WREN</description>
37087 <bitOffset>12</bitOffset>
37088 <bitWidth>1</bitWidth>
37089 </field>
37090 <field>
37091 <name>WAITCFG</name>
37092 <description>WAITCFG</description>
37093 <bitOffset>11</bitOffset>
37094 <bitWidth>1</bitWidth>
37095 </field>
37096 <field>
37097 <name>WRAPMOD</name>
37098 <description>WRAPMOD</description>
37099 <bitOffset>10</bitOffset>
37100 <bitWidth>1</bitWidth>
37101 </field>
37102 <field>
37103 <name>WAITPOL</name>
37104 <description>WAITPOL</description>
37105 <bitOffset>9</bitOffset>
37106 <bitWidth>1</bitWidth>
37107 </field>
37108 <field>
37109 <name>BURSTEN</name>
37110 <description>BURSTEN</description>
37111 <bitOffset>8</bitOffset>
37112 <bitWidth>1</bitWidth>
37113 </field>
37114 <field>
37115 <name>FACCEN</name>
37116 <description>FACCEN</description>
37117 <bitOffset>6</bitOffset>
37118 <bitWidth>1</bitWidth>
37119 </field>
37120 <field>
37121 <name>MWID</name>
37122 <description>MWID</description>
37123 <bitOffset>4</bitOffset>
37124 <bitWidth>2</bitWidth>
37125 </field>
37126 <field>
37127 <name>MTYP</name>
37128 <description>MTYP</description>
37129 <bitOffset>2</bitOffset>
37130 <bitWidth>2</bitWidth>
37131 </field>
37132 <field>
37133 <name>MUXEN</name>
37134 <description>MUXEN</description>
37135 <bitOffset>1</bitOffset>
37136 <bitWidth>1</bitWidth>
37137 </field>
37138 <field>
37139 <name>MBKEN</name>
37140 <description>MBKEN</description>
37141 <bitOffset>0</bitOffset>
37142 <bitWidth>1</bitWidth>
37143 </field>
37144 </fields>
37145 </register>
37146 <register>
37147 <name>BTR4</name>
37148 <displayName>BTR4</displayName>
37149 <description>SRAM/NOR-Flash chip-select timing register
37150 4</description>
37151 <addressOffset>0x1C</addressOffset>
37152 <size>0x20</size>
37153 <access>read-write</access>
37154 <resetValue>0xFFFFFFFF</resetValue>
37155 <fields>
37156 <field>
37157 <name>ACCMOD</name>
37158 <description>ACCMOD</description>
37159 <bitOffset>28</bitOffset>
37160 <bitWidth>2</bitWidth>
37161 </field>
37162 <field>
37163 <name>DATLAT</name>
37164 <description>DATLAT</description>
37165 <bitOffset>24</bitOffset>
37166 <bitWidth>4</bitWidth>
37167 </field>
37168 <field>
37169 <name>CLKDIV</name>
37170 <description>CLKDIV</description>
37171 <bitOffset>20</bitOffset>
37172 <bitWidth>4</bitWidth>
37173 </field>
37174 <field>
37175 <name>BUSTURN</name>
37176 <description>BUSTURN</description>
37177 <bitOffset>16</bitOffset>
37178 <bitWidth>4</bitWidth>
37179 </field>
37180 <field>
37181 <name>DATAST</name>
37182 <description>DATAST</description>
37183 <bitOffset>8</bitOffset>
37184 <bitWidth>8</bitWidth>
37185 </field>
37186 <field>
37187 <name>ADDHLD</name>
37188 <description>ADDHLD</description>
37189 <bitOffset>4</bitOffset>
37190 <bitWidth>4</bitWidth>
37191 </field>
37192 <field>
37193 <name>ADDSET</name>
37194 <description>ADDSET</description>
37195 <bitOffset>0</bitOffset>
37196 <bitWidth>4</bitWidth>
37197 </field>
37198 </fields>
37199 </register>
37200 <register>
37201 <name>PCR2</name>
37202 <displayName>PCR2</displayName>
37203 <description>PC Card/NAND Flash control register
37204 2</description>
37205 <addressOffset>0x60</addressOffset>
37206 <size>0x20</size>
37207 <access>read-write</access>
37208 <resetValue>0x00000018</resetValue>
37209 <fields>
37210 <field>
37211 <name>ECCPS</name>
37212 <description>ECCPS</description>
37213 <bitOffset>17</bitOffset>
37214 <bitWidth>3</bitWidth>
37215 </field>
37216 <field>
37217 <name>TAR</name>
37218 <description>TAR</description>
37219 <bitOffset>13</bitOffset>
37220 <bitWidth>4</bitWidth>
37221 </field>
37222 <field>
37223 <name>TCLR</name>
37224 <description>TCLR</description>
37225 <bitOffset>9</bitOffset>
37226 <bitWidth>4</bitWidth>
37227 </field>
37228 <field>
37229 <name>ECCEN</name>
37230 <description>ECCEN</description>
37231 <bitOffset>6</bitOffset>
37232 <bitWidth>1</bitWidth>
37233 </field>
37234 <field>
37235 <name>PWID</name>
37236 <description>PWID</description>
37237 <bitOffset>4</bitOffset>
37238 <bitWidth>2</bitWidth>
37239 </field>
37240 <field>
37241 <name>PTYP</name>
37242 <description>PTYP</description>
37243 <bitOffset>3</bitOffset>
37244 <bitWidth>1</bitWidth>
37245 </field>
37246 <field>
37247 <name>PBKEN</name>
37248 <description>PBKEN</description>
37249 <bitOffset>2</bitOffset>
37250 <bitWidth>1</bitWidth>
37251 </field>
37252 <field>
37253 <name>PWAITEN</name>
37254 <description>PWAITEN</description>
37255 <bitOffset>1</bitOffset>
37256 <bitWidth>1</bitWidth>
37257 </field>
37258 </fields>
37259 </register>
37260 <register>
37261 <name>SR2</name>
37262 <displayName>SR2</displayName>
37263 <description>FIFO status and interrupt register
37264 2</description>
37265 <addressOffset>0x64</addressOffset>
37266 <size>0x20</size>
37267 <resetValue>0x00000040</resetValue>
37268 <fields>
37269 <field>
37270 <name>FEMPT</name>
37271 <description>FEMPT</description>
37272 <bitOffset>6</bitOffset>
37273 <bitWidth>1</bitWidth>
37274 <access>read-only</access>
37275 </field>
37276 <field>
37277 <name>IFEN</name>
37278 <description>IFEN</description>
37279 <bitOffset>5</bitOffset>
37280 <bitWidth>1</bitWidth>
37281 <access>read-write</access>
37282 </field>
37283 <field>
37284 <name>ILEN</name>
37285 <description>ILEN</description>
37286 <bitOffset>4</bitOffset>
37287 <bitWidth>1</bitWidth>
37288 <access>read-write</access>
37289 </field>
37290 <field>
37291 <name>IREN</name>
37292 <description>IREN</description>
37293 <bitOffset>3</bitOffset>
37294 <bitWidth>1</bitWidth>
37295 <access>read-write</access>
37296 </field>
37297 <field>
37298 <name>IFS</name>
37299 <description>IFS</description>
37300 <bitOffset>2</bitOffset>
37301 <bitWidth>1</bitWidth>
37302 <access>read-write</access>
37303 </field>
37304 <field>
37305 <name>ILS</name>
37306 <description>ILS</description>
37307 <bitOffset>1</bitOffset>
37308 <bitWidth>1</bitWidth>
37309 <access>read-write</access>
37310 </field>
37311 <field>
37312 <name>IRS</name>
37313 <description>IRS</description>
37314 <bitOffset>0</bitOffset>
37315 <bitWidth>1</bitWidth>
37316 <access>read-write</access>
37317 </field>
37318 </fields>
37319 </register>
37320 <register>
37321 <name>PMEM2</name>
37322 <displayName>PMEM2</displayName>
37323 <description>Common memory space timing register
37324 2</description>
37325 <addressOffset>0x68</addressOffset>
37326 <size>0x20</size>
37327 <access>read-write</access>
37328 <resetValue>0xFCFCFCFC</resetValue>
37329 <fields>
37330 <field>
37331 <name>MEMHIZx</name>
37332 <description>MEMHIZx</description>
37333 <bitOffset>24</bitOffset>
37334 <bitWidth>8</bitWidth>
37335 </field>
37336 <field>
37337 <name>MEMHOLDx</name>
37338 <description>MEMHOLDx</description>
37339 <bitOffset>16</bitOffset>
37340 <bitWidth>8</bitWidth>
37341 </field>
37342 <field>
37343 <name>MEMWAITx</name>
37344 <description>MEMWAITx</description>
37345 <bitOffset>8</bitOffset>
37346 <bitWidth>8</bitWidth>
37347 </field>
37348 <field>
37349 <name>MEMSETx</name>
37350 <description>MEMSETx</description>
37351 <bitOffset>0</bitOffset>
37352 <bitWidth>8</bitWidth>
37353 </field>
37354 </fields>
37355 </register>
37356 <register>
37357 <name>PATT2</name>
37358 <displayName>PATT2</displayName>
37359 <description>Attribute memory space timing register
37360 2</description>
37361 <addressOffset>0x6C</addressOffset>
37362 <size>0x20</size>
37363 <access>read-write</access>
37364 <resetValue>0xFCFCFCFC</resetValue>
37365 <fields>
37366 <field>
37367 <name>ATTHIZx</name>
37368 <description>ATTHIZx</description>
37369 <bitOffset>24</bitOffset>
37370 <bitWidth>8</bitWidth>
37371 </field>
37372 <field>
37373 <name>ATTHOLDx</name>
37374 <description>ATTHOLDx</description>
37375 <bitOffset>16</bitOffset>
37376 <bitWidth>8</bitWidth>
37377 </field>
37378 <field>
37379 <name>ATTWAITx</name>
37380 <description>ATTWAITx</description>
37381 <bitOffset>8</bitOffset>
37382 <bitWidth>8</bitWidth>
37383 </field>
37384 <field>
37385 <name>ATTSETx</name>
37386 <description>ATTSETx</description>
37387 <bitOffset>0</bitOffset>
37388 <bitWidth>8</bitWidth>
37389 </field>
37390 </fields>
37391 </register>
37392 <register>
37393 <name>ECCR2</name>
37394 <displayName>ECCR2</displayName>
37395 <description>ECC result register 2</description>
37396 <addressOffset>0x74</addressOffset>
37397 <size>0x20</size>
37398 <access>read-only</access>
37399 <resetValue>0x00000000</resetValue>
37400 <fields>
37401 <field>
37402 <name>ECCx</name>
37403 <description>ECCx</description>
37404 <bitOffset>0</bitOffset>
37405 <bitWidth>32</bitWidth>
37406 </field>
37407 </fields>
37408 </register>
37409 <register>
37410 <name>PCR3</name>
37411 <displayName>PCR3</displayName>
37412 <description>PC Card/NAND Flash control register
37413 3</description>
37414 <addressOffset>0x80</addressOffset>
37415 <size>0x20</size>
37416 <access>read-write</access>
37417 <resetValue>0x00000018</resetValue>
37418 <fields>
37419 <field>
37420 <name>ECCPS</name>
37421 <description>ECCPS</description>
37422 <bitOffset>17</bitOffset>
37423 <bitWidth>3</bitWidth>
37424 </field>
37425 <field>
37426 <name>TAR</name>
37427 <description>TAR</description>
37428 <bitOffset>13</bitOffset>
37429 <bitWidth>4</bitWidth>
37430 </field>
37431 <field>
37432 <name>TCLR</name>
37433 <description>TCLR</description>
37434 <bitOffset>9</bitOffset>
37435 <bitWidth>4</bitWidth>
37436 </field>
37437 <field>
37438 <name>ECCEN</name>
37439 <description>ECCEN</description>
37440 <bitOffset>6</bitOffset>
37441 <bitWidth>1</bitWidth>
37442 </field>
37443 <field>
37444 <name>PWID</name>
37445 <description>PWID</description>
37446 <bitOffset>4</bitOffset>
37447 <bitWidth>2</bitWidth>
37448 </field>
37449 <field>
37450 <name>PTYP</name>
37451 <description>PTYP</description>
37452 <bitOffset>3</bitOffset>
37453 <bitWidth>1</bitWidth>
37454 </field>
37455 <field>
37456 <name>PBKEN</name>
37457 <description>PBKEN</description>
37458 <bitOffset>2</bitOffset>
37459 <bitWidth>1</bitWidth>
37460 </field>
37461 <field>
37462 <name>PWAITEN</name>
37463 <description>PWAITEN</description>
37464 <bitOffset>1</bitOffset>
37465 <bitWidth>1</bitWidth>
37466 </field>
37467 </fields>
37468 </register>
37469 <register>
37470 <name>SR3</name>
37471 <displayName>SR3</displayName>
37472 <description>FIFO status and interrupt register
37473 3</description>
37474 <addressOffset>0x84</addressOffset>
37475 <size>0x20</size>
37476 <resetValue>0x00000040</resetValue>
37477 <fields>
37478 <field>
37479 <name>FEMPT</name>
37480 <description>FEMPT</description>
37481 <bitOffset>6</bitOffset>
37482 <bitWidth>1</bitWidth>
37483 <access>read-only</access>
37484 </field>
37485 <field>
37486 <name>IFEN</name>
37487 <description>IFEN</description>
37488 <bitOffset>5</bitOffset>
37489 <bitWidth>1</bitWidth>
37490 <access>read-write</access>
37491 </field>
37492 <field>
37493 <name>ILEN</name>
37494 <description>ILEN</description>
37495 <bitOffset>4</bitOffset>
37496 <bitWidth>1</bitWidth>
37497 <access>read-write</access>
37498 </field>
37499 <field>
37500 <name>IREN</name>
37501 <description>IREN</description>
37502 <bitOffset>3</bitOffset>
37503 <bitWidth>1</bitWidth>
37504 <access>read-write</access>
37505 </field>
37506 <field>
37507 <name>IFS</name>
37508 <description>IFS</description>
37509 <bitOffset>2</bitOffset>
37510 <bitWidth>1</bitWidth>
37511 <access>read-write</access>
37512 </field>
37513 <field>
37514 <name>ILS</name>
37515 <description>ILS</description>
37516 <bitOffset>1</bitOffset>
37517 <bitWidth>1</bitWidth>
37518 <access>read-write</access>
37519 </field>
37520 <field>
37521 <name>IRS</name>
37522 <description>IRS</description>
37523 <bitOffset>0</bitOffset>
37524 <bitWidth>1</bitWidth>
37525 <access>read-write</access>
37526 </field>
37527 </fields>
37528 </register>
37529 <register>
37530 <name>PMEM3</name>
37531 <displayName>PMEM3</displayName>
37532 <description>Common memory space timing register
37533 3</description>
37534 <addressOffset>0x88</addressOffset>
37535 <size>0x20</size>
37536 <access>read-write</access>
37537 <resetValue>0xFCFCFCFC</resetValue>
37538 <fields>
37539 <field>
37540 <name>MEMHIZx</name>
37541 <description>MEMHIZx</description>
37542 <bitOffset>24</bitOffset>
37543 <bitWidth>8</bitWidth>
37544 </field>
37545 <field>
37546 <name>MEMHOLDx</name>
37547 <description>MEMHOLDx</description>
37548 <bitOffset>16</bitOffset>
37549 <bitWidth>8</bitWidth>
37550 </field>
37551 <field>
37552 <name>MEMWAITx</name>
37553 <description>MEMWAITx</description>
37554 <bitOffset>8</bitOffset>
37555 <bitWidth>8</bitWidth>
37556 </field>
37557 <field>
37558 <name>MEMSETx</name>
37559 <description>MEMSETx</description>
37560 <bitOffset>0</bitOffset>
37561 <bitWidth>8</bitWidth>
37562 </field>
37563 </fields>
37564 </register>
37565 <register>
37566 <name>PATT3</name>
37567 <displayName>PATT3</displayName>
37568 <description>Attribute memory space timing register
37569 3</description>
37570 <addressOffset>0x8C</addressOffset>
37571 <size>0x20</size>
37572 <access>read-write</access>
37573 <resetValue>0xFCFCFCFC</resetValue>
37574 <fields>
37575 <field>
37576 <name>ATTHIZx</name>
37577 <description>ATTHIZx</description>
37578 <bitOffset>24</bitOffset>
37579 <bitWidth>8</bitWidth>
37580 </field>
37581 <field>
37582 <name>ATTHOLDx</name>
37583 <description>ATTHOLDx</description>
37584 <bitOffset>16</bitOffset>
37585 <bitWidth>8</bitWidth>
37586 </field>
37587 <field>
37588 <name>ATTWAITx</name>
37589 <description>ATTWAITx</description>
37590 <bitOffset>8</bitOffset>
37591 <bitWidth>8</bitWidth>
37592 </field>
37593 <field>
37594 <name>ATTSETx</name>
37595 <description>ATTSETx</description>
37596 <bitOffset>0</bitOffset>
37597 <bitWidth>8</bitWidth>
37598 </field>
37599 </fields>
37600 </register>
37601 <register>
37602 <name>ECCR3</name>
37603 <displayName>ECCR3</displayName>
37604 <description>ECC result register 3</description>
37605 <addressOffset>0x94</addressOffset>
37606 <size>0x20</size>
37607 <access>read-only</access>
37608 <resetValue>0x00000000</resetValue>
37609 <fields>
37610 <field>
37611 <name>ECCx</name>
37612 <description>ECCx</description>
37613 <bitOffset>0</bitOffset>
37614 <bitWidth>32</bitWidth>
37615 </field>
37616 </fields>
37617 </register>
37618 <register>
37619 <name>PCR4</name>
37620 <displayName>PCR4</displayName>
37621 <description>PC Card/NAND Flash control register
37622 4</description>
37623 <addressOffset>0xA0</addressOffset>
37624 <size>0x20</size>
37625 <access>read-write</access>
37626 <resetValue>0x00000018</resetValue>
37627 <fields>
37628 <field>
37629 <name>ECCPS</name>
37630 <description>ECCPS</description>
37631 <bitOffset>17</bitOffset>
37632 <bitWidth>3</bitWidth>
37633 </field>
37634 <field>
37635 <name>TAR</name>
37636 <description>TAR</description>
37637 <bitOffset>13</bitOffset>
37638 <bitWidth>4</bitWidth>
37639 </field>
37640 <field>
37641 <name>TCLR</name>
37642 <description>TCLR</description>
37643 <bitOffset>9</bitOffset>
37644 <bitWidth>4</bitWidth>
37645 </field>
37646 <field>
37647 <name>ECCEN</name>
37648 <description>ECCEN</description>
37649 <bitOffset>6</bitOffset>
37650 <bitWidth>1</bitWidth>
37651 </field>
37652 <field>
37653 <name>PWID</name>
37654 <description>PWID</description>
37655 <bitOffset>4</bitOffset>
37656 <bitWidth>2</bitWidth>
37657 </field>
37658 <field>
37659 <name>PTYP</name>
37660 <description>PTYP</description>
37661 <bitOffset>3</bitOffset>
37662 <bitWidth>1</bitWidth>
37663 </field>
37664 <field>
37665 <name>PBKEN</name>
37666 <description>PBKEN</description>
37667 <bitOffset>2</bitOffset>
37668 <bitWidth>1</bitWidth>
37669 </field>
37670 <field>
37671 <name>PWAITEN</name>
37672 <description>PWAITEN</description>
37673 <bitOffset>1</bitOffset>
37674 <bitWidth>1</bitWidth>
37675 </field>
37676 </fields>
37677 </register>
37678 <register>
37679 <name>SR4</name>
37680 <displayName>SR4</displayName>
37681 <description>FIFO status and interrupt register
37682 4</description>
37683 <addressOffset>0xA4</addressOffset>
37684 <size>0x20</size>
37685 <resetValue>0x00000040</resetValue>
37686 <fields>
37687 <field>
37688 <name>FEMPT</name>
37689 <description>FEMPT</description>
37690 <bitOffset>6</bitOffset>
37691 <bitWidth>1</bitWidth>
37692 <access>read-only</access>
37693 </field>
37694 <field>
37695 <name>IFEN</name>
37696 <description>IFEN</description>
37697 <bitOffset>5</bitOffset>
37698 <bitWidth>1</bitWidth>
37699 <access>read-write</access>
37700 </field>
37701 <field>
37702 <name>ILEN</name>
37703 <description>ILEN</description>
37704 <bitOffset>4</bitOffset>
37705 <bitWidth>1</bitWidth>
37706 <access>read-write</access>
37707 </field>
37708 <field>
37709 <name>IREN</name>
37710 <description>IREN</description>
37711 <bitOffset>3</bitOffset>
37712 <bitWidth>1</bitWidth>
37713 <access>read-write</access>
37714 </field>
37715 <field>
37716 <name>IFS</name>
37717 <description>IFS</description>
37718 <bitOffset>2</bitOffset>
37719 <bitWidth>1</bitWidth>
37720 <access>read-write</access>
37721 </field>
37722 <field>
37723 <name>ILS</name>
37724 <description>ILS</description>
37725 <bitOffset>1</bitOffset>
37726 <bitWidth>1</bitWidth>
37727 <access>read-write</access>
37728 </field>
37729 <field>
37730 <name>IRS</name>
37731 <description>IRS</description>
37732 <bitOffset>0</bitOffset>
37733 <bitWidth>1</bitWidth>
37734 <access>read-write</access>
37735 </field>
37736 </fields>
37737 </register>
37738 <register>
37739 <name>PMEM4</name>
37740 <displayName>PMEM4</displayName>
37741 <description>Common memory space timing register
37742 4</description>
37743 <addressOffset>0xA8</addressOffset>
37744 <size>0x20</size>
37745 <access>read-write</access>
37746 <resetValue>0xFCFCFCFC</resetValue>
37747 <fields>
37748 <field>
37749 <name>MEMHIZx</name>
37750 <description>MEMHIZx</description>
37751 <bitOffset>24</bitOffset>
37752 <bitWidth>8</bitWidth>
37753 </field>
37754 <field>
37755 <name>MEMHOLDx</name>
37756 <description>MEMHOLDx</description>
37757 <bitOffset>16</bitOffset>
37758 <bitWidth>8</bitWidth>
37759 </field>
37760 <field>
37761 <name>MEMWAITx</name>
37762 <description>MEMWAITx</description>
37763 <bitOffset>8</bitOffset>
37764 <bitWidth>8</bitWidth>
37765 </field>
37766 <field>
37767 <name>MEMSETx</name>
37768 <description>MEMSETx</description>
37769 <bitOffset>0</bitOffset>
37770 <bitWidth>8</bitWidth>
37771 </field>
37772 </fields>
37773 </register>
37774 <register>
37775 <name>PATT4</name>
37776 <displayName>PATT4</displayName>
37777 <description>Attribute memory space timing register
37778 4</description>
37779 <addressOffset>0xAC</addressOffset>
37780 <size>0x20</size>
37781 <access>read-write</access>
37782 <resetValue>0xFCFCFCFC</resetValue>
37783 <fields>
37784 <field>
37785 <name>ATTHIZx</name>
37786 <description>ATTHIZx</description>
37787 <bitOffset>24</bitOffset>
37788 <bitWidth>8</bitWidth>
37789 </field>
37790 <field>
37791 <name>ATTHOLDx</name>
37792 <description>ATTHOLDx</description>
37793 <bitOffset>16</bitOffset>
37794 <bitWidth>8</bitWidth>
37795 </field>
37796 <field>
37797 <name>ATTWAITx</name>
37798 <description>ATTWAITx</description>
37799 <bitOffset>8</bitOffset>
37800 <bitWidth>8</bitWidth>
37801 </field>
37802 <field>
37803 <name>ATTSETx</name>
37804 <description>ATTSETx</description>
37805 <bitOffset>0</bitOffset>
37806 <bitWidth>8</bitWidth>
37807 </field>
37808 </fields>
37809 </register>
37810 <register>
37811 <name>PIO4</name>
37812 <displayName>PIO4</displayName>
37813 <description>I/O space timing register 4</description>
37814 <addressOffset>0xB0</addressOffset>
37815 <size>0x20</size>
37816 <access>read-write</access>
37817 <resetValue>0xFCFCFCFC</resetValue>
37818 <fields>
37819 <field>
37820 <name>IOHIZx</name>
37821 <description>IOHIZx</description>
37822 <bitOffset>24</bitOffset>
37823 <bitWidth>8</bitWidth>
37824 </field>
37825 <field>
37826 <name>IOHOLDx</name>
37827 <description>IOHOLDx</description>
37828 <bitOffset>16</bitOffset>
37829 <bitWidth>8</bitWidth>
37830 </field>
37831 <field>
37832 <name>IOWAITx</name>
37833 <description>IOWAITx</description>
37834 <bitOffset>8</bitOffset>
37835 <bitWidth>8</bitWidth>
37836 </field>
37837 <field>
37838 <name>IOSETx</name>
37839 <description>IOSETx</description>
37840 <bitOffset>0</bitOffset>
37841 <bitWidth>8</bitWidth>
37842 </field>
37843 </fields>
37844 </register>
37845 <register>
37846 <name>BWTR1</name>
37847 <displayName>BWTR1</displayName>
37848 <description>SRAM/NOR-Flash write timing registers
37849 1</description>
37850 <addressOffset>0x104</addressOffset>
37851 <size>0x20</size>
37852 <access>read-write</access>
37853 <resetValue>0x0FFFFFFF</resetValue>
37854 <fields>
37855 <field>
37856 <name>ACCMOD</name>
37857 <description>ACCMOD</description>
37858 <bitOffset>28</bitOffset>
37859 <bitWidth>2</bitWidth>
37860 </field>
37861 <field>
37862 <name>DATLAT</name>
37863 <description>DATLAT</description>
37864 <bitOffset>24</bitOffset>
37865 <bitWidth>4</bitWidth>
37866 </field>
37867 <field>
37868 <name>CLKDIV</name>
37869 <description>CLKDIV</description>
37870 <bitOffset>20</bitOffset>
37871 <bitWidth>4</bitWidth>
37872 </field>
37873 <field>
37874 <name>BUSTURN</name>
37875 <description>Bus turnaround phase
37876 duration</description>
37877 <bitOffset>16</bitOffset>
37878 <bitWidth>4</bitWidth>
37879 </field>
37880 <field>
37881 <name>DATAST</name>
37882 <description>DATAST</description>
37883 <bitOffset>8</bitOffset>
37884 <bitWidth>8</bitWidth>
37885 </field>
37886 <field>
37887 <name>ADDHLD</name>
37888 <description>ADDHLD</description>
37889 <bitOffset>4</bitOffset>
37890 <bitWidth>4</bitWidth>
37891 </field>
37892 <field>
37893 <name>ADDSET</name>
37894 <description>ADDSET</description>
37895 <bitOffset>0</bitOffset>
37896 <bitWidth>4</bitWidth>
37897 </field>
37898 </fields>
37899 </register>
37900 <register>
37901 <name>BWTR2</name>
37902 <displayName>BWTR2</displayName>
37903 <description>SRAM/NOR-Flash write timing registers
37904 2</description>
37905 <addressOffset>0x10C</addressOffset>
37906 <size>0x20</size>
37907 <access>read-write</access>
37908 <resetValue>0x0FFFFFFF</resetValue>
37909 <fields>
37910 <field>
37911 <name>ACCMOD</name>
37912 <description>ACCMOD</description>
37913 <bitOffset>28</bitOffset>
37914 <bitWidth>2</bitWidth>
37915 </field>
37916 <field>
37917 <name>DATLAT</name>
37918 <description>DATLAT</description>
37919 <bitOffset>24</bitOffset>
37920 <bitWidth>4</bitWidth>
37921 </field>
37922 <field>
37923 <name>CLKDIV</name>
37924 <description>CLKDIV</description>
37925 <bitOffset>20</bitOffset>
37926 <bitWidth>4</bitWidth>
37927 </field>
37928 <field>
37929 <name>BUSTURN</name>
37930 <description>Bus turnaround phase
37931 duration</description>
37932 <bitOffset>16</bitOffset>
37933 <bitWidth>4</bitWidth>
37934 </field>
37935 <field>
37936 <name>DATAST</name>
37937 <description>DATAST</description>
37938 <bitOffset>8</bitOffset>
37939 <bitWidth>8</bitWidth>
37940 </field>
37941 <field>
37942 <name>ADDHLD</name>
37943 <description>ADDHLD</description>
37944 <bitOffset>4</bitOffset>
37945 <bitWidth>4</bitWidth>
37946 </field>
37947 <field>
37948 <name>ADDSET</name>
37949 <description>ADDSET</description>
37950 <bitOffset>0</bitOffset>
37951 <bitWidth>4</bitWidth>
37952 </field>
37953 </fields>
37954 </register>
37955 <register>
37956 <name>BWTR3</name>
37957 <displayName>BWTR3</displayName>
37958 <description>SRAM/NOR-Flash write timing registers
37959 3</description>
37960 <addressOffset>0x114</addressOffset>
37961 <size>0x20</size>
37962 <access>read-write</access>
37963 <resetValue>0x0FFFFFFF</resetValue>
37964 <fields>
37965 <field>
37966 <name>ACCMOD</name>
37967 <description>ACCMOD</description>
37968 <bitOffset>28</bitOffset>
37969 <bitWidth>2</bitWidth>
37970 </field>
37971 <field>
37972 <name>DATLAT</name>
37973 <description>DATLAT</description>
37974 <bitOffset>24</bitOffset>
37975 <bitWidth>4</bitWidth>
37976 </field>
37977 <field>
37978 <name>CLKDIV</name>
37979 <description>CLKDIV</description>
37980 <bitOffset>20</bitOffset>
37981 <bitWidth>4</bitWidth>
37982 </field>
37983 <field>
37984 <name>BUSTURN</name>
37985 <description>Bus turnaround phase
37986 duration</description>
37987 <bitOffset>16</bitOffset>
37988 <bitWidth>4</bitWidth>
37989 </field>
37990 <field>
37991 <name>DATAST</name>
37992 <description>DATAST</description>
37993 <bitOffset>8</bitOffset>
37994 <bitWidth>8</bitWidth>
37995 </field>
37996 <field>
37997 <name>ADDHLD</name>
37998 <description>ADDHLD</description>
37999 <bitOffset>4</bitOffset>
38000 <bitWidth>4</bitWidth>
38001 </field>
38002 <field>
38003 <name>ADDSET</name>
38004 <description>ADDSET</description>
38005 <bitOffset>0</bitOffset>
38006 <bitWidth>4</bitWidth>
38007 </field>
38008 </fields>
38009 </register>
38010 <register>
38011 <name>BWTR4</name>
38012 <displayName>BWTR4</displayName>
38013 <description>SRAM/NOR-Flash write timing registers
38014 4</description>
38015 <addressOffset>0x11C</addressOffset>
38016 <size>0x20</size>
38017 <access>read-write</access>
38018 <resetValue>0x0FFFFFFF</resetValue>
38019 <fields>
38020 <field>
38021 <name>ACCMOD</name>
38022 <description>ACCMOD</description>
38023 <bitOffset>28</bitOffset>
38024 <bitWidth>2</bitWidth>
38025 </field>
38026 <field>
38027 <name>DATLAT</name>
38028 <description>DATLAT</description>
38029 <bitOffset>24</bitOffset>
38030 <bitWidth>4</bitWidth>
38031 </field>
38032 <field>
38033 <name>CLKDIV</name>
38034 <description>CLKDIV</description>
38035 <bitOffset>20</bitOffset>
38036 <bitWidth>4</bitWidth>
38037 </field>
38038 <field>
38039 <name>BUSTURN</name>
38040 <description>Bus turnaround phase
38041 duration</description>
38042 <bitOffset>16</bitOffset>
38043 <bitWidth>4</bitWidth>
38044 </field>
38045 <field>
38046 <name>DATAST</name>
38047 <description>DATAST</description>
38048 <bitOffset>8</bitOffset>
38049 <bitWidth>8</bitWidth>
38050 </field>
38051 <field>
38052 <name>ADDHLD</name>
38053 <description>ADDHLD</description>
38054 <bitOffset>4</bitOffset>
38055 <bitWidth>4</bitWidth>
38056 </field>
38057 <field>
38058 <name>ADDSET</name>
38059 <description>ADDSET</description>
38060 <bitOffset>0</bitOffset>
38061 <bitWidth>4</bitWidth>
38062 </field>
38063 </fields>
38064 </register>
38065 </registers>
38066 </peripheral>
38067 <peripheral>
38068 <name>NVIC</name>
38069 <description>Nested Vectored Interrupt
38070 Controller</description>
38071 <groupName>NVIC</groupName>
38072 <baseAddress>0xE000E100</baseAddress>
38073 <addressBlock>
38074 <offset>0x0</offset>
38075 <size>0x355</size>
38076 <usage>registers</usage>
38077 </addressBlock>
38078 <registers>
38079 <register>
38080 <name>ISER0</name>
38081 <displayName>ISER0</displayName>
38082 <description>Interrupt Set-Enable Register</description>
38083 <addressOffset>0x0</addressOffset>
38084 <size>0x20</size>
38085 <access>read-write</access>
38086 <resetValue>0x00000000</resetValue>
38087 <fields>
38088 <field>
38089 <name>SETENA</name>
38090 <description>SETENA</description>
38091 <bitOffset>0</bitOffset>
38092 <bitWidth>32</bitWidth>
38093 </field>
38094 </fields>
38095 </register>
38096 <register>
38097 <name>ISER1</name>
38098 <displayName>ISER1</displayName>
38099 <description>Interrupt Set-Enable Register</description>
38100 <addressOffset>0x4</addressOffset>
38101 <size>0x20</size>
38102 <access>read-write</access>
38103 <resetValue>0x00000000</resetValue>
38104 <fields>
38105 <field>
38106 <name>SETENA</name>
38107 <description>SETENA</description>
38108 <bitOffset>0</bitOffset>
38109 <bitWidth>32</bitWidth>
38110 </field>
38111 </fields>
38112 </register>
38113 <register>
38114 <name>ISER2</name>
38115 <displayName>ISER2</displayName>
38116 <description>Interrupt Set-Enable Register</description>
38117 <addressOffset>0x8</addressOffset>
38118 <size>0x20</size>
38119 <access>read-write</access>
38120 <resetValue>0x00000000</resetValue>
38121 <fields>
38122 <field>
38123 <name>SETENA</name>
38124 <description>SETENA</description>
38125 <bitOffset>0</bitOffset>
38126 <bitWidth>32</bitWidth>
38127 </field>
38128 </fields>
38129 </register>
38130 <register>
38131 <name>ICER0</name>
38132 <displayName>ICER0</displayName>
38133 <description>Interrupt Clear-Enable
38134 Register</description>
38135 <addressOffset>0x80</addressOffset>
38136 <size>0x20</size>
38137 <access>read-write</access>
38138 <resetValue>0x00000000</resetValue>
38139 <fields>
38140 <field>
38141 <name>CLRENA</name>
38142 <description>CLRENA</description>
38143 <bitOffset>0</bitOffset>
38144 <bitWidth>32</bitWidth>
38145 </field>
38146 </fields>
38147 </register>
38148 <register>
38149 <name>ICER1</name>
38150 <displayName>ICER1</displayName>
38151 <description>Interrupt Clear-Enable
38152 Register</description>
38153 <addressOffset>0x84</addressOffset>
38154 <size>0x20</size>
38155 <access>read-write</access>
38156 <resetValue>0x00000000</resetValue>
38157 <fields>
38158 <field>
38159 <name>CLRENA</name>
38160 <description>CLRENA</description>
38161 <bitOffset>0</bitOffset>
38162 <bitWidth>32</bitWidth>
38163 </field>
38164 </fields>
38165 </register>
38166 <register>
38167 <name>ICER2</name>
38168 <displayName>ICER2</displayName>
38169 <description>Interrupt Clear-Enable
38170 Register</description>
38171 <addressOffset>0x88</addressOffset>
38172 <size>0x20</size>
38173 <access>read-write</access>
38174 <resetValue>0x00000000</resetValue>
38175 <fields>
38176 <field>
38177 <name>CLRENA</name>
38178 <description>CLRENA</description>
38179 <bitOffset>0</bitOffset>
38180 <bitWidth>32</bitWidth>
38181 </field>
38182 </fields>
38183 </register>
38184 <register>
38185 <name>ISPR0</name>
38186 <displayName>ISPR0</displayName>
38187 <description>Interrupt Set-Pending Register</description>
38188 <addressOffset>0x100</addressOffset>
38189 <size>0x20</size>
38190 <access>read-write</access>
38191 <resetValue>0x00000000</resetValue>
38192 <fields>
38193 <field>
38194 <name>SETPEND</name>
38195 <description>SETPEND</description>
38196 <bitOffset>0</bitOffset>
38197 <bitWidth>32</bitWidth>
38198 </field>
38199 </fields>
38200 </register>
38201 <register>
38202 <name>ISPR1</name>
38203 <displayName>ISPR1</displayName>
38204 <description>Interrupt Set-Pending Register</description>
38205 <addressOffset>0x104</addressOffset>
38206 <size>0x20</size>
38207 <access>read-write</access>
38208 <resetValue>0x00000000</resetValue>
38209 <fields>
38210 <field>
38211 <name>SETPEND</name>
38212 <description>SETPEND</description>
38213 <bitOffset>0</bitOffset>
38214 <bitWidth>32</bitWidth>
38215 </field>
38216 </fields>
38217 </register>
38218 <register>
38219 <name>ISPR2</name>
38220 <displayName>ISPR2</displayName>
38221 <description>Interrupt Set-Pending Register</description>
38222 <addressOffset>0x108</addressOffset>
38223 <size>0x20</size>
38224 <access>read-write</access>
38225 <resetValue>0x00000000</resetValue>
38226 <fields>
38227 <field>
38228 <name>SETPEND</name>
38229 <description>SETPEND</description>
38230 <bitOffset>0</bitOffset>
38231 <bitWidth>32</bitWidth>
38232 </field>
38233 </fields>
38234 </register>
38235 <register>
38236 <name>ICPR0</name>
38237 <displayName>ICPR0</displayName>
38238 <description>Interrupt Clear-Pending
38239 Register</description>
38240 <addressOffset>0x180</addressOffset>
38241 <size>0x20</size>
38242 <access>read-write</access>
38243 <resetValue>0x00000000</resetValue>
38244 <fields>
38245 <field>
38246 <name>CLRPEND</name>
38247 <description>CLRPEND</description>
38248 <bitOffset>0</bitOffset>
38249 <bitWidth>32</bitWidth>
38250 </field>
38251 </fields>
38252 </register>
38253 <register>
38254 <name>ICPR1</name>
38255 <displayName>ICPR1</displayName>
38256 <description>Interrupt Clear-Pending
38257 Register</description>
38258 <addressOffset>0x184</addressOffset>
38259 <size>0x20</size>
38260 <access>read-write</access>
38261 <resetValue>0x00000000</resetValue>
38262 <fields>
38263 <field>
38264 <name>CLRPEND</name>
38265 <description>CLRPEND</description>
38266 <bitOffset>0</bitOffset>
38267 <bitWidth>32</bitWidth>
38268 </field>
38269 </fields>
38270 </register>
38271 <register>
38272 <name>ICPR2</name>
38273 <displayName>ICPR2</displayName>
38274 <description>Interrupt Clear-Pending
38275 Register</description>
38276 <addressOffset>0x188</addressOffset>
38277 <size>0x20</size>
38278 <access>read-write</access>
38279 <resetValue>0x00000000</resetValue>
38280 <fields>
38281 <field>
38282 <name>CLRPEND</name>
38283 <description>CLRPEND</description>
38284 <bitOffset>0</bitOffset>
38285 <bitWidth>32</bitWidth>
38286 </field>
38287 </fields>
38288 </register>
38289 <register>
38290 <name>IABR0</name>
38291 <displayName>IABR0</displayName>
38292 <description>Interrupt Active Bit Register</description>
38293 <addressOffset>0x200</addressOffset>
38294 <size>0x20</size>
38295 <access>read-only</access>
38296 <resetValue>0x00000000</resetValue>
38297 <fields>
38298 <field>
38299 <name>ACTIVE</name>
38300 <description>ACTIVE</description>
38301 <bitOffset>0</bitOffset>
38302 <bitWidth>32</bitWidth>
38303 </field>
38304 </fields>
38305 </register>
38306 <register>
38307 <name>IABR1</name>
38308 <displayName>IABR1</displayName>
38309 <description>Interrupt Active Bit Register</description>
38310 <addressOffset>0x204</addressOffset>
38311 <size>0x20</size>
38312 <access>read-only</access>
38313 <resetValue>0x00000000</resetValue>
38314 <fields>
38315 <field>
38316 <name>ACTIVE</name>
38317 <description>ACTIVE</description>
38318 <bitOffset>0</bitOffset>
38319 <bitWidth>32</bitWidth>
38320 </field>
38321 </fields>
38322 </register>
38323 <register>
38324 <name>IABR2</name>
38325 <displayName>IABR2</displayName>
38326 <description>Interrupt Active Bit Register</description>
38327 <addressOffset>0x208</addressOffset>
38328 <size>0x20</size>
38329 <access>read-only</access>
38330 <resetValue>0x00000000</resetValue>
38331 <fields>
38332 <field>
38333 <name>ACTIVE</name>
38334 <description>ACTIVE</description>
38335 <bitOffset>0</bitOffset>
38336 <bitWidth>32</bitWidth>
38337 </field>
38338 </fields>
38339 </register>
38340 <register>
38341 <name>IPR0</name>
38342 <displayName>IPR0</displayName>
38343 <description>Interrupt Priority Register</description>
38344 <addressOffset>0x300</addressOffset>
38345 <size>0x20</size>
38346 <access>read-write</access>
38347 <resetValue>0x00000000</resetValue>
38348 <fields>
38349 <field>
38350 <name>IPR_N0</name>
38351 <description>IPR_N0</description>
38352 <bitOffset>0</bitOffset>
38353 <bitWidth>8</bitWidth>
38354 </field>
38355 <field>
38356 <name>IPR_N1</name>
38357 <description>IPR_N1</description>
38358 <bitOffset>8</bitOffset>
38359 <bitWidth>8</bitWidth>
38360 </field>
38361 <field>
38362 <name>IPR_N2</name>
38363 <description>IPR_N2</description>
38364 <bitOffset>16</bitOffset>
38365 <bitWidth>8</bitWidth>
38366 </field>
38367 <field>
38368 <name>IPR_N3</name>
38369 <description>IPR_N3</description>
38370 <bitOffset>24</bitOffset>
38371 <bitWidth>8</bitWidth>
38372 </field>
38373 </fields>
38374 </register>
38375 <register>
38376 <name>IPR1</name>
38377 <displayName>IPR1</displayName>
38378 <description>Interrupt Priority Register</description>
38379 <addressOffset>0x304</addressOffset>
38380 <size>0x20</size>
38381 <access>read-write</access>
38382 <resetValue>0x00000000</resetValue>
38383 <fields>
38384 <field>
38385 <name>IPR_N0</name>
38386 <description>IPR_N0</description>
38387 <bitOffset>0</bitOffset>
38388 <bitWidth>8</bitWidth>
38389 </field>
38390 <field>
38391 <name>IPR_N1</name>
38392 <description>IPR_N1</description>
38393 <bitOffset>8</bitOffset>
38394 <bitWidth>8</bitWidth>
38395 </field>
38396 <field>
38397 <name>IPR_N2</name>
38398 <description>IPR_N2</description>
38399 <bitOffset>16</bitOffset>
38400 <bitWidth>8</bitWidth>
38401 </field>
38402 <field>
38403 <name>IPR_N3</name>
38404 <description>IPR_N3</description>
38405 <bitOffset>24</bitOffset>
38406 <bitWidth>8</bitWidth>
38407 </field>
38408 </fields>
38409 </register>
38410 <register>
38411 <name>IPR2</name>
38412 <displayName>IPR2</displayName>
38413 <description>Interrupt Priority Register</description>
38414 <addressOffset>0x308</addressOffset>
38415 <size>0x20</size>
38416 <access>read-write</access>
38417 <resetValue>0x00000000</resetValue>
38418 <fields>
38419 <field>
38420 <name>IPR_N0</name>
38421 <description>IPR_N0</description>
38422 <bitOffset>0</bitOffset>
38423 <bitWidth>8</bitWidth>
38424 </field>
38425 <field>
38426 <name>IPR_N1</name>
38427 <description>IPR_N1</description>
38428 <bitOffset>8</bitOffset>
38429 <bitWidth>8</bitWidth>
38430 </field>
38431 <field>
38432 <name>IPR_N2</name>
38433 <description>IPR_N2</description>
38434 <bitOffset>16</bitOffset>
38435 <bitWidth>8</bitWidth>
38436 </field>
38437 <field>
38438 <name>IPR_N3</name>
38439 <description>IPR_N3</description>
38440 <bitOffset>24</bitOffset>
38441 <bitWidth>8</bitWidth>
38442 </field>
38443 </fields>
38444 </register>
38445 <register>
38446 <name>IPR3</name>
38447 <displayName>IPR3</displayName>
38448 <description>Interrupt Priority Register</description>
38449 <addressOffset>0x30C</addressOffset>
38450 <size>0x20</size>
38451 <access>read-write</access>
38452 <resetValue>0x00000000</resetValue>
38453 <fields>
38454 <field>
38455 <name>IPR_N0</name>
38456 <description>IPR_N0</description>
38457 <bitOffset>0</bitOffset>
38458 <bitWidth>8</bitWidth>
38459 </field>
38460 <field>
38461 <name>IPR_N1</name>
38462 <description>IPR_N1</description>
38463 <bitOffset>8</bitOffset>
38464 <bitWidth>8</bitWidth>
38465 </field>
38466 <field>
38467 <name>IPR_N2</name>
38468 <description>IPR_N2</description>
38469 <bitOffset>16</bitOffset>
38470 <bitWidth>8</bitWidth>
38471 </field>
38472 <field>
38473 <name>IPR_N3</name>
38474 <description>IPR_N3</description>
38475 <bitOffset>24</bitOffset>
38476 <bitWidth>8</bitWidth>
38477 </field>
38478 </fields>
38479 </register>
38480 <register>
38481 <name>IPR4</name>
38482 <displayName>IPR4</displayName>
38483 <description>Interrupt Priority Register</description>
38484 <addressOffset>0x310</addressOffset>
38485 <size>0x20</size>
38486 <access>read-write</access>
38487 <resetValue>0x00000000</resetValue>
38488 <fields>
38489 <field>
38490 <name>IPR_N0</name>
38491 <description>IPR_N0</description>
38492 <bitOffset>0</bitOffset>
38493 <bitWidth>8</bitWidth>
38494 </field>
38495 <field>
38496 <name>IPR_N1</name>
38497 <description>IPR_N1</description>
38498 <bitOffset>8</bitOffset>
38499 <bitWidth>8</bitWidth>
38500 </field>
38501 <field>
38502 <name>IPR_N2</name>
38503 <description>IPR_N2</description>
38504 <bitOffset>16</bitOffset>
38505 <bitWidth>8</bitWidth>
38506 </field>
38507 <field>
38508 <name>IPR_N3</name>
38509 <description>IPR_N3</description>
38510 <bitOffset>24</bitOffset>
38511 <bitWidth>8</bitWidth>
38512 </field>
38513 </fields>
38514 </register>
38515 <register>
38516 <name>IPR5</name>
38517 <displayName>IPR5</displayName>
38518 <description>Interrupt Priority Register</description>
38519 <addressOffset>0x314</addressOffset>
38520 <size>0x20</size>
38521 <access>read-write</access>
38522 <resetValue>0x00000000</resetValue>
38523 <fields>
38524 <field>
38525 <name>IPR_N0</name>
38526 <description>IPR_N0</description>
38527 <bitOffset>0</bitOffset>
38528 <bitWidth>8</bitWidth>
38529 </field>
38530 <field>
38531 <name>IPR_N1</name>
38532 <description>IPR_N1</description>
38533 <bitOffset>8</bitOffset>
38534 <bitWidth>8</bitWidth>
38535 </field>
38536 <field>
38537 <name>IPR_N2</name>
38538 <description>IPR_N2</description>
38539 <bitOffset>16</bitOffset>
38540 <bitWidth>8</bitWidth>
38541 </field>
38542 <field>
38543 <name>IPR_N3</name>
38544 <description>IPR_N3</description>
38545 <bitOffset>24</bitOffset>
38546 <bitWidth>8</bitWidth>
38547 </field>
38548 </fields>
38549 </register>
38550 <register>
38551 <name>IPR6</name>
38552 <displayName>IPR6</displayName>
38553 <description>Interrupt Priority Register</description>
38554 <addressOffset>0x318</addressOffset>
38555 <size>0x20</size>
38556 <access>read-write</access>
38557 <resetValue>0x00000000</resetValue>
38558 <fields>
38559 <field>
38560 <name>IPR_N0</name>
38561 <description>IPR_N0</description>
38562 <bitOffset>0</bitOffset>
38563 <bitWidth>8</bitWidth>
38564 </field>
38565 <field>
38566 <name>IPR_N1</name>
38567 <description>IPR_N1</description>
38568 <bitOffset>8</bitOffset>
38569 <bitWidth>8</bitWidth>
38570 </field>
38571 <field>
38572 <name>IPR_N2</name>
38573 <description>IPR_N2</description>
38574 <bitOffset>16</bitOffset>
38575 <bitWidth>8</bitWidth>
38576 </field>
38577 <field>
38578 <name>IPR_N3</name>
38579 <description>IPR_N3</description>
38580 <bitOffset>24</bitOffset>
38581 <bitWidth>8</bitWidth>
38582 </field>
38583 </fields>
38584 </register>
38585 <register>
38586 <name>IPR7</name>
38587 <displayName>IPR7</displayName>
38588 <description>Interrupt Priority Register</description>
38589 <addressOffset>0x31C</addressOffset>
38590 <size>0x20</size>
38591 <access>read-write</access>
38592 <resetValue>0x00000000</resetValue>
38593 <fields>
38594 <field>
38595 <name>IPR_N0</name>
38596 <description>IPR_N0</description>
38597 <bitOffset>0</bitOffset>
38598 <bitWidth>8</bitWidth>
38599 </field>
38600 <field>
38601 <name>IPR_N1</name>
38602 <description>IPR_N1</description>
38603 <bitOffset>8</bitOffset>
38604 <bitWidth>8</bitWidth>
38605 </field>
38606 <field>
38607 <name>IPR_N2</name>
38608 <description>IPR_N2</description>
38609 <bitOffset>16</bitOffset>
38610 <bitWidth>8</bitWidth>
38611 </field>
38612 <field>
38613 <name>IPR_N3</name>
38614 <description>IPR_N3</description>
38615 <bitOffset>24</bitOffset>
38616 <bitWidth>8</bitWidth>
38617 </field>
38618 </fields>
38619 </register>
38620 <register>
38621 <name>IPR8</name>
38622 <displayName>IPR8</displayName>
38623 <description>Interrupt Priority Register</description>
38624 <addressOffset>0x320</addressOffset>
38625 <size>0x20</size>
38626 <access>read-write</access>
38627 <resetValue>0x00000000</resetValue>
38628 <fields>
38629 <field>
38630 <name>IPR_N0</name>
38631 <description>IPR_N0</description>
38632 <bitOffset>0</bitOffset>
38633 <bitWidth>8</bitWidth>
38634 </field>
38635 <field>
38636 <name>IPR_N1</name>
38637 <description>IPR_N1</description>
38638 <bitOffset>8</bitOffset>
38639 <bitWidth>8</bitWidth>
38640 </field>
38641 <field>
38642 <name>IPR_N2</name>
38643 <description>IPR_N2</description>
38644 <bitOffset>16</bitOffset>
38645 <bitWidth>8</bitWidth>
38646 </field>
38647 <field>
38648 <name>IPR_N3</name>
38649 <description>IPR_N3</description>
38650 <bitOffset>24</bitOffset>
38651 <bitWidth>8</bitWidth>
38652 </field>
38653 </fields>
38654 </register>
38655 <register>
38656 <name>IPR9</name>
38657 <displayName>IPR9</displayName>
38658 <description>Interrupt Priority Register</description>
38659 <addressOffset>0x324</addressOffset>
38660 <size>0x20</size>
38661 <access>read-write</access>
38662 <resetValue>0x00000000</resetValue>
38663 <fields>
38664 <field>
38665 <name>IPR_N0</name>
38666 <description>IPR_N0</description>
38667 <bitOffset>0</bitOffset>
38668 <bitWidth>8</bitWidth>
38669 </field>
38670 <field>
38671 <name>IPR_N1</name>
38672 <description>IPR_N1</description>
38673 <bitOffset>8</bitOffset>
38674 <bitWidth>8</bitWidth>
38675 </field>
38676 <field>
38677 <name>IPR_N2</name>
38678 <description>IPR_N2</description>
38679 <bitOffset>16</bitOffset>
38680 <bitWidth>8</bitWidth>
38681 </field>
38682 <field>
38683 <name>IPR_N3</name>
38684 <description>IPR_N3</description>
38685 <bitOffset>24</bitOffset>
38686 <bitWidth>8</bitWidth>
38687 </field>
38688 </fields>
38689 </register>
38690 <register>
38691 <name>IPR10</name>
38692 <displayName>IPR10</displayName>
38693 <description>Interrupt Priority Register</description>
38694 <addressOffset>0x328</addressOffset>
38695 <size>0x20</size>
38696 <access>read-write</access>
38697 <resetValue>0x00000000</resetValue>
38698 <fields>
38699 <field>
38700 <name>IPR_N0</name>
38701 <description>IPR_N0</description>
38702 <bitOffset>0</bitOffset>
38703 <bitWidth>8</bitWidth>
38704 </field>
38705 <field>
38706 <name>IPR_N1</name>
38707 <description>IPR_N1</description>
38708 <bitOffset>8</bitOffset>
38709 <bitWidth>8</bitWidth>
38710 </field>
38711 <field>
38712 <name>IPR_N2</name>
38713 <description>IPR_N2</description>
38714 <bitOffset>16</bitOffset>
38715 <bitWidth>8</bitWidth>
38716 </field>
38717 <field>
38718 <name>IPR_N3</name>
38719 <description>IPR_N3</description>
38720 <bitOffset>24</bitOffset>
38721 <bitWidth>8</bitWidth>
38722 </field>
38723 </fields>
38724 </register>
38725 <register>
38726 <name>IPR11</name>
38727 <displayName>IPR11</displayName>
38728 <description>Interrupt Priority Register</description>
38729 <addressOffset>0x32C</addressOffset>
38730 <size>0x20</size>
38731 <access>read-write</access>
38732 <resetValue>0x00000000</resetValue>
38733 <fields>
38734 <field>
38735 <name>IPR_N0</name>
38736 <description>IPR_N0</description>
38737 <bitOffset>0</bitOffset>
38738 <bitWidth>8</bitWidth>
38739 </field>
38740 <field>
38741 <name>IPR_N1</name>
38742 <description>IPR_N1</description>
38743 <bitOffset>8</bitOffset>
38744 <bitWidth>8</bitWidth>
38745 </field>
38746 <field>
38747 <name>IPR_N2</name>
38748 <description>IPR_N2</description>
38749 <bitOffset>16</bitOffset>
38750 <bitWidth>8</bitWidth>
38751 </field>
38752 <field>
38753 <name>IPR_N3</name>
38754 <description>IPR_N3</description>
38755 <bitOffset>24</bitOffset>
38756 <bitWidth>8</bitWidth>
38757 </field>
38758 </fields>
38759 </register>
38760 <register>
38761 <name>IPR12</name>
38762 <displayName>IPR12</displayName>
38763 <description>Interrupt Priority Register</description>
38764 <addressOffset>0x330</addressOffset>
38765 <size>0x20</size>
38766 <access>read-write</access>
38767 <resetValue>0x00000000</resetValue>
38768 <fields>
38769 <field>
38770 <name>IPR_N0</name>
38771 <description>IPR_N0</description>
38772 <bitOffset>0</bitOffset>
38773 <bitWidth>8</bitWidth>
38774 </field>
38775 <field>
38776 <name>IPR_N1</name>
38777 <description>IPR_N1</description>
38778 <bitOffset>8</bitOffset>
38779 <bitWidth>8</bitWidth>
38780 </field>
38781 <field>
38782 <name>IPR_N2</name>
38783 <description>IPR_N2</description>
38784 <bitOffset>16</bitOffset>
38785 <bitWidth>8</bitWidth>
38786 </field>
38787 <field>
38788 <name>IPR_N3</name>
38789 <description>IPR_N3</description>
38790 <bitOffset>24</bitOffset>
38791 <bitWidth>8</bitWidth>
38792 </field>
38793 </fields>
38794 </register>
38795 <register>
38796 <name>IPR13</name>
38797 <displayName>IPR13</displayName>
38798 <description>Interrupt Priority Register</description>
38799 <addressOffset>0x334</addressOffset>
38800 <size>0x20</size>
38801 <access>read-write</access>
38802 <resetValue>0x00000000</resetValue>
38803 <fields>
38804 <field>
38805 <name>IPR_N0</name>
38806 <description>IPR_N0</description>
38807 <bitOffset>0</bitOffset>
38808 <bitWidth>8</bitWidth>
38809 </field>
38810 <field>
38811 <name>IPR_N1</name>
38812 <description>IPR_N1</description>
38813 <bitOffset>8</bitOffset>
38814 <bitWidth>8</bitWidth>
38815 </field>
38816 <field>
38817 <name>IPR_N2</name>
38818 <description>IPR_N2</description>
38819 <bitOffset>16</bitOffset>
38820 <bitWidth>8</bitWidth>
38821 </field>
38822 <field>
38823 <name>IPR_N3</name>
38824 <description>IPR_N3</description>
38825 <bitOffset>24</bitOffset>
38826 <bitWidth>8</bitWidth>
38827 </field>
38828 </fields>
38829 </register>
38830 <register>
38831 <name>IPR14</name>
38832 <displayName>IPR14</displayName>
38833 <description>Interrupt Priority Register</description>
38834 <addressOffset>0x338</addressOffset>
38835 <size>0x20</size>
38836 <access>read-write</access>
38837 <resetValue>0x00000000</resetValue>
38838 <fields>
38839 <field>
38840 <name>IPR_N0</name>
38841 <description>IPR_N0</description>
38842 <bitOffset>0</bitOffset>
38843 <bitWidth>8</bitWidth>
38844 </field>
38845 <field>
38846 <name>IPR_N1</name>
38847 <description>IPR_N1</description>
38848 <bitOffset>8</bitOffset>
38849 <bitWidth>8</bitWidth>
38850 </field>
38851 <field>
38852 <name>IPR_N2</name>
38853 <description>IPR_N2</description>
38854 <bitOffset>16</bitOffset>
38855 <bitWidth>8</bitWidth>
38856 </field>
38857 <field>
38858 <name>IPR_N3</name>
38859 <description>IPR_N3</description>
38860 <bitOffset>24</bitOffset>
38861 <bitWidth>8</bitWidth>
38862 </field>
38863 </fields>
38864 </register>
38865 <register>
38866 <name>IPR15</name>
38867 <displayName>IPR15</displayName>
38868 <description>Interrupt Priority Register</description>
38869 <addressOffset>0x33C</addressOffset>
38870 <size>0x20</size>
38871 <access>read-write</access>
38872 <resetValue>0x00000000</resetValue>
38873 <fields>
38874 <field>
38875 <name>IPR_N0</name>
38876 <description>IPR_N0</description>
38877 <bitOffset>0</bitOffset>
38878 <bitWidth>8</bitWidth>
38879 </field>
38880 <field>
38881 <name>IPR_N1</name>
38882 <description>IPR_N1</description>
38883 <bitOffset>8</bitOffset>
38884 <bitWidth>8</bitWidth>
38885 </field>
38886 <field>
38887 <name>IPR_N2</name>
38888 <description>IPR_N2</description>
38889 <bitOffset>16</bitOffset>
38890 <bitWidth>8</bitWidth>
38891 </field>
38892 <field>
38893 <name>IPR_N3</name>
38894 <description>IPR_N3</description>
38895 <bitOffset>24</bitOffset>
38896 <bitWidth>8</bitWidth>
38897 </field>
38898 </fields>
38899 </register>
38900 <register>
38901 <name>IPR16</name>
38902 <displayName>IPR16</displayName>
38903 <description>Interrupt Priority Register</description>
38904 <addressOffset>0x340</addressOffset>
38905 <size>0x20</size>
38906 <access>read-write</access>
38907 <resetValue>0x00000000</resetValue>
38908 <fields>
38909 <field>
38910 <name>IPR_N0</name>
38911 <description>IPR_N0</description>
38912 <bitOffset>0</bitOffset>
38913 <bitWidth>8</bitWidth>
38914 </field>
38915 <field>
38916 <name>IPR_N1</name>
38917 <description>IPR_N1</description>
38918 <bitOffset>8</bitOffset>
38919 <bitWidth>8</bitWidth>
38920 </field>
38921 <field>
38922 <name>IPR_N2</name>
38923 <description>IPR_N2</description>
38924 <bitOffset>16</bitOffset>
38925 <bitWidth>8</bitWidth>
38926 </field>
38927 <field>
38928 <name>IPR_N3</name>
38929 <description>IPR_N3</description>
38930 <bitOffset>24</bitOffset>
38931 <bitWidth>8</bitWidth>
38932 </field>
38933 </fields>
38934 </register>
38935 <register>
38936 <name>IPR17</name>
38937 <displayName>IPR17</displayName>
38938 <description>Interrupt Priority Register</description>
38939 <addressOffset>0x344</addressOffset>
38940 <size>0x20</size>
38941 <access>read-write</access>
38942 <resetValue>0x00000000</resetValue>
38943 <fields>
38944 <field>
38945 <name>IPR_N0</name>
38946 <description>IPR_N0</description>
38947 <bitOffset>0</bitOffset>
38948 <bitWidth>8</bitWidth>
38949 </field>
38950 <field>
38951 <name>IPR_N1</name>
38952 <description>IPR_N1</description>
38953 <bitOffset>8</bitOffset>
38954 <bitWidth>8</bitWidth>
38955 </field>
38956 <field>
38957 <name>IPR_N2</name>
38958 <description>IPR_N2</description>
38959 <bitOffset>16</bitOffset>
38960 <bitWidth>8</bitWidth>
38961 </field>
38962 <field>
38963 <name>IPR_N3</name>
38964 <description>IPR_N3</description>
38965 <bitOffset>24</bitOffset>
38966 <bitWidth>8</bitWidth>
38967 </field>
38968 </fields>
38969 </register>
38970 <register>
38971 <name>IPR18</name>
38972 <displayName>IPR18</displayName>
38973 <description>Interrupt Priority Register</description>
38974 <addressOffset>0x348</addressOffset>
38975 <size>0x20</size>
38976 <access>read-write</access>
38977 <resetValue>0x00000000</resetValue>
38978 <fields>
38979 <field>
38980 <name>IPR_N0</name>
38981 <description>IPR_N0</description>
38982 <bitOffset>0</bitOffset>
38983 <bitWidth>8</bitWidth>
38984 </field>
38985 <field>
38986 <name>IPR_N1</name>
38987 <description>IPR_N1</description>
38988 <bitOffset>8</bitOffset>
38989 <bitWidth>8</bitWidth>
38990 </field>
38991 <field>
38992 <name>IPR_N2</name>
38993 <description>IPR_N2</description>
38994 <bitOffset>16</bitOffset>
38995 <bitWidth>8</bitWidth>
38996 </field>
38997 <field>
38998 <name>IPR_N3</name>
38999 <description>IPR_N3</description>
39000 <bitOffset>24</bitOffset>
39001 <bitWidth>8</bitWidth>
39002 </field>
39003 </fields>
39004 </register>
39005 <register>
39006 <name>IPR19</name>
39007 <displayName>IPR19</displayName>
39008 <description>Interrupt Priority Register</description>
39009 <addressOffset>0x34C</addressOffset>
39010 <size>0x20</size>
39011 <access>read-write</access>
39012 <resetValue>0x00000000</resetValue>
39013 <fields>
39014 <field>
39015 <name>IPR_N0</name>
39016 <description>IPR_N0</description>
39017 <bitOffset>0</bitOffset>
39018 <bitWidth>8</bitWidth>
39019 </field>
39020 <field>
39021 <name>IPR_N1</name>
39022 <description>IPR_N1</description>
39023 <bitOffset>8</bitOffset>
39024 <bitWidth>8</bitWidth>
39025 </field>
39026 <field>
39027 <name>IPR_N2</name>
39028 <description>IPR_N2</description>
39029 <bitOffset>16</bitOffset>
39030 <bitWidth>8</bitWidth>
39031 </field>
39032 <field>
39033 <name>IPR_N3</name>
39034 <description>IPR_N3</description>
39035 <bitOffset>24</bitOffset>
39036 <bitWidth>8</bitWidth>
39037 </field>
39038 </fields>
39039 </register>
39040 <register>
39041 <name>IPR20</name>
39042 <displayName>IPR20</displayName>
39043 <description>Interrupt Priority Register</description>
39044 <addressOffset>0x350</addressOffset>
39045 <size>0x20</size>
39046 <access>read-write</access>
39047 <resetValue>0x00000000</resetValue>
39048 <fields>
39049 <field>
39050 <name>IPR_N0</name>
39051 <description>IPR_N0</description>
39052 <bitOffset>0</bitOffset>
39053 <bitWidth>8</bitWidth>
39054 </field>
39055 <field>
39056 <name>IPR_N1</name>
39057 <description>IPR_N1</description>
39058 <bitOffset>8</bitOffset>
39059 <bitWidth>8</bitWidth>
39060 </field>
39061 <field>
39062 <name>IPR_N2</name>
39063 <description>IPR_N2</description>
39064 <bitOffset>16</bitOffset>
39065 <bitWidth>8</bitWidth>
39066 </field>
39067 <field>
39068 <name>IPR_N3</name>
39069 <description>IPR_N3</description>
39070 <bitOffset>24</bitOffset>
39071 <bitWidth>8</bitWidth>
39072 </field>
39073 </fields>
39074 </register>
39075 </registers>
39076 </peripheral>
39077 <peripheral>
39078 <name>FPU</name>
39079 <description>Floting point unit</description>
39080 <groupName>FPU</groupName>
39081 <baseAddress>0xE000EF34</baseAddress>
39082 <addressBlock>
39083 <offset>0x0</offset>
39084 <size>0xD</size>
39085 <usage>registers</usage>
39086 </addressBlock>
39087 <interrupt>
39088 <name>FPU</name>
39089 <description>Floating point unit interrupt</description>
39090 <value>81</value>
39091 </interrupt>
39092 <interrupt>
39093 <name>FPU</name>
39094 <description>Floating point interrupt</description>
39095 <value>81</value>
39096 </interrupt>
39097 <registers>
39098 <register>
39099 <name>FPCCR</name>
39100 <displayName>FPCCR</displayName>
39101 <description>Floating-point context control
39102 register</description>
39103 <addressOffset>0x0</addressOffset>
39104 <size>0x20</size>
39105 <access>read-write</access>
39106 <resetValue>0x00000000</resetValue>
39107 <fields>
39108 <field>
39109 <name>LSPACT</name>
39110 <description>LSPACT</description>
39111 <bitOffset>0</bitOffset>
39112 <bitWidth>1</bitWidth>
39113 </field>
39114 <field>
39115 <name>USER</name>
39116 <description>USER</description>
39117 <bitOffset>1</bitOffset>
39118 <bitWidth>1</bitWidth>
39119 </field>
39120 <field>
39121 <name>THREAD</name>
39122 <description>THREAD</description>
39123 <bitOffset>3</bitOffset>
39124 <bitWidth>1</bitWidth>
39125 </field>
39126 <field>
39127 <name>HFRDY</name>
39128 <description>HFRDY</description>
39129 <bitOffset>4</bitOffset>
39130 <bitWidth>1</bitWidth>
39131 </field>
39132 <field>
39133 <name>MMRDY</name>
39134 <description>MMRDY</description>
39135 <bitOffset>5</bitOffset>
39136 <bitWidth>1</bitWidth>
39137 </field>
39138 <field>
39139 <name>BFRDY</name>
39140 <description>BFRDY</description>
39141 <bitOffset>6</bitOffset>
39142 <bitWidth>1</bitWidth>
39143 </field>
39144 <field>
39145 <name>MONRDY</name>
39146 <description>MONRDY</description>
39147 <bitOffset>8</bitOffset>
39148 <bitWidth>1</bitWidth>
39149 </field>
39150 <field>
39151 <name>LSPEN</name>
39152 <description>LSPEN</description>
39153 <bitOffset>30</bitOffset>
39154 <bitWidth>1</bitWidth>
39155 </field>
39156 <field>
39157 <name>ASPEN</name>
39158 <description>ASPEN</description>
39159 <bitOffset>31</bitOffset>
39160 <bitWidth>1</bitWidth>
39161 </field>
39162 </fields>
39163 </register>
39164 <register>
39165 <name>FPCAR</name>
39166 <displayName>FPCAR</displayName>
39167 <description>Floating-point context address
39168 register</description>
39169 <addressOffset>0x4</addressOffset>
39170 <size>0x20</size>
39171 <access>read-write</access>
39172 <resetValue>0x00000000</resetValue>
39173 <fields>
39174 <field>
39175 <name>ADDRESS</name>
39176 <description>Location of unpopulated
39177 floating-point</description>
39178 <bitOffset>3</bitOffset>
39179 <bitWidth>29</bitWidth>
39180 </field>
39181 </fields>
39182 </register>
39183 <register>
39184 <name>FPSCR</name>
39185 <displayName>FPSCR</displayName>
39186 <description>Floating-point status control
39187 register</description>
39188 <addressOffset>0x8</addressOffset>
39189 <size>0x20</size>
39190 <access>read-write</access>
39191 <resetValue>0x00000000</resetValue>
39192 <fields>
39193 <field>
39194 <name>IOC</name>
39195 <description>Invalid operation cumulative exception
39196 bit</description>
39197 <bitOffset>0</bitOffset>
39198 <bitWidth>1</bitWidth>
39199 </field>
39200 <field>
39201 <name>DZC</name>
39202 <description>Division by zero cumulative exception
39203 bit.</description>
39204 <bitOffset>1</bitOffset>
39205 <bitWidth>1</bitWidth>
39206 </field>
39207 <field>
39208 <name>OFC</name>
39209 <description>Overflow cumulative exception
39210 bit</description>
39211 <bitOffset>2</bitOffset>
39212 <bitWidth>1</bitWidth>
39213 </field>
39214 <field>
39215 <name>UFC</name>
39216 <description>Underflow cumulative exception
39217 bit</description>
39218 <bitOffset>3</bitOffset>
39219 <bitWidth>1</bitWidth>
39220 </field>
39221 <field>
39222 <name>IXC</name>
39223 <description>Inexact cumulative exception
39224 bit</description>
39225 <bitOffset>4</bitOffset>
39226 <bitWidth>1</bitWidth>
39227 </field>
39228 <field>
39229 <name>IDC</name>
39230 <description>Input denormal cumulative exception
39231 bit.</description>
39232 <bitOffset>7</bitOffset>
39233 <bitWidth>1</bitWidth>
39234 </field>
39235 <field>
39236 <name>RMode</name>
39237 <description>Rounding Mode control
39238 field</description>
39239 <bitOffset>22</bitOffset>
39240 <bitWidth>2</bitWidth>
39241 </field>
39242 <field>
39243 <name>FZ</name>
39244 <description>Flush-to-zero mode control
39245 bit:</description>
39246 <bitOffset>24</bitOffset>
39247 <bitWidth>1</bitWidth>
39248 </field>
39249 <field>
39250 <name>DN</name>
39251 <description>Default NaN mode control
39252 bit</description>
39253 <bitOffset>25</bitOffset>
39254 <bitWidth>1</bitWidth>
39255 </field>
39256 <field>
39257 <name>AHP</name>
39258 <description>Alternative half-precision control
39259 bit</description>
39260 <bitOffset>26</bitOffset>
39261 <bitWidth>1</bitWidth>
39262 </field>
39263 <field>
39264 <name>V</name>
39265 <description>Overflow condition code
39266 flag</description>
39267 <bitOffset>28</bitOffset>
39268 <bitWidth>1</bitWidth>
39269 </field>
39270 <field>
39271 <name>C</name>
39272 <description>Carry condition code flag</description>
39273 <bitOffset>29</bitOffset>
39274 <bitWidth>1</bitWidth>
39275 </field>
39276 <field>
39277 <name>Z</name>
39278 <description>Zero condition code flag</description>
39279 <bitOffset>30</bitOffset>
39280 <bitWidth>1</bitWidth>
39281 </field>
39282 <field>
39283 <name>N</name>
39284 <description>Negative condition code
39285 flag</description>
39286 <bitOffset>31</bitOffset>
39287 <bitWidth>1</bitWidth>
39288 </field>
39289 </fields>
39290 </register>
39291 </registers>
39292 </peripheral>
39293 <peripheral>
39294 <name>MPU</name>
39295 <description>Memory protection unit</description>
39296 <groupName>MPU</groupName>
39297 <baseAddress>0xE000ED90</baseAddress>
39298 <addressBlock>
39299 <offset>0x0</offset>
39300 <size>0x15</size>
39301 <usage>registers</usage>
39302 </addressBlock>
39303 <registers>
39304 <register>
39305 <name>MPU_TYPER</name>
39306 <displayName>MPU_TYPER</displayName>
39307 <description>MPU type register</description>
39308 <addressOffset>0x0</addressOffset>
39309 <size>0x20</size>
39310 <access>read-only</access>
39311 <resetValue>0X00000800</resetValue>
39312 <fields>
39313 <field>
39314 <name>SEPARATE</name>
39315 <description>Separate flag</description>
39316 <bitOffset>0</bitOffset>
39317 <bitWidth>1</bitWidth>
39318 </field>
39319 <field>
39320 <name>DREGION</name>
39321 <description>Number of MPU data regions</description>
39322 <bitOffset>8</bitOffset>
39323 <bitWidth>8</bitWidth>
39324 </field>
39325 <field>
39326 <name>IREGION</name>
39327 <description>Number of MPU instruction
39328 regions</description>
39329 <bitOffset>16</bitOffset>
39330 <bitWidth>8</bitWidth>
39331 </field>
39332 </fields>
39333 </register>
39334 <register>
39335 <name>MPU_CTRL</name>
39336 <displayName>MPU_CTRL</displayName>
39337 <description>MPU control register</description>
39338 <addressOffset>0x4</addressOffset>
39339 <size>0x20</size>
39340 <access>read-only</access>
39341 <resetValue>0X00000000</resetValue>
39342 <fields>
39343 <field>
39344 <name>ENABLE</name>
39345 <description>Enables the MPU</description>
39346 <bitOffset>0</bitOffset>
39347 <bitWidth>1</bitWidth>
39348 </field>
39349 <field>
39350 <name>HFNMIENA</name>
39351 <description>Enables the operation of MPU during hard
39352 fault</description>
39353 <bitOffset>1</bitOffset>
39354 <bitWidth>1</bitWidth>
39355 </field>
39356 <field>
39357 <name>PRIVDEFENA</name>
39358 <description>Enable priviliged software access to
39359 default memory map</description>
39360 <bitOffset>2</bitOffset>
39361 <bitWidth>1</bitWidth>
39362 </field>
39363 </fields>
39364 </register>
39365 <register>
39366 <name>MPU_RNR</name>
39367 <displayName>MPU_RNR</displayName>
39368 <description>MPU region number register</description>
39369 <addressOffset>0x8</addressOffset>
39370 <size>0x20</size>
39371 <access>read-write</access>
39372 <resetValue>0X00000000</resetValue>
39373 <fields>
39374 <field>
39375 <name>REGION</name>
39376 <description>MPU region</description>
39377 <bitOffset>0</bitOffset>
39378 <bitWidth>8</bitWidth>
39379 </field>
39380 </fields>
39381 </register>
39382 <register>
39383 <name>MPU_RBAR</name>
39384 <displayName>MPU_RBAR</displayName>
39385 <description>MPU region base address
39386 register</description>
39387 <addressOffset>0xC</addressOffset>
39388 <size>0x20</size>
39389 <access>read-write</access>
39390 <resetValue>0X00000000</resetValue>
39391 <fields>
39392 <field>
39393 <name>REGION</name>
39394 <description>MPU region field</description>
39395 <bitOffset>0</bitOffset>
39396 <bitWidth>4</bitWidth>
39397 </field>
39398 <field>
39399 <name>VALID</name>
39400 <description>MPU region number valid</description>
39401 <bitOffset>4</bitOffset>
39402 <bitWidth>1</bitWidth>
39403 </field>
39404 <field>
39405 <name>ADDR</name>
39406 <description>Region base address field</description>
39407 <bitOffset>5</bitOffset>
39408 <bitWidth>27</bitWidth>
39409 </field>
39410 </fields>
39411 </register>
39412 <register>
39413 <name>MPU_RASR</name>
39414 <displayName>MPU_RASR</displayName>
39415 <description>MPU region attribute and size
39416 register</description>
39417 <addressOffset>0x10</addressOffset>
39418 <size>0x20</size>
39419 <access>read-write</access>
39420 <resetValue>0X00000000</resetValue>
39421 <fields>
39422 <field>
39423 <name>ENABLE</name>
39424 <description>Region enable bit.</description>
39425 <bitOffset>0</bitOffset>
39426 <bitWidth>1</bitWidth>
39427 </field>
39428 <field>
39429 <name>SIZE</name>
39430 <description>Size of the MPU protection
39431 region</description>
39432 <bitOffset>1</bitOffset>
39433 <bitWidth>5</bitWidth>
39434 </field>
39435 <field>
39436 <name>SRD</name>
39437 <description>Subregion disable bits</description>
39438 <bitOffset>8</bitOffset>
39439 <bitWidth>8</bitWidth>
39440 </field>
39441 <field>
39442 <name>B</name>
39443 <description>memory attribute</description>
39444 <bitOffset>16</bitOffset>
39445 <bitWidth>1</bitWidth>
39446 </field>
39447 <field>
39448 <name>C</name>
39449 <description>memory attribute</description>
39450 <bitOffset>17</bitOffset>
39451 <bitWidth>1</bitWidth>
39452 </field>
39453 <field>
39454 <name>S</name>
39455 <description>Shareable memory attribute</description>
39456 <bitOffset>18</bitOffset>
39457 <bitWidth>1</bitWidth>
39458 </field>
39459 <field>
39460 <name>TEX</name>
39461 <description>memory attribute</description>
39462 <bitOffset>19</bitOffset>
39463 <bitWidth>3</bitWidth>
39464 </field>
39465 <field>
39466 <name>AP</name>
39467 <description>Access permission</description>
39468 <bitOffset>24</bitOffset>
39469 <bitWidth>3</bitWidth>
39470 </field>
39471 <field>
39472 <name>XN</name>
39473 <description>Instruction access disable
39474 bit</description>
39475 <bitOffset>28</bitOffset>
39476 <bitWidth>1</bitWidth>
39477 </field>
39478 </fields>
39479 </register>
39480 </registers>
39481 </peripheral>
39482 <peripheral>
39483 <name>STK</name>
39484 <description>SysTick timer</description>
39485 <groupName>STK</groupName>
39486 <baseAddress>0xE000E010</baseAddress>
39487 <addressBlock>
39488 <offset>0x0</offset>
39489 <size>0x11</size>
39490 <usage>registers</usage>
39491 </addressBlock>
39492 <registers>
39493 <register>
39494 <name>CTRL</name>
39495 <displayName>CTRL</displayName>
39496 <description>SysTick control and status
39497 register</description>
39498 <addressOffset>0x0</addressOffset>
39499 <size>0x20</size>
39500 <access>read-write</access>
39501 <resetValue>0X00000000</resetValue>
39502 <fields>
39503 <field>
39504 <name>ENABLE</name>
39505 <description>Counter enable</description>
39506 <bitOffset>0</bitOffset>
39507 <bitWidth>1</bitWidth>
39508 </field>
39509 <field>
39510 <name>TICKINT</name>
39511 <description>SysTick exception request
39512 enable</description>
39513 <bitOffset>1</bitOffset>
39514 <bitWidth>1</bitWidth>
39515 </field>
39516 <field>
39517 <name>CLKSOURCE</name>
39518 <description>Clock source selection</description>
39519 <bitOffset>2</bitOffset>
39520 <bitWidth>1</bitWidth>
39521 </field>
39522 <field>
39523 <name>COUNTFLAG</name>
39524 <description>COUNTFLAG</description>
39525 <bitOffset>16</bitOffset>
39526 <bitWidth>1</bitWidth>
39527 </field>
39528 </fields>
39529 </register>
39530 <register>
39531 <name>LOAD</name>
39532 <displayName>LOAD</displayName>
39533 <description>SysTick reload value register</description>
39534 <addressOffset>0x4</addressOffset>
39535 <size>0x20</size>
39536 <access>read-write</access>
39537 <resetValue>0X00000000</resetValue>
39538 <fields>
39539 <field>
39540 <name>RELOAD</name>
39541 <description>RELOAD value</description>
39542 <bitOffset>0</bitOffset>
39543 <bitWidth>24</bitWidth>
39544 </field>
39545 </fields>
39546 </register>
39547 <register>
39548 <name>VAL</name>
39549 <displayName>VAL</displayName>
39550 <description>SysTick current value register</description>
39551 <addressOffset>0x8</addressOffset>
39552 <size>0x20</size>
39553 <access>read-write</access>
39554 <resetValue>0X00000000</resetValue>
39555 <fields>
39556 <field>
39557 <name>CURRENT</name>
39558 <description>Current counter value</description>
39559 <bitOffset>0</bitOffset>
39560 <bitWidth>24</bitWidth>
39561 </field>
39562 </fields>
39563 </register>
39564 <register>
39565 <name>CALIB</name>
39566 <displayName>CALIB</displayName>
39567 <description>SysTick calibration value
39568 register</description>
39569 <addressOffset>0xC</addressOffset>
39570 <size>0x20</size>
39571 <access>read-write</access>
39572 <resetValue>0X00000000</resetValue>
39573 <fields>
39574 <field>
39575 <name>TENMS</name>
39576 <description>Calibration value</description>
39577 <bitOffset>0</bitOffset>
39578 <bitWidth>24</bitWidth>
39579 </field>
39580 <field>
39581 <name>SKEW</name>
39582 <description>SKEW flag: Indicates whether the TENMS
39583 value is exact</description>
39584 <bitOffset>30</bitOffset>
39585 <bitWidth>1</bitWidth>
39586 </field>
39587 <field>
39588 <name>NOREF</name>
39589 <description>NOREF flag. Reads as zero</description>
39590 <bitOffset>31</bitOffset>
39591 <bitWidth>1</bitWidth>
39592 </field>
39593 </fields>
39594 </register>
39595 </registers>
39596 </peripheral>
39597 <peripheral>
39598 <name>SCB</name>
39599 <description>System control block</description>
39600 <groupName>SCB</groupName>
39601 <baseAddress>0xE000ED00</baseAddress>
39602 <addressBlock>
39603 <offset>0x0</offset>
39604 <size>0x41</size>
39605 <usage>registers</usage>
39606 </addressBlock>
39607 <registers>
39608 <register>
39609 <name>CPUID</name>
39610 <displayName>CPUID</displayName>
39611 <description>CPUID base register</description>
39612 <addressOffset>0x0</addressOffset>
39613 <size>0x20</size>
39614 <access>read-only</access>
39615 <resetValue>0x410FC241</resetValue>
39616 <fields>
39617 <field>
39618 <name>Revision</name>
39619 <description>Revision number</description>
39620 <bitOffset>0</bitOffset>
39621 <bitWidth>4</bitWidth>
39622 </field>
39623 <field>
39624 <name>PartNo</name>
39625 <description>Part number of the
39626 processor</description>
39627 <bitOffset>4</bitOffset>
39628 <bitWidth>12</bitWidth>
39629 </field>
39630 <field>
39631 <name>Constant</name>
39632 <description>Reads as 0xF</description>
39633 <bitOffset>16</bitOffset>
39634 <bitWidth>4</bitWidth>
39635 </field>
39636 <field>
39637 <name>Variant</name>
39638 <description>Variant number</description>
39639 <bitOffset>20</bitOffset>
39640 <bitWidth>4</bitWidth>
39641 </field>
39642 <field>
39643 <name>Implementer</name>
39644 <description>Implementer code</description>
39645 <bitOffset>24</bitOffset>
39646 <bitWidth>8</bitWidth>
39647 </field>
39648 </fields>
39649 </register>
39650 <register>
39651 <name>ICSR</name>
39652 <displayName>ICSR</displayName>
39653 <description>Interrupt control and state
39654 register</description>
39655 <addressOffset>0x4</addressOffset>
39656 <size>0x20</size>
39657 <access>read-write</access>
39658 <resetValue>0x00000000</resetValue>
39659 <fields>
39660 <field>
39661 <name>VECTACTIVE</name>
39662 <description>Active vector</description>
39663 <bitOffset>0</bitOffset>
39664 <bitWidth>9</bitWidth>
39665 </field>
39666 <field>
39667 <name>RETTOBASE</name>
39668 <description>Return to base level</description>
39669 <bitOffset>11</bitOffset>
39670 <bitWidth>1</bitWidth>
39671 </field>
39672 <field>
39673 <name>VECTPENDING</name>
39674 <description>Pending vector</description>
39675 <bitOffset>12</bitOffset>
39676 <bitWidth>7</bitWidth>
39677 </field>
39678 <field>
39679 <name>ISRPENDING</name>
39680 <description>Interrupt pending flag</description>
39681 <bitOffset>22</bitOffset>
39682 <bitWidth>1</bitWidth>
39683 </field>
39684 <field>
39685 <name>PENDSTCLR</name>
39686 <description>SysTick exception clear-pending
39687 bit</description>
39688 <bitOffset>25</bitOffset>
39689 <bitWidth>1</bitWidth>
39690 </field>
39691 <field>
39692 <name>PENDSTSET</name>
39693 <description>SysTick exception set-pending
39694 bit</description>
39695 <bitOffset>26</bitOffset>
39696 <bitWidth>1</bitWidth>
39697 </field>
39698 <field>
39699 <name>PENDSVCLR</name>
39700 <description>PendSV clear-pending bit</description>
39701 <bitOffset>27</bitOffset>
39702 <bitWidth>1</bitWidth>
39703 </field>
39704 <field>
39705 <name>PENDSVSET</name>
39706 <description>PendSV set-pending bit</description>
39707 <bitOffset>28</bitOffset>
39708 <bitWidth>1</bitWidth>
39709 </field>
39710 <field>
39711 <name>NMIPENDSET</name>
39712 <description>NMI set-pending bit.</description>
39713 <bitOffset>31</bitOffset>
39714 <bitWidth>1</bitWidth>
39715 </field>
39716 </fields>
39717 </register>
39718 <register>
39719 <name>VTOR</name>
39720 <displayName>VTOR</displayName>
39721 <description>Vector table offset register</description>
39722 <addressOffset>0x8</addressOffset>
39723 <size>0x20</size>
39724 <access>read-write</access>
39725 <resetValue>0x00000000</resetValue>
39726 <fields>
39727 <field>
39728 <name>TBLOFF</name>
39729 <description>Vector table base offset
39730 field</description>
39731 <bitOffset>9</bitOffset>
39732 <bitWidth>21</bitWidth>
39733 </field>
39734 </fields>
39735 </register>
39736 <register>
39737 <name>AIRCR</name>
39738 <displayName>AIRCR</displayName>
39739 <description>Application interrupt and reset control
39740 register</description>
39741 <addressOffset>0xC</addressOffset>
39742 <size>0x20</size>
39743 <access>read-write</access>
39744 <resetValue>0x00000000</resetValue>
39745 <fields>
39746 <field>
39747 <name>VECTRESET</name>
39748 <description>VECTRESET</description>
39749 <bitOffset>0</bitOffset>
39750 <bitWidth>1</bitWidth>
39751 </field>
39752 <field>
39753 <name>VECTCLRACTIVE</name>
39754 <description>VECTCLRACTIVE</description>
39755 <bitOffset>1</bitOffset>
39756 <bitWidth>1</bitWidth>
39757 </field>
39758 <field>
39759 <name>SYSRESETREQ</name>
39760 <description>SYSRESETREQ</description>
39761 <bitOffset>2</bitOffset>
39762 <bitWidth>1</bitWidth>
39763 </field>
39764 <field>
39765 <name>PRIGROUP</name>
39766 <description>PRIGROUP</description>
39767 <bitOffset>8</bitOffset>
39768 <bitWidth>3</bitWidth>
39769 </field>
39770 <field>
39771 <name>ENDIANESS</name>
39772 <description>ENDIANESS</description>
39773 <bitOffset>15</bitOffset>
39774 <bitWidth>1</bitWidth>
39775 </field>
39776 <field>
39777 <name>VECTKEYSTAT</name>
39778 <description>Register key</description>
39779 <bitOffset>16</bitOffset>
39780 <bitWidth>16</bitWidth>
39781 </field>
39782 </fields>
39783 </register>
39784 <register>
39785 <name>SCR</name>
39786 <displayName>SCR</displayName>
39787 <description>System control register</description>
39788 <addressOffset>0x10</addressOffset>
39789 <size>0x20</size>
39790 <access>read-write</access>
39791 <resetValue>0x00000000</resetValue>
39792 <fields>
39793 <field>
39794 <name>SLEEPONEXIT</name>
39795 <description>SLEEPONEXIT</description>
39796 <bitOffset>1</bitOffset>
39797 <bitWidth>1</bitWidth>
39798 </field>
39799 <field>
39800 <name>SLEEPDEEP</name>
39801 <description>SLEEPDEEP</description>
39802 <bitOffset>2</bitOffset>
39803 <bitWidth>1</bitWidth>
39804 </field>
39805 <field>
39806 <name>SEVEONPEND</name>
39807 <description>Send Event on Pending bit</description>
39808 <bitOffset>4</bitOffset>
39809 <bitWidth>1</bitWidth>
39810 </field>
39811 </fields>
39812 </register>
39813 <register>
39814 <name>CCR</name>
39815 <displayName>CCR</displayName>
39816 <description>Configuration and control
39817 register</description>
39818 <addressOffset>0x14</addressOffset>
39819 <size>0x20</size>
39820 <access>read-write</access>
39821 <resetValue>0x00000000</resetValue>
39822 <fields>
39823 <field>
39824 <name>NONBASETHRDENA</name>
39825 <description>Configures how the processor enters
39826 Thread mode</description>
39827 <bitOffset>0</bitOffset>
39828 <bitWidth>1</bitWidth>
39829 </field>
39830 <field>
39831 <name>USERSETMPEND</name>
39832 <description>USERSETMPEND</description>
39833 <bitOffset>1</bitOffset>
39834 <bitWidth>1</bitWidth>
39835 </field>
39836 <field>
39837 <name>UNALIGN__TRP</name>
39838 <description>UNALIGN_ TRP</description>
39839 <bitOffset>3</bitOffset>
39840 <bitWidth>1</bitWidth>
39841 </field>
39842 <field>
39843 <name>DIV_0_TRP</name>
39844 <description>DIV_0_TRP</description>
39845 <bitOffset>4</bitOffset>
39846 <bitWidth>1</bitWidth>
39847 </field>
39848 <field>
39849 <name>BFHFNMIGN</name>
39850 <description>BFHFNMIGN</description>
39851 <bitOffset>8</bitOffset>
39852 <bitWidth>1</bitWidth>
39853 </field>
39854 <field>
39855 <name>STKALIGN</name>
39856 <description>STKALIGN</description>
39857 <bitOffset>9</bitOffset>
39858 <bitWidth>1</bitWidth>
39859 </field>
39860 </fields>
39861 </register>
39862 <register>
39863 <name>SHPR1</name>
39864 <displayName>SHPR1</displayName>
39865 <description>System handler priority
39866 registers</description>
39867 <addressOffset>0x18</addressOffset>
39868 <size>0x20</size>
39869 <access>read-write</access>
39870 <resetValue>0x00000000</resetValue>
39871 <fields>
39872 <field>
39873 <name>PRI_4</name>
39874 <description>Priority of system handler
39875 4</description>
39876 <bitOffset>0</bitOffset>
39877 <bitWidth>8</bitWidth>
39878 </field>
39879 <field>
39880 <name>PRI_5</name>
39881 <description>Priority of system handler
39882 5</description>
39883 <bitOffset>8</bitOffset>
39884 <bitWidth>8</bitWidth>
39885 </field>
39886 <field>
39887 <name>PRI_6</name>
39888 <description>Priority of system handler
39889 6</description>
39890 <bitOffset>16</bitOffset>
39891 <bitWidth>8</bitWidth>
39892 </field>
39893 </fields>
39894 </register>
39895 <register>
39896 <name>SHPR2</name>
39897 <displayName>SHPR2</displayName>
39898 <description>System handler priority
39899 registers</description>
39900 <addressOffset>0x1C</addressOffset>
39901 <size>0x20</size>
39902 <access>read-write</access>
39903 <resetValue>0x00000000</resetValue>
39904 <fields>
39905 <field>
39906 <name>PRI_11</name>
39907 <description>Priority of system handler
39908 11</description>
39909 <bitOffset>24</bitOffset>
39910 <bitWidth>8</bitWidth>
39911 </field>
39912 </fields>
39913 </register>
39914 <register>
39915 <name>SHPR3</name>
39916 <displayName>SHPR3</displayName>
39917 <description>System handler priority
39918 registers</description>
39919 <addressOffset>0x20</addressOffset>
39920 <size>0x20</size>
39921 <access>read-write</access>
39922 <resetValue>0x00000000</resetValue>
39923 <fields>
39924 <field>
39925 <name>PRI_14</name>
39926 <description>Priority of system handler
39927 14</description>
39928 <bitOffset>16</bitOffset>
39929 <bitWidth>8</bitWidth>
39930 </field>
39931 <field>
39932 <name>PRI_15</name>
39933 <description>Priority of system handler
39934 15</description>
39935 <bitOffset>24</bitOffset>
39936 <bitWidth>8</bitWidth>
39937 </field>
39938 </fields>
39939 </register>
39940 <register>
39941 <name>SHCRS</name>
39942 <displayName>SHCRS</displayName>
39943 <description>System handler control and state
39944 register</description>
39945 <addressOffset>0x24</addressOffset>
39946 <size>0x20</size>
39947 <access>read-write</access>
39948 <resetValue>0x00000000</resetValue>
39949 <fields>
39950 <field>
39951 <name>MEMFAULTACT</name>
39952 <description>Memory management fault exception active
39953 bit</description>
39954 <bitOffset>0</bitOffset>
39955 <bitWidth>1</bitWidth>
39956 </field>
39957 <field>
39958 <name>BUSFAULTACT</name>
39959 <description>Bus fault exception active
39960 bit</description>
39961 <bitOffset>1</bitOffset>
39962 <bitWidth>1</bitWidth>
39963 </field>
39964 <field>
39965 <name>USGFAULTACT</name>
39966 <description>Usage fault exception active
39967 bit</description>
39968 <bitOffset>3</bitOffset>
39969 <bitWidth>1</bitWidth>
39970 </field>
39971 <field>
39972 <name>SVCALLACT</name>
39973 <description>SVC call active bit</description>
39974 <bitOffset>7</bitOffset>
39975 <bitWidth>1</bitWidth>
39976 </field>
39977 <field>
39978 <name>MONITORACT</name>
39979 <description>Debug monitor active bit</description>
39980 <bitOffset>8</bitOffset>
39981 <bitWidth>1</bitWidth>
39982 </field>
39983 <field>
39984 <name>PENDSVACT</name>
39985 <description>PendSV exception active
39986 bit</description>
39987 <bitOffset>10</bitOffset>
39988 <bitWidth>1</bitWidth>
39989 </field>
39990 <field>
39991 <name>SYSTICKACT</name>
39992 <description>SysTick exception active
39993 bit</description>
39994 <bitOffset>11</bitOffset>
39995 <bitWidth>1</bitWidth>
39996 </field>
39997 <field>
39998 <name>USGFAULTPENDED</name>
39999 <description>Usage fault exception pending
40000 bit</description>
40001 <bitOffset>12</bitOffset>
40002 <bitWidth>1</bitWidth>
40003 </field>
40004 <field>
40005 <name>MEMFAULTPENDED</name>
40006 <description>Memory management fault exception
40007 pending bit</description>
40008 <bitOffset>13</bitOffset>
40009 <bitWidth>1</bitWidth>
40010 </field>
40011 <field>
40012 <name>BUSFAULTPENDED</name>
40013 <description>Bus fault exception pending
40014 bit</description>
40015 <bitOffset>14</bitOffset>
40016 <bitWidth>1</bitWidth>
40017 </field>
40018 <field>
40019 <name>SVCALLPENDED</name>
40020 <description>SVC call pending bit</description>
40021 <bitOffset>15</bitOffset>
40022 <bitWidth>1</bitWidth>
40023 </field>
40024 <field>
40025 <name>MEMFAULTENA</name>
40026 <description>Memory management fault enable
40027 bit</description>
40028 <bitOffset>16</bitOffset>
40029 <bitWidth>1</bitWidth>
40030 </field>
40031 <field>
40032 <name>BUSFAULTENA</name>
40033 <description>Bus fault enable bit</description>
40034 <bitOffset>17</bitOffset>
40035 <bitWidth>1</bitWidth>
40036 </field>
40037 <field>
40038 <name>USGFAULTENA</name>
40039 <description>Usage fault enable bit</description>
40040 <bitOffset>18</bitOffset>
40041 <bitWidth>1</bitWidth>
40042 </field>
40043 </fields>
40044 </register>
40045 <register>
40046 <name>CFSR_UFSR_BFSR_MMFSR</name>
40047 <displayName>CFSR_UFSR_BFSR_MMFSR</displayName>
40048 <description>Configurable fault status
40049 register</description>
40050 <addressOffset>0x28</addressOffset>
40051 <size>0x20</size>
40052 <access>read-write</access>
40053 <resetValue>0x00000000</resetValue>
40054 <fields>
40055 <field>
40056 <name>IACCVIOL</name>
40057 <description>Instruction access violation
40058 flag</description>
40059 <bitOffset>1</bitOffset>
40060 <bitWidth>1</bitWidth>
40061 </field>
40062 <field>
40063 <name>MUNSTKERR</name>
40064 <description>Memory manager fault on unstacking for a
40065 return from exception</description>
40066 <bitOffset>3</bitOffset>
40067 <bitWidth>1</bitWidth>
40068 </field>
40069 <field>
40070 <name>MSTKERR</name>
40071 <description>Memory manager fault on stacking for
40072 exception entry.</description>
40073 <bitOffset>4</bitOffset>
40074 <bitWidth>1</bitWidth>
40075 </field>
40076 <field>
40077 <name>MLSPERR</name>
40078 <description>MLSPERR</description>
40079 <bitOffset>5</bitOffset>
40080 <bitWidth>1</bitWidth>
40081 </field>
40082 <field>
40083 <name>MMARVALID</name>
40084 <description>Memory Management Fault Address Register
40085 (MMAR) valid flag</description>
40086 <bitOffset>7</bitOffset>
40087 <bitWidth>1</bitWidth>
40088 </field>
40089 <field>
40090 <name>IBUSERR</name>
40091 <description>Instruction bus error</description>
40092 <bitOffset>8</bitOffset>
40093 <bitWidth>1</bitWidth>
40094 </field>
40095 <field>
40096 <name>PRECISERR</name>
40097 <description>Precise data bus error</description>
40098 <bitOffset>9</bitOffset>
40099 <bitWidth>1</bitWidth>
40100 </field>
40101 <field>
40102 <name>IMPRECISERR</name>
40103 <description>Imprecise data bus error</description>
40104 <bitOffset>10</bitOffset>
40105 <bitWidth>1</bitWidth>
40106 </field>
40107 <field>
40108 <name>UNSTKERR</name>
40109 <description>Bus fault on unstacking for a return
40110 from exception</description>
40111 <bitOffset>11</bitOffset>
40112 <bitWidth>1</bitWidth>
40113 </field>
40114 <field>
40115 <name>STKERR</name>
40116 <description>Bus fault on stacking for exception
40117 entry</description>
40118 <bitOffset>12</bitOffset>
40119 <bitWidth>1</bitWidth>
40120 </field>
40121 <field>
40122 <name>LSPERR</name>
40123 <description>Bus fault on floating-point lazy state
40124 preservation</description>
40125 <bitOffset>13</bitOffset>
40126 <bitWidth>1</bitWidth>
40127 </field>
40128 <field>
40129 <name>BFARVALID</name>
40130 <description>Bus Fault Address Register (BFAR) valid
40131 flag</description>
40132 <bitOffset>15</bitOffset>
40133 <bitWidth>1</bitWidth>
40134 </field>
40135 <field>
40136 <name>UNDEFINSTR</name>
40137 <description>Undefined instruction usage
40138 fault</description>
40139 <bitOffset>16</bitOffset>
40140 <bitWidth>1</bitWidth>
40141 </field>
40142 <field>
40143 <name>INVSTATE</name>
40144 <description>Invalid state usage fault</description>
40145 <bitOffset>17</bitOffset>
40146 <bitWidth>1</bitWidth>
40147 </field>
40148 <field>
40149 <name>INVPC</name>
40150 <description>Invalid PC load usage
40151 fault</description>
40152 <bitOffset>18</bitOffset>
40153 <bitWidth>1</bitWidth>
40154 </field>
40155 <field>
40156 <name>NOCP</name>
40157 <description>No coprocessor usage
40158 fault.</description>
40159 <bitOffset>19</bitOffset>
40160 <bitWidth>1</bitWidth>
40161 </field>
40162 <field>
40163 <name>UNALIGNED</name>
40164 <description>Unaligned access usage
40165 fault</description>
40166 <bitOffset>24</bitOffset>
40167 <bitWidth>1</bitWidth>
40168 </field>
40169 <field>
40170 <name>DIVBYZERO</name>
40171 <description>Divide by zero usage fault</description>
40172 <bitOffset>25</bitOffset>
40173 <bitWidth>1</bitWidth>
40174 </field>
40175 </fields>
40176 </register>
40177 <register>
40178 <name>HFSR</name>
40179 <displayName>HFSR</displayName>
40180 <description>Hard fault status register</description>
40181 <addressOffset>0x2C</addressOffset>
40182 <size>0x20</size>
40183 <access>read-write</access>
40184 <resetValue>0x00000000</resetValue>
40185 <fields>
40186 <field>
40187 <name>VECTTBL</name>
40188 <description>Vector table hard fault</description>
40189 <bitOffset>1</bitOffset>
40190 <bitWidth>1</bitWidth>
40191 </field>
40192 <field>
40193 <name>FORCED</name>
40194 <description>Forced hard fault</description>
40195 <bitOffset>30</bitOffset>
40196 <bitWidth>1</bitWidth>
40197 </field>
40198 <field>
40199 <name>DEBUG_VT</name>
40200 <description>Reserved for Debug use</description>
40201 <bitOffset>31</bitOffset>
40202 <bitWidth>1</bitWidth>
40203 </field>
40204 </fields>
40205 </register>
40206 <register>
40207 <name>MMFAR</name>
40208 <displayName>MMFAR</displayName>
40209 <description>Memory management fault address
40210 register</description>
40211 <addressOffset>0x34</addressOffset>
40212 <size>0x20</size>
40213 <access>read-write</access>
40214 <resetValue>0x00000000</resetValue>
40215 <fields>
40216 <field>
40217 <name>MMFAR</name>
40218 <description>Memory management fault
40219 address</description>
40220 <bitOffset>0</bitOffset>
40221 <bitWidth>32</bitWidth>
40222 </field>
40223 </fields>
40224 </register>
40225 <register>
40226 <name>BFAR</name>
40227 <displayName>BFAR</displayName>
40228 <description>Bus fault address register</description>
40229 <addressOffset>0x38</addressOffset>
40230 <size>0x20</size>
40231 <access>read-write</access>
40232 <resetValue>0x00000000</resetValue>
40233 <fields>
40234 <field>
40235 <name>BFAR</name>
40236 <description>Bus fault address</description>
40237 <bitOffset>0</bitOffset>
40238 <bitWidth>32</bitWidth>
40239 </field>
40240 </fields>
40241 </register>
40242 <register>
40243 <name>AFSR</name>
40244 <displayName>AFSR</displayName>
40245 <description>Auxiliary fault status
40246 register</description>
40247 <addressOffset>0x3C</addressOffset>
40248 <size>0x20</size>
40249 <access>read-write</access>
40250 <resetValue>0x00000000</resetValue>
40251 <fields>
40252 <field>
40253 <name>IMPDEF</name>
40254 <description>Implementation defined</description>
40255 <bitOffset>0</bitOffset>
40256 <bitWidth>32</bitWidth>
40257 </field>
40258 </fields>
40259 </register>
40260 </registers>
40261 </peripheral>
40262 <peripheral>
40263 <name>NVIC_STIR</name>
40264 <description>Nested vectored interrupt
40265 controller</description>
40266 <groupName>NVIC</groupName>
40267 <baseAddress>0xE000EF00</baseAddress>
40268 <addressBlock>
40269 <offset>0x0</offset>
40270 <size>0x5</size>
40271 <usage>registers</usage>
40272 </addressBlock>
40273 <registers>
40274 <register>
40275 <name>STIR</name>
40276 <displayName>STIR</displayName>
40277 <description>Software trigger interrupt
40278 register</description>
40279 <addressOffset>0x0</addressOffset>
40280 <size>0x20</size>
40281 <access>read-write</access>
40282 <resetValue>0x00000000</resetValue>
40283 <fields>
40284 <field>
40285 <name>INTID</name>
40286 <description>Software generated interrupt
40287 ID</description>
40288 <bitOffset>0</bitOffset>
40289 <bitWidth>9</bitWidth>
40290 </field>
40291 </fields>
40292 </register>
40293 </registers>
40294 </peripheral>
40295 <peripheral>
40296 <name>FPU_CPACR</name>
40297 <description>Floating point unit CPACR</description>
40298 <groupName>FPU</groupName>
40299 <baseAddress>0xE000ED88</baseAddress>
40300 <addressBlock>
40301 <offset>0x0</offset>
40302 <size>0x5</size>
40303 <usage>registers</usage>
40304 </addressBlock>
40305 <registers>
40306 <register>
40307 <name>CPACR</name>
40308 <displayName>CPACR</displayName>
40309 <description>Coprocessor access control
40310 register</description>
40311 <addressOffset>0x0</addressOffset>
40312 <size>0x20</size>
40313 <access>read-write</access>
40314 <resetValue>0x0000000</resetValue>
40315 <fields>
40316 <field>
40317 <name>CP</name>
40318 <description>CP</description>
40319 <bitOffset>20</bitOffset>
40320 <bitWidth>4</bitWidth>
40321 </field>
40322 </fields>
40323 </register>
40324 </registers>
40325 </peripheral>
40326 <peripheral>
40327 <name>SCB_ACTRL</name>
40328 <description>System control block ACTLR</description>
40329 <groupName>SCB</groupName>
40330 <baseAddress>0xE000E008</baseAddress>
40331 <addressBlock>
40332 <offset>0x0</offset>
40333 <size>0x5</size>
40334 <usage>registers</usage>
40335 </addressBlock>
40336 <registers>
40337 <register>
40338 <name>ACTRL</name>
40339 <displayName>ACTRL</displayName>
40340 <description>Auxiliary control register</description>
40341 <addressOffset>0x0</addressOffset>
40342 <size>0x20</size>
40343 <access>read-write</access>
40344 <resetValue>0x00000000</resetValue>
40345 <fields>
40346 <field>
40347 <name>DISMCYCINT</name>
40348 <description>DISMCYCINT</description>
40349 <bitOffset>0</bitOffset>
40350 <bitWidth>1</bitWidth>
40351 </field>
40352 <field>
40353 <name>DISDEFWBUF</name>
40354 <description>DISDEFWBUF</description>
40355 <bitOffset>1</bitOffset>
40356 <bitWidth>1</bitWidth>
40357 </field>
40358 <field>
40359 <name>DISFOLD</name>
40360 <description>DISFOLD</description>
40361 <bitOffset>2</bitOffset>
40362 <bitWidth>1</bitWidth>
40363 </field>
40364 <field>
40365 <name>DISFPCA</name>
40366 <description>DISFPCA</description>
40367 <bitOffset>8</bitOffset>
40368 <bitWidth>1</bitWidth>
40369 </field>
40370 <field>
40371 <name>DISOOFP</name>
40372 <description>DISOOFP</description>
40373 <bitOffset>9</bitOffset>
40374 <bitWidth>1</bitWidth>
40375 </field>
40376 </fields>
40377 </register>
40378 </registers>
40379 </peripheral>
40380 </peripherals>
40381 </device>