Blackbox device type 'file' (SITL) considered working when file handler is available
[inav.git] / src / main / drivers / dma_stm32f7xx.c
blob295b3c8e6585725a6eea1b0ef8e452336c4e2c39
1 /*
2 * This file is part of Cleanflight.
4 * Cleanflight is free software: you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation, either version 3 of the License, or
7 * (at your option) any later version.
9 * Cleanflight is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with Cleanflight. If not, see <http://www.gnu.org/licenses/>.
18 #include <stdbool.h>
19 #include <stdint.h>
20 #include <string.h>
22 #include <platform.h>
24 #include "common/utils.h"
25 #include "drivers/nvic.h"
26 #include "drivers/dma.h"
27 #include "drivers/rcc.h"
30 * DMA descriptors.
32 static dmaChannelDescriptor_t dmaDescriptors[] = {
33 [0] = DEFINE_DMA_CHANNEL(1, 0, 0), // DMA1_ST0
34 [1] = DEFINE_DMA_CHANNEL(1, 1, 6), // DMA1_ST1
35 [2] = DEFINE_DMA_CHANNEL(1, 2, 16), // DMA1_ST2
36 [3] = DEFINE_DMA_CHANNEL(1, 3, 22), // DMA1_ST3
37 [4] = DEFINE_DMA_CHANNEL(1, 4, 32), // DMA1_ST4
38 [5] = DEFINE_DMA_CHANNEL(1, 5, 38), // DMA1_ST5
39 [6] = DEFINE_DMA_CHANNEL(1, 6, 48), // DMA1_ST6
40 [7] = DEFINE_DMA_CHANNEL(1, 7, 54), // DMA1_ST7
42 [8] = DEFINE_DMA_CHANNEL(2, 0, 0), // DMA2_ST0
43 [9] = DEFINE_DMA_CHANNEL(2, 1, 6), // DMA2_ST1
44 [10] = DEFINE_DMA_CHANNEL(2, 2, 16), // DMA2_ST2
45 [11] = DEFINE_DMA_CHANNEL(2, 3, 22), // DMA2_ST3
46 [12] = DEFINE_DMA_CHANNEL(2, 4, 32), // DMA2_ST4
47 [13] = DEFINE_DMA_CHANNEL(2, 5, 38), // DMA2_ST5
48 [14] = DEFINE_DMA_CHANNEL(2, 6, 48), // DMA2_ST6
49 [15] = DEFINE_DMA_CHANNEL(2, 7, 54) // DMA2_ST7
53 * DMA IRQ Handlers
55 DEFINE_DMA_IRQ_HANDLER(1, 0, 0) // DMA1_ST0 = dmaDescriptors[0]
56 DEFINE_DMA_IRQ_HANDLER(1, 1, 1)
57 DEFINE_DMA_IRQ_HANDLER(1, 2, 2)
58 DEFINE_DMA_IRQ_HANDLER(1, 3, 3)
59 DEFINE_DMA_IRQ_HANDLER(1, 4, 4)
60 DEFINE_DMA_IRQ_HANDLER(1, 5, 5)
61 DEFINE_DMA_IRQ_HANDLER(1, 6, 6)
62 DEFINE_DMA_IRQ_HANDLER(1, 7, 7)
63 DEFINE_DMA_IRQ_HANDLER(2, 0, 8)
64 DEFINE_DMA_IRQ_HANDLER(2, 1, 9)
65 DEFINE_DMA_IRQ_HANDLER(2, 2, 10)
66 DEFINE_DMA_IRQ_HANDLER(2, 3, 11)
67 DEFINE_DMA_IRQ_HANDLER(2, 4, 12)
68 DEFINE_DMA_IRQ_HANDLER(2, 5, 13)
69 DEFINE_DMA_IRQ_HANDLER(2, 6, 14)
70 DEFINE_DMA_IRQ_HANDLER(2, 7, 15)
72 DMA_t dmaGetByTag(dmaTag_t tag)
74 for (unsigned i = 0; i < ARRAYLEN(dmaDescriptors); i++) {
75 // On F4/F7 we match only DMA and Stream. Channel is needed when connecting DMA to peripheral
76 if (DMATAG_GET_DMA(dmaDescriptors[i].tag) == DMATAG_GET_DMA(tag) && DMATAG_GET_STREAM(dmaDescriptors[i].tag) == DMATAG_GET_STREAM(tag)) {
77 return (DMA_t)&dmaDescriptors[i];
81 return (DMA_t) NULL;
84 void dmaEnableClock(DMA_t dma)
86 if (dma->dma == DMA1) {
87 RCC_ClockCmd(RCC_AHB1(DMA1), ENABLE);
89 else {
90 RCC_ClockCmd(RCC_AHB1(DMA2), ENABLE);
94 resourceOwner_e dmaGetOwner(DMA_t dma)
96 return dma->owner;
99 void dmaInit(DMA_t dma, resourceOwner_e owner, uint8_t resourceIndex)
101 dmaEnableClock(dma);
102 dma->owner = owner;
103 dma->resourceIndex = resourceIndex;
106 void dmaSetHandler(DMA_t dma, dmaCallbackHandlerFuncPtr callback, uint32_t priority, uint32_t userParam)
108 dmaEnableClock(dma);
110 dma->irqHandlerCallback = callback;
111 dma->userParam = userParam;
113 HAL_NVIC_SetPriority(dma->irqNumber, priority, 0);
114 HAL_NVIC_EnableIRQ(dma->irqNumber);
117 uint32_t dmaGetChannelByTag(dmaTag_t tag)
119 static const uint32_t dmaChannel[8] = { DMA_CHANNEL_0, DMA_CHANNEL_1, DMA_CHANNEL_2, DMA_CHANNEL_3, DMA_CHANNEL_4, DMA_CHANNEL_5, DMA_CHANNEL_6, DMA_CHANNEL_7 };
120 return dmaChannel[DMATAG_GET_CHANNEL(tag)];
123 DMA_t dmaGetByRef(const DMA_Stream_TypeDef* ref)
125 for (unsigned i = 0; i < ARRAYLEN(dmaDescriptors); i++) {
126 if (ref == dmaDescriptors[i].ref) {
127 return &dmaDescriptors[i];
131 return NULL;