src/main/drivers/memprot_stm32h7xx.c

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include "platform.h"
  22
  23 #include "common/utils.h"
  24
  25 #include "memprot.h"
  26
  27 // Defined in linker script
  28 extern uint8_t dmaram_start;
  29 extern uint8_t dmaram_end;
  30
  31 extern uint8_t dmarwaxi_start;
  32 extern uint8_t dmarwaxi_end;
  33
  34 mpuRegion_t mpuRegions[] = {
  35 #ifdef USE_ITCM_RAM
  36     {
  37         //  Mark ITCM-RAM as read-only
  38         // "For Cortex®-M7, TCMs memories always behave as Non-cacheable, Non-shared normal memories, irrespective of the memory type attributes defined in the MPU for a memory region containing addresses held in the TCM"
  39         // See AN4838
  40         .start      = 0x00000000,
  41         .end        = 0, // Size defined by "size"
  42         .size       = MPU_REGION_SIZE_64KB,
  43         .perm       = MPU_REGION_PRIV_RO_URO,
  44         .exec       = MPU_INSTRUCTION_ACCESS_ENABLE,
  45         .shareable  = MPU_ACCESS_NOT_SHAREABLE,
  46         .cacheable  = MPU_ACCESS_NOT_CACHEABLE,
  47         .bufferable = MPU_ACCESS_BUFFERABLE,
  48     },
  49 #endif
  50     {
  51         // DMA transmit buffer in D2 SRAM1
  52         // Reading needs cache coherence operation
  53         .start      = (uint32_t)&dmaram_start,
  54         .end        = (uint32_t)&dmaram_end,
  55         .size       = 0,  // Size determined by ".end"
  56         .perm       = MPU_REGION_FULL_ACCESS,
  57         .exec       = MPU_INSTRUCTION_ACCESS_ENABLE,
  58         .shareable  = MPU_ACCESS_SHAREABLE,
  59         .cacheable  = MPU_ACCESS_CACHEABLE,
  60         .bufferable = MPU_ACCESS_NOT_BUFFERABLE,
  61     },
  62 #ifdef USE_SDCARD_SDIO
  63     {
  64         // A region in AXI RAM accessible from SDIO internal DMA
  65         .start      = (uint32_t)&dmarwaxi_start,
  66         .end        = (uint32_t)&dmarwaxi_end,
  67         .size       = 0,  // Size determined by ".end"
  68         .perm       = MPU_REGION_FULL_ACCESS,
  69         .exec       = MPU_INSTRUCTION_ACCESS_ENABLE,
  70         .shareable  = MPU_ACCESS_NOT_SHAREABLE,
  71         .cacheable  = MPU_ACCESS_CACHEABLE,
  72         .bufferable = MPU_ACCESS_NOT_BUFFERABLE,
  73     },
  74 #endif
  75 };
  76
  77 unsigned mpuRegionCount = ARRAYLEN(mpuRegions);
  78
  79 STATIC_ASSERT(ARRAYLEN(mpuRegions) <= MAX_MPU_REGIONS, MPU_region_count_exceeds_limit);