src/main/drivers/timer_def.h

   1 /*
   2  * This file is part of INAV.
   3  *
   4  * INAV is free software: you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation, either version 3 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * INAV is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with INAV.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #pragma once
  19
  20 #include "drivers/dma.h"
  21
  22 // Macros expand to keep DMA descriptor table compatible with Betaflight
  23 //0  TMR3_CH1
  24 // DEF_TIM_DMAMAP_VARIANT__0,  DEF_TIM_DMA__BTCH_TMR3_CH1
  25 // DEF_TIM_DMAMAP__D(1, 4, 5)
  26 #define DEF_TIM_DMAMAP(variant, timch) CONCAT(DEF_TIM_DMAMAP__, PP_CALL(CONCAT(DEF_TIM_DMAMAP_VARIANT__, variant), CONCAT(DEF_TIM_DMA__, DEF_TIM_TCH2BTCH(timch)), DMA_VARIANT_MISSING, DMA_VARIANT_MISSING))
  27 #define DEF_TIM_DMAMAP_VARIANT__0(_0, ...)                                                                      _0
  28 #define DEF_TIM_DMAMAP_VARIANT__1(_0, _1, ...)                                                                  _1
  29 #define DEF_TIM_DMAMAP_VARIANT__2(_0, _1, _2, ...)                                                              _2
  30 #define DEF_TIM_DMAMAP_VARIANT__3(_0, _1, _2, _3, ...)                                                          _3
  31 #define DEF_TIM_DMAMAP_VARIANT__4(_0, _1, _2, _3, _4, ...)                                                      _4
  32 #define DEF_TIM_DMAMAP_VARIANT__5(_0, _1, _2, _3, _4, _5, ...)                                                  _5
  33 #define DEF_TIM_DMAMAP_VARIANT__6(_0, _1, _2, _3, _4, _5, _6, ...)                                              _6
  34 #define DEF_TIM_DMAMAP_VARIANT__7(_0, _1, _2, _3, _4, _5, _6, _7, ...)                                          _7
  35 #define DEF_TIM_DMAMAP_VARIANT__8(_0, _1, _2, _3, _4, _5, _6, _7, _8, ...)                                      _8
  36 #define DEF_TIM_DMAMAP_VARIANT__9(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, ...)                                  _9
  37 #define DEF_TIM_DMAMAP_VARIANT__10(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, ...)                            _10
  38 #define DEF_TIM_DMAMAP_VARIANT__11(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, ...)                       _11
  39 #define DEF_TIM_DMAMAP_VARIANT__12(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, ...)                  _12
  40 #define DEF_TIM_DMAMAP_VARIANT__13(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, _13, ...)             _13
  41 #define DEF_TIM_DMAMAP_VARIANT__14(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, _13, _14, ...)        _14
  42 #define DEF_TIM_DMAMAP_VARIANT__15(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, _13, _14, _15, ...)   _15
  43
  44 // Timer channel indexes
  45 #define DEF_TIM_CHNL_CH1    0
  46 #define DEF_TIM_CHNL_CH1N   0
  47 #define DEF_TIM_CHNL_CH2    1
  48 #define DEF_TIM_CHNL_CH2N   1
  49 #define DEF_TIM_CHNL_CH3    2
  50 #define DEF_TIM_CHNL_CH3N   2
  51 #define DEF_TIM_CHNL_CH4    3
  52 #define DEF_TIM_CHNL_CH4N   3
  53
  54 // map to base channel (strip N from channel); works only when channel N exists
  55 //BTCH_TMR1_CH1N
  56 #define DEF_TIM_TCH2BTCH(timch) CONCAT(BTCH_, timch)
  57
  58 #if defined(AT32F43x)
  59 #define BTCH_TMR1_CH1N BTCH_TMR1_CH1
  60 #define BTCH_TMR1_CH2N BTCH_TMR1_CH2
  61 #define BTCH_TMR1_CH3N BTCH_TMR1_CH3
  62
  63 #define BTCH_TMR8_CH1N BTCH_TMR8_CH1
  64 #define BTCH_TMR8_CH2N BTCH_TMR8_CH2
  65 #define BTCH_TMR8_CH3N BTCH_TMR8_CH3
  66
  67 #define BTCH_TMR20_CH1N BTCH_TMR20_CH1
  68 #define BTCH_TMR20_CH2N BTCH_TMR20_CH2
  69 #define BTCH_TMR20_CH3N BTCH_TMR20_CH3
  70
  71 #define BTCH_TMR15_CH1N BTCH_TMR15_CH1
  72 #define BTCH_TMR16_CH1N BTCH_TMR16_CH1
  73 #else
  74
  75 #define BTCH_TIM1_CH1N BTCH_TIM1_CH1
  76 #define BTCH_TIM1_CH2N BTCH_TIM1_CH2
  77 #define BTCH_TIM1_CH3N BTCH_TIM1_CH3
  78
  79 #define BTCH_TIM8_CH1N BTCH_TIM8_CH1
  80 #define BTCH_TIM8_CH2N BTCH_TIM8_CH2
  81 #define BTCH_TIM8_CH3N BTCH_TIM8_CH3
  82
  83 #define BTCH_TIM20_CH1N BTCH_TIM20_CH1
  84 #define BTCH_TIM20_CH2N BTCH_TIM20_CH2
  85 #define BTCH_TIM20_CH3N BTCH_TIM20_CH3
  86
  87 #define BTCH_TIM15_CH1N BTCH_TIM15_CH1
  88 #define BTCH_TIM16_CH1N BTCH_TIM16_CH1
  89 #endif
  90
  91 // Default output flags
  92 #define DEF_TIM_OUTPUT(ch)                      DEF_TIM_OUTPUT__ ## ch
  93 #define DEF_TIM_OUTPUT__CH1                     (TIMER_OUTPUT_NONE)
  94 #define DEF_TIM_OUTPUT__CH2                     (TIMER_OUTPUT_NONE)
  95 #define DEF_TIM_OUTPUT__CH3                     (TIMER_OUTPUT_NONE)
  96 #define DEF_TIM_OUTPUT__CH4                     (TIMER_OUTPUT_NONE)
  97 #define DEF_TIM_OUTPUT__CH1N                    (TIMER_OUTPUT_N_CHANNEL)
  98 #define DEF_TIM_OUTPUT__CH2N                    (TIMER_OUTPUT_N_CHANNEL)
  99 #define DEF_TIM_OUTPUT__CH3N                    (TIMER_OUTPUT_N_CHANNEL)
 100 #define DEF_TIM_OUTPUT__CH4N                    (TIMER_OUTPUT_N_CHANNEL)
 101
 102 #if defined(STM32F4)
 103     #include "timer_def_stm32f4xx.h"
 104 #elif defined(STM32F7)
 105     #include "timer_def_stm32f7xx.h"
 106 #elif defined(STM32H7)
 107     #include "timer_def_stm32h7xx.h"
 108 #elif defined(AT32F43x)
 109     #include "timer_def_at32f43x.h"
 110 #elif defined(SITL_BUILD)
 111 #else
 112     #error "Unknown CPU defined"
 113 #endif