src/main/drivers/timer_def_stm32f7xx.h

   1 /*
   2  * This file is part of INAV.
   3  *
   4  * INAV is free software: you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation, either version 3 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * INAV is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with INAV.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #pragma once
  19
  20 #define timerDMASafeType_t  uint32_t
  21
  22 // Mappings for STDLIB defines
  23 // #define DEF_TIM_CHNL_CH1    TIM_CHANNEL_1
  24 // #define DEF_TIM_CHNL_CH1N   TIM_CHANNEL_1
  25 // #define DEF_TIM_CHNL_CH2    TIM_CHANNEL_2
  26 // #define DEF_TIM_CHNL_CH2N   TIM_CHANNEL_2
  27 // #define DEF_TIM_CHNL_CH3    TIM_CHANNEL_3
  28 // #define DEF_TIM_CHNL_CH3N   TIM_CHANNEL_3
  29 // #define DEF_TIM_CHNL_CH4    TIM_CHANNEL_4
  30 // #define DEF_TIM_CHNL_CH4N   TIM_CHANNEL_4
  31
  32 #define DEF_TIM_DMAMAP__D(dma, stream, channel)         DMA_TAG(dma, stream, channel)
  33 #define DEF_TIM_DMAMAP__NONE                            DMA_NONE
  34
  35 #define DEF_TIM(tim, ch, pin, usage, flags, dmavar)     { tim, IO_TAG(pin), DEF_TIM_CHNL_ ## ch, DEF_TIM_OUTPUT(ch) | flags, IOCFG_AF_PP, DEF_TIM_AF(TCH_## tim ## _ ## ch, pin), usage, DEF_TIM_DMAMAP(dmavar, tim ## _ ## ch) }
  36
  37 // AF mappings
  38 #define DEF_TIM_AF(timch, pin)        CONCAT(DEF_TIM_AF__, DEF_TIM_AF__ ## pin ## __ ## timch)
  39 #define DEF_TIM_AF__D(af_n, tim_n)    GPIO_AF ## af_n ## _TIM ## tim_n
  40
  41 /* F7 Stream Mappings */
  42 // D(DMAx, Stream, Channel)
  43 #define DEF_TIM_DMA__BTCH_TIM1_CH1    D(2, 6, 0),D(2, 1, 6),D(2, 3, 6)
  44 #define DEF_TIM_DMA__BTCH_TIM1_CH2    D(2, 6, 0),D(2, 2, 6)
  45 #define DEF_TIM_DMA__BTCH_TIM1_CH3    D(2, 6, 0),D(2, 6, 6)
  46 #define DEF_TIM_DMA__BTCH_TIM1_CH4    D(2, 4, 6)
  47
  48 #define DEF_TIM_DMA__BTCH_TIM2_CH1    D(1, 5, 3)
  49 #define DEF_TIM_DMA__BTCH_TIM2_CH2    D(1, 6, 3)
  50 #define DEF_TIM_DMA__BTCH_TIM2_CH3    D(1, 1, 3)
  51 #define DEF_TIM_DMA__BTCH_TIM2_CH4    D(1, 7, 3),D(1, 6, 3)
  52
  53 #define DEF_TIM_DMA__BTCH_TIM3_CH1    D(1, 4, 5)
  54 #define DEF_TIM_DMA__BTCH_TIM3_CH2    D(1, 5, 5)
  55 #define DEF_TIM_DMA__BTCH_TIM3_CH3    D(1, 7, 5)
  56 #define DEF_TIM_DMA__BTCH_TIM3_CH4    D(1, 2, 5)
  57
  58 #define DEF_TIM_DMA__BTCH_TIM4_CH1    D(1, 0, 2)
  59 #define DEF_TIM_DMA__BTCH_TIM4_CH2    D(1, 3, 2)
  60 #define DEF_TIM_DMA__BTCH_TIM4_CH3    D(1, 7, 2)
  61
  62 #define DEF_TIM_DMA__BTCH_TIM5_CH1    D(1, 2, 6)
  63 #define DEF_TIM_DMA__BTCH_TIM5_CH2    D(1, 4, 6)
  64 #define DEF_TIM_DMA__BTCH_TIM5_CH3    D(1, 0, 6)
  65 #define DEF_TIM_DMA__BTCH_TIM5_CH4    D(1, 1, 6),D(1, 3, 6)
  66
  67 #define DEF_TIM_DMA__BTCH_TIM8_CH1    D(2, 2, 7),D(2, 2, 0)
  68 #define DEF_TIM_DMA__BTCH_TIM8_CH2    D(2, 3, 7),D(2, 2, 0)
  69 #define DEF_TIM_DMA__BTCH_TIM8_CH3    D(2, 4, 7),D(2, 2, 0)
  70 #define DEF_TIM_DMA__BTCH_TIM8_CH4    D(2, 7, 7)
  71
  72 #define DEF_TIM_DMA__BTCH_TIM4_CH4    NONE
  73
  74 #define DEF_TIM_DMA__BTCH_TIM9_CH1    NONE
  75 #define DEF_TIM_DMA__BTCH_TIM9_CH2    NONE
  76
  77 #define DEF_TIM_DMA__BTCH_TIM10_CH1   NONE
  78
  79 #define DEF_TIM_DMA__BTCH_TIM11_CH1   NONE
  80
  81 #define DEF_TIM_DMA__BTCH_TIM12_CH1   NONE
  82 #define DEF_TIM_DMA__BTCH_TIM12_CH2   NONE
  83
  84 #define DEF_TIM_DMA__BTCH_TIM13_CH1   NONE
  85
  86 #define DEF_TIM_DMA__BTCH_TIM14_CH1   NONE
  87
  88 // TIM_UP table
  89 #define DEF_TIM_DMA__BTCH_TIM1_UP     D(2, 5, 6)
  90 #define DEF_TIM_DMA__BTCH_TIM2_UP     D(1, 7, 3)
  91 #define DEF_TIM_DMA__BTCH_TIM3_UP     D(1, 2, 5)
  92 #define DEF_TIM_DMA__BTCH_TIM4_UP     D(1, 6, 2)
  93 #define DEF_TIM_DMA__BTCH_TIM5_UP     D(1, 0, 6)
  94 #define DEF_TIM_DMA__BTCH_TIM6_UP     D(1, 1, 7)
  95 #define DEF_TIM_DMA__BTCH_TIM7_UP     D(1, 4, 1)
  96 #define DEF_TIM_DMA__BTCH_TIM8_UP     D(2, 1, 7)
  97 #define DEF_TIM_DMA__BTCH_TIM9_UP     NONE
  98 #define DEF_TIM_DMA__BTCH_TIM10_UP    NONE
  99 #define DEF_TIM_DMA__BTCH_TIM11_UP    NONE
 100 #define DEF_TIM_DMA__BTCH_TIM12_UP    NONE
 101 #define DEF_TIM_DMA__BTCH_TIM13_UP    NONE
 102 #define DEF_TIM_DMA__BTCH_TIM14_UP    NONE
 103
 104 // AF table
 105
 106 //PORTA
 107 #define DEF_TIM_AF__PA0__TCH_TIM2_CH1     D(1, 2)
 108 #define DEF_TIM_AF__PA1__TCH_TIM2_CH2     D(1, 2)
 109 #define DEF_TIM_AF__PA2__TCH_TIM2_CH3     D(1, 2)
 110 #define DEF_TIM_AF__PA3__TCH_TIM2_CH4     D(1, 2)
 111 #define DEF_TIM_AF__PA5__TCH_TIM2_CH1     D(1, 2)
 112 #define DEF_TIM_AF__PA7__TCH_TIM1_CH1N    D(1, 1)
 113 #define DEF_TIM_AF__PA8__TCH_TIM1_CH1     D(1, 1)
 114 #define DEF_TIM_AF__PA9__TCH_TIM1_CH2     D(1, 1)
 115 #define DEF_TIM_AF__PA10__TCH_TIM1_CH3    D(1, 1)
 116 #define DEF_TIM_AF__PA11__TCH_TIM1_CH1N   D(1, 1)
 117 #define DEF_TIM_AF__PA15__TCH_TIM2_CH1    D(1, 2)
 118
 119 #define DEF_TIM_AF__PA0__TCH_TIM5_CH1     D(2, 5)
 120 #define DEF_TIM_AF__PA1__TCH_TIM5_CH2     D(2, 5)
 121 #define DEF_TIM_AF__PA2__TCH_TIM5_CH3     D(2, 5)
 122 #define DEF_TIM_AF__PA3__TCH_TIM5_CH4     D(2, 5)
 123 #define DEF_TIM_AF__PA6__TCH_TIM3_CH1     D(2, 3)
 124 #define DEF_TIM_AF__PA7__TCH_TIM3_CH2     D(2, 3)
 125
 126 #define DEF_TIM_AF__PA2__TCH_TIM9_CH1     D(3, 9)
 127 #define DEF_TIM_AF__PA3__TCH_TIM9_CH2     D(3, 9)
 128 #define DEF_TIM_AF__PA5__TCH_TIM8_CH1N    D(3, 8)
 129 #define DEF_TIM_AF__PA7__TCH_TIM8_CH1N    D(3, 8)
 130
 131 #define DEF_TIM_AF__PA6__TCH_TIM13_CH1    D(9, 13)
 132 #define DEF_TIM_AF__PA7__TCH_TIM14_CH1    D(9, 14)
 133
 134 //PORTB
 135 #define DEF_TIM_AF__PB0__TCH_TIM1_CH2N    D(1, 1)
 136 #define DEF_TIM_AF__PB1__TCH_TIM1_CH3N    D(1, 1)
 137 #define DEF_TIM_AF__PB3__TCH_TIM2_CH2     D(1, 2)
 138 #define DEF_TIM_AF__PB10__TCH_TIM2_CH3    D(1, 2)
 139 #define DEF_TIM_AF__PB11__TCH_TIM2_CH4    D(1, 2)
 140 #define DEF_TIM_AF__PB13__TCH_TIM1_CH1N   D(1, 1)
 141 #define DEF_TIM_AF__PB14__TCH_TIM1_CH2N   D(1, 1)
 142 #define DEF_TIM_AF__PB15__TCH_TIM1_CH3N   D(1, 1)
 143
 144 #define DEF_TIM_AF__PB0__TCH_TIM3_CH3     D(2, 3)
 145 #define DEF_TIM_AF__PB1__TCH_TIM3_CH4     D(2, 3)
 146 #define DEF_TIM_AF__PB4__TCH_TIM3_CH1     D(2, 3)
 147 #define DEF_TIM_AF__PB5__TCH_TIM3_CH2     D(2, 3)
 148 #define DEF_TIM_AF__PB6__TCH_TIM4_CH1     D(2, 4)
 149 #define DEF_TIM_AF__PB7__TCH_TIM4_CH2     D(2, 4)
 150 #define DEF_TIM_AF__PB8__TCH_TIM4_CH3     D(2, 4)
 151 #define DEF_TIM_AF__PB9__TCH_TIM4_CH4     D(2, 4)
 152
 153 #define DEF_TIM_AF__PB0__TCH_TIM8_CH2N    D(3, 8)
 154 #define DEF_TIM_AF__PB1__TCH_TIM8_CH3N    D(3, 8)
 155 #define DEF_TIM_AF__PB8__TCH_TIM10_CH1    D(3, 10)
 156 #define DEF_TIM_AF__PB9__TCH_TIM11_CH1    D(3, 11)
 157 #define DEF_TIM_AF__PB14__TCH_TIM8_CH2N   D(3, 8)
 158 #define DEF_TIM_AF__PB15__TCH_TIM8_CH3N   D(3, 8)
 159
 160 #define DEF_TIM_AF__PB14__TCH_TIM12_CH1   D(9, 12)
 161 #define DEF_TIM_AF__PB15__TCH_TIM12_CH2   D(9, 12)
 162
 163 //PORTC
 164 #define DEF_TIM_AF__PC6__TCH_TIM3_CH1     D(2, 3)
 165 #define DEF_TIM_AF__PC7__TCH_TIM3_CH2     D(2, 3)
 166 #define DEF_TIM_AF__PC8__TCH_TIM3_CH3     D(2, 3)
 167 #define DEF_TIM_AF__PC9__TCH_TIM3_CH4     D(2, 3)
 168
 169 #define DEF_TIM_AF__PC6__TCH_TIM8_CH1     D(3, 8)
 170 #define DEF_TIM_AF__PC7__TCH_TIM8_CH2     D(3, 8)
 171 #define DEF_TIM_AF__PC8__TCH_TIM8_CH3     D(3, 8)
 172 #define DEF_TIM_AF__PC9__TCH_TIM8_CH4     D(3, 8)
 173
 174 //PORTD
 175 #define DEF_TIM_AF__PD12__TCH_TIM4_CH1    D(2, 4)
 176 #define DEF_TIM_AF__PD13__TCH_TIM4_CH2    D(2, 4)
 177 #define DEF_TIM_AF__PD14__TCH_TIM4_CH3    D(2, 4)
 178 #define DEF_TIM_AF__PD15__TCH_TIM4_CH4    D(2, 4)
 179
 180 //PORTE
 181 #define DEF_TIM_AF__PE8__TCH_TIM1_CH1N    D(1, 1)
 182 #define DEF_TIM_AF__PE9__TCH_TIM1_CH1     D(1, 1)
 183 #define DEF_TIM_AF__PE10__TCH_TIM1_CH2N   D(1, 1)
 184 #define DEF_TIM_AF__PE11__TCH_TIM1_CH2    D(1, 1)
 185 #define DEF_TIM_AF__PE12__TCH_TIM1_CH3N   D(1, 1)
 186 #define DEF_TIM_AF__PE13__TCH_TIM1_CH3    D(1, 1)
 187 #define DEF_TIM_AF__PE14__TCH_TIM1_CH4    D(1, 1)
 188
 189 #define DEF_TIM_AF__PE5__TCH_TIM9_CH1     D(3, 9)
 190 #define DEF_TIM_AF__PE6__TCH_TIM9_CH2     D(3, 9)
 191
 192 //PORTF
 193 #define DEF_TIM_AF__PF6__TCH_TIM10_CH1    D(3, 10)
 194 #define DEF_TIM_AF__PF7__TCH_TIM11_CH1    D(3, 11)
 195
 196 //PORTH
 197 #define DEF_TIM_AF__PH10__TCH_TIM5_CH1    D(2, 5)
 198 #define DEF_TIM_AF__PH11__TCH_TIM5_CH2    D(2, 5)
 199 #define DEF_TIM_AF__PH12__TCH_TIM5_CH3    D(2, 5)
 200
 201 #define DEF_TIM_AF__PH13__TCH_TIM8_CH1N   D(3, 8)
 202 #define DEF_TIM_AF__PH14__TCH_TIM8_CH2N   D(3, 8)
 203 #define DEF_TIM_AF__PH15__TCH_TIM8_CH3N   D(3, 8)
 204
 205 #define DEF_TIM_AF__PH6__TCH_TIM12_CH1    D(9, 12)
 206 #define DEF_TIM_AF__PH9__TCH_TIM12_CH2    D(9, 12)
 207
 208 //PORTI
 209 #define DEF_TIM_AF__PI0__TCH_TIM5_CH4     D(2, 5)
 210
 211 #define DEF_TIM_AF__PI2__TCH_TIM8_CH4     D(3, 8)
 212 #define DEF_TIM_AF__PI5__TCH_TIM8_CH1     D(3, 8)
 213 #define DEF_TIM_AF__PI6__TCH_TIM8_CH2     D(3, 8)
 214 #define DEF_TIM_AF__PI7__TCH_TIM8_CH3     D(3, 8)