src/main/drivers/timer_stm32f7xx.c

   1 /*
   2  * This file is part of INAV.
   3  *
   4  * INAV is free software: you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation, either version 3 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * INAV is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with INAV.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <stdbool.h>
  19 #include <stdint.h>
  20
  21 #include "platform.h"
  22
  23 #include "common/utils.h"
  24
  25 #include "drivers/io.h"
  26 #include "drivers/rcc.h"
  27 #include "drivers/time.h"
  28 #include "drivers/nvic.h"
  29 #include "drivers/timer.h"
  30 #include "drivers/timer_impl.h"
  31
  32 #include "stm32f7xx.h"
  33
  34 const timerDef_t timerDefinitions[HARDWARE_TIMER_DEFINITION_COUNT] = {
  35     [0] = { .tim = TIM1,  .rcc = RCC_APB2(TIM1),  .irq = TIM1_CC_IRQn, .secondIrq = TIM1_UP_TIM10_IRQn },
  36     [1] = { .tim = TIM2,  .rcc = RCC_APB1(TIM2),  .irq = TIM2_IRQn},
  37     [2] = { .tim = TIM3,  .rcc = RCC_APB1(TIM3),  .irq = TIM3_IRQn},
  38     [3] = { .tim = TIM4,  .rcc = RCC_APB1(TIM4),  .irq = TIM4_IRQn},
  39     [4] = { .tim = TIM5,  .rcc = RCC_APB1(TIM5),  .irq = TIM5_IRQn},
  40     [5] = { .tim = TIM6,  .rcc = RCC_APB1(TIM6),  .irq = 0},
  41     [6] = { .tim = TIM7,  .rcc = RCC_APB1(TIM7),  .irq = 0},
  42     [7] = { .tim = TIM8,  .rcc = RCC_APB2(TIM8),  .irq = TIM8_CC_IRQn, .secondIrq = TIM8_UP_TIM13_IRQn},
  43     [8] = { .tim = TIM9,  .rcc = RCC_APB2(TIM9),  .irq = TIM1_BRK_TIM9_IRQn},
  44     [9] = { .tim = TIM10, .rcc = RCC_APB2(TIM10), .irq = TIM1_UP_TIM10_IRQn},
  45     [10] = { .tim = TIM11, .rcc = RCC_APB2(TIM11), .irq = TIM1_TRG_COM_TIM11_IRQn},
  46     [11] = { .tim = TIM12, .rcc = RCC_APB1(TIM12), .irq = TIM8_BRK_TIM12_IRQn},
  47     [12] = { .tim = TIM13, .rcc = RCC_APB1(TIM13), .irq = TIM8_UP_TIM13_IRQn},
  48     [13] = { .tim = TIM14, .rcc = RCC_APB1(TIM14), .irq = TIM8_TRG_COM_TIM14_IRQn},
  49 };
  50
  51 uint32_t timerClock(TIM_TypeDef *tim)
  52 {
  53     UNUSED(tim);
  54     return SystemCoreClock;
  55 }
  56
  57 _TIM_IRQ_HANDLER(TIM1_CC_IRQHandler, 1);
  58 _TIM_IRQ_HANDLER2(TIM1_UP_TIM10_IRQHandler, 1, 10);
  59
  60 _TIM_IRQ_HANDLER(TIM2_IRQHandler, 2);
  61 _TIM_IRQ_HANDLER(TIM3_IRQHandler, 3);
  62 _TIM_IRQ_HANDLER(TIM4_IRQHandler, 4);
  63 _TIM_IRQ_HANDLER(TIM5_IRQHandler, 5);
  64
  65 _TIM_IRQ_HANDLER(TIM8_CC_IRQHandler, 8);
  66 _TIM_IRQ_HANDLER2(TIM8_UP_TIM13_IRQHandler, 8, 13);
  67 _TIM_IRQ_HANDLER2(TIM8_TRG_COM_TIM14_IRQHandler, 8, 14);
  68
  69 _TIM_IRQ_HANDLER(TIM1_BRK_TIM9_IRQHandler, 9);
  70 _TIM_IRQ_HANDLER(TIM1_TRG_COM_TIM11_IRQHandler, 11);
  71 _TIM_IRQ_HANDLER(TIM8_BRK_TIM12_IRQHandler, 12);