src/main/startup/startup_at32f435_437.s

   1 /**
   2   ******************************************************************************
   3   * @file     startup_at32f435_437.s
   4   * @version  v2.1.0
   5   * @date     2022-08-16
   6   * @brief    at32f435_437 devices vector table for gcc toolchain.
   7   *           this module performs:
   8   *           - set the initial sp
   9   *           - set the initial pc == reset_handler,
  10   *           - set the vector table entries with the exceptions isr address
  11   *           - configure the clock system and the external sram to
  12   *             be used as data memory (optional, to be enabled by user)
  13   *           - branches to main in the c library (which eventually
  14   *             calls main()).
  15   *           after reset the cortex-m4 processor is in thread mode,
  16   *           priority is privileged, and the stack is set to main.
  17   ******************************************************************************
  18   */
  19
  20   .syntax unified
  21   .cpu cortex-m4
  22   .fpu softvfp
  23   .thumb
  24
  25 .global  g_pfnVectors
  26 .global  Default_Handler
  27
  28 /* start address for the initialization values of the .data section.
  29 defined in linker script */
  30 .word  _sidata
  31 /* start address for the .data section. defined in linker script */
  32 .word  _sdata
  33 /* end address for the .data section. defined in linker script */
  34 .word  _edata
  35 /* start address for the .bss section. defined in linker script */
  36 .word  _sbss
  37 /* end address for the .bss section. defined in linker script */
  38 .word  _ebss
  39 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
  40
  41 /**
  42  * @brief  This is the code that gets called when the processor first
  43  *          starts execution following a reset event. Only the absolutely
  44  *          necessary set is performed, after which the application
  45  *          supplied main() routine is called.
  46  * @param  None
  47  * @retval None
  48 */
  49
  50     .section  .text.Reset_Handler
  51   .weak  Reset_Handler
  52   .type  Reset_Handler, %function
  53 Reset_Handler:
  54
  55 /* custom init */
  56   ldr   sp, =_estack      /* set stack pointer */
  57
  58   bl persistentObjectInit
  59   bl checkForBootLoaderRequest
  60
  61 /* Copy the data segment initializers from flash to SRAM */
  62   movs  r1, #0
  63   b  LoopCopyDataInit
  64
  65 CopyDataInit:
  66   ldr  r3, =_sidata
  67   ldr  r3, [r3, r1]
  68   str  r3, [r0, r1]
  69   adds  r1, r1, #4
  70
  71 LoopCopyDataInit:
  72   ldr  r0, =_sdata
  73   ldr  r3, =_edata
  74   adds  r2, r0, r1
  75   cmp  r2, r3
  76   bcc  CopyDataInit
  77   ldr  r2, =_sbss
  78   b  LoopFillZerobss
  79 /* Zero fill the bss segment. */
  80 FillZerobss:
  81   movs  r3, #0
  82   str  r3, [r2], #4
  83
  84 LoopFillZerobss:
  85   ldr  r3, = _ebss
  86   cmp  r2, r3
  87   bcc  FillZerobss
  88
  89 /* Call the clock system intitialization function.*/
  90   bl  SystemInit
  91 /* Call static constructors */
  92   bl __libc_init_array
  93 /* Call the application's entry point.*/
  94   bl  main
  95   bx  lr
  96 .size  Reset_Handler, .-Reset_Handler
  97
  98 /**
  99  * @brief  This is the code that gets called when the processor receives an
 100  *         unexpected interrupt.  This simply enters an infinite loop, preserving
 101  *         the system state for examination by a debugger.
 102  * @param  None
 103  * @retval None
 104 */
 105     .section  .text.Default_Handler,"ax",%progbits
 106 Default_Handler:
 107 Infinite_Loop:
 108   b  Infinite_Loop
 109   .size  Default_Handler, .-Default_Handler
 110 /******************************************************************************
 111 *
 112 * The minimal vector table for a Cortex M3. Note that the proper constructs
 113 * must be placed on this to ensure that it ends up at physical address
 114 * 0x0000.0000.
 115 *
 116 *******************************************************************************/
 117    .section  .isr_vector,"a",%progbits
 118   .type  g_pfnVectors, %object
 119   .size  g_pfnVectors, .-g_pfnVectors
 120
 121
 122 g_pfnVectors:
 123   .word  _estack
 124   .word  Reset_Handler
 125   .word  NMI_Handler
 126   .word  HardFault_Handler
 127   .word  MemManage_Handler
 128   .word  BusFault_Handler
 129   .word  UsageFault_Handler
 130   .word  0
 131   .word  0
 132   .word  0
 133   .word  0
 134   .word  SVC_Handler
 135   .word  DebugMon_Handler
 136   .word  0
 137   .word  PendSV_Handler
 138   .word  SysTick_Handler
 139
 140   /* External Interrupts */
 141   .word  WWDT_IRQHandler                     /* Window Watchdog Timer                   */
 142   .word  PVM_IRQHandler                      /* PVM through EXINT Line detect           */
 143   .word  TAMP_STAMP_IRQHandler               /* Tamper and TimeStamps through the EXINT line */
 144   .word  ERTC_WKUP_IRQHandler                /* ERTC Wakeup through the EXINT line      */
 145   .word  FLASH_IRQHandler                    /* Flash                                   */
 146   .word  CRM_IRQHandler                      /* CRM                                     */
 147   .word  EXINT0_IRQHandler                   /* EXINT Line 0                            */
 148   .word  EXINT1_IRQHandler                   /* EXINT Line 1                            */
 149   .word  EXINT2_IRQHandler                   /* EXINT Line 2                            */
 150   .word  EXINT3_IRQHandler                   /* EXINT Line 3                            */
 151   .word  EXINT4_IRQHandler                   /* EXINT Line 4                            */
 152   .word  EDMA_Stream1_IRQHandler             /* EDMA Stream 1                           */
 153   .word  EDMA_Stream2_IRQHandler             /* EDMA Stream 2                           */
 154   .word  EDMA_Stream3_IRQHandler             /* EDMA Stream 3                           */
 155   .word  EDMA_Stream4_IRQHandler             /* EDMA Stream 4                           */
 156   .word  EDMA_Stream5_IRQHandler             /* EDMA Stream 5                           */
 157   .word  EDMA_Stream6_IRQHandler             /* EDMA Stream 6                           */
 158   .word  EDMA_Stream7_IRQHandler             /* EDMA Stream 7                           */
 159   .word  ADC1_2_3_IRQHandler                 /* ADC1 & ADC2 & ADC3                      */
 160   .word  CAN1_TX_IRQHandler                  /* CAN1 TX                                 */
 161   .word  CAN1_RX0_IRQHandler                 /* CAN1 RX0                                */
 162   .word  CAN1_RX1_IRQHandler                 /* CAN1 RX1                                */
 163   .word  CAN1_SE_IRQHandler                  /* CAN1 SE                                 */
 164   .word  EXINT9_5_IRQHandler                 /* EXINT Line [9:5]                        */
 165   .word  TMR1_BRK_TMR9_IRQHandler            /* TMR1 Brake and TMR9                     */
 166   .word  TMR1_OVF_TMR10_IRQHandler           /* TMR1 Overflow and TMR10                 */
 167   .word  TMR1_TRG_HALL_TMR11_IRQHandler      /* TMR1 Trigger and hall and TMR11         */
 168   .word  TMR1_CH_IRQHandler                  /* TMR1 Channel                            */
 169   .word  TMR2_GLOBAL_IRQHandler              /* TMR2                                    */
 170   .word  TMR3_GLOBAL_IRQHandler              /* TMR3                                    */
 171   .word  TMR4_GLOBAL_IRQHandler              /* TMR4                                    */
 172   .word  I2C1_EVT_IRQHandler                 /* I2C1 Event                              */
 173   .word  I2C1_ERR_IRQHandler                 /* I2C1 Error                              */
 174   .word  I2C2_EVT_IRQHandler                 /* I2C2 Event                              */
 175   .word  I2C2_ERR_IRQHandler                 /* I2C2 Error                              */
 176   .word  SPI1_IRQHandler                     /* SPI1                                    */
 177   .word  SPI2_I2S2EXT_IRQHandler             /* SPI2                                    */
 178   .word  USART1_IRQHandler                   /* USART1                                  */
 179   .word  USART2_IRQHandler                   /* USART2                                  */
 180   .word  USART3_IRQHandler                   /* USART3                                  */
 181   .word  EXINT15_10_IRQHandler               /* EXINT Line [15:10]                      */
 182   .word  ERTCAlarm_IRQHandler                /* RTC Alarm through EXINT Line            */
 183   .word  OTGFS1_WKUP_IRQHandler              /* OTGFS1 Wakeup from suspend              */
 184   .word  TMR8_BRK_TMR12_IRQHandler           /* TMR8 Brake and TMR12                    */
 185   .word  TMR8_OVF_TMR13_IRQHandler           /* TMR8 Overflow and TMR13                 */
 186   .word  TMR8_TRG_HALL_TMR14_IRQHandler      /* TMR8 Trigger and hall and TMR14         */
 187   .word  TMR8_CH_IRQHandler                  /* TMR8 Channel                            */
 188   .word  EDMA_Stream8_IRQHandler             /* EDMA Stream 8                           */
 189   .word  XMC_IRQHandler                      /* XMC                                     */
 190   .word  SDIO1_IRQHandler                    /* SDIO1                                   */
 191   .word  TMR5_GLOBAL_IRQHandler              /* TMR5                                    */
 192   .word  SPI3_I2S3EXT_IRQHandler             /* SPI3                                    */
 193   .word  UART4_IRQHandler                    /* UART4                                   */
 194   .word  UART5_IRQHandler                    /* UART5                                   */
 195   .word  TMR6_DAC_GLOBAL_IRQHandler          /* TMR6 & DAC                              */
 196   .word  TMR7_GLOBAL_IRQHandler              /* TMR7                                    */
 197   .word  DMA1_Channel1_IRQHandler            /* DMA1 Channel 1                          */
 198   .word  DMA1_Channel2_IRQHandler            /* DMA1 Channel 2                          */
 199   .word  DMA1_Channel3_IRQHandler            /* DMA1 Channel 3                          */
 200   .word  DMA1_Channel4_IRQHandler            /* DMA1 Channel 4                          */
 201   .word  DMA1_Channel5_IRQHandler            /* DMA1 Channel 5                          */
 202   .word  EMAC_IRQHandler                     /* EMAC                                    */
 203   .word  EMAC_WKUP_IRQHandler                /* EMAC Wakeup                             */
 204   .word  CAN2_TX_IRQHandler                  /* CAN2 TX                                 */
 205   .word  CAN2_RX0_IRQHandler                 /* CAN2 RX0                                */
 206   .word  CAN2_RX1_IRQHandler                 /* CAN2 RX1                                */
 207   .word  CAN2_SE_IRQHandler                  /* CAN2 SE                                 */
 208   .word  OTGFS1_IRQHandler                   /* OTGFS1                                  */
 209   .word  DMA1_Channel6_IRQHandler            /* DMA1 Channel 6                          */
 210   .word  DMA1_Channel7_IRQHandler            /* DMA1 Channel 7                          */
 211   .word  0                                   /* Reserved                                */
 212   .word  USART6_IRQHandler                   /* USART6                                  */
 213   .word  I2C3_EVT_IRQHandler                 /* I2C3 Event                              */
 214   .word  I2C3_ERR_IRQHandler                 /* I2C3 Error                              */
 215   .word  0                                   /* Reserved                                */
 216   .word  0                                   /* Reserved                                */
 217   .word  OTGFS2_WKUP_IRQHandler              /* OTGFS2 Wakeup from suspend              */
 218   .word  OTGFS2_IRQHandler                   /* OTGFS2                                  */
 219   .word  DVP_IRQHandler                      /* DVP                                     */
 220   .word  0                                   /* Reserved                                */
 221   .word  0                                   /* Reserved                                */
 222   .word  FPU_IRQHandler                      /* FPU                                     */
 223   .word  UART7_IRQHandler                    /* UART7                                   */
 224   .word  UART8_IRQHandler                    /* UART8                                   */
 225   .word  SPI4_IRQHandler                     /* SPI4                                    */
 226   .word  0                                   /* Reserved                                */
 227   .word  0                                   /* Reserved                                */
 228   .word  0                                   /* Reserved                                */
 229   .word  0                                   /* Reserved                                */
 230   .word  0                                   /* Reserved                                */
 231   .word  0                                   /* Reserved                                */
 232   .word  QSPI2_IRQHandler                    /* QSPI2                                   */
 233   .word  QSPI1_IRQHandler                    /* QSPI1                                   */
 234   .word  0                                   /* Reserved                                */
 235   .word  DMAMUX_IRQHandler                   /* Reserved                                */
 236   .word  0                                   /* Reserved                                */
 237   .word  0                                   /* Reserved                                */
 238   .word  0                                   /* Reserved                                */
 239   .word  0                                   /* Reserved                                */
 240   .word  0                                   /* Reserved                                */
 241   .word  0                                   /* Reserved                                */
 242   .word  0                                   /* Reserved                                */
 243   .word  SDIO2_IRQHandler                    /* SDIO2                                   */
 244   .word  ACC_IRQHandler                      /* ACC                                     */
 245   .word  TMR20_BRK_IRQHandler                /* TMR20 Brake                             */
 246   .word  TMR20_OVF_IRQHandler                /* TMR20 Overflow                          */
 247   .word  TMR20_TRG_HALL_IRQHandler           /* TMR20 Trigger and hall                  */
 248   .word  TMR20_CH_IRQHandler                 /* TMR20 Channel                           */
 249   .word  DMA2_Channel1_IRQHandler            /* DMA2 Channel 1                          */
 250   .word  DMA2_Channel2_IRQHandler            /* DMA2 Channel 2                          */
 251   .word  DMA2_Channel3_IRQHandler            /* DMA2 Channel 3                          */
 252   .word  DMA2_Channel4_IRQHandler            /* DMA2 Channel 4                          */
 253   .word  DMA2_Channel5_IRQHandler            /* DMA2 Channel 5                          */
 254   .word  DMA2_Channel6_IRQHandler            /* DMA2 Channel 6                          */
 255   .word  DMA2_Channel7_IRQHandler            /* DMA2 Channel 7                          */
 256
 257 /*******************************************************************************
 258 *
 259 * Provide weak aliases for each Exception handler to the Default_Handler.
 260 * As they are weak aliases, any function with the same name will override
 261 * this definition.
 262 *
 263 *******************************************************************************/
 264    .weak      NMI_Handler
 265    .thumb_set NMI_Handler,Default_Handler
 266
 267    .weak      HardFault_Handler
 268    .thumb_set HardFault_Handler,Default_Handler
 269
 270    .weak      MemManage_Handler
 271    .thumb_set MemManage_Handler,Default_Handler
 272
 273    .weak      BusFault_Handler
 274    .thumb_set BusFault_Handler,Default_Handler
 275
 276    .weak      UsageFault_Handler
 277    .thumb_set UsageFault_Handler,Default_Handler
 278
 279    .weak      SVC_Handler
 280    .thumb_set SVC_Handler,Default_Handler
 281
 282    .weak      DebugMon_Handler
 283    .thumb_set DebugMon_Handler,Default_Handler
 284
 285    .weak      PendSV_Handler
 286    .thumb_set PendSV_Handler,Default_Handler
 287
 288    .weak      SysTick_Handler
 289    .thumb_set SysTick_Handler,Default_Handler
 290
 291    .weak      WWDT_IRQHandler
 292    .thumb_set WWDT_IRQHandler,Default_Handler
 293
 294    .weak      PVM_IRQHandler
 295    .thumb_set PVM_IRQHandler,Default_Handler
 296
 297    .weak      TAMP_STAMP_IRQHandler
 298    .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
 299
 300    .weak      ERTC_WKUP_IRQHandler
 301    .thumb_set ERTC_WKUP_IRQHandler,Default_Handler
 302
 303    .weak      FLASH_IRQHandler
 304    .thumb_set FLASH_IRQHandler,Default_Handler
 305
 306    .weak      CRM_IRQHandler
 307    .thumb_set CRM_IRQHandler,Default_Handler
 308
 309    .weak      EXINT0_IRQHandler
 310    .thumb_set EXINT0_IRQHandler,Default_Handler
 311
 312    .weak      EXINT1_IRQHandler
 313    .thumb_set EXINT1_IRQHandler,Default_Handler
 314
 315    .weak      EXINT2_IRQHandler
 316    .thumb_set EXINT2_IRQHandler,Default_Handler
 317
 318    .weak      EXINT3_IRQHandler
 319    .thumb_set EXINT3_IRQHandler,Default_Handler
 320
 321    .weak      EXINT4_IRQHandler
 322    .thumb_set EXINT4_IRQHandler,Default_Handler
 323
 324    .weak      EDMA_Stream1_IRQHandler
 325    .thumb_set EDMA_Stream1_IRQHandler,Default_Handler
 326
 327    .weak      EDMA_Stream2_IRQHandler
 328    .thumb_set EDMA_Stream2_IRQHandler,Default_Handler
 329
 330    .weak      EDMA_Stream3_IRQHandler
 331    .thumb_set EDMA_Stream3_IRQHandler,Default_Handler
 332
 333    .weak      EDMA_Stream4_IRQHandler
 334    .thumb_set EDMA_Stream4_IRQHandler,Default_Handler
 335
 336    .weak      EDMA_Stream5_IRQHandler
 337    .thumb_set EDMA_Stream5_IRQHandler,Default_Handler
 338
 339    .weak      EDMA_Stream6_IRQHandler
 340    .thumb_set EDMA_Stream6_IRQHandler,Default_Handler
 341
 342    .weak      EDMA_Stream7_IRQHandler
 343    .thumb_set EDMA_Stream7_IRQHandler,Default_Handler
 344
 345    .weak      ADC1_2_3_IRQHandler
 346    .thumb_set ADC1_2_3_IRQHandler,Default_Handler
 347
 348    .weak      CAN1_TX_IRQHandler
 349    .thumb_set CAN1_TX_IRQHandler,Default_Handler
 350
 351    .weak      CAN1_RX0_IRQHandler
 352    .thumb_set CAN1_RX0_IRQHandler,Default_Handler
 353
 354    .weak      CAN1_RX1_IRQHandler
 355    .thumb_set CAN1_RX1_IRQHandler,Default_Handler
 356
 357    .weak      CAN1_SE_IRQHandler
 358    .thumb_set CAN1_SE_IRQHandler,Default_Handler
 359
 360    .weak      EXINT9_5_IRQHandler
 361    .thumb_set EXINT9_5_IRQHandler,Default_Handler
 362
 363    .weak      TMR1_BRK_TMR9_IRQHandler
 364    .thumb_set TMR1_BRK_TMR9_IRQHandler,Default_Handler
 365
 366    .weak      TMR1_OVF_TMR10_IRQHandler
 367    .thumb_set TMR1_OVF_TMR10_IRQHandler,Default_Handler
 368
 369    .weak      TMR1_TRG_HALL_TMR11_IRQHandler
 370    .thumb_set TMR1_TRG_HALL_TMR11_IRQHandler,Default_Handler
 371
 372    .weak      TMR1_CH_IRQHandler
 373    .thumb_set TMR1_CH_IRQHandler,Default_Handler
 374
 375    .weak      TMR2_GLOBAL_IRQHandler
 376    .thumb_set TMR2_GLOBAL_IRQHandler,Default_Handler
 377
 378    .weak      TMR3_GLOBAL_IRQHandler
 379    .thumb_set TMR3_GLOBAL_IRQHandler,Default_Handler
 380
 381    .weak      TMR4_GLOBAL_IRQHandler
 382    .thumb_set TMR4_GLOBAL_IRQHandler,Default_Handler
 383
 384    .weak      I2C1_EVT_IRQHandler
 385    .thumb_set I2C1_EVT_IRQHandler,Default_Handler
 386
 387    .weak      I2C1_ERR_IRQHandler
 388    .thumb_set I2C1_ERR_IRQHandler,Default_Handler
 389
 390    .weak      I2C2_EVT_IRQHandler
 391    .thumb_set I2C2_EVT_IRQHandler,Default_Handler
 392
 393    .weak      I2C2_ERR_IRQHandler
 394    .thumb_set I2C2_ERR_IRQHandler,Default_Handler
 395
 396    .weak      SPI1_IRQHandler
 397    .thumb_set SPI1_IRQHandler,Default_Handler
 398
 399    .weak      SPI2_I2S2EXT_IRQHandler
 400    .thumb_set SPI2_I2S2EXT_IRQHandler,Default_Handler
 401
 402    .weak      USART1_IRQHandler
 403    .thumb_set USART1_IRQHandler,Default_Handler
 404
 405    .weak      USART2_IRQHandler
 406    .thumb_set USART2_IRQHandler,Default_Handler
 407
 408    .weak      USART3_IRQHandler
 409    .thumb_set USART3_IRQHandler,Default_Handler
 410
 411    .weak      EXINT15_10_IRQHandler
 412    .thumb_set EXINT15_10_IRQHandler,Default_Handler
 413
 414    .weak      ERTCAlarm_IRQHandler
 415    .thumb_set ERTCAlarm_IRQHandler,Default_Handler
 416
 417    .weak      OTGFS1_WKUP_IRQHandler
 418    .thumb_set OTGFS1_WKUP_IRQHandler,Default_Handler
 419
 420    .weak      TMR8_BRK_TMR12_IRQHandler
 421    .thumb_set TMR8_BRK_TMR12_IRQHandler,Default_Handler
 422
 423    .weak      TMR8_OVF_TMR13_IRQHandler
 424    .thumb_set TMR8_OVF_TMR13_IRQHandler,Default_Handler
 425
 426    .weak      TMR8_TRG_HALL_TMR14_IRQHandler
 427    .thumb_set TMR8_TRG_HALL_TMR14_IRQHandler,Default_Handler
 428
 429    .weak      TMR8_CH_IRQHandler
 430    .thumb_set TMR8_CH_IRQHandler,Default_Handler
 431
 432    .weak      EDMA_Stream8_IRQHandler
 433    .thumb_set EDMA_Stream8_IRQHandler,Default_Handler
 434
 435    .weak      XMC_IRQHandler
 436    .thumb_set XMC_IRQHandler,Default_Handler
 437
 438    .weak      SDIO1_IRQHandler
 439    .thumb_set SDIO1_IRQHandler,Default_Handler
 440
 441    .weak      TMR5_GLOBAL_IRQHandler
 442    .thumb_set TMR5_GLOBAL_IRQHandler,Default_Handler
 443
 444    .weak      SPI3_I2S3EXT_IRQHandler
 445    .thumb_set SPI3_I2S3EXT_IRQHandler,Default_Handler
 446
 447    .weak      UART4_IRQHandler
 448    .thumb_set UART4_IRQHandler,Default_Handler
 449
 450    .weak      UART5_IRQHandler
 451    .thumb_set UART5_IRQHandler,Default_Handler
 452
 453    .weak      TMR6_DAC_GLOBAL_IRQHandler
 454    .thumb_set TMR6_DAC_GLOBAL_IRQHandler,Default_Handler
 455
 456    .weak      TMR7_GLOBAL_IRQHandler
 457    .thumb_set TMR7_GLOBAL_IRQHandler,Default_Handler
 458
 459    .weak      DMA1_Channel1_IRQHandler
 460    .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
 461
 462    .weak      DMA1_Channel2_IRQHandler
 463    .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
 464
 465    .weak      DMA1_Channel3_IRQHandler
 466    .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
 467
 468    .weak      DMA1_Channel4_IRQHandler
 469    .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
 470
 471    .weak      DMA1_Channel5_IRQHandler
 472    .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
 473
 474    .weak      EMAC_IRQHandler
 475    .thumb_set EMAC_IRQHandler,Default_Handler
 476
 477    .weak      EMAC_WKUP_IRQHandler
 478    .thumb_set EMAC_WKUP_IRQHandler,Default_Handler
 479
 480    .weak      CAN2_TX_IRQHandler
 481    .thumb_set CAN2_TX_IRQHandler,Default_Handler
 482
 483    .weak      CAN2_RX0_IRQHandler
 484    .thumb_set CAN2_RX0_IRQHandler ,Default_Handler
 485
 486    .weak      CAN2_RX1_IRQHandler
 487    .thumb_set CAN2_RX1_IRQHandler ,Default_Handler
 488
 489    .weak      CAN2_SE_IRQHandler
 490    .thumb_set CAN2_SE_IRQHandler,Default_Handler
 491
 492    .weak      OTGFS1_IRQHandler
 493    .thumb_set OTGFS1_IRQHandler,Default_Handler
 494
 495    .weak      DMA1_Channel6_IRQHandler
 496    .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
 497
 498    .weak      DMA1_Channel7_IRQHandler
 499    .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
 500
 501    .weak      USART6_IRQHandler
 502    .thumb_set USART6_IRQHandler,Default_Handler
 503
 504    .weak      I2C3_EVT_IRQHandler
 505    .thumb_set I2C3_EVT_IRQHandler,Default_Handler
 506
 507    .weak      I2C3_ERR_IRQHandler
 508    .thumb_set I2C3_ERR_IRQHandler,Default_Handler
 509
 510    .weak      OTGFS2_WKUP_IRQHandler
 511    .thumb_set OTGFS2_WKUP_IRQHandler,Default_Handler
 512
 513    .weak      OTGFS2_IRQHandler
 514    .thumb_set OTGFS2_IRQHandler,Default_Handler
 515
 516    .weak      DVP_IRQHandler
 517    .thumb_set DVP_IRQHandler,Default_Handler
 518
 519    .weak      FPU_IRQHandler
 520    .thumb_set FPU_IRQHandler,Default_Handler
 521
 522    .weak      UART7_IRQHandler
 523    .thumb_set UART7_IRQHandler,Default_Handler
 524
 525    .weak      UART8_IRQHandler
 526    .thumb_set UART8_IRQHandler,Default_Handler
 527
 528    .weak      SPI4_IRQHandler
 529    .thumb_set SPI4_IRQHandler,Default_Handler
 530
 531    .weak      QSPI2_IRQHandler
 532    .thumb_set QSPI2_IRQHandler,Default_Handler
 533
 534    .weak      QSPI1_IRQHandler
 535    .thumb_set QSPI1_IRQHandler,Default_Handler
 536
 537    .weak      DMAMUX_IRQHandler
 538    .thumb_set DMAMUX_IRQHandler ,Default_Handler
 539
 540    .weak      SDIO2_IRQHandler
 541    .thumb_set SDIO2_IRQHandler ,Default_Handler
 542
 543    .weak      ACC_IRQHandler
 544    .thumb_set ACC_IRQHandler,Default_Handler
 545
 546    .weak      TMR20_BRK_IRQHandler
 547    .thumb_set TMR20_BRK_IRQHandler,Default_Handler
 548
 549    .weak      TMR20_OVF_IRQHandler
 550    .thumb_set TMR20_OVF_IRQHandler,Default_Handler
 551
 552    .weak      TMR20_TRG_HALL_IRQHandler
 553    .thumb_set TMR20_TRG_HALL_IRQHandler,Default_Handler
 554
 555    .weak      TMR20_CH_IRQHandler
 556    .thumb_set TMR20_CH_IRQHandler,Default_Handler
 557
 558    .weak      DMA2_Channel1_IRQHandler
 559    .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
 560
 561    .weak      DMA2_Channel2_IRQHandler
 562    .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
 563
 564    .weak      DMA2_Channel3_IRQHandler
 565    .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
 566
 567    .weak      DMA2_Channel4_IRQHandler
 568    .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
 569
 570    .weak      DMA2_Channel5_IRQHandler
 571    .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
 572
 573    .weak      DMA2_Channel6_IRQHandler
 574    .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
 575
 576    .weak      DMA2_Channel7_IRQHandler
 577    .thumb_set DMA2_Channel7_IRQHandler,Default_Handler