Merge pull request #10592 from iNavFlight/MrD_Update-parameter-description
[inav.git] / lib / main / AT32F43x / Drivers / AT32F43x_StdPeriph_Driver / inc / at32f435_437_pwc.h
blob16304be763df9514fa8a0320b7d308ba78b94f6d
1 /**
2 **************************************************************************
3 * @file at32f435_437_pwc.h
4 * @version v2.1.0
5 * @date 2022-08-16
6 * @brief at32f435_437 pwr header file
7 **************************************************************************
8 * Copyright notice & Disclaimer
10 * The software Board Support Package (BSP) that is made available to
11 * download from Artery official website is the copyrighted work of Artery.
12 * Artery authorizes customers to use, copy, and distribute the BSP
13 * software and its related documentation for the purpose of design and
14 * development in conjunction with Artery microcontrollers. Use of the
15 * software is governed by this copyright notice and the following disclaimer.
17 * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
18 * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
19 * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
20 * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
21 * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
24 **************************************************************************
27 /* Define to prevent recursive inclusion -------------------------------------*/
28 #ifndef __AT32F435_437_PWC_H
29 #define __AT32F435_437_PWC_H
31 #ifdef __cplusplus
32 extern "C" {
33 #endif
36 /* Includes ------------------------------------------------------------------*/
37 #include "at32f435_437.h"
39 /** @addtogroup AT32F435_437_periph_driver
40 * @{
43 /** @addtogroup PWC
44 * @{
47 /** @defgroup PWC_flags_definition
48 * @brief pwc flag
49 * @{
52 #define PWC_WAKEUP_FLAG ((uint32_t)0x00000001) /*!< wakeup flag */
53 #define PWC_STANDBY_FLAG ((uint32_t)0x00000002) /*!< standby flag */
54 #define PWC_PVM_OUTPUT_FLAG ((uint32_t)0x00000004) /*!< pvm output flag */
56 /**
57 * @}
60 /**
61 * @brief pwc wakeup pin num definition
63 #define PWC_WAKEUP_PIN_1 ((uint32_t)0x00000100) /*!< standby wake-up pin1 */
64 #define PWC_WAKEUP_PIN_2 ((uint32_t)0x00000200) /*!< standby wake-up pin2 */
66 /**
67 * @brief select ldo output voltage.
68 * @param val: set the ldo output voltage.
69 * this parameter can be one of the following values:
70 * - PWC_LDO_OUTPUT_1V3: system clock up to 288MHz.
71 * - PWC_LDO_OUTPUT_1V2: system clock up to 240MHz.
72 * - PWC_LDO_OUTPUT_1V1: system clock up to 192MHz.
73 * - PWC_LDO_OUTPUT_1V0: system clock up to 144MHz.
74 * @note useage limited.
75 * PWC_LDO_OUTPUT_1V3: operation temperature range -40~85 degree, VDD must over 3.0V.
77 #define pwc_ldo_output_voltage_set(val) (PWC->ldoov_bit.ldoovsel = val)
79 /** @defgroup PWC_exported_types
80 * @{
83 /**
84 * @brief pwc pvm voltage type
86 typedef enum
88 PWC_PVM_VOLTAGE_2V3 = 0x01, /*!< power voltage monitoring boundary 2.3v */
89 PWC_PVM_VOLTAGE_2V4 = 0x02, /*!< power voltage monitoring boundary 2.4v */
90 PWC_PVM_VOLTAGE_2V5 = 0x03, /*!< power voltage monitoring boundary 2.5v */
91 PWC_PVM_VOLTAGE_2V6 = 0x04, /*!< power voltage monitoring boundary 2.6v */
92 PWC_PVM_VOLTAGE_2V7 = 0x05, /*!< power voltage monitoring boundary 2.7v */
93 PWC_PVM_VOLTAGE_2V8 = 0x06, /*!< power voltage monitoring boundary 2.8v */
94 PWC_PVM_VOLTAGE_2V9 = 0x07 /*!< power voltage monitoring boundary 2.9v */
95 } pwc_pvm_voltage_type;
97 /**
98 * @brief pwc ldo output voltage type
100 typedef enum
102 PWC_LDO_OUTPUT_1V3 = 0x01, /*!< ldo output voltage is 1.3v */
103 PWC_LDO_OUTPUT_1V2 = 0x00, /*!< ldo output voltage is 1.2v */
104 PWC_LDO_OUTPUT_1V1 = 0x04, /*!< ldo output voltage is 1.1v */
105 PWC_LDO_OUTPUT_1V0 = 0x05, /*!< ldo output voltage is 1.0v */
106 } pwc_ldo_output_voltage_type;
109 * @brief pwc sleep enter type
111 typedef enum
113 PWC_SLEEP_ENTER_WFI = 0x00, /*!< use wfi enter sleep mode */
114 PWC_SLEEP_ENTER_WFE = 0x01 /*!< use wfe enter sleep mode */
115 } pwc_sleep_enter_type ;
118 * @brief pwc deep sleep enter type
120 typedef enum
122 PWC_DEEP_SLEEP_ENTER_WFI = 0x00, /*!< use wfi enter deepsleep mode */
123 PWC_DEEP_SLEEP_ENTER_WFE = 0x01 /*!< use wfe enter deepsleep mode */
124 } pwc_deep_sleep_enter_type ;
127 * @brief pwc regulator type
129 typedef enum
131 PWC_REGULATOR_ON = 0x00, /*!< voltage regulator state on when deepsleep mode */
132 PWC_REGULATOR_LOW_POWER = 0x01 /*!< voltage regulator state low power when deepsleep mode */
133 } pwc_regulator_type ;
136 * @brief type define pwc register all
138 typedef struct
141 * @brief pwc ctrl register, offset:0x00
143 union
145 __IO uint32_t ctrl;
146 struct
148 __IO uint32_t vrsel : 1; /* [0] */
149 __IO uint32_t lpsel : 1; /* [1] */
150 __IO uint32_t clswef : 1; /* [2] */
151 __IO uint32_t clsef : 1; /* [3] */
152 __IO uint32_t pvmen : 1; /* [4] */
153 __IO uint32_t pvmsel : 3; /* [7:5] */
154 __IO uint32_t bpwen : 1; /* [8] */
155 __IO uint32_t reserved1 : 23;/* [31:9] */
156 } ctrl_bit;
160 * @brief pwc ctrlsts register, offset:0x04
162 union
164 __IO uint32_t ctrlsts;
165 struct
167 __IO uint32_t swef : 1; /* [0] */
168 __IO uint32_t sef : 1; /* [1] */
169 __IO uint32_t pvmof : 1; /* [2] */
170 __IO uint32_t reserved1 : 5; /* [7:3] */
171 __IO uint32_t swpen1 : 1; /* [8] */
172 __IO uint32_t swpen2 : 1; /* [9] */
173 __IO uint32_t reserved2 : 22;/* [31:10] */
174 } ctrlsts_bit;
177 __IO uint32_t reserved1[2];
180 * @brief pwc ldoov register, offset:0x10
182 union
184 __IO uint32_t ldoov;
185 struct
187 __IO uint32_t ldoovsel : 3; /* [2:0] */
188 __IO uint32_t reserved1 : 29;/* [31:3] */
189 } ldoov_bit;
192 } pwc_type;
195 * @}
198 #define PWC ((pwc_type *) PWC_BASE)
200 /** @defgroup PWC_exported_functions
201 * @{
204 void pwc_reset(void);
205 void pwc_battery_powered_domain_access(confirm_state new_state);
206 void pwc_pvm_level_select(pwc_pvm_voltage_type pvm_voltage);
207 void pwc_power_voltage_monitor_enable(confirm_state new_state);
208 void pwc_wakeup_pin_enable(uint32_t pin_num, confirm_state new_state);
209 void pwc_flag_clear(uint32_t pwc_flag);
210 flag_status pwc_flag_get(uint32_t pwc_flag);
211 void pwc_sleep_mode_enter(pwc_sleep_enter_type pwc_sleep_enter);
212 void pwc_deep_sleep_mode_enter(pwc_deep_sleep_enter_type pwc_deep_sleep_enter);
213 void pwc_voltage_regulate_set(pwc_regulator_type pwc_regulator);
214 void pwc_standby_mode_enter(void);
217 * @}
221 * @}
225 * @}
228 #ifdef __cplusplus
230 #endif
232 #endif