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Merge pull request #10592 from iNavFlight/MrD_Update-parameter-description
[inav.git] / lib / main / STM32F7 / Drivers / STM32F7xx_HAL_Driver / Inc / stm32f7xx_hal_can.h
blobdc1ea3cae4601f1e8318bfa4154fa3172823d86c
1 /**
2 ******************************************************************************
3 * @file stm32f7xx_hal_can.h
4 * @author MCD Application Team
5 * @version V1.2.2
6 * @date 14-April-2017
7 * @brief Header file of CAN HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F7xx_HAL_CAN_H
40 #define __STM32F7xx_HAL_CAN_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f7xx_hal_def.h"
48
49 /** @addtogroup STM32F7xx_HAL_Driver
50 * @{
51 */
52
53 /** @addtogroup CAN
54 * @{
55 */
56
57 /* Exported types ------------------------------------------------------------*/
58 /** @defgroup CAN_Exported_Types CAN Exported Types
59 * @{
60 */
61
62 /**
63 * @brief HAL State structures definition
64 */
65 typedef enum
66 {
67 HAL_CAN_STATE_RESET = 0x00U, /*!< CAN not yet initialized or disabled */
68 HAL_CAN_STATE_READY = 0x01U, /*!< CAN initialized and ready for use */
69 HAL_CAN_STATE_BUSY = 0x02U, /*!< CAN process is ongoing */
70 HAL_CAN_STATE_BUSY_TX = 0x12U, /*!< CAN process is ongoing */
71 HAL_CAN_STATE_BUSY_RX0 = 0x22U, /*!< CAN process is ongoing */
72 HAL_CAN_STATE_BUSY_RX1 = 0x32U, /*!< CAN process is ongoing */
73 HAL_CAN_STATE_BUSY_TX_RX0 = 0x42U, /*!< CAN process is ongoing */
74 HAL_CAN_STATE_BUSY_TX_RX1 = 0x52U, /*!< CAN process is ongoing */
75 HAL_CAN_STATE_BUSY_RX0_RX1 = 0x62U, /*!< CAN process is ongoing */
76 HAL_CAN_STATE_BUSY_TX_RX0_RX1 = 0x72U, /*!< CAN process is ongoing */
77 HAL_CAN_STATE_TIMEOUT = 0x03U, /*!< CAN in Timeout state */
78 HAL_CAN_STATE_ERROR = 0x04U /*!< CAN error state */
79
80 }HAL_CAN_StateTypeDef;
81
82 /**
83 * @brief CAN init structure definition
84 */
85 typedef struct
86 {
87 uint32_t Prescaler; /*!< Specifies the length of a time quantum.
88 This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
89
90 uint32_t Mode; /*!< Specifies the CAN operating mode.
91 This parameter can be a value of @ref CAN_operating_mode */
92
93 uint32_t SJW; /*!< Specifies the maximum number of time quanta
94 the CAN hardware is allowed to lengthen or
95 shorten a bit to perform resynchronization.
96 This parameter can be a value of @ref CAN_synchronisation_jump_width */
97
98 uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1.
99 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
100
101 uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2.
102 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
103
104 uint32_t TTCM; /*!< Enable or disable the time triggered communication mode.
105 This parameter can be set to ENABLE or DISABLE. */
106
107 uint32_t ABOM; /*!< Enable or disable the automatic bus-off management.
108 This parameter can be set to ENABLE or DISABLE */
109
110 uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode.
111 This parameter can be set to ENABLE or DISABLE */
112
113 uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode.
114 This parameter can be set to ENABLE or DISABLE */
115
116 uint32_t RFLM; /*!< Enable or disable the receive FIFO Locked mode.
117 This parameter can be set to ENABLE or DISABLE */
118
119 uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority.
120 This parameter can be set to ENABLE or DISABLE */
121 }CAN_InitTypeDef;
122
123 /**
124 * @brief CAN filter configuration structure definition
125 */
126 typedef struct
127 {
128 uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
129 configuration, first one for a 16-bit configuration).
130 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
131
132 uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
133 configuration, second one for a 16-bit configuration).
134 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
135
136 uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
137 according to the mode (MSBs for a 32-bit configuration,
138 first one for a 16-bit configuration).
139 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
140
141 uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
142 according to the mode (LSBs for a 32-bit configuration,
143 second one for a 16-bit configuration).
144 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
145
146 uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
147 This parameter can be a value of @ref CAN_filter_FIFO */
148
149 uint32_t FilterNumber; /*!< Specifies the filter which will be initialized.
150 This parameter must be a number between Min_Data = 0 and Max_Data = 27 */
151
152 uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
153 This parameter can be a value of @ref CAN_filter_mode */
154
155 uint32_t FilterScale; /*!< Specifies the filter scale.
156 This parameter can be a value of @ref CAN_filter_scale */
157
158 uint32_t FilterActivation; /*!< Enable or disable the filter.
159 This parameter can be set to ENABLE or DISABLE. */
160
161 uint32_t BankNumber; /*!< Select the start slave bank filter.
162 This parameter must be a number between Min_Data = 0 and Max_Data = 28 */
163
164 }CAN_FilterConfTypeDef;
165
166 /**
167 * @brief CAN Tx message structure definition
168 */
169 typedef struct
170 {
171 uint32_t StdId; /*!< Specifies the standard identifier.
172 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
173
174 uint32_t ExtId; /*!< Specifies the extended identifier.
175 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
176
177 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
178 This parameter can be a value of @ref CAN_Identifier_Type */
179
180 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
181 This parameter can be a value of @ref CAN_remote_transmission_request */
182
183 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
184 This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
185
186 uint8_t Data[8]; /*!< Contains the data to be transmitted.
187 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
188
189 }CanTxMsgTypeDef;
190
191 /**
192 * @brief CAN Rx message structure definition
193 */
194 typedef struct
195 {
196 uint32_t StdId; /*!< Specifies the standard identifier.
197 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
198
199 uint32_t ExtId; /*!< Specifies the extended identifier.
200 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
201
202 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received.
203 This parameter can be a value of @ref CAN_Identifier_Type */
204
205 uint32_t RTR; /*!< Specifies the type of frame for the received message.
206 This parameter can be a value of @ref CAN_remote_transmission_request */
207
208 uint32_t DLC; /*!< Specifies the length of the frame that will be received.
209 This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
210
211 uint8_t Data[8]; /*!< Contains the data to be received.
212 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
213
214 uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through.
215 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
216
217 uint32_t FIFONumber; /*!< Specifies the receive FIFO number.
218 This parameter can be CAN_FIFO0 or CAN_FIFO1 */
219
220 }CanRxMsgTypeDef;
221
222 /**
223 * @brief CAN handle Structure definition
224 */
225 typedef struct
226 {
227 CAN_TypeDef *Instance; /*!< Register base address */
228
229 CAN_InitTypeDef Init; /*!< CAN required parameters */
230
231 CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */
232
233 CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure for RX FIFO0 msg */
234
235 CanRxMsgTypeDef* pRx1Msg; /*!< Pointer to reception structure for RX FIFO1 msg */
236
237 __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */
238
239 HAL_LockTypeDef Lock; /*!< CAN locking object */
240
241 __IO uint32_t ErrorCode; /*!< CAN Error code
242 This parameter can be a value of @ref CAN_Error_Code */
243 }CAN_HandleTypeDef;
244
245 /**
246 * @}
247 */
248
249 /* Exported constants --------------------------------------------------------*/
250 /** @defgroup CAN_Exported_Constants CAN Exported Constants
251 * @{
252 */
253
254 /** @defgroup CAN_Error_Code CAN Error Code
255 * @{
256 */
257 #define HAL_CAN_ERROR_NONE 0x00000000U /*!< No error */
258 #define HAL_CAN_ERROR_EWG 0x00000001U /*!< EWG error */
259 #define HAL_CAN_ERROR_EPV 0x00000002U /*!< EPV error */
260 #define HAL_CAN_ERROR_BOF 0x00000004U /*!< BOF error */
261 #define HAL_CAN_ERROR_STF 0x00000008U /*!< Stuff error */
262 #define HAL_CAN_ERROR_FOR 0x00000010U /*!< Form error */
263 #define HAL_CAN_ERROR_ACK 0x00000020U /*!< Acknowledgment error */
264 #define HAL_CAN_ERROR_BR 0x00000040U /*!< Bit recessive */
265 #define HAL_CAN_ERROR_BD 0x00000080U /*!< LEC dominant */
266 #define HAL_CAN_ERROR_CRC 0x00000100U /*!< LEC transfer error */
267 #define HAL_CAN_ERROR_FOV0 0x00000200U /*!< FIFO0 overrun error */
268 #define HAL_CAN_ERROR_FOV1 0x00000400U /*!< FIFO1 overrun error */
269 #define HAL_CAN_ERROR_TXFAIL 0x00000800U /*!< Transmit failure */
270 /**
271 * @}
272 */
273
274 /** @defgroup CAN_InitStatus CAN InitStatus
275 * @{
276 */
277 #define CAN_INITSTATUS_FAILED ((uint8_t)0x00U) /*!< CAN initialization failed */
278 #define CAN_INITSTATUS_SUCCESS ((uint8_t)0x01U) /*!< CAN initialization OK */
279 /**
280 * @}
281 */
282
283 /** @defgroup CAN_operating_mode CAN Operating Mode
284 * @{
285 */
286 #define CAN_MODE_NORMAL ((uint32_t)0x00000000U) /*!< Normal mode */
287 #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */
288 #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */
289 #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */
290 /**
291 * @}
292 */
293
294 /** @defgroup CAN_synchronisation_jump_width CAN Synchronisation Jump Width
295 * @{
296 */
297 #define CAN_SJW_1TQ ((uint32_t)0x00000000U) /*!< 1 time quantum */
298 #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */
299 #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */
300 #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */
301 /**
302 * @}
303 */
304
305 /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in bit segment 1
306 * @{
307 */
308 #define CAN_BS1_1TQ ((uint32_t)0x00000000U) /*!< 1 time quantum */
309 #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */
310 #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */
311 #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */
312 #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */
313 #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */
314 #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */
315 #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */
316 #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */
317 #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */
318 #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */
319 #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */
320 #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */
321 #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */
322 #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */
323 #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
324 /**
325 * @}
326 */
327
328 /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in bit segment 2
329 * @{
330 */
331 #define CAN_BS2_1TQ ((uint32_t)0x00000000U) /*!< 1 time quantum */
332 #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */
333 #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */
334 #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */
335 #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */
336 #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */
337 #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */
338 #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */
339 /**
340 * @}
341 */
342
343 /** @defgroup CAN_filter_mode CAN Filter Mode
344 * @{
345 */
346 #define CAN_FILTERMODE_IDMASK ((uint8_t)0x00U) /*!< Identifier mask mode */
347 #define CAN_FILTERMODE_IDLIST ((uint8_t)0x01U) /*!< Identifier list mode */
348 /**
349 * @}
350 */
351
352 /** @defgroup CAN_filter_scale CAN Filter Scale
353 * @{
354 */
355 #define CAN_FILTERSCALE_16BIT ((uint8_t)0x00U) /*!< Two 16-bit filters */
356 #define CAN_FILTERSCALE_32BIT ((uint8_t)0x01U) /*!< One 32-bit filter */
357 /**
358 * @}
359 */
360
361 /** @defgroup CAN_filter_FIFO CAN Filter FIFO
362 * @{
363 */
364 #define CAN_FILTER_FIFO0 ((uint8_t)0x00U) /*!< Filter FIFO 0 assignment for filter x */
365 #define CAN_FILTER_FIFO1 ((uint8_t)0x01U) /*!< Filter FIFO 1 assignment for filter x */
366 /**
367 * @}
368 */
369
370 /** @defgroup CAN_Identifier_Type CAN Identifier Type
371 * @{
372 */
373 #define CAN_ID_STD ((uint32_t)0x00000000U) /*!< Standard Id */
374 #define CAN_ID_EXT ((uint32_t)0x00000004U) /*!< Extended Id */
375 /**
376 * @}
377 */
378
379 /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
380 * @{
381 */
382 #define CAN_RTR_DATA ((uint32_t)0x00000000U) /*!< Data frame */
383 #define CAN_RTR_REMOTE ((uint32_t)0x00000002U) /*!< Remote frame */
384 /**
385 * @}
386 */
387
388 /** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number Constants
389 * @{
390 */
391 #define CAN_FIFO0 ((uint8_t)0x00U) /*!< CAN FIFO 0 used to receive */
392 #define CAN_FIFO1 ((uint8_t)0x01U) /*!< CAN FIFO 1 used to receive */
393 /**
394 * @}
395 */
396
397 /** @defgroup CAN_flags CAN Flags
398 * @{
399 */
400 /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
401 and CAN_ClearFlag() functions. */
402 /* If the flag is 0x1XXXXXXX, it means that it can only be used with
403 CAN_GetFlagStatus() function. */
404
405 /* Transmit Flags */
406 #define CAN_FLAG_RQCP0 ((uint32_t)0x00000500U) /*!< Request MailBox0 flag */
407 #define CAN_FLAG_RQCP1 ((uint32_t)0x00000508U) /*!< Request MailBox1 flag */
408 #define CAN_FLAG_RQCP2 ((uint32_t)0x00000510U) /*!< Request MailBox2 flag */
409 #define CAN_FLAG_TXOK0 ((uint32_t)0x00000501U) /*!< Transmission OK MailBox0 flag */
410 #define CAN_FLAG_TXOK1 ((uint32_t)0x00000509U) /*!< Transmission OK MailBox1 flag */
411 #define CAN_FLAG_TXOK2 ((uint32_t)0x00000511U) /*!< Transmission OK MailBox2 flag */
412 #define CAN_FLAG_TME0 ((uint32_t)0x0000051AU) /*!< Transmit mailbox 0 empty flag */
413 #define CAN_FLAG_TME1 ((uint32_t)0x0000051BU) /*!< Transmit mailbox 0 empty flag */
414 #define CAN_FLAG_TME2 ((uint32_t)0x0000051CU) /*!< Transmit mailbox 0 empty flag */
415
416 /* Receive Flags */
417 #define CAN_FLAG_FF0 ((uint32_t)0x00000203U) /*!< FIFO 0 Full flag */
418 #define CAN_FLAG_FOV0 ((uint32_t)0x00000204U) /*!< FIFO 0 Overrun flag */
419
420 #define CAN_FLAG_FF1 ((uint32_t)0x00000403U) /*!< FIFO 1 Full flag */
421 #define CAN_FLAG_FOV1 ((uint32_t)0x00000404U) /*!< FIFO 1 Overrun flag */
422
423 /* Operating Mode Flags */
424 #define CAN_FLAG_INAK ((uint32_t)0x00000100U) /*!< Initialization acknowledge flag */
425 #define CAN_FLAG_SLAK ((uint32_t)0x00000101U) /*!< Sleep acknowledge flag */
426 #define CAN_FLAG_ERRI ((uint32_t)0x00000102U) /*!< Error flag */
427 #define CAN_FLAG_WKU ((uint32_t)0x00000103U) /*!< Wake up flag */
428 #define CAN_FLAG_SLAKI ((uint32_t)0x00000104U) /*!< Sleep acknowledge flag */
429
430 /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
431 In this case the SLAK bit can be polled.*/
432
433 /* Error Flags */
434 #define CAN_FLAG_EWG ((uint32_t)0x00000300U) /*!< Error warning flag */
435 #define CAN_FLAG_EPV ((uint32_t)0x00000301U) /*!< Error passive flag */
436 #define CAN_FLAG_BOF ((uint32_t)0x00000302U) /*!< Bus-Off flag */
437 /**
438 * @}
439 */
440
441 /** @defgroup CAN_Interrupts CAN Interrupts
442 * @{
443 */
444 #define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */
445
446 /* Receive Interrupts */
447 #define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */
448 #define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */
449 #define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */
450 #define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */
451 #define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */
452 #define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */
453
454 /* Operating Mode Interrupts */
455 #define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */
456 #define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */
457
458 /* Error Interrupts */
459 #define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */
460 #define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */
461 #define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */
462 #define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
463 #define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */
464 /**
465 * @}
466 */
467
468 /** @defgroup CAN_Mailboxes_Definition CAN Mailboxes Definition
469 * @{
470 */
471 #define CAN_TXMAILBOX_0 ((uint8_t)0x00U)
472 #define CAN_TXMAILBOX_1 ((uint8_t)0x01U)
473 #define CAN_TXMAILBOX_2 ((uint8_t)0x02U)
474 /**
475 * @}
476 */
477
478 /**
479 * @}
480 */
481
482 /* Exported macro ------------------------------------------------------------*/
483 /** @defgroup CAN_Exported_Macros CAN Exported Macros
484 * @{
485 */
486
487 /** @brief Reset CAN handle state
488 * @param __HANDLE__: specifies the CAN Handle.
489 * @retval None
490 */
491 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
492
493 /**
494 * @brief Enable the specified CAN interrupts.
495 * @param __HANDLE__: CAN handle
496 * @param __INTERRUPT__: CAN Interrupt
497 * @retval None
498 */
499 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
500
501 /**
502 * @brief Disable the specified CAN interrupts.
503 * @param __HANDLE__: CAN handle
504 * @param __INTERRUPT__: CAN Interrupt
505 * @retval None
506 */
507 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
508
509 /**
510 * @brief Return the number of pending received messages.
511 * @param __HANDLE__: CAN handle
512 * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
513 * @retval The number of pending message.
514 */
515 #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
516 ((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03)))
517
518 /** @brief Check whether the specified CAN flag is set or not.
519 * @param __HANDLE__: CAN Handle
520 * @param __FLAG__: specifies the flag to check.
521 * This parameter can be one of the following values:
522 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
523 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
524 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
525 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
526 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
527 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
528 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
529 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
530 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
531 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
532 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
533 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
534 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
535 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
536 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
537 * @arg CAN_FLAG_WKU: Wake up Flag
538 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
539 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
540 * @arg CAN_FLAG_EWG: Error Warning Flag
541 * @arg CAN_FLAG_EPV: Error Passive Flag
542 * @arg CAN_FLAG_BOF: Bus-Off Flag
543 * @retval The new state of __FLAG__ (TRUE or FALSE).
544 */
545 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
546 ((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
547 (((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
548 (((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
549 (((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
550 ((((__HANDLE__)->Instance->ESR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))))
551
552 /** @brief Clear the specified CAN pending flag.
553 * @param __HANDLE__: CAN Handle.
554 * @param __FLAG__: specifies the flag to check.
555 * This parameter can be one of the following values:
556 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
557 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
558 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
559 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
560 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
561 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
562 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
563 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
564 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
565 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
566 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
567 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
568 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
569 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
570 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
571 * @arg CAN_FLAG_WKU: Wake up Flag
572 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
573 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
574 * @retval The new state of __FLAG__ (TRUE or FALSE).
575 */
576 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
577 ((((__FLAG__) >> 8) == 5)? (((__HANDLE__)->Instance->TSR) = ((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
578 (((__FLAG__) >> 8) == 2)? (((__HANDLE__)->Instance->RF0R) = ((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
579 (((__FLAG__) >> 8) == 4)? (((__HANDLE__)->Instance->RF1R) = ((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
580 (((__HANDLE__)->Instance->MSR) = ((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))))
581
582 /** @brief Check if the specified CAN interrupt source is enabled or disabled.
583 * @param __HANDLE__: CAN Handle
584 * @param __INTERRUPT__: specifies the CAN interrupt source to check.
585 * This parameter can be one of the following values:
586 * @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
587 * @arg CAN_IT_FMP0: FIFO0 message pending interrupt enable
588 * @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
589 * @retval The new state of __IT__ (TRUE or FALSE).
590 */
591 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
592
593 /**
594 * @brief Check the transmission status of a CAN Frame.
595 * @param __HANDLE__: CAN Handle
596 * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
597 * @retval The new status of transmission (TRUE or FALSE).
598 */
599 #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
600 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\
601 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\
602 ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)))
603
604 /**
605 * @brief Release the specified receive FIFO.
606 * @param __HANDLE__: CAN handle
607 * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
608 * @retval None
609 */
610 #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
611 ((__HANDLE__)->Instance->RF0R = CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R = CAN_RF1R_RFOM1))
612
613 /**
614 * @brief Cancel a transmit request.
615 * @param __HANDLE__: CAN Handle
616 * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
617 * @retval None
618 */
619 #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
620 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ0) :\
621 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ1) :\
622 ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ2))
623
624 /**
625 * @brief Enable or disable the DBG Freeze for CAN.
626 * @param __HANDLE__: CAN Handle
627 * @param __NEWSTATE__: new state of the CAN peripheral.
628 * This parameter can be: ENABLE (CAN reception/transmission is frozen
629 * during debug. Reception FIFOs can still be accessed/controlled normally)
630 * or DISABLE (CAN is working during debug).
631 * @retval None
632 */
633 #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
634 ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
635
636 /**
637 * @}
638 */
639
640 /* Exported functions --------------------------------------------------------*/
641 /** @addtogroup CAN_Exported_Functions
642 * @{
643 */
644
645 /** @addtogroup CAN_Exported_Functions_Group1
646 * @{
647 */
648 /* Initialization/de-initialization functions ***********************************/
649 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
650 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
651 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
652 void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
653 void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
654 /**
655 * @}
656 */
657
658 /** @addtogroup CAN_Exported_Functions_Group2
659 * @{
660 */
661 /* I/O operation functions ******************************************************/
662 HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
663 HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
664 HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
665 HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
666 HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
667 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
668 void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
669 void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
670 void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
671 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
672 /**
673 * @}
674 */
675
676 /** @addtogroup CAN_Exported_Functions_Group3
677 * @{
678 */
679 /* Peripheral State functions ***************************************************/
680 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
681 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
682 /**
683 * @}
684 */
685
686 /**
687 * @}
688 */
689
690 /* Private types -------------------------------------------------------------*/
691 /** @defgroup CAN_Private_Types CAN Private Types
692 * @{
693 */
694
695 /**
696 * @}
697 */
698
699 /* Private variables ---------------------------------------------------------*/
700 /** @defgroup CAN_Private_Variables CAN Private Variables
701 * @{
702 */
703
704 /**
705 * @}
706 */
707
708 /* Private constants ---------------------------------------------------------*/
709 /** @defgroup CAN_Private_Constants CAN Private Constants
710 * @{
711 */
712 #define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04U) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
713 #define CAN_FLAG_MASK ((uint32_t)0x000000FFU)
714 /**
715 * @}
716 */
717
718 /* Private macros ------------------------------------------------------------*/
719 /** @defgroup CAN_Private_Macros CAN Private Macros
720 * @{
721 */
722 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
723 ((MODE) == CAN_MODE_LOOPBACK)|| \
724 ((MODE) == CAN_MODE_SILENT) || \
725 ((MODE) == CAN_MODE_SILENT_LOOPBACK))
726 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
727 ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
728 #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
729 #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
730 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
731 #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27)
732 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
733 ((MODE) == CAN_FILTERMODE_IDLIST))
734 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
735 ((SCALE) == CAN_FILTERSCALE_32BIT))
736 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
737 ((FIFO) == CAN_FILTER_FIFO1))
738 #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28)
739
740 #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
741 #define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF))
742 #define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF))
743 #define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08))
744
745 #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \
746 ((IDTYPE) == CAN_ID_EXT))
747 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
748 #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
749
750 /**
751 * @}
752 */
753
754 /* Private functions ---------------------------------------------------------*/
755 /** @defgroup CAN_Private_Functions CAN Private Functions
756 * @{
757 */
758
759 /**
760 * @}
761 */
762 /**
763 * @}
764 */
765
766 /**
767 * @}
768 */
769
770 #ifdef __cplusplus
771 }
772 #endif
773
774 #endif /* __STM32F7xx_CAN_H */
775
776
777 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
INAV: Navigation-enabled flight control software