lib/main/STM32F7/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f7xx_ll_utils.h
   4   * @author  MCD Application Team
   5   * @version V1.2.2
   6   * @date    14-April-2017
   7   * @brief   Header file of UTILS LL module.
   8   @verbatim
   9   ==============================================================================
  10                      ##### How to use this driver #####
  11   ==============================================================================
  12     [..]
  13     The LL UTILS driver contains a set of generic APIs that can be
  14     used by user:
  15       (+) Device electronic signature
  16       (+) Timing functions
  17       (+) PLL configuration functions
  18
  19   @endverbatim
  20   ******************************************************************************
  21   * @attention
  22   *
  23   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  24   *
  25   * Redistribution and use in source and binary forms, with or without modification,
  26   * are permitted provided that the following conditions are met:
  27   *   1. Redistributions of source code must retain the above copyright notice,
  28   *      this list of conditions and the following disclaimer.
  29   *   2. Redistributions in binary form must reproduce the above copyright notice,
  30   *      this list of conditions and the following disclaimer in the documentation
  31   *      and/or other materials provided with the distribution.
  32   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  33   *      may be used to endorse or promote products derived from this software
  34   *      without specific prior written permission.
  35   *
  36   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  37   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  38   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  39   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  40   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  41   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  42   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  43   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  44   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  45   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  46   *
  47   ******************************************************************************
  48   */
  49
  50 /* Define to prevent recursive inclusion -------------------------------------*/
  51 #ifndef __STM32F7xx_LL_UTILS_H
  52 #define __STM32F7xx_LL_UTILS_H
  53
  54 #ifdef __cplusplus
  55 extern "C" {
  56 #endif
  57
  58 /* Includes ------------------------------------------------------------------*/
  59 #include "stm32f7xx.h"
  60
  61 /** @addtogroup STM32F7xx_LL_Driver
  62   * @{
  63   */
  64
  65 /** @defgroup UTILS_LL UTILS
  66   * @{
  67   */
  68
  69 /* Private types -------------------------------------------------------------*/
  70 /* Private variables ---------------------------------------------------------*/
  71
  72 /* Private constants ---------------------------------------------------------*/
  73 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
  74   * @{
  75   */
  76
  77 /* Max delay can be used in LL_mDelay */
  78 #define LL_MAX_DELAY                  0xFFFFFFFFU
  79
  80 /**
  81  * @brief Unique device ID register base address
  82  */
  83 #define UID_BASE_ADDRESS              UID_BASE
  84
  85 /**
  86  * @brief Flash size data register base address
  87  */
  88 #define FLASHSIZE_BASE_ADDRESS        FLASHSIZE_BASE
  89
  90 /**
  91  * @brief Package data register base address
  92  */
  93 #define PACKAGE_BASE_ADDRESS          PACKAGE_BASE
  94
  95 /**
  96   * @}
  97   */
  98
  99 /* Private macros ------------------------------------------------------------*/
 100 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
 101   * @{
 102   */
 103 /**
 104   * @}
 105   */
 106 /* Exported types ------------------------------------------------------------*/
 107 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
 108   * @{
 109   */
 110 /**
 111   * @brief  UTILS PLL structure definition
 112   */
 113 typedef struct
 114 {
 115   uint32_t PLLM;   /*!< Division factor for PLL VCO input clock.
 116                         This parameter can be a value of @ref RCC_LL_EC_PLLM_DIV
 117
 118                         This feature can be modified afterwards using unitary function
 119                         @ref LL_RCC_PLL_ConfigDomain_SYS(). */
 120
 121   uint32_t PLLN;   /*!< Multiplication factor for PLL VCO output clock.
 122                         This parameter must be a number between Min_Data = 50 and Max_Data = 432
 123
 124                         This feature can be modified afterwards using unitary function
 125                         @ref LL_RCC_PLL_ConfigDomain_SYS(). */
 126
 127   uint32_t PLLP;   /*!< Division for the main system clock.
 128                         This parameter can be a value of @ref RCC_LL_EC_PLLP_DIV
 129
 130                         This feature can be modified afterwards using unitary function
 131                         @ref LL_RCC_PLL_ConfigDomain_SYS(). */
 132 } LL_UTILS_PLLInitTypeDef;
 133
 134 /**
 135   * @brief  UTILS System, AHB and APB buses clock configuration structure definition
 136   */
 137 typedef struct
 138 {
 139   uint32_t AHBCLKDivider;         /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
 140                                        This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
 141
 142                                        This feature can be modified afterwards using unitary function
 143                                        @ref LL_RCC_SetAHBPrescaler(). */
 144
 145   uint32_t APB1CLKDivider;        /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
 146                                        This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
 147
 148                                        This feature can be modified afterwards using unitary function
 149                                        @ref LL_RCC_SetAPB1Prescaler(). */
 150
 151   uint32_t APB2CLKDivider;        /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
 152                                        This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
 153
 154                                        This feature can be modified afterwards using unitary function
 155                                        @ref LL_RCC_SetAPB2Prescaler(). */
 156
 157 } LL_UTILS_ClkInitTypeDef;
 158
 159 /**
 160   * @}
 161   */
 162
 163 /* Exported constants --------------------------------------------------------*/
 164 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
 165   * @{
 166   */
 167
 168 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
 169   * @{
 170   */
 171 #define LL_UTILS_HSEBYPASS_OFF        0x00000000U       /*!< HSE Bypass is not enabled                */
 172 #define LL_UTILS_HSEBYPASS_ON         0x00000001U       /*!< HSE Bypass is enabled                    */
 173 /**
 174   * @}
 175   */
 176
 177 /** @defgroup UTILS_EC_PACKAGETYPE PACKAGE TYPE
 178   * @{
 179   */
 180 #define LL_UTILS_PACKAGETYPE_LQFP100                    0x00000100U /*!< LQFP100 package type                         */
 181 #define LL_UTILS_PACKAGETYPE_LQFP144_WLCSP143           0x00000200U /*!< LQFP144 or WLCSP143 package type             */
 182 #define LL_UTILS_PACKAGETYPE_WLCSP180_LQFP176_UFBGA176  0x00000300U /*!< WLCSP180, LQFP176 or UFBGA176 package type   */
 183 #define LL_UTILS_PACKAGETYPE_LQFP176_LQFP208_TFBGA216   0x00000400U /*!< LQFP176, LQFP208 or TFBGA216 package type    */
 184 #define LL_UTILS_PACKAGETYPE_TFBGA216_LQFP176_LQFP208   0x00000500U /*!< LQFP176, LQFP208 or TFBGA216 package type    */
 185 #define LL_UTILS_PACKAGETYPE_LQFP176_TFBGA216_LQFP208   0x00000600U /*!< LQFP176, LQFP208 or TFBGA216 package type    */
 186 #define LL_UTILS_PACKAGETYPE_LQFP208_LQFP176_TFBGA216   0x00000700U /*!< LQFP176, LQFP208 or TFBGA216 package type    */
 187 /**
 188   * @}
 189   */
 190
 191 /**
 192   * @}
 193   */
 194
 195 /* Exported macro ------------------------------------------------------------*/
 196
 197 /* Exported functions --------------------------------------------------------*/
 198 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
 199   * @{
 200   */
 201
 202 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
 203   * @{
 204   */
 205
 206 /**
 207   * @brief  Get Word0 of the unique device identifier (UID based on 96 bits)
 208   * @retval UID[31:0]
 209   */
 210 __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
 211 {
 212   return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
 213 }
 214
 215 /**
 216   * @brief  Get Word1 of the unique device identifier (UID based on 96 bits)
 217   * @retval UID[63:32]
 218   */
 219 __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
 220 {
 221   return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
 222 }
 223
 224 /**
 225   * @brief  Get Word2 of the unique device identifier (UID based on 96 bits)
 226   * @retval UID[95:64]
 227   */
 228 __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
 229 {
 230   return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
 231 }
 232
 233 /**
 234   * @brief  Get Flash memory size
 235   * @note   This bitfield indicates the size of the device Flash memory expressed in
 236   *         Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
 237   * @retval FLASH_SIZE[15:0]: Flash memory size
 238   */
 239 __STATIC_INLINE uint32_t LL_GetFlashSize(void)
 240 {
 241   return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)));
 242 }
 243
 244 /**
 245   * @brief  Get Package type
 246   * @retval Returned value can be one of the following values:
 247   *         @arg @ref LL_UTILS_PACKAGETYPE_LQFP100
 248   *         @arg @ref LL_UTILS_PACKAGETYPE_LQFP144_WLCSP143 (*)
 249   *         @arg @ref LL_UTILS_PACKAGETYPE_WLCSP180_LQFP176_UFBGA176 (*)
 250   *         @arg @ref LL_UTILS_PACKAGETYPE_LQFP176_LQFP208_TFBGA216 (*)
 251   *
 252   *         (*) value not defined in all devices.
 253   */
 254 __STATIC_INLINE uint32_t LL_GetPackageType(void)
 255 {
 256   return (uint16_t)(READ_REG(*((uint32_t *)PACKAGE_BASE_ADDRESS)) & 0x0700U);
 257 }
 258
 259 /**
 260   * @}
 261   */
 262
 263 /** @defgroup UTILS_LL_EF_DELAY DELAY
 264   * @{
 265   */
 266
 267 /**
 268   * @brief  This function configures the Cortex-M SysTick source of the time base.
 269   * @param  HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
 270   * @note   When a RTOS is used, it is recommended to avoid changing the SysTick
 271   *         configuration by calling this function, for a delay use rather osDelay RTOS service.
 272   * @param  Ticks Number of ticks
 273   * @retval None
 274   */
 275 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
 276 {
 277   /* Configure the SysTick to have interrupt in 1ms time base */
 278   SysTick->LOAD  = (uint32_t)((HCLKFrequency / Ticks) - 1UL);  /* set reload register */
 279   SysTick->VAL   = 0UL;                                       /* Load the SysTick Counter Value */
 280   SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 281                    SysTick_CTRL_ENABLE_Msk;                   /* Enable the Systick Timer */
 282 }
 283
 284 void        LL_Init1msTick(uint32_t HCLKFrequency);
 285 void        LL_mDelay(uint32_t Delay);
 286
 287 /**
 288   * @}
 289   */
 290
 291 /** @defgroup UTILS_EF_SYSTEM SYSTEM
 292   * @{
 293   */
 294
 295 void        LL_SetSystemCoreClock(uint32_t HCLKFrequency);
 296 ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
 297                                          LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
 298 ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
 299                                          LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
 300
 301 /**
 302   * @}
 303   */
 304
 305 /**
 306   * @}
 307   */
 308
 309 /**
 310   * @}
 311   */
 312
 313 /**
 314   * @}
 315   */
 316
 317 #ifdef __cplusplus
 318 }
 319 #endif
 320
 321 #endif /* __STM32F7xx_LL_UTILS_H */
 322
 323 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/