Merge pull request #10558 from iNavFlight/MrD_Correct-comments-on-OSD-symbols
[inav.git] / lib / main / STM32F7 / Drivers / STM32F7xx_HAL_Driver / Src / stm32f7xx_hal_cec.c
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1 /**
2 ******************************************************************************
3 * @file stm32f7xx_hal_cec.c
4 * @author MCD Application Team
5 * @version V1.2.2
6 * @date 14-April-2017
7 * @brief CEC HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the High Definition Multimedia Interface
10 * Consumer Electronics Control Peripheral (CEC).
11 * + Initialization and de-initialization function
12 * + IO operation function
13 * + Peripheral Control function
16 @verbatim
17 ===============================================================================
18 ##### How to use this driver #####
19 ===============================================================================
20 [..]
21 The CEC HAL driver can be used as follow:
23 (#) Declare a CEC_HandleTypeDef handle structure.
24 (#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API:
25 (##) Enable the CEC interface clock.
26 (##) CEC pins configuration:
27 (+++) Enable the clock for the CEC GPIOs.
28 (+++) Configure these CEC pins as alternate function pull-up.
29 (##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT()
30 and HAL_CEC_Receive_IT() APIs):
31 (+++) Configure the CEC interrupt priority.
32 (+++) Enable the NVIC CEC IRQ handle.
33 (+++) The specific CEC interrupts (Transmission complete interrupt,
34 RXNE interrupt and Error Interrupts) will be managed using the macros
35 __HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit
36 and receive process.
38 (#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in
39 in case of Bit Rising Error, Error-Bit generation conditions, device logical
40 address and Listen mode in the hcec Init structure.
42 (#) Initialize the CEC registers by calling the HAL_CEC_Init() API.
44 [..]
45 (@) This API (HAL_CEC_Init()) configures also the low level Hardware (GPIO, CLOCK, CORTEX...etc)
46 by calling the customed HAL_CEC_MspInit() API.
48 @endverbatim
49 ******************************************************************************
50 * @attention
52 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
54 * Redistribution and use in source and binary forms, with or without modification,
55 * are permitted provided that the following conditions are met:
56 * 1. Redistributions of source code must retain the above copyright notice,
57 * this list of conditions and the following disclaimer.
58 * 2. Redistributions in binary form must reproduce the above copyright notice,
59 * this list of conditions and the following disclaimer in the documentation
60 * and/or other materials provided with the distribution.
61 * 3. Neither the name of STMicroelectronics nor the names of its contributors
62 * may be used to endorse or promote products derived from this software
63 * without specific prior written permission.
65 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
66 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
67 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
68 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
69 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
70 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
71 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
72 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
73 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
74 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
76 ******************************************************************************
79 /* Includes ------------------------------------------------------------------*/
80 #include "stm32f7xx_hal.h"
82 /** @addtogroup STM32F7xx_HAL_Driver
83 * @{
86 /** @defgroup CEC CEC
87 * @brief HAL CEC module driver
88 * @{
90 #ifdef HAL_CEC_MODULE_ENABLED
91 #if defined (CEC)
93 /* Private typedef -----------------------------------------------------------*/
94 /* Private define ------------------------------------------------------------*/
95 /** @defgroup CEC_Private_Constants CEC Private Constants
96 * @{
98 /**
99 * @}
102 /* Private macro -------------------------------------------------------------*/
103 /* Private variables ---------------------------------------------------------*/
104 /* Private function prototypes -----------------------------------------------*/
105 /** @defgroup CEC_Private_Functions CEC Private Functions
106 * @{
109 * @}
112 /* Exported functions ---------------------------------------------------------*/
114 /** @defgroup CEC_Exported_Functions CEC Exported Functions
115 * @{
118 /** @defgroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
119 * @brief Initialization and Configuration functions
121 @verbatim
122 ===============================================================================
123 ##### Initialization and Configuration functions #####
124 ===============================================================================
125 [..]
126 This subsection provides a set of functions allowing to initialize the CEC
127 (+) The following parameters need to be configured:
128 (++) SignalFreeTime
129 (++) Tolerance
130 (++) BRERxStop (RX stopped or not upon Bit Rising Error)
131 (++) BREErrorBitGen (Error-Bit generation in case of Bit Rising Error)
132 (++) LBPEErrorBitGen (Error-Bit generation in case of Long Bit Period Error)
133 (++) BroadcastMsgNoErrorBitGen (Error-bit generation in case of broadcast message error)
134 (++) SignalFreeTimeOption (SFT Timer start definition)
135 (++) OwnAddress (CEC device address)
136 (++) ListenMode
138 @endverbatim
139 * @{
143 * @brief Initializes the CEC mode according to the specified
144 * parameters in the CEC_InitTypeDef and creates the associated handle .
145 * @param hcec: CEC handle
146 * @retval HAL status
148 HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
150 /* Check the CEC handle allocation */
151 if((hcec == NULL) ||(hcec->Init.RxBuffer == NULL))
153 return HAL_ERROR;
156 /* Check the parameters */
157 assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
158 assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime));
159 assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance));
160 assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop));
161 assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen));
162 assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen));
163 assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen));
164 assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption));
165 assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode));
166 assert_param(IS_CEC_OWN_ADDRESS(hcec->Init.OwnAddress));
168 if(hcec->gState == HAL_CEC_STATE_RESET)
170 /* Allocate lock resource and initialize it */
171 hcec->Lock = HAL_UNLOCKED;
172 /* Init the low level hardware : GPIO, CLOCK */
173 HAL_CEC_MspInit(hcec);
175 hcec->gState = HAL_CEC_STATE_BUSY;
177 /* Disable the Peripheral */
178 __HAL_CEC_DISABLE(hcec);
180 /* Write to CEC Control Register */
181 hcec->Instance->CFGR = hcec->Init.SignalFreeTime | hcec->Init.Tolerance | hcec->Init.BRERxStop|\
182 hcec->Init.BREErrorBitGen | hcec->Init.LBPEErrorBitGen | hcec->Init.BroadcastMsgNoErrorBitGen |\
183 hcec->Init.SignalFreeTimeOption |((uint32_t)(hcec->Init.OwnAddress)<<16U) |\
184 hcec->Init.ListenMode;
186 /* Enable the following CEC Transmission/Reception interrupts as
187 * well as the following CEC Transmission/Reception Errors interrupts
188 * Rx Byte Received IT
189 * End of Reception IT
190 * Rx overrun
191 * Rx bit rising error
192 * Rx short bit period error
193 * Rx long bit period error
194 * Rx missing acknowledge
195 * Tx Byte Request IT
196 * End of Transmission IT
197 * Tx Missing Acknowledge IT
198 * Tx-Error IT
199 * Tx-Buffer Underrun IT
200 * Tx arbitration lost */
201 __HAL_CEC_ENABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
203 /* Enable the CEC Peripheral */
204 __HAL_CEC_ENABLE(hcec);
206 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
207 hcec->gState = HAL_CEC_STATE_READY;
208 hcec->RxState = HAL_CEC_STATE_READY;
210 return HAL_OK;
214 * @brief DeInitializes the CEC peripheral
215 * @param hcec: CEC handle
216 * @retval HAL status
218 HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
220 /* Check the CEC handle allocation */
221 if(hcec == NULL)
223 return HAL_ERROR;
226 /* Check the parameters */
227 assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
229 hcec->gState = HAL_CEC_STATE_BUSY;
231 /* DeInit the low level hardware */
232 HAL_CEC_MspDeInit(hcec);
234 /* Disable the Peripheral */
235 __HAL_CEC_DISABLE(hcec);
237 /* Clear Flags */
238 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXEND|CEC_FLAG_TXBR|CEC_FLAG_RXBR|CEC_FLAG_RXEND|CEC_ISR_ALL_ERROR);
240 /* Disable the following CEC Transmission/Reception interrupts as
241 * well as the following CEC Transmission/Reception Errors interrupts
242 * Rx Byte Received IT
243 * End of Reception IT
244 * Rx overrun
245 * Rx bit rising error
246 * Rx short bit period error
247 * Rx long bit period error
248 * Rx missing acknowledge
249 * Tx Byte Request IT
250 * End of Transmission IT
251 * Tx Missing Acknowledge IT
252 * Tx-Error IT
253 * Tx-Buffer Underrun IT
254 * Tx arbitration lost */
255 __HAL_CEC_DISABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
257 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
258 hcec->gState = HAL_CEC_STATE_RESET;
259 hcec->RxState = HAL_CEC_STATE_RESET;
261 /* Process Unlock */
262 __HAL_UNLOCK(hcec);
264 return HAL_OK;
268 * @brief Initializes the Own Address of the CEC device
269 * @param hcec: CEC handle
270 * @param CEC_OwnAddress: The CEC own address.
271 * @retval HAL status
273 HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress)
275 /* Check the parameters */
276 assert_param(IS_CEC_OWN_ADDRESS(CEC_OwnAddress));
278 if ((hcec->gState == HAL_CEC_STATE_READY) && (hcec->RxState == HAL_CEC_STATE_READY))
280 /* Process Locked */
281 __HAL_LOCK(hcec);
283 hcec->gState = HAL_CEC_STATE_BUSY;
285 /* Disable the Peripheral */
286 __HAL_CEC_DISABLE(hcec);
288 if(CEC_OwnAddress != CEC_OWN_ADDRESS_NONE)
290 hcec->Instance->CFGR |= ((uint32_t)CEC_OwnAddress<<16);
292 else
294 hcec->Instance->CFGR &= ~(CEC_CFGR_OAR);
297 hcec->gState = HAL_CEC_STATE_READY;
298 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
300 /* Process Unlocked */
301 __HAL_UNLOCK(hcec);
303 /* Enable the Peripheral */
304 __HAL_CEC_ENABLE(hcec);
306 return HAL_OK;
308 else
310 return HAL_BUSY;
315 * @brief CEC MSP Init
316 * @param hcec: CEC handle
317 * @retval None
319 __weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec)
321 /* Prevent unused argument(s) compilation warning */
322 UNUSED(hcec);
323 /* NOTE : This function should not be modified, when the callback is needed,
324 the HAL_CEC_MspInit can be implemented in the user file
329 * @brief CEC MSP DeInit
330 * @param hcec: CEC handle
331 * @retval None
333 __weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec)
335 /* Prevent unused argument(s) compilation warning */
336 UNUSED(hcec);
337 /* NOTE : This function should not be modified, when the callback is needed,
338 the HAL_CEC_MspDeInit can be implemented in the user file
343 * @}
346 /** @defgroup CEC_Exported_Functions_Group2 Input and Output operation functions
347 * @brief CEC Transmit/Receive functions
349 @verbatim
350 ===============================================================================
351 ##### IO operation functions #####
352 ===============================================================================
353 This subsection provides a set of functions allowing to manage the CEC data transfers.
355 (#) The CEC handle must contain the initiator (TX side) and the destination (RX side)
356 logical addresses (4-bit long addresses, 0xF for broadcast messages destination)
358 (#) The communication is performed using Interrupts.
359 These API's return the HAL status.
360 The end of the data processing will be indicated through the
361 dedicated CEC IRQ when using Interrupt mode.
362 The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks
363 will be executed respectively at the end of the transmit or Receive process
364 The HAL_CEC_ErrorCallback() user callback will be executed when a communication
365 error is detected
367 (#) API's with Interrupt are :
368 (+) HAL_CEC_Transmit_IT()
369 (+) HAL_CEC_IRQHandler()
371 (#) A set of User Callbacks are provided:
372 (+) HAL_CEC_TxCpltCallback()
373 (+) HAL_CEC_RxCpltCallback()
374 (+) HAL_CEC_ErrorCallback()
376 @endverbatim
377 * @{
381 * @brief Send data in interrupt mode
382 * @param hcec: CEC handle
383 * @param InitiatorAddress: Initiator address
384 * @param DestinationAddress: destination logical address
385 * @param pData: pointer to input byte data buffer
386 * @param Size: amount of data to be sent in bytes (without counting the header).
387 * 0 means only the header is sent (ping operation).
388 * Maximum TX size is 15 bytes (1 opcode and up to 14 operands).
389 * @retval HAL status
391 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress,uint8_t DestinationAddress, uint8_t *pData, uint32_t Size)
393 /* if the IP isn't already busy and if there is no previous transmission
394 already pending due to arbitration lost */
395 if (hcec->gState == HAL_CEC_STATE_READY)
397 if((pData == NULL ) && (Size > 0))
399 return HAL_ERROR;
402 assert_param(IS_CEC_ADDRESS(DestinationAddress));
403 assert_param(IS_CEC_ADDRESS(InitiatorAddress));
404 assert_param(IS_CEC_MSGSIZE(Size));
406 /* Process Locked */
407 __HAL_LOCK(hcec);
408 hcec->pTxBuffPtr = pData;
409 hcec->gState = HAL_CEC_STATE_BUSY_TX;
410 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
412 /* initialize the number of bytes to send,
413 * 0 means only one header is sent (ping operation) */
414 hcec->TxXferCount = Size;
416 /* in case of no payload (Size = 0), sender is only pinging the system;
417 Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */
418 if (Size == 0)
420 __HAL_CEC_LAST_BYTE_TX_SET(hcec);
422 /* send header block */
423 hcec->Instance->TXDR = ((uint8_t)(InitiatorAddress << CEC_INITIATOR_LSB_POS) |(uint8_t) DestinationAddress);
424 /* Set TX Start of Message (TXSOM) bit */
425 __HAL_CEC_FIRST_BYTE_TX_SET(hcec);
427 /* Process Unlocked */
428 __HAL_UNLOCK(hcec);
430 return HAL_OK;
433 else
435 return HAL_BUSY;
440 * @brief Get size of the received frame.
441 * @param hcec: CEC handle
442 * @retval Frame size
444 uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec)
446 return hcec->RxXferSize;
450 * @brief Change Rx Buffer.
451 * @param hcec: CEC handle
452 * @param Rxbuffer: Rx Buffer
453 * @note This function can be called only inside the HAL_CEC_RxCpltCallback()
454 * @retval Frame size
456 void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer)
458 hcec->Init.RxBuffer = Rxbuffer;
462 * @brief This function handles CEC interrupt requests.
463 * @param hcec: CEC handle
464 * @retval None
466 void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
469 /* save interrupts register for further error or interrupts handling purposes */
470 uint32_t reg = 0;
471 reg = hcec->Instance->ISR;
474 /* ----------------------------Arbitration Lost Management----------------------------------*/
475 /* CEC TX arbitration error interrupt occurred --------------------------------------*/
476 if((reg & CEC_FLAG_ARBLST) != RESET)
478 hcec->ErrorCode = HAL_CEC_ERROR_ARBLST;
479 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST);
482 /* ----------------------------Rx Management----------------------------------*/
483 /* CEC RX byte received interrupt ---------------------------------------------------*/
484 if((reg & CEC_FLAG_RXBR) != RESET)
486 /* reception is starting */
487 hcec->RxState = HAL_CEC_STATE_BUSY_RX;
488 hcec->RxXferSize++;
489 /* read received byte */
490 *hcec->Init.RxBuffer++ = hcec->Instance->RXDR;
491 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXBR);
494 /* CEC RX end received interrupt ---------------------------------------------------*/
495 if((reg & CEC_FLAG_RXEND) != RESET)
497 /* clear IT */
498 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXEND);
500 /* Rx process is completed, restore hcec->RxState to Ready */
501 hcec->RxState = HAL_CEC_STATE_READY;
502 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
503 hcec->Init.RxBuffer-=hcec->RxXferSize;
504 HAL_CEC_RxCpltCallback(hcec, hcec->RxXferSize);
505 hcec->RxXferSize = 0;
508 /* ----------------------------Tx Management----------------------------------*/
509 /* CEC TX byte request interrupt ------------------------------------------------*/
510 if((reg & CEC_FLAG_TXBR) != RESET)
512 if (hcec->TxXferCount == 0)
514 /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */
515 __HAL_CEC_LAST_BYTE_TX_SET(hcec);
516 hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
518 else
520 hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
521 hcec->TxXferCount--;
523 /* clear Tx-Byte request flag */
524 __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXBR);
527 /* CEC TX end interrupt ------------------------------------------------*/
528 if((reg & CEC_FLAG_TXEND) != RESET)
530 __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND);
532 /* Tx process is ended, restore hcec->gState to Ready */
533 hcec->gState = HAL_CEC_STATE_READY;
534 /* Call the Process Unlocked before calling the Tx call back API to give the possibility to
535 start again the Transmission under the Tx call back API */
536 __HAL_UNLOCK(hcec);
537 hcec->ErrorCode = HAL_CEC_ERROR_NONE;
538 HAL_CEC_TxCpltCallback(hcec);
541 /* ----------------------------Rx/Tx Error Management----------------------------------*/
542 if ((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != 0)
544 hcec->ErrorCode = reg;
545 __HAL_CEC_CLEAR_FLAG(hcec, HAL_CEC_ERROR_RXOVR|HAL_CEC_ERROR_BRE|CEC_FLAG_LBPE|CEC_FLAG_SBPE|HAL_CEC_ERROR_RXACKE|HAL_CEC_ERROR_TXUDR|HAL_CEC_ERROR_TXERR|HAL_CEC_ERROR_TXACKE);
548 if((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE)) != RESET)
550 hcec->Init.RxBuffer-=hcec->RxXferSize;
551 hcec->RxXferSize = 0;
552 hcec->RxState = HAL_CEC_STATE_READY;
554 else if (((reg & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != RESET) && ((reg & CEC_ISR_ARBLST) == RESET))
556 /* Set the CEC state ready to be able to start again the process */
557 hcec->gState = HAL_CEC_STATE_READY;
560 /* Error Call Back */
561 HAL_CEC_ErrorCallback(hcec);
567 * @brief Tx Transfer completed callback
568 * @param hcec: CEC handle
569 * @retval None
571 __weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec)
573 /* Prevent unused argument(s) compilation warning */
574 UNUSED(hcec);
575 /* NOTE : This function should not be modified, when the callback is needed,
576 the HAL_CEC_TxCpltCallback can be implemented in the user file
581 * @brief Rx Transfer completed callback
582 * @param hcec: CEC handle
583 * @param RxFrameSize: Size of frame
584 * @retval None
586 __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize)
588 /* Prevent unused argument(s) compilation warning */
589 UNUSED(hcec);
590 UNUSED(RxFrameSize);
591 /* NOTE : This function should not be modified, when the callback is needed,
592 the HAL_CEC_RxCpltCallback can be implemented in the user file
597 * @brief CEC error callbacks
598 * @param hcec: CEC handle
599 * @retval None
601 __weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec)
603 /* Prevent unused argument(s) compilation warning */
604 UNUSED(hcec);
605 /* NOTE : This function should not be modified, when the callback is needed,
606 the HAL_CEC_ErrorCallback can be implemented in the user file
610 * @}
613 /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control function
614 * @brief CEC control functions
616 @verbatim
617 ===============================================================================
618 ##### Peripheral Control function #####
619 ===============================================================================
620 [..]
621 This subsection provides a set of functions allowing to control the CEC.
622 (+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral.
623 (+) HAL_CEC_GetError() API can be helpful to check in run-time the error of the CEC peripheral.
624 @endverbatim
625 * @{
628 * @brief return the CEC state
629 * @param hcec: pointer to a CEC_HandleTypeDef structure that contains
630 * the configuration information for the specified CEC module.
631 * @retval HAL state
633 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec)
635 uint32_t temp1= 0x00U, temp2 = 0x00U;
636 temp1 = hcec->gState;
637 temp2 = hcec->RxState;
639 return (HAL_CEC_StateTypeDef)(temp1 | temp2);
643 * @brief Return the CEC error code
644 * @param hcec : pointer to a CEC_HandleTypeDef structure that contains
645 * the configuration information for the specified CEC.
646 * @retval CEC Error Code
648 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec)
650 return hcec->ErrorCode;
654 * @}
658 * @}
660 #endif /* CEC */
661 #endif /* HAL_CEC_MODULE_ENABLED */
663 * @}
667 * @}
670 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/